client/trunk/anago/nintendo_mmc1_skrom.ag

   1 board <- {\r
   2         mappernum = 1, vram_mirrorfind = false, ppu_ramfind = true,\r
   3         cpu_rom = {\r
   4                 size_base = 1 * mega, size_max = 2 * mega,\r
   5                 banksize = 0x4000, \r
   6         }, \r
   7         cpu_ram = {\r
   8                 size_base = 0x2000, size_max = 0x2000,\r
   9                 banksize = 0x2000\r
  10         },\r
  11         ppu_rom = {\r
  12                 size_base = 1 * mega, size_max = 1 * mega,\r
  13                 banksize = 0x1000, \r
  14         }\r
  15 };\r
  16 \r
  17 dofile("mmc1.ai");\r
  18 \r
  19 function cpu_dump(d, pagesize, banksize)\r
  20 {\r
  21         cpu_write(d, 0x8000, 0x80); //serial count reset\r
  22         mmc1_write(d, 0x8000, 0x0c); //CPU/PPU bank configuration\r
  23         for(local i = 0; i < pagesize - 1; i += 1){\r
  24                 mmc1_write(d, 0xe000, i | 0x10);\r
  25                 cpu_read(d, 0x8000, banksize);\r
  26         }\r
  27         cpu_read(d, 0xc000, banksize);\r
  28 }\r
  29 \r
  30 function ppu_dump(d, pagesize, banksize)\r
  31 {\r
  32         for(local i = 0; i < pagesize; i += 2){\r
  33                 mmc1_write(d, 0xa000, i);\r
  34                 mmc1_write(d, 0xc000, i | 1);\r
  35                 ppu_read(d, 0, banksize * 2);\r
  36         }\r
  37 }\r
  38 \r
  39 function cpu_ram_access(d, pagesize, banksize)\r
  40 {\r
  41         mmc1_write(d, 0x8000, 1 << 3);\r
  42         mmc1_write(d, 0xe000, 0);\r
  43         mmc1_write(d, 0xa000, 0);\r
  44         cpu_ramrw(d, 0x6000, banksize);\r
  45         mmc1_write(d, 0xe000, 0xff);\r
  46 }\r
  47 \r
  48 /*\r
  49 MMC1 ROM 2M + (ROM 1M or RAM) board\r
  50 CPU memory bank for SLROM, SKROM, SGROM, SNROM\r
  51 cpu address|rom address    |page|task\r
  52 $8000-$bfff|n * 0x4000|even 0x00|write 0x2aaa + write area\r
  53 $c000-$ffff|0x3c000-0x3ffff|fix |write 0x5555\r
  54 ---------------------------------\r
  55 $8000-$bfff|0x00000-0x03fff|fix |write 0x2aaa\r
  56 $c000-$ffff|n * 0x4000|odd  0x01|write 0x5555 + write area\r
  57 \r
  58 PPU memory bank for SLROM, SKROM\r
  59 ppu area use command only mask A0-A10 device\r
  60 ppu address|rom address    |page|task\r
  61 $0000-$0fff|0x00000 * n    |n   |write area + 0x2aa + 0x555\r
  62 $0000-$1fff|0x01000 * n    |n+1 |write area\r
  63 */\r
  64 function program_initalize(d, cpu_banksize, ppu_banksize)\r
  65 {\r
  66         cpu_write(d, 0x8000, 0x80);\r
  67         mmc1_write(d, 0xa000, 0x10); //SNROM + MMC1A disable W-RAM\r
  68         mmc1_write(d, 0x8000, 0x1c);\r
  69         mmc1_write(d, 0xe000, 0x10); //MMC1B disable W-RAM\r
  70         cpu_command(d, 0x0000, 0x8000, cpu_banksize);\r
  71         cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);\r
  72         cpu_command(d, 0x5555, 0xc000, cpu_banksize);\r
  73 \r
  74         ppu_command(d, 0x0000, 0, ppu_banksize);\r
  75         ppu_command(d, 0x02aa, 0, ppu_banksize);\r
  76         ppu_command(d, 0x0555, 0, ppu_banksize);\r
  77 }\r
  78 \r
  79 function cpu_transfer(d, start, end, cpu_banksize)\r
  80 {\r
  81         local i = 0;\r
  82         local wram = 1 << 4; //W-RAM disable flag\r
  83         for(i = start; i < end - 2; i += 2){\r
  84                 mmc1_write(d, 0x8000, 0x1c);\r
  85                 mmc1_write(d, 0xe000, i | 0 | wram);\r
  86                 cpu_program(d, 0x8000, cpu_banksize);\r
  87                 \r
  88                 mmc1_write(d, 0x8000, 0x18);\r
  89                 mmc1_write(d, 0xe000, i | 1 | wram);\r
  90                 cpu_program(d, 0xc000, cpu_banksize);\r
  91         }\r
  92         mmc1_write(d, 0x8000, 0x1c);\r
  93         mmc1_write(d, 0xe000, i | wram);\r
  94         cpu_program(d, 0x8000, cpu_banksize);\r
  95         cpu_program(d, 0xc000, cpu_banksize);\r
  96 }\r
  97 \r
  98 function ppu_transfer(d, start, end, ppu_banksize)\r
  99 {\r
 100         for(local i = start; i < end; i+=2){\r
 101                 mmc1_write(d, 0xa000, i)\r
 102                 mmc1_write(d, 0xc000, i | 1);\r
 103                 ppu_program(d, 0x0000, ppu_banksize * 2);\r
 104         }\r
 105 }\r
 106 \r