vrc2a01.ud:
\83R\83i\83~ \83\8f\83C\83\8f\83C\83\8f\81[\83\8b\83h
\8c\8e\95\97\96\82\93`
- \83h\83\89\83S\83\93\83X\83N\83\8d\81[\83\8b áS\82è\82µ\96\82\97³ (\96¢\8am\94F)
+ \83h\83\89\83S\83\93\83X\83N\83\8d\81[\83\8b áS\82è\82µ\96\82\97³
\8d°\93l\97\85 (\92\8d:\8f\89\91ã)
\82¶\82á\82è\82ñ\8eq\83`\83G
\82ª\82ñ\82Î\82ê\83S\83G\83\82\83\932
\83\8f\83C\83\8f\83C\83\8f\81[\83\8b\83h2 SOS!!\83p\83Z\83\8a\8fé
vrc4b.ud:
\83o\83C\83I\83~\83\89\83N\83\8b \82Ú\82\82Á\82Ä\83E\83p (\92\8d:ROM)
- \82ª\82ñ\82Î\82ê\83S\83G\83\82\83\93\8aO\93` \8fÁ\82¦\82½\89©\8bà\83L\83Z\83\8b
+ \82ª\82ñ\82Î\82ê\83S\83G\83\82\83\93\8aO\93` \8fÁ\82¦\82½\89©\8bà\83L\83Z\83\8b (\96{\93\96\82Í VRC2)
\83O\83\89\83f\83B\83E\83XII
\83\8c\81[\83T\81[\83~\83j\8el\8bì \83W\83\83\83p\83\93\83J\83b\83v
vrc4c.ud:
+#RC832, RC842
#VRCIV A0,A1 swap + A1 invert
#VRC - CPU
#A0 = A1
#A1 ^ A0
-#RC832, RC842
-#¤¬¤ó¤Ð¤ì¥´¥¨¥â¥ó³°ÅÁ¾Ã¤¨¤¿²«¶â¥¥»¥ë
+#RC840 ¤¬¤ó¤Ð¤ì¥´¥¨¥â¥ó³°ÅÁ¾Ã¤¨¤¿²«¶â¥¥»¥ë
+#VRCII A0,A1 swap + IRQ °Ê³°¤Ï VRCIV ¤È¸ß´¹À¤¬¤¢¤ë¤é¤·¤¤...
+#VRC-CPU|databus
+#A0 = A1|A0: xxxx3210
+#A1 = A0|A1: xxxx6543
+#VRC-CHRCTER ROM
+#A13-A17 = A13-A17
MAPPER 25
CPU_ROMSIZE 0x40000
PPU_ROMSIZE 0x40000
#$9001 bit2:0 $a000 switch $8000-$9fff
#$9001 bit2:1 $a000 switch $c000-$dfff
+#VRC2 ¤Ç¤Ï̵¸ú
DUMP_START
#PROGRAM ROM 0x00000-0x3bfff
CPU_WRITE $9001 $00
CPU_READ $8000 0x4000
STEP_END
#PROGRAM ROM 0x3c000-0x3ffff
+#VRC2 ¤Ç¤Ï̵¸ú
CPU_WRITE $9001 $02
CPU_WRITE $8000 $1e
CPU_READ $c000 0x4000