MCU_164P = MCU=atmega164p TARGET=kazzo_mega164p PCB_REVISION=1
MCU_16 = MCU=atmega16 TARGET=kazzo_mega16 PCB_REVISION=1
MCU_168 = MCU=atmega168 TARGET=kazzo_mega168 PCB_REVISION=2
-SOURCE_ROOT = Makefile COPYING kazzo_test.exe kazzo_schematics.png readme.txt usbrequest.txt kazzo_mega16.hex kazzo_mega164p.hex
+SOURCE_ROOT = \
+ Makefile COPYING kazzo_test.exe kazzo_pcb_1.png kazzo_pcb_2.png \
+ readme.txt usbrequest.txt mcu16.txt mcu88.txt \
+ kazzo_mega16.hex kazzo_mega164p.hex kazzo_mega168.hex
SOURCE_FIRMWARE = \
avr_main.c bus_access.c disk_access.c flashmemory.c mcu_program.c \
bus_access.h disk_access.h flashmemory.h kazzo_request.h kazzo_task.h type.h usbconfig.h mcu_program.h \
--- /dev/null
+----AVR fusebit configuration----
+ATmega164P: low byte 0xee, high byte 0xd9, extended byte 0xff
+ CKDIV8:1 CKOUT:1 SUT:10 CKSEL:1110
+ OCDEN:1 JTAGEN:1 SPIEN:0 WDTON:1 EESAVE:1 BOOTSZ:00 BOOTRST:1
+ BODLEVEL:111
+ATmega16: low byte 0xae, high byte 0xc9
+ BODLEVEL:1 BODEN:0 SUT:10 CKSEL:1110
+ OCDEN:1 JTAGEN:1 SPIEN:0 CKOPT:0 EESAVE:1 BOOTSZ:00 BOOTRST:1
+
+----list of parts-----
+# |name
+-----+-------------------
+U1 |ATmega164P or ATmega16
+U2 |74HC574
+CN1 |type B female USB socket
+CN2 |3x2 pin header, 2.54 mm spacing
+CN3 |30x2 pin cartridge connector, 2.54 mm spacing
+R1,R2|68 ohm register
+R3 |1.5 kohm register
+R4 |30 kohm register
+D1,D2|3.6 V zener diode
+X1 |16.0 MHz ceramic resonator
+C1,C2|0.1uF ceramic capacitor
+CP1 |10uF electric capacitor
+JP1 |toggle switch
+JP2 |push switch
+
+----pin assignment----
+See the schematics file for switch, register, diode and capacitor connection.
+
+CN3: cartridge connector CN1: USB socket type B
+ +-----+ +---+ U1: ATmega164P (DIP)
+ GND| 1 31|+5V +5V|1 4|GND +--v--+
+ CPU A11| 2 32|CPU PHI2 D-|2 3|D+ D0| 1 40|A0
+ CPU A10| 3 33|CPU A12 +---+ D1| 2 39|A1
+ CPU A9| 4 34|CPU A13 CN2: ISP connector D2| 3 38|A2
+ CPU A8| 5 35|CPU A14 +---+ D3| 4 37|A3
+ CPU A7| 6 36|CPU D7 MISO|1 2|Vcc D4| 5 36|A4
+ CPU A6| 7 37|CPU D6 SCK|3 4|MOSI MOSI/D5| 6 35|A5
+ CPU A5| 8 38|CPU D5 Reset#|5 6|GND MISO/D6| 7 34|A6
+ CPU A4| 9 39|CPU D4 +---+ SCK/D7| 8 33|A7
+ CPU A3|10 40|CPU D3 U2: 74HC574 Reset#| 9 32|+5V
+ CPU A2|11 41|CPU D2 +--v--+ Vcc|10 31|GND
+ CPU A1|12 42|CPU D1 GND| 1 20|Vcc GND|11 30|+5V
+ CPU A0|13 43|CPU D0 D0| 2 19|A8 XTAL1|12 29|AHL
+ CPU R/W|14 44|CPU ROMCS# D1| 3 18|A9 XTAL2|13 28|VRAM CS#
+CPU IRQ#|15 45|SOUND IN D2| 4 17|A10 NC|14 27|PPU WR#
+ GND|16 46|SOUND OUT D3| 5 16|A11 NC|15 26|PPU RD#
+ PPU RD#|17 47|PPU WR# D4| 6 15|A12 USB D+|16 25|NC
+VRAM A10|18 48|VRAM CS# D5| 7 14|A13 CPU IRQ#|17 24|CPU R/W
+ PPU A6|19 49|PPU A13# D6| 8 13|CPU A14 USB D-|18 23|CPU ROMCS#
+ PPU A5|20 50|PPU A7 D7| 9 12|PPU A13# VRAM A10|19 22|CPU PHI2
+ PPU A4|21 51|PPU A8 GND|10 11|AHL NC|20 21|NC
+ PPU A3|22 52|PPU A9 +-----+ +-----+
+ PPU A2|23 53|PPU A10
+ PPU A1|24 54|PPU A11
+ PPU A0|25 55|PPU A12
+ PPU D0|26 56|PPU A13
+ PPU D1|27 57|PPU D7
+ PPU D2|28 58|PPU D6
+ PPU D3|29 59|PPU D5
+ +5V|30 60|PPU D4
+ +-----+
+
+----notice----
+- AHL is Address High Latch.
+- NC is No Connection.
+- # is negative logic signal.
+- D0-D7 are data buses.
+-- shared by U1, U2, CN3(CPU and PPU).
+-- D5-D7 are shared by ISP signal.
+- A0-A13 are address buses.
+-- A0-A7 are shared by U1, CN3(CPU and PPU)
+-- A8-A13 are shared by U2, CN3(CPU and PPU)
+- CPU A14 and PPU A13# are unique address buses.
+- U1 can substitute ATmega16.
+- SOUND IN and SOUND OUT have no connection.
+- If a power switch is unnecessary, short JP1.
+- If a reset switch is unnecessary, open JP2.
--- /dev/null
+----AVR fusebit configuration----
+ATmega168: low byte 0xee, high byte 0xdf, extended byte 0xff
+ CKDIV8:1 CKOUT:1 SUT:10 CKSEL:1110
+ RSTDISBL:1 DWEN:1 SPIEN:0 WDTON:1 EESAVE:1 BODLEVEL:111
+ BOOTSZ:11 BOOTRST:1
+
+----list of parts-----
+# |name
+-----+-------------------
+U1 |ATmega168(P)
+U2,U3|74HC574
+CN1 |type B female USB socket
+CN2 |3x2 pin header, 2.54 mm spacing
+CN3 |30x2 pin cardedge connector, 2.54 mm spacing
+CN4 |36x2 pin cardedge connector, 2.54 mm spacing
+R1,R2|68 ohm register
+R3 |1.5 kohm register
+R4 |30 kohm register
+D1,D2|3.6 V zener diode
+X1 |16.0 MHz ceramic resonator
+C1,C2,C3|0.1uF ceramic capacitor
+CP1 |10uF electric capacitor
+JP1 |toggle switch
+JP2 |push switch
+
+----pin assignment----
+See schematics for switch, register, diode and capacitor connection.
+
+ U1: ATmega168 (DIP) U2: 74HC574 CN1: USB socket type B
+ +--v--+ +--v--+ +---+
+ Reset#| 1 28|PPU WR# GND| 1 20|Vcc +5V|1 4|GND
+ D0| 2 27|PPU RD# D0| 2 19|A8 D-|2 3|D+
+ D1| 3 26|CPU R/W D1| 3 18|A9 +---+
+ D2| 4 25|CPU ROMCS# D2| 4 17|A10 CN2: ISP conncetor
+ D3| 5 24|CPU PHI2 D3| 5 16|A11 +---+
+ D4| 6 23|CPU IRQ# D4| 6 15|A12 MISO|1 2|Vcc
+ Vcc| 7 22|GND D5| 7 14|A13 SCK|3 4|MOSI
+ GND| 8 21|+5V D6| 8 13|CPU A14 Reset#|5 6|GND
+ XTAL1| 9 20|+5V D7| 9 12|PPU A13# +---+
+ XTAL2|10 19|SCK/AHL GND|10 11|AHL
+ D5|11 18|MISO/ALL +-----+
+ D6|12 17|MOSI/VRAM CS# U3: 74HC574
+ D7|13 16|VRAM A10 +--v--+
+ USB D+|14 15|USB D- GND| 1 20|Vcc
+ +-----+ D0| 2 19|A0
+ D1| 3 18|A1
+ D2| 4 17|A2
+ D3| 5 16|A3
+ D4| 6 15|A4
+ D5| 7 14|A5
+ D6| 8 13|A6
+ D7| 9 12|A7
+ GND|10 11|ALL
+ +-----+
+
+CN3: cartridge connector CN4: cartridge connector
+ +-----+ +-----+
+ GND| 1 31|+5V +5V|36 72|GND
+ CPU A11| 2 32|CPU PHI2 CIC S1|35 71|CIC CLOCK
+ CPU A10| 3 33|CPU A12 CIC S0|34 70|CIC S2
+ CPU A9| 4 34|CPU A13 PPU D3|33 69|PPU D4
+ CPU A8| 5 35|CPU A14 PPU D2|32 68|PPU D5
+ CPU A7| 6 36|CPU D7 PPU D1|31 67|PPU D6
+ CPU A6| 7 37|CPU D6 PPU D0|30 66|PPU D7
+ CPU A5| 8 38|CPU D5 PPU A0|29 65|PPU A13
+ CPU A4| 9 39|CPU D4 PPU A1|28 64|PPU A12
+ CPU A3|10 40|CPU D3 PPU A2|27 63|PPU A10
+ CPU A2|11 41|CPU D2 PPU A3|26 62|PPU A11
+ CPU A1|12 42|CPU D1 PPU A4|25 61|PPU A9
+ CPU A0|13 43|CPU D0 PPU A5|24 60|PPU A8
+ CPU R/W|14 44|CPU ROMCS# PPU A6|23 59|PPU A7
+CPU IRQ#|15 45|SOUND IN VRAM A10|22 58|PPU A13#
+ GND|16 46|SOUND OUT PPU RD#|21 57|VRAM CS#
+ PPU RD#|17 47|PPU WR# EXP 38|20 56|PPU WR#
+VRAM A10|18 48|VRAM CS# EXP 39|19 55|EXP 10
+ PPU A6|19 49|PPU A13# EXP 40|18 54|EXP 9
+ PPU A5|20 50|PPU A7 EXP 41|17 53|EXP 8
+ PPU A4|21 51|PPU A8 EXP 42|16 52|EXP 7
+ PPU A3|22 52|PPU A9 CPU IRQ#|15 51|EXP 6
+ PPU A2|23 53|PPU A10 CPU R/W|14 50|CPU ROMCS#
+ PPU A1|24 54|PPU A11 CPU A0|13 49|CPU D0
+ PPU A0|25 55|PPU A12 CPU A1|12 48|CPU D1
+ PPU D0|26 56|PPU A13 CPU A2|11 47|CPU D2
+ PPU D1|27 57|PPU D7 CPU A3|10 46|CPU D3
+ PPU D2|28 58|PPU D6 CPU A4| 9 45|CPU D4
+ PPU D3|29 59|PPU D5 CPU A5| 8 44|CPU D5
+ +5V|30 60|PPU D4 CPU A6| 7 43|CPU D6
+ +-----+ CPU A7| 6 42|CPU D7
+ CPU A8| 5 41|CPU A14
+ CPU A9| 4 40|CPU A13
+ CPU A10| 3 39|CPU A12
+ CPU A11| 2 38|CPU PHI2
+ GND| 1 37|Video CLOCK
+ +-----+
famicom cartridge bus simulator 'kazzo'
unagi development team / 2009.10.08
-firmware version 0.1.2 / 2010.01.10
+firmware version 0.1.3 / 2010.03.13
----features----
- USB-to-PC communication
device driver for Windows
kazzo_test.exe
loop back test client binary for Windows
-kazzo_mega16.hex kazzo_mega164p.hex
+kazzo_mega16.hex kazzo_mega164p.hex kazzo_mega168.hex
firmware hex file written in Intel-Hex Record format
-kazzo_schematics.png
- schematics graphic file
+kazzo_pcb_1.png
+ schematics graphic file for PCB 1.x
(note: U1 pin number is assigned as ATmega16 QFP.)
+kazzo_pcb_2.png
+ schematics graphic file for PCB 2.x
+mcu16.txt mcu88.txt
+ pin and fusebit assignments
readme.txt
this file
usbrequest.txt
and source codes are available from the official project page.
http://unagi.sourceforge.jp/
-----AVR fusebit configuration----
-ATmega164P: low byte 0xee, high byte 0xd9, extended byte 0xff
- CKDIV8:1 CKOUT:1 SUT:10 CKSEL:1110
- OCDEN:1 JTAGEN:1 SPIEN:0 WDTON:1 EESAVE:1 BOOTSZ:00 BOOTRST:1
- BODLEVEL:111
-ATmega16: low byte 0xae, high byte 0xc9
- BODLEVEL:1 BODEN:0 SUT:10 CKSEL:1110
- OCDEN:1 JTAGEN:1 SPIEN:0 CKOPT:0 EESAVE:1 BOOTSZ:00 BOOTRST:1
+----hardware designs----
+Hardware designs has 2 revisions. Check each docments.
+ATmega16 or ATmega164P based design / PCB 1.x -> mcu16.txt
+ATmega168 or ATmega168P based design / PCB 2.x -> mcu88.txt
-----list of parts-----
-# |name
------+-------------------
-U1 |ATmega164P or ATmega16
-U2 |74HC574
-CN1 |type B female USB socket
-CN2 |3x2 pin header, 2.54 mm spacing
-CN3 |30x2 pin cartridge connector, 2.54 mm spacing
-R1,R2|68 ohm register
-R3 |1.5 kohm register
-R4 |30 kohm register
-D1,D2|3.6 V zener diode
-X1 |16.0 MHz ceramic resonator
-C1,C2|0.1uF ceramic capacitor
-CP1 |10uF electric capacitor
-JP1 |toggle switch
-JP2 |push switch
+PCB 2.x is a design to reduce the produce cost. The transfer rate is
+slower than PCB 1.x. Because ATmega168 uses PCINT port for interrupt.
+ATmega168 does not have empty IO pins. It's difficult to expansions.
-----pin assignment----
-See the schematics file for switch, register, diode and capacitor connection.
+If you assemble kazzo by yourself, we recommend PCB 1.x. We will not stop
+supporting PCB 1.x.
-CN3: cartridge connector CN1: USB socket type B
- +-----+ +---+ U1: ATmega164P (DIP)
- GND| 1 31|+5V +5V|1 4|GND +--v--+
- CPU A11| 2 32|CPU PHI2 D-|2 3|D+ D0| 1 40|A0
- CPU A10| 3 33|CPU A12 +---+ D1| 2 39|A1
- CPU A9| 4 34|CPU A13 CN2: ISP connector D2| 3 38|A2
- CPU A8| 5 35|CPU A14 +---+ D3| 4 37|A3
- CPU A7| 6 36|CPU D7 MISO|1 2|Vcc D4| 5 36|A4
- CPU A6| 7 37|CPU D6 SCK|3 4|MOSI MOSI/D5| 6 35|A5
- CPU A5| 8 38|CPU D5 Reset#|5 6|GND MISO/D6| 7 34|A6
- CPU A4| 9 39|CPU D4 +---+ SCK/D7| 8 33|A7
- CPU A3|10 40|CPU D3 U2: 74HC574 Reset#| 9 32|+5V
- CPU A2|11 41|CPU D2 +--v--+ Vcc|10 31|GND
- CPU A1|12 42|CPU D1 GND| 1 20|Vcc GND|11 30|+5V
- CPU A0|13 43|CPU D0 D0| 2 19|A8 XTAL1|12 29|AHL
- CPU R/W|14 44|CPU ROMCS# D1| 3 18|A9 XTAL2|13 28|VRAM CS#
-CPU IRQ#|15 45|SOUND IN D2| 4 17|A10 NC|14 27|PPU WR#
- GND|16 46|SOUND OUT D3| 5 16|A11 NC|15 26|PPU RD#
- PPU RD#|17 47|PPU WR# D4| 6 15|A12 USB D+|16 25|NC
-VRAM A10|18 48|VRAM CS# D5| 7 14|A13 CPU IRQ#|17 24|CPU R/W
- PPU A6|19 49|PPU A13# D6| 8 13|CPU A14 USB D-|18 23|CPU ROMCS#
- PPU A5|20 50|PPU A7 D7| 9 12|PPU A13# VRAM A10|19 22|CPU PHI2
- PPU A4|21 51|PPU A8 GND|10 11|AHL NC|20 21|NC
- PPU A3|22 52|PPU A9 +-----+ +-----+
- PPU A2|23 53|PPU A10
- PPU A1|24 54|PPU A11
- PPU A0|25 55|PPU A12
- PPU D0|26 56|PPU A13
- PPU D1|27 57|PPU D7
- PPU D2|28 58|PPU D6
- PPU D3|29 59|PPU D5
- +5V|30 60|PPU D4
- +-----+
-
-----notice----
-- AHL is Address High Latch.
-- NC is No Connection.
-- # is negative logic signal.
-- D0-D7 are data buses.
--- shared by U1, U2, CN3(CPU and PPU).
--- D5-D7 are shared by ISP signal.
-- A0-A13 are address buses.
--- A0-A7 are shared by U1, CN3(CPU and PPU)
--- A8-A13 are shared by U2, CN3(CPU and PPU)
-- CPU A14 and PPU A13# are unique address buses.
-- U1 can substitute ATmega16.
-- SOUND IN and SOUND OUT have no connection.
-- If a power switch is unnecessary, short JP1.
-- If a reset switch is unnecessary, open JP2.
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