4 void setupInterruptGate( int int_num, void *interrupt_handler );
5 void setupGateDescriptor( int int_num,int base,unsigned short selector,unsigned char flags );
9 #define AR_TSS32 0x0089
11 /*GDT Segment Descriptor*/
14 unsigned short limitLo;
15 unsigned short baseLo;
16 unsigned char baseMid;
19 } __attribute__ ((packed)) SEGMENT_DESCRIPTOR;
25 SEGMENT_DESCRIPTOR* base;
26 } __attribute__ ((packed)) GDTR;
31 unsigned short baseLo;
32 unsigned short selector;
33 unsigned char reserved;
35 unsigned short baseHi;
36 } __attribute__ ((packed)) GATE_DESCRIPTOR;
41 GATE_DESCRIPTOR* base;
42 } __attribute__ ((packed)) IDTR;
49 #define DEF_IDT_FLAGS_INTGATE_16BIT 0x06
50 #define DEF_IDT_FLAGS_TSKGATE 0x05
51 #define DEF_IDT_FLAGS_CALL_GATE 0x0C
52 #define DEF_IDT_FLAGS_INTGATE_32BIT 0x0E
53 #define DEF_IDT_FLAGS_TRPGATE 0x0F
54 #define DEF_IDT_FLAGS_DPL_LV0 0x00
55 #define DEF_IDT_FLAGS_DPL_LV1 0x20
56 #define DEF_IDT_FLAGS_DPL_LV2 0x40
57 #define DEF_IDT_FLAGS_DPL_LV3 0x60
58 #define DEF_IDT_FLAGS_PRESENT 0x80
60 #define DEF_IDT_INT_NUM_IRQ1 33
61 #define DEF_IDT_INT_NUM_IRQ0 32
62 #define DEF_IDT_INT_NUM_SYSC 0x30
63 #define DEF_IDT_INT_NUM_V86I 0x31
64 #define DEF_IDT_INT_NUM_V86O 0x32
66 #define DEF_IDT_INT_SELECTOR 0x08
70 #define NULL_DESCRIPTOR 0
71 #define CODE_DESCRIPTOR 1
72 #define DATA_DESCRIPTOR 2
73 #define TEMP_DESCRIPTOR 3
74 #define TASK_CODE_DESCRIPTOR 3
75 #define TASK_DATA_DESCRIPTOR 4
76 #define KTSS_DESCRIPTOR 5
79 #define DEF_GDT_NULL_LIMIT 0x0000
80 #define DEF_GDT_NULL_BASELO 0x0000
81 #define DEF_GDT_NULL_BASEMID 0x00
82 #define DEF_GDT_NULL_FLAGS 0x0000
83 #define DEF_GDT_NULL_BASEHI 0x00
86 #define DEF_GDT_CODE_LIMIT 0xFFFF
87 #define DEF_GDT_CODE_BASELO 0x0000
88 #define DEF_GDT_CODE_BASEMID 0x00
89 #define DEF_GDT_CODE_FLAGS_BL 0x9A
90 #define DEF_GDT_CODE_FLAGS_BH 0xCF
91 #define DEF_GDT_CODE_FLAGS 0xCF9A
92 #define DEF_GDT_CODE_BASEHI 0x00
95 #define DEF_GDT_DATA_LIMIT 0xFFFF
96 #define DEF_GDT_DATA_BASELO 0x0000
97 #define DEF_GDT_DATA_BASEMID 0x00
98 #define DEF_GDT_DATA_FLAGS 0xCF92
99 #define DEF_GDT_DATA_FLAGS_BL 0x92
100 #define DEF_GDT_DATA_FLAGS_BH 0xCF
101 #define DEF_GDT_DATA_BASEHI 0x00
104 #define PORT_MASTER_PIC_COMMAND 0x0020
105 #define PORT_MASTER_PIC_STATUS 0x0020
106 #define PORT_MASTER_PIC_DATA 0x0021
107 #define PORT_MASTER_PIC_IMR 0x0021
108 #define PORT_SLAVE_PIC_COMMAND 0x00A0
109 #define PORT_SLAVE_PIC_STATUS 0x00A0
110 #define PORT_SLAVE_PIC_DATA 0x00A1
111 #define PORT_SLAVE_PIC_IMR 0x00A1
112 #define PIC_ICW1 0x11
113 #define PIC_MASTER_ICW2 0x20
114 #define PIC_SLAVE_ICW2 0x28
115 #define PIC_MASTER_ICW3 0x04
116 #define PIC_SLAVE_ICW3 0x02
117 #define PIC_MASTER_ICW4 0x01
118 #define PIC_SLAVE_ICW4 0x01
121 #define PIC_IMR_MASK_IRQ0 0x01
122 #define PIC_IMR_MASK_IRQ1 0x02
123 #define PIC_IMR_MASK_IRQ2 0x04
124 #define PIC_IMR_MASK_IRQ3 0x08
125 #define PIC_IMR_MASK_IRQ4 0x10
126 #define PIC_IMR_MASK_IRQ5 0x20
127 #define PIC_IMR_MASK_IRQ6 0x40
128 #define PIC_IMR_MASK_IRQ7 0x80
129 #define PIC_IMR_MASK_IRQ_ALL 0xFF
132 #define PIT_REG_COUNTER0 0x0040
133 #define PIT_REG_COUNTER1 0x0041
134 #define PIT_REG_COUNTER2 0x0042
135 #define PIT_REG_CONTROL 0x0043
136 #define DEF_PIT_CLOCK 1193181.67
137 #define DEF_PIT_COM_MASK_BINCOUNT 0x01
138 #define DEF_PIT_COM_MASK_MODE 0x0E
139 #define DEF_PIT_COM_MASK_RL 0x30
140 #define DEF_PIT_COM_MASK_COUNTER 0xC0
141 #define DEF_PIT_COM_BINCOUNT_BIN 0x00
142 #define DEF_PIT_COM_BINCOUNT_BCD 0x01
143 #define DEF_PIT_COM_MODE_TERMINAL 0x00
144 #define DEF_PIT_COM_MODE_PROGONE 0x02
145 #define DEF_PIT_COM_MODE_RATEGEN 0x04
146 #define DEF_PIT_COM_MODE_SQUAREWAVE 0x06
147 #define DEF_PIT_COM_MODE_SOFTTRIG 0x08
148 #define DEF_PIT_COM_MODE_HARDTRIG 0x0A
149 #define DEF_PIT_COM_RL_LATCH 0x00
150 #define DEF_PIT_COM_RL_LSBONLY 0x10
151 #define DEF_PIT_COM_RL_MSBONLY 0x20
152 #define DEF_PIT_COM_RL_DATA 0x30
153 #define DEF_PIT_COM_COUNTER0 0x00
154 #define DEF_PIT_COM_COUNTER1 0x40
155 #define DEF_PIT_COM_COUNTER2 0x80
159 extern GATE_DESCRIPTOR idt[ NUM_IDT ];
160 extern SEGMENT_DESCRIPTOR gdt[ NUM_GDT ];