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motonesfpga/motonesfpga.git
2013-05-23
astoria-d
motones_sim virtual circuit board empty code added.
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2013-05-22
astoria-d
memory timing and bus controller updated.
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2013-05-22
astoria-d
rom/ram read/write timing modfied.
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2013-05-21
astoria-d
update.
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2013-05-21
astoria-d
output 'Z' when invalid bus address.
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2013-05-21
astoria-d
build order changed.
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2013-05-21
astoria-d
added root Makefile.
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2013-05-21
astoria-d
change select pins to active low.
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2013-05-21
astoria-d
makefile and code updates.
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2013-05-21
astoria-d
Make rule updated.
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2013-05-20
astoria-d
ram test added.
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2013-05-20
astoria-d
ram created
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2013-05-20
astoria-d
prg rom created.
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2013-05-15
astoria-d
regn test update
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2013-05-15
astoria-d
reg testbench updated.
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2013-05-15
astoria-d
register added.
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2013-05-15
astoria-d
deleted binary.
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2013-05-15
astoria-d
cpu register circuit prepared.
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2013-05-15
astoria-d
alu sencsitivity list modified.
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2013-05-14
astoria-d
adc renamed.
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2013-05-14
astoria-d
adc test added.
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2013-05-14
astoria-d
alu changed to use sequential statement.
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2013-05-13
astoria-d
alu integrated.
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2013-05-12
astoria-d
structurte >> rtl
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2013-05-11
astoria-d
alu circuit work started.
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2013-05-11
astoria-d
testbench updated.
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2013-05-10
astoria-d
test modified.
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2013-05-10
astoria-d
adc calcuration ok
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2013-05-08
astoria-d
start working on cpu simulation
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2013-05-07
astoria-d
test
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2013-05-07
astoria-d
8 bit adder test bench ok
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2013-05-05
astoria-d
8-bit adder
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2013-05-05
astoria-d
clean up
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2013-05-05
astoria-d
full adder ok
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2013-05-04
astoria-d
removed
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2013-05-04
astoria-d
full adder test
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2013-05-04
astoria-d
test
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2013-05-04
astoria-d
test
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