Reference commits:
8097fcb40b ("[GlobalISel] Add basic Selector-emitter tblgen backend.")
ca24065b98 ("[globalisel] Tablegen-erate current Register Bank Information")
945c85d877 ("AMDGPU/GlobalISel: Add support for simple shaders")
defaults: [
"llvm-lib-defaults",
],
- // Only pull in this one file to ensure we aren't building with this
- // experimental feature just yet.
- srcs: ["GlobalISel.cpp"],
+ // Aarch64 and AMDGPU targets require GlobalIsel
+ // Experimental feature enabled by building all srcs
+ srcs: ["*.cpp"],
}
"llvm-aarch64-defaults",
],
srcs: ["*.cpp"],
-
- // Global ISEL is an experimental feature. If LLVM_BUILD_GLOBAL_ISEL is not
- // set, these files fail compilation based on a macro check.
- exclude_srcs: [
- "AArch64CallLowering.cpp",
- "AArch64RegisterBankInfo.cpp",
- ],
}
cc_defaults {
"AArch64GenDisassemblerTables.inc",
"AArch64GenMCPseudoLowering.inc",
"AArch64GenSystemOperands.inc",
+ "AArch64GenRegisterBank.inc",
+ "AArch64GenGlobalISel.inc",
],
}
"llvm-amdgpu-defaults",
],
srcs: ["*.cpp"],
-
- // Global ISEL is an experimental feature. If LLVM_BUILD_GLOBAL_ISEL is not
- // set, these files fail compilation based on a macro check.
- exclude_srcs: [
- "AMDGPUCallLowering.cpp",
- ],
}
cc_defaults {
"AMDGPUGenSubtargetInfo.inc",
"AMDGPUGenIntrinsics.inc",
"AMDGPUGenDFAPacketizer.inc",
+ "AMDGPUGenRegisterBank.inc",
+ "AMDGPUGenGlobalISel.inc",
],
}
return "-gen-opt-parser-defs"
case strings.HasSuffix(out, "GenDFAPacketizer.inc"):
return "-gen-dfa-packetizer"
+ case strings.HasSuffix(out, "GenRegisterBank.inc"):
+ return "-gen-register-bank"
+ case strings.HasSuffix(out, "GenGlobalISel.inc"):
+ return "-gen-global-isel"
case out == "Attributes.inc", out == "AttributesCompatFunc.inc":
return "-gen-attrs"
case out == "Intrinsics.gen":