OSDN Git Service

android: Aarch64,AMDGPU: enable GlobalISel
authorMauro Rossi <issor.oruam@gmail.com>
Sat, 25 Aug 2018 21:45:24 +0000 (23:45 +0200)
committerMauro Rossi <issor.oruam@gmail.com>
Sat, 8 Sep 2018 07:29:42 +0000 (09:29 +0200)
Reference commits:
8097fcb40b ("[GlobalISel] Add basic Selector-emitter tblgen backend.")
ca24065b98 ("[globalisel] Tablegen-erate current Register Bank Information")
945c85d877 ("AMDGPU/GlobalISel: Add support for simple shaders")

lib/CodeGen/GlobalISel/Android.bp
lib/Target/AArch64/Android.bp
lib/Target/AMDGPU/Android.bp
soong/tblgen.go

index 871be26..4dd07c6 100644 (file)
@@ -3,7 +3,7 @@ cc_library_static {
     defaults: [
         "llvm-lib-defaults",
     ],
-    // Only pull in this one file to ensure we aren't building with this
-    // experimental feature just yet.
-    srcs: ["GlobalISel.cpp"],
+    // Aarch64 and AMDGPU targets require GlobalIsel
+    // Experimental feature enabled by building all srcs
+    srcs: ["*.cpp"],
 }
index 6f23095..125558f 100644 (file)
@@ -5,13 +5,6 @@ cc_library_static {
         "llvm-aarch64-defaults",
     ],
     srcs: ["*.cpp"],
-
-    // Global ISEL is an experimental feature.  If LLVM_BUILD_GLOBAL_ISEL is not
-    // set, these files fail compilation based on a macro check.
-    exclude_srcs: [
-        "AArch64CallLowering.cpp",
-        "AArch64RegisterBankInfo.cpp",
-    ],
 }
 
 cc_defaults {
@@ -49,6 +42,8 @@ llvm_tblgen {
         "AArch64GenDisassemblerTables.inc",
         "AArch64GenMCPseudoLowering.inc",
         "AArch64GenSystemOperands.inc",
+        "AArch64GenRegisterBank.inc",
+        "AArch64GenGlobalISel.inc",
     ],
 }
 
index 314f581..15496d7 100644 (file)
@@ -5,12 +5,6 @@ cc_library_static {
         "llvm-amdgpu-defaults",
     ],
     srcs: ["*.cpp"],
-
-    // Global ISEL is an experimental feature.  If LLVM_BUILD_GLOBAL_ISEL is not
-    // set, these files fail compilation based on a macro check.
-    exclude_srcs: [
-        "AMDGPUCallLowering.cpp",
-    ],
 }
 
 cc_defaults {
@@ -44,6 +38,8 @@ llvm_tblgen {
         "AMDGPUGenSubtargetInfo.inc",
         "AMDGPUGenIntrinsics.inc",
         "AMDGPUGenDFAPacketizer.inc",
+        "AMDGPUGenRegisterBank.inc",
+        "AMDGPUGenGlobalISel.inc",
     ],
 }
 
index 4e59fbf..9ec0605 100644 (file)
@@ -128,6 +128,10 @@ func outToGenerator(ctx android.ModuleContext, out string) string {
                return "-gen-opt-parser-defs"
        case strings.HasSuffix(out, "GenDFAPacketizer.inc"):
                return "-gen-dfa-packetizer"
+       case strings.HasSuffix(out, "GenRegisterBank.inc"):
+               return "-gen-register-bank"
+       case strings.HasSuffix(out, "GenGlobalISel.inc"):
+               return "-gen-global-isel"
        case out == "Attributes.inc", out == "AttributesCompatFunc.inc":
                return "-gen-attrs"
        case out == "Intrinsics.gen":