Add GPE function for MI_COPY_MEM_MEM command

This function is used to reads 4 bytes from memory and stores the value
of that 4 bytes to back to memory, both source and destination addresses
are Per Process Graphics Address

It is a helper function for low power encoding support

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
index fe90c9b..dcb729b 100644 (file)
--- a/src/i965_gpe_utils.c
+++ b/src/i965_gpe_utils.c
@@ -2467,6 +2467,25 @@ gen8_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx,
 }
 
 void
+gen8_gpe_mi_copy_mem_mem(VADriverContextP ctx,
+                         struct intel_batchbuffer *batch,
+                         struct gpe_mi_copy_mem_parameter *param)
+{
+    __OUT_BATCH(batch, (MI_COPY_MEM_MEM |
+                        (0 << 22) |
+                        (0 << 21) |
+                        (5 - 2))); /* Always use PPGTT for src and dst */
+    __OUT_RELOC64(batch,
+                  param->dst_bo,
+                  I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                  param->dst_offset);
+    __OUT_RELOC64(batch,
+                  param->src_bo,
+                  I915_GEM_DOMAIN_RENDER, 0,
+                  param->src_offset);
+}
+
+void
 gen8_gpe_pipe_control(VADriverContextP ctx,
                       struct intel_batchbuffer *batch,
                       struct gpe_pipe_control_parameter *param)
@@ -2813,6 +2832,7 @@ i965_gpe_table_init(VADriverContextP ctx)
         gpe->mi_store_register_mem = gen8_gpe_mi_store_register_mem;
         gpe->mi_store_data_imm = gen8_gpe_mi_store_data_imm;
         gpe->mi_flush_dw = gen8_gpe_mi_flush_dw;
+        gpe->mi_copy_mem_mem = gen8_gpe_mi_copy_mem_mem;
     } else if (IS_GEN9(i965->intel.device_info) ||
                IS_GEN10(i965->intel.device_info)) {
         gpe->context_init = gen8_gpe_context_init;
@@ -2836,6 +2856,7 @@ i965_gpe_table_init(VADriverContextP ctx)
         gpe->mi_store_register_mem = gen8_gpe_mi_store_register_mem;
         gpe->mi_store_data_imm = gen8_gpe_mi_store_data_imm;
         gpe->mi_flush_dw = gen8_gpe_mi_flush_dw;
+        gpe->mi_copy_mem_mem = gen8_gpe_mi_copy_mem_mem;
     } else {
         // TODO: for other platforms
     }

diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
index eaf6eb5..1031ccc 100644 (file)
--- a/src/i965_gpe_utils.h
+++ b/src/i965_gpe_utils.h
@@ -238,6 +238,13 @@ struct gpe_mi_batch_buffer_start_parameter {
     unsigned int use_global_gtt;
 };
 
+struct gpe_mi_copy_mem_parameter {
+    dri_bo *src_bo;
+    unsigned int src_offset;
+    dri_bo *dst_bo;
+    unsigned int dst_offset;
+};
+
 void i965_gpe_context_destroy(struct i965_gpe_context *gpe_context);
 void i965_gpe_context_init(VADriverContextP ctx,
                            struct i965_gpe_context *gpe_context);
@@ -691,6 +698,10 @@ struct i965_gpe_table {
     void (*mi_flush_dw)(VADriverContextP ctx,
                         struct intel_batchbuffer *batch,
                         struct gpe_mi_flush_dw_parameter *params);
+
+    void (*mi_copy_mem_mem)(VADriverContextP ctx,
+                            struct intel_batchbuffer *batch,
+                            struct gpe_mi_copy_mem_parameter *params);
 };
 
 extern bool

diff --git a/src/intel_driver.h b/src/intel_driver.h
index f88dee0..c46a9cf 100644 (file)
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -52,6 +52,8 @@
 #define MI_CONDITIONAL_BATCH_BUFFER_END         (CMD_MI | (0x36 << 23))
 #define   MI_COMPARE_MASK_MODE_ENANBLED                 (1 << 19)
 
+#define MI_COPY_MEM_MEM                         (CMD_MI | (0x2E << 23))
+
 #define XY_COLOR_BLT_CMD                        (CMD_2D | (0x50 << 22) | 0x04)
 #define XY_COLOR_BLT_WRITE_ALPHA                (1 << 21)
 #define XY_COLOR_BLT_WRITE_RGB                  (1 << 20)