2 \ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
3 \ MSP_EXP430FR4133 CHIPSTICK_FR2433
4 \ MY_MSP430FR5738_1 MY_MSP430FR5738 MY_MSP430FR5948 MY_MSP430FR5948_1
11 [DEFINED] {FIXPOINT} [IF] {FIXPOINT} [THEN] \ remove {FIXPOINT} if outside core
13 [DEFINED] ASM [UNDEFINED] {FIXPOINT} AND [IF] \ assembler required, don't replicate {FIXPOINT} inside core
17 \ https://forth-standard.org/standard/core/HOLDS
18 \ Adds the string represented by addr u to the pictured numeric output string
19 \ compilation use: <# S" string" HOLDS #>
20 \ free chars area in the 32+2 bytes HOLD buffer = {26,23,2} chars with a 32 bits sized {hexa,decimal,binary} number.
21 \ (2 supplementary bytes are room for sign - and decimal point)
27 BEGIN SUB #1,X \ 1 src-1
29 U>= WHILE SUB #1,Y \ 1 dst-1
33 MOV @IP+,PC \ 4 15 words
36 CODE F+ \ add s15q16 numbers
37 ADD @PSP+,2(PSP) \ -- sumlo d1hi d2hi
38 ADDC @PSP+,TOS \ -- sumlo sumhi
42 CODE F- \ substract s15q16 numbers
43 SUB @PSP+,2(PSP) \ -- diflo d1hi d2hi
44 SUBC TOS,0(PSP) \ -- diflo difhi d2hi
49 CODE F/ \ s15q16 / s15q16 --> s15q16 result
51 XOR TOS,S \ MDhi XOR MRhi --> S keep sign of result
53 MOV 4(PSP),Y \ DVDlo --> DVDhi
54 MOV 2(PSP),X \ DVDhi --> REMlo
55 BIT #8000,X \ MD < 0 ?
66 \ don't uncomment lines below !
67 \ ------------------------------------------------------------------------
68 \ UD/MOD DVDlo DVDhi DVRlo DVRhi -- REMlo REMhi QUOTlo QUOThi
69 \ ------------------------------------------------------------------------
70 \ MOV 4(PSP),T \ DVDlo
71 \ MOV 2(PSP),Y \ DVDhi
72 \ MOV #0,X \ REMlo = 0
76 MOV #32,R5 \ init loop count
77 BW1 CMP TOS,W \ 1 REMhi = DIVhi ?
78 0= IF CMP R6,X \ 1 REMlo U< DIVlo ?
80 U>= IF SUB R6,X \ 1 no: REMlo - DIVlo (carry is set)
81 SUBC TOS,W \ 1 REMhi - DIVhi
83 BW2 ADDC R7,R7 \ 1 RLC quotLO
84 ADDC R4,R4 \ 1 RLC quotHI
85 SUB #1,R5 \ 1 Decrement loop counter
86 0< ?GOTO FW1 \ 2 out of loop if count<0
88 ADDC Y,Y \ 1 RLC DVDhi
89 ADDC X,X \ 1 RLC REMlo
90 ADDC W,W \ 1 RLC REMhi
91 U< ?GOTO BW1 \ 2 15~ loop
92 SUB R6,X \ 1 REMlo - DIVlo
93 SUBC TOS,W \ 1 REMhi - DIVhi
97 \ MOV X,4(PSP) \ REMlo
98 \ MOV W,2(PSP) \ REMhi
99 ADD #4,PSP \ skip REMlo REMhi
101 MOV R7,0(PSP) \ QUOTlo
103 POPM R4,R7 \ restore R7 to R4
104 \ MOV @IP+,PC \ end of UD/MOD
105 \ ------------------------------------------------------------------------
106 BW1 AND #-1,S \ clear V, set N
114 $1A04 C@ $EF > [IF] ; test tag value MSP430FR413x subfamily without hardware_MPY
116 \ F#S Shi Flo -- Shi 0 convert fractional part Flo of S15Q16 fixed point number
118 SUB #2,PSP \ -- Shi x Flo
119 MOV TOS,0(PSP) \ -- Shi Flo x
120 MOV #4,TOS \ -- Shi Flo x TOS = limit for base 16
122 0= IF ADD #1,TOS \ TOS = limit for base 10
124 MOV #0,S \ -- Shi Flo x
125 BEGIN PUSH S \ R-- limit IP count
126 MOV &BASE,TOS \ -- Shi Flo base
128 UM* \ u1 u2 -- RESlo REShi
129 HI2LO \ -- Shi RESlo digit
131 CMP #10,TOS \ digit to char
134 MOV @RSP+,S \ R-- limit IP
135 MOV.B TOS,HOLDS_ORG(S) \ -- Shi RESlo char char to string
137 CMP 2(RSP),S \ count=limit ?
138 U>= UNTIL POPM IP,TOS \
139 MOV #0,0(PSP) \ -- Shi 0 len
140 SUB #2,PSP \ -- Shi 0 x len
141 MOV #HOLDS_ORG,0(PSP) \ -- Shi 0 addr len
145 \ unsigned multiply 32*32 = 64
146 \ don't use S reg (keep sign)
149 PUSHM R7,R4 \ 6 save R7 ~ R4 regs
150 MOV 4(PSP),IP \ 3 MDlo
151 MOV 2(PSP),T \ 3 MDhi
155 MOV #0,4(PSP) \ 3 RESlo=0
156 MOV #0,2(PSP) \ 3 REShi=0
157 MOV #0,R6 \ 1 RESLO=0
158 MOV #0,R7 \ 1 RESHI=0
159 MOV #1,X \ 1 BIT TEST REGlo
160 MOV #0,Y \ 1 BIT TEST2 REGhi
162 0<> IF BIT X,W \ 1 TEST ACTUAL BIT MRlo
163 ELSE BIT Y,TOS \ 1 TEST ACTUAL BIT MRhi
165 0<> IF ADD IP,4(PSP) \ 3 IF 1: ADD MDlo TO RESlo
166 ADDC T,2(PSP) \ 3 ADDC MDhi TO REShi
167 ADDC R4,R6 \ 1 ADDC MDLO TO RESLO
168 ADDC R5,R7 \ 1 ADDC MDHI TO RESHI
169 THEN ADD IP,IP \ 1 (RLA LSBs) MDlo *2
170 ADDC T,T \ 1 (RLC MSBs) MDhi *2
171 ADDC R4,R4 \ 1 (RLA LSBs) MDLO *2
172 ADDC R5,R5 \ 1 (RLC MSBs) MDHI *2
173 ADD X,X \ 1 (RLA) NEXT BIT TO TEST
174 ADDC Y,Y \ 1 (RLA) NEXT BIT TO TEST
175 U>= UNTIL MOV R6,0(PSP) \ 2 IF BIT IN CARRY: FINISHED 32 * 16~ (average loop)
176 MOV R7,TOS \ 1 high result in TOS
177 POPM R4,R7 \ 6 restore R4 ~ R7 regs
182 CODE F* \ s15.16 * s15.16 --> s15.16 result
184 XOR TOS,S \ 1s15 XOR 2s15 --> S keep sign of result
185 BIT #8000,2(PSP) \ MD < 0 ?
186 0<> IF XOR #-1,2(PSP)
192 DABS UDM* \ -- RES0 RES1 RES2 RES3
195 MOV @PSP+,TOS \ -- RES0 RES1 RES2
196 MOV @PSP+,0(PSP) \ -- RES1 RES2
197 GOTO BW1 \ goto end of F/ to process sign of result
200 [ELSE] \ hardware multiplier
202 \ F#S Shi Flo -- Shi 0 convert fractionnal part of S15Q16 fixed point number (direct order)
204 SUB #2,PSP \ -- Shi x Flo
205 MOV TOS,0(PSP) \ -- Shi Flo x
206 MOV #4,T \ -- Shi Flo x T = limit for base 16
208 0= IF ADD #1,T \ T = limit for base 10
209 THEN MOV #0,S \ S = count
210 BEGIN MOV @PSP,&MPY \ Load 1st operand
211 MOV &BASE,&OP2 \ Load 2nd operand
212 MOV &RES0,0(PSP) \ -- Shi RESlo x low result on stack
213 MOV &RES1,TOS \ -- Shi RESlo REShi high result in TOS
214 CMP #10,TOS \ digit to char
217 MOV.B TOS,HOLDS_ORG(S) \ -- Shi RESlo char char to string
219 CMP T,S \ count=limit ?
220 U>= UNTIL MOV T,TOS \ -- Shi RESlo limit
221 MOV #0,0(PSP) \ -- Shi 0 limit
222 SUB #2,PSP \ -- Shi 0 x len
223 MOV #HOLDS_ORG,0(PSP) \ -- Shi 0 addr len
227 CODE F* \ signed s15.16 multiplication --> s15.16 result
228 MOV 4(PSP),&MPYS32L \ 5 Load 1st operand
229 MOV 2(PSP),&MPYS32H \ 5
230 MOV @PSP,&OP2L \ 4 load 2nd operand
232 ADD #4,PSP \ 1 remove 2 cells
234 NOP2 \ 2 wait 8 cycles after write OP2L before reading RES1
240 [THEN] \ hardware multiplier
242 : F. \ display a s15q16 number
243 <# DUP >R DABS \ -- udlo udhi R-- sign
244 SWAP \ -- sign udhi udlo
246 $2C HOLD #S \ -- sign 0 0
247 R> SIGN #> \ -- addr len R--
252 CODE S>F \ convert a signed number to a s15q16 (signed) number
258 CODE D>F \ convert a signed double number (-.32768|.32767) to a s15q16 (signed) number
265 \ https://forth-standard.org/standard/double/TwoCONSTANT
266 : 2CONSTANT \ udlo/dlo/Flo udhi/dhi/Shi -- to create double or s15q16 CONSTANT
268 SWAP , , \ compile Flo then Shi
272 SUB #2,PSP \ -- x PFA
273 MOV @TOS+,0(PSP) \ -- lo PFA+2
274 MOV @TOS,TOS \ -- lo hi
283 ; -----------------------
285 ; -----------------------
287 PI -1,0 F* 2CONSTANT -PI