2 if {[file exists rtl_work]} {
\r
3 vdel -lib rtl_work -all
\r
8 vcom -93 -work work {../../chip_selector.vhd}
\r
9 vcom -93 -work work {../../mem/ram.vhd}
\r
10 vcom -93 -work work {../../apu.vhd}
\r
12 vcom -93 -work work {../../mem/chr_rom.vhd}
\r
13 vcom -93 -work work {../../ppu/ppu.vhd}
\r
14 vcom -93 -work work {../../ppu/render.vhd}
\r
15 #vcom -93 -work work {../../dummy-ppu.vhd}
\r
17 vcom -93 -work work {../../dummy-mos6502.vhd}
\r
18 #vcom -93 -work work {../../dummy-smb-rom.vhd}
\r
19 #vcom -93 -work work {../../mem/prg_rom.vhd}
\r
20 #vcom -93 -work work {../../mos6502.vhd}
\r
22 vcom -93 -work work {../../de0_cv_nes.vhd}
\r
23 vcom -93 -work work {../../testbench_motones_sim.vhd}
\r
25 vsim -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cyclonev -L rtl_work -L work -voptargs="+acc" testbench_motones_sim
\r
27 ##script custom part...
\r
31 #################################### General.... ###########################################
\r
33 #add wave -label dbg_cnt -radix hex sim:/testbench_motones_sim/sim_board/po_dbg_cnt;
\r
34 add wave -label po_exc_cnt -radix hex sim:/testbench_motones_sim/sim_board/po_exc_cnt;
\r
35 add wave -label rst_n sim:/testbench_motones_sim/sim_board/pi_rst_n;
\r
36 add wave -label wr_nmi_n sim:/testbench_motones_sim/sim_board/wr_nmi_n;
\r
37 #add wave -label base_clk sim:/testbench_motones_sim/sim_board/pi_base_clk;
\r
38 #add wave -label wr_cpu_en sim:/testbench_motones_sim/sim_board/wr_cpu_en;
\r
39 add wave -label wr_cpu_en sim:/testbench_motones_sim/sim_board/wr_cpu_en(0);
\r
40 add wave -label wr_oe_n sim:/testbench_motones_sim/sim_board/wr_oe_n;
\r
41 add wave -label wr_we_n sim:/testbench_motones_sim/sim_board/wr_we_n;
\r
42 add wave -label addr -radix hex sim:/testbench_motones_sim/sim_board/wr_addr;
\r
43 add wave -label d_io -radix hex sim:/testbench_motones_sim/sim_board/wr_d_io;
\r
45 ##################################### CPU part.... ###########################################
\r
47 ##add wave -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg*;
\r
48 #add wave -divider cpu
\r
50 #add wave -label reg_inst -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_inst;
\r
51 #add wave -label reg_acc -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_acc;
\r
52 #add wave -label reg_x -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_x;
\r
53 #add wave -label reg_y -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_y;
\r
54 #add wave -label reg_sp -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_sp;
\r
55 #add wave -label reg_status -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_status;
\r
57 ##add wave -divider internal_reg
\r
58 ##add wave -label reg_main_cur_state sim:/testbench_motones_sim/sim_board/cpu_inst/reg_main_state;
\r
59 ###add wave -label reg_sub_cur_state sim:/testbench_motones_sim/sim_board/cpu_inst/reg_sub_state;
\r
60 ##add wave -label reg_pc_l -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_pc_l;
\r
61 ##add wave -label reg_pc_h -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_pc_h;
\r
62 ##add wave -label reg_idl_l -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_idl_l;
\r
63 ##add wave -label reg_idl_h -radix hex sim:/testbench_motones_sim/sim_board/cpu_inst/reg_idl_h;
\r
64 ##add wave -label reg_tmp_pg_crossed sim:/testbench_motones_sim/sim_board/cpu_inst/reg_tmp_pg_crossed;
\r
67 ##################################### APU part.... ###########################################
\r
68 #add wave -divider apu
\r
69 #add wave -label wr_rdy sim:/testbench_motones_sim/sim_board/wr_rdy;
\r
70 #add wave -label reg_dma_cur_state sim:/testbench_motones_sim/sim_board/apu_inst/reg_dma_cur_state;
\r
71 #add wave -label reg_dma_addr -radix hex sim:/testbench_motones_sim/sim_board/apu_inst/reg_dma_addr;
\r
72 ##add wave -label pi_rnd_en sim:/testbench_motones_sim/sim_board/apu_inst/pi_rnd_en;
\r
73 ##add wave -label reg_dma_cnt sim:/testbench_motones_sim/sim_board/apu_inst/reg_dma_cnt;
\r
75 #add wave -label reg_spr_ce_n sim:/testbench_motones_sim/sim_board/apu_inst/reg_spr_ce_n;
\r
76 #add wave -label reg_spr_rd_n sim:/testbench_motones_sim/sim_board/apu_inst/reg_spr_rd_n;
\r
77 #add wave -label reg_spr_wr_n sim:/testbench_motones_sim/sim_board/apu_inst/reg_spr_wr_n;
\r
78 #add wave -label reg_spr_addr -radix hex sim:/testbench_motones_sim/sim_board/apu_inst/reg_spr_addr;
\r
79 #add wave -label reg_spr_data -radix hex sim:/testbench_motones_sim/sim_board/apu_inst/reg_spr_data;
\r
92 #################################### PPU part.... ###########################################
\r
93 add wave -divider ppu
\r
94 add wave -label pi_ce_n -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/pi_ce_n;
\r
95 add wave -label ppu_ctrl -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_ctrl;
\r
96 add wave -label ppu_mask -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_mask;
\r
97 add wave -label ppu_status -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/pi_ppu_status;
\r
98 add wave -label oam_addr -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_oam_addr;
\r
99 add wave -label oam_data -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_oam_data;
\r
100 add wave -label ppu_scroll_x -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_scroll_x;
\r
101 add wave -label ppu_scroll_y -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_scroll_y;
\r
102 add wave -label ppu_addr -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_addr;
\r
103 add wave -label ppu_data -radix hex sim:/testbench_motones_sim/sim_board/ppu_inst/reg_ppu_data;
\r
104 #add wave -label reg_v_cur_state sim:/testbench_motones_sim/sim_board/ppu_inst/reg_v_cur_state;
\r
106 add wave -divider vram
\r
107 add wave -label v_rd_n -radix hex sim:/testbench_motones_sim/sim_board/wr_v_rd_n;
\r
108 add wave -label v_wr_n -radix hex sim:/testbench_motones_sim/sim_board/wr_v_wr_n;
\r
109 add wave -label vram_addr -radix hex sim:/testbench_motones_sim/sim_board/wr_v_addr;
\r
110 add wave -label vram_data -radix hex sim:/testbench_motones_sim/sim_board/wr_v_data;
\r
112 add wave -divider render
\r
113 #add wave -label vga_x sim:/testbench_motones_sim/sim_board/render_inst/reg_vga_x;
\r
114 #add wave -label vga_y sim:/testbench_motones_sim/sim_board/render_inst/reg_vga_y;
\r
115 add wave -label nes_x sim:/testbench_motones_sim/sim_board/render_inst/reg_nes_x;
\r
116 add wave -label nes_y sim:/testbench_motones_sim/sim_board/render_inst/reg_nes_y;
\r
119 add wave -divider bg
\r
120 #add wave -label wr_rnd_en sim:/testbench_motones_sim/sim_board/wr_rnd_en;
\r
121 add wave -label reg_v_cur_state sim:/testbench_motones_sim/sim_board/render_inst/reg_v_cur_state;
\r
122 #add wave -label prf_x sim:/testbench_motones_sim/sim_board/render_inst/reg_prf_x;
\r
123 #add wave -label prf_y sim:/testbench_motones_sim/sim_board/render_inst/reg_prf_y;
\r
125 add wave -label disp_nt -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_disp_nt;
\r
126 add wave -label disp_attr -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_disp_attr;
\r
127 add wave -label sft_ptn_l -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_sft_ptn_l;
\r
128 add wave -label sft_ptn_h -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_sft_ptn_h;
\r
130 add wave -divider sprite
\r
131 add wave -label reg_s_oam_cur_state sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_cur_state;
\r
132 add wave -label reg_s_oam_ce_n sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_ce_n;
\r
133 add wave -label reg_s_oam_rd_n sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_rd_n;
\r
134 add wave -label reg_s_oam_wr_n sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_wr_n;
\r
135 add wave -label reg_s_oam_addr -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_addr;
\r
136 add wave -label reg_s_oam_data -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_data;
\r
138 #add wave -label reg_s_oam_cpy_cnt sim:/testbench_motones_sim/sim_board/render_inst/reg_s_oam_cpy_cnt;
\r
139 #add wave -label reg_p_oam_cpy_cnt sim:/testbench_motones_sim/sim_board/render_inst/reg_p_oam_cpy_cnt;
\r
140 #add wave -label reg_spr_eval_cnt sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_eval_cnt;
\r
142 add wave -label wr_spr_ce_n sim:/testbench_motones_sim/sim_board/wr_spr_ce_n;
\r
143 add wave -label wr_spr_rd_n sim:/testbench_motones_sim/sim_board/wr_spr_rd_n;
\r
144 add wave -label wr_spr_wr_n sim:/testbench_motones_sim/sim_board/wr_spr_wr_n;
\r
145 add wave -label wr_spr_addr -radix hex sim:/testbench_motones_sim/sim_board/wr_spr_addr;
\r
146 add wave -label wr_spr_data -radix hex sim:/testbench_motones_sim/sim_board/wr_spr_data;
\r
148 add wave -label reg_spr_y_tmp -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_y_tmp;
\r
149 add wave -label reg_spr_tile_tmp -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_tile_tmp;
\r
150 add wave -label reg_spr_attr -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_attr;
\r
151 add wave -label reg_spr_x -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_x;
\r
152 add wave -label reg_spr_ptn_sft_start -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_ptn_sft_start;
\r
153 add wave -label reg_spr_ptn_l -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_ptn_l;
\r
154 add wave -label reg_spr_ptn_h -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_spr_ptn_h;
\r
156 add wave -divider palette
\r
157 add wave -label plt_addr -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_plt_addr;
\r
158 add wave -label plt_data -radix hex sim:/testbench_motones_sim/sim_board/render_inst/reg_plt_data;
\r
161 add wave -divider vga
\r
162 add wave -label h_sync_n sim:/testbench_motones_sim/sim_board/po_h_sync_n;
\r
163 add wave -label v_sync_n sim:/testbench_motones_sim/sim_board/po_v_sync_n;
\r
164 add wave -label r -radix hex sim:/testbench_motones_sim/sim_board/po_r;
\r
165 add wave -label g -radix hex sim:/testbench_motones_sim/sim_board/po_g;
\r
166 add wave -label b -radix hex sim:/testbench_motones_sim/sim_board/po_b;
\r
OSDN Git Service
