#project files\r
set_global_assignment -name VHDL_FILE mem/ram.vhd\r
set_global_assignment -name VHDL_FILE chip_selector.vhd\r
-#set_global_assignment -name VHDL_FILE apu.vhd\r
+set_global_assignment -name VHDL_FILE apu.vhd\r
\r
#ppu\r
set_global_assignment -name VHDL_FILE mem/chr_rom.vhd\r
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=447" -section_id auto_signaltap_0\r
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=54880" -section_id auto_signaltap_0\r
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=39213" -section_id auto_signaltap_0\r
-set_global_assignment -name SLD_FILE "D:/daisuke/nes/repo/motonesfpga/de0_cv_nes/de0-cv-debug-analyze-all_auto_stripped.stp"\r
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top\r
+set_global_assignment -name SLD_FILE "D:/daisuke/nes/repo/motonesfpga/de0_cv_nes/de0-cv-debug-analyze-all_auto_stripped.stp"
\ No newline at end of file