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pc and sp clock timing changed (again restored!)
[motonesfpga/motonesfpga.git] / de1_nes / cpu / mos6502.vhd
2016-08-13 astoria-dpc and sp clock timing changed (again restored!)
2016-08-12 astoria-d@fcdecoder set clock added (you can say this is rollback!).
2016-08-12 astoria-d@fcanother phase delayed clock added.
2016-08-11 astoria-d@fcnew clock timing design... rtl test env setup ok.
2016-08-08 astoria-dexec cycle rework. still a lot to go!
2016-07-30 astoria-dmerge cpu test all
2016-07-29 astoria-d@fcalu timing re-organized..
2016-07-28 astoria-dde0-cv integration, code clean up
2016-07-27 astoria-d@fcalu clean up, clock synchronized.
2016-07-25 astoria-d@fcsta ok...
2016-07-25 astoria-d@fccode clean up
2016-07-25 astoria-d@fcfucking big survery still under working...
2016-07-23 astoria-d@fctiming change...
2016-07-23 astoria-d@fcbus pin restored... lol!
2016-07-23 astoria-d@fcaddressing refactoring...
2016-07-22 astoria-d@fcreset recovery bug fix. still more refactoring needed....
2016-07-22 astoria-d@fcpcl inc is 16 bit add.
2016-07-22 astoria-d@fcsp clock timing changed
2016-07-20 astoria-dalu address calculation synchronized with the clock.
2016-07-20 astoria-deliminated latch!! a big surgery is gonna come!!!
2016-03-26 astoria-dsync to master
2016-01-23 astoria-dpage crossing conditional branch supported.
2013-11-09 astoria-dpage crossing branch instruction supported!!
2013-10-05 astoria-dppu integration and bug fix
2013-09-30 astoria-d- input data latch invalid data latch bug fixed.
2013-09-25 astoria-dstatus register bug fixed!!
2013-09-25 astoria-d- ghdl env merge
2013-09-24 astoria-dgate simulation debugging.
2013-09-24 astoria-dMerge branch 'master' of git.sourceforge.jp:/gitroot...
2013-09-23 astoria-d4k rom working
2013-09-21 astoria-dgate level simulation evn set up ok
2013-09-20 astoria-d- env update.
2013-09-02 astoria-dMerge branch 'master' of git.sourceforge.jp:/gitroot...
2013-09-01 astoria-d- added cpu/ppu files