--- /dev/null
+; -*- coding: utf-8 -*-
+; http://patorjk.com/software/taag/#p=display&f=Banner&t=Fast Forth
+
+; Fast Forth For Texas Instrument MSP430FRxxxx FRAM devices
+; Copyright (C) <2015> <J.M. THOORENS>
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+
+ FORTHWORD "{CORE_COMP}"
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/SPACE
+;C SPACE -- output a space
+ FORTHWORD "SPACE"
+SPACE SUB #2,PSP ;1
+ MOV TOS,0(PSP) ;3
+ MOV #20h,TOS ;2
+ JMP EMIT ;17~ 23~
+
+;https://forth-standard.org/standard/core/SPACES
+;C SPACES n -- output n spaces
+ FORTHWORD "SPACES"
+SPACES CMP #0,TOS
+ JZ SPACESNEXT2
+ PUSH IP
+ MOV #SPACESNEXT,IP
+ JMP SPACE ;25~
+SPACESNEXT .word $+2
+ SUB #2,IP ;1
+ SUB #1,TOS ;1
+ JNZ SPACE ;25~ ==> 27~ by space ==> 2.963 MBds @ 8 MHz
+ MOV @RSP+,IP ;
+SPACESNEXT2 MOV @PSP+,TOS ; -- drop n
+ MOV @IP+,PC ;
+
+ .IFDEF MPY
+
+;https://forth-standard.org/standard/core/UMTimes
+;C UM* u1 u2 -- ud unsigned 16x16->32 mult.
+ FORTHWORD "UM*"
+UMSTAR MOV @PSP,&MPY ; Load 1st operand
+ MOV TOS,&OP2 ; Load 2nd operand
+ MOV &RES0,0(PSP) ; low result on stack
+ MOV &RES1,TOS ; high result in TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/MTimes
+;C M* n1 n2 -- dlo dhi signed 16*16->32 multiply
+ FORTHWORD "M*"
+MSTAR MOV @PSP,&MPYS
+ MOV TOS,&OP2
+ MOV &RES0,0(PSP)
+ MOV &RES1,TOS
+ MOV @IP+,PC
+
+ .ELSE
+
+;https://forth-standard.org/standard/core/MTimes
+;C M* n1 n2 -- dlo dhi signed 16*16->32 multiply
+ FORTHWORD "M*"
+MSTAR MOV TOS,S ; TOS= n2
+ XOR @PSP,S ; S contains sign of result
+ CMP #0,0(PSP) ; n1 > -1 ?
+ JGE u1n2MSTAR ; yes
+ XOR #-1,0(PSP) ; no : n1 --> u1
+ ADD #1,0(PSP) ;
+u1n2MSTAR CMP #0,TOS ; n2 <= -1 ?
+ JGE u1u2MSTAR ; no
+ XOR #-1,TOS ; y: n2 --> u2
+ ADD #1,TOS ;
+u1u2MSTAR PUSHM #2,IP ; PUSHM IP,S
+ ASMtoFORTH
+ .word UMSTAR ; UMSTAR use S,T,W,X,Y
+ .word $+2
+ POPM #2,IP ; POPM S,IP
+ CMP #0,S ; result > -1 ?
+ JGE MSTARend ; yes
+ XOR #-1,0(PSP) ; no : ud --> d
+ XOR #-1,TOS
+ ADD #1,0(PSP)
+ ADDC #0,TOS
+MSTARend MOV @IP+,PC
+
+ .ENDIF ;MPY
+
+;https://forth-standard.org/standard/core/UMDivMOD
+; UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
+ FORTHWORD "UM/MOD"
+UMSLASHMOD PUSH #DROP ;3 as return address for MU/MOD
+ MOV #MUSMOD,PC
+
+;https://forth-standard.org/standard/core/SMDivREM
+;C SM/REM d1lo d1hi n2 -- n3 n4 symmetric signed div
+ FORTHWORD "SM/REM"
+SMSLASHREM MOV TOS,S ;1 S=divisor
+ MOV @PSP,T ;2 T=rem_sign
+ CMP #0,TOS ;1 n2 >= 0 ?
+ JGE d1u2SMSLASHREM ;2 yes
+ XOR #-1,TOS ;1
+ ADD #1,TOS ;1
+d1u2SMSLASHREM ; -- d1 u2
+ CMP #0,0(PSP) ;3 d1hi >= 0 ?
+ JGE ud1u2SMSLASHREM ;2 yes
+ XOR #-1,2(PSP) ;4 d1lo
+ XOR #-1,0(PSP) ;4 d1hi
+ ADD #1,2(PSP) ;4 d1lo+1
+ ADDC #0,0(PSP) ;4 d1hi+C
+ud1u2SMSLASHREM ; -- ud1 u2
+ PUSHM #2,S ;4 PUSHM S,T
+ CALL #MUSMOD
+ MOV @PSP+,TOS
+ POPM #2,S ;4 POPM T,S
+ CMP #0,T ;1 -- ur uq T=rem_sign>=0?
+ JGE SMSLASHREMnruq ;2 yes
+ XOR #-1,0(PSP) ;3
+ ADD #1,0(PSP) ;3
+SMSLASHREMnruq
+ XOR S,T ;1 S=divisor T=quot_sign
+ CMP #0,T ;1 -- nr uq T=quot_sign>=0?
+ JGE SMSLASHREMnrnq ;2 yes
+NEGAT XOR #-1,TOS ;1
+ ADD #1,TOS ;1
+SMSLASHREMnrnq ; -- nr nq S=divisor
+ MOV @IP+,PC ;4 34 words
+
+;https://forth-standard.org/standard/core/FMDivMOD
+;C FM/MOD d1 n1 -- r q floored signed div'n
+ FORTHWORD "FM/MOD"
+FMSLASHMOD PUSH IP
+ MOV #FMSLASHMOD1,IP
+ JMP SMSLASHREM
+FMSLASHMOD1 .word $+2 ; -- remainder quotient S=divisor
+ CMP #0,0(PSP) ;
+ JZ FMSLASHMODEND
+ CMP #1,TOS ; quotient < 1 ?
+ JGE FMSLASHMODEND ;
+QUOTLESSONE ADD S,0(PSP) ; add divisor to remainder
+ SUB #1,TOS ; decrement quotient
+FMSLASHMODEND
+ MOV @RSP+,IP
+ MOV @IP+,PC ;
+
+;https://forth-standard.org/standard/core/NEGATE
+;C NEGATE x1 -- x2 two's complement
+ FORTHWORD "NEGATE"
+ JMP NEGAT
+
+;https://forth-standard.org/standard/core/ABS
+;C ABS n1 -- +n2 absolute value
+ FORTHWORD "ABS"
+ABBS CMP #0,TOS ; 1
+ JN NEGAT
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/Times
+;C * n1 n2 -- n3 signed multiply
+ FORTHWORD "*"
+STAR mDOCOL
+ .word MSTAR,DROP,EXIT
+
+;https://forth-standard.org/standard/core/DivMOD
+;C /MOD n1 n2 -- n3 n4 signed divide/rem'dr
+ FORTHWORD "/MOD"
+SLASHMOD mDOCOL
+ .word TOR,STOD,RFROM,FMSLASHMOD,EXIT
+
+;https://forth-standard.org/standard/core/Div
+;C / n1 n2 -- n3 signed divide
+ FORTHWORD "/"
+SLASH mDOCOL
+ .word TOR,STOD,RFROM,FMSLASHMOD,NIP,EXIT
+
+;https://forth-standard.org/standard/core/MOD
+;C MOD n1 n2 -- n3 signed remainder
+ FORTHWORD "MOD"
+MODD mDOCOL
+ .word TOR,STOD,RFROM,FMSLASHMOD,DROP,EXIT
+
+;https://forth-standard.org/standard/core/TimesDivMOD
+;C */MOD n1 n2 n3 -- n4 n5 n1*n2/n3, rem"
+ FORTHWORD "*/MOD"
+SSMOD mDOCOL
+ .word TOR,MSTAR,RFROM,FMSLASHMOD,EXIT
+
+;https://forth-standard.org/standard/core/TimesDiv
+;C */ n1 n2 n3 -- n4 n1*n2/n3
+ FORTHWORD "*/"
+STARSLASH mDOCOL
+ .word TOR,MSTAR,RFROM,FMSLASHMOD,NIP,EXIT
+
+
+
+;https://forth-standard.org/standard/core/ALIGNED
+;C ALIGNED addr -- a-addr align given addr
+ FORTHWORD "ALIGNED"
+ALIGNED BIT #1,TOS
+ ADDC #0,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/ALIGN
+;C ALIGN -- align HERE
+ FORTHWORD "ALIGN"
+ALIGNN BIT #1,&DDP ; 3
+ ADDC #0,&DDP ; 4
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CHARS
+;C CHARS n1 -- n2 chars->adrs units
+ FORTHWORD "CHARS"
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CHARPlus
+;C CHAR+ c-addr1 -- c-addr2 add char size
+ FORTHWORD "CHAR+"
+ ADD #1,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CELLS
+;C CELLS n1 -- n2 cells->adrs units
+ FORTHWORD "CELLS"
+ ADD TOS,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CELLPlus
+;C CELL+ a-addr1 -- a-addr2 add cell size
+ FORTHWORD "CELL+"
+ ADD #2,TOS
+ MOV @IP+,PC
+
+;----------------------------------------------------------------------
+; DOUBLE OPERATORS
+;----------------------------------------------------------------------
+
+; https://forth-standard.org/standard/core/StoD
+; S>D n -- d single -> double prec.
+ FORTHWORD "S>D"
+STOD SUB #2,PSP
+ MOV TOS,0(PSP)
+ JMP ZEROLESS
+
+; https://forth-standard.org/standard/core/TwoFetch
+; 2@ a-addr -- x1 x2 fetch 2 cells ; the lower address will appear on top of stack
+ FORTHWORD "2@"
+TWOFETCH SUB #2, PSP
+ MOV 2(TOS),0(PSP)
+ MOV @TOS,TOS
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/TwoStore
+; 2! x1 x2 a-addr -- store 2 cells ; the top of stack is stored at the lower adr
+ FORTHWORD "2!"
+TWOSTORE MOV @PSP+,0(TOS)
+ MOV @PSP+,2(TOS)
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+
+;; https://forth-standard.org/standard/double/TwoVALUE
+; FORTHWORD "2VALUE"
+; mDOCOL
+; .word CREATE
+; .word COMMA,COMMA ; compile hi then lo
+; .word DOES
+; .word $+2
+; MOV @RSP+,IP
+; BIT #UF10,SR
+; JZ TWOFETCH
+; BIC #UF10,SR
+; JMP TWOSTORE
+
+; https://forth-standard.org/standard/core/TwoDROP
+; 2DROP x1 x2 -- drop 2 cells
+ FORTHWORD "2DROP"
+ ADD #2,PSP
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/TwoSWAP
+; 2SWAP x1 x2 x3 x4 -- x3 x4 x1 x2
+ FORTHWORD "2SWAP"
+ MOV @PSP,W ; -- x1 x2 x3 x4 W=x3
+ MOV 4(PSP),0(PSP) ; -- x1 x2 x1 x4
+ MOV W,4(PSP) ; -- x3 x2 x1 x4
+ MOV TOS,W ; -- x3 x2 x1 x4 W=x4
+ MOV 2(PSP),TOS ; -- x3 x2 x1 x2 W=x4
+ MOV W,2(PSP) ; -- x3 x4 x1 x2
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/TwoOVER
+; 2OVER x1 x2 x3 x4 -- x1 x2 x3 x4 x1 x2
+ FORTHWORD "2OVER"
+ SUB #4,PSP ; -- x1 x2 x3 x x x4
+ MOV TOS,2(PSP) ; -- x1 x2 x3 x4 x x4
+ MOV 8(PSP),0(PSP) ; -- x1 x2 x3 x4 x1 x4
+ MOV 6(PSP),TOS ; -- x1 x2 x3 x4 x1 x2
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CFetch
+; C@ c-addr -- char fetch char from memory
+ FORTHWORD "C@"
+CFETCH MOV.B @TOS,TOS ;2
+ MOV @IP+,PC ;4
+
+;https://forth-standard.org/standard/core/CStore
+; C! char c-addr -- store char in memory
+ FORTHWORD "C!"
+CSTORE MOV.B @PSP+,0(TOS) ;4
+ ADD #1,PSP ;1
+ MOV @PSP+,TOS ;2
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CComma
+; C, char -- append char
+ FORTHWORD "C,"
+CCOMMA MOV &DDP,W
+ MOV.B TOS,0(W)
+ ADD #1,&DDP
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/AND
+;C AND x1 x2 -- x3 logical AND
+ FORTHWORD "AND"
+ANDD AND @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/OR
+;C OR x1 x2 -- x3 logical OR
+ FORTHWORD "OR"
+ORR BIS @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/XOR
+;C XOR x1 x2 -- x3 logical XOR
+ FORTHWORD "XOR"
+XORR XOR @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/INVERT
+;C INVERT x1 -- x2 bitwise inversion
+ FORTHWORD "INVERT"
+ XOR #-1,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/LSHIFT
+;C LSHIFT x1 u -- x2 logical L shift u places
+ FORTHWORD "LSHIFT"
+LSHIFT MOV @PSP+,W
+ AND #1Fh,TOS ; no need to shift more than 16
+ JZ LSH_X
+LSH_1 ADD W,W
+ SUB #1,TOS
+ JNZ LSH_1
+LSH_X MOV W,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/RSHIFT
+;C RSHIFT x1 u -- x2 logical R shift u places
+ FORTHWORD "RSHIFT"
+RSHIFT MOV @PSP+,W
+ AND #1Fh,TOS ; no need to shift more than 16
+ JZ RSH_X
+RSH_1 BIC #1,SR ; CLRC
+ RRC W
+ SUB #1,TOS
+ JNZ RSH_1
+RSH_X MOV W,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/TwoTimes
+;C 2* x1 -- x2 arithmetic left shift
+ FORTHWORD "2*"
+TWOTIMES ADD TOS,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/TwoDiv
+;C 2/ x1 -- x2 arithmetic right shift
+ FORTHWORD "2/"
+TWODIV RRA TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/MAX
+;C MAX n1 n2 -- n3 signed maximum
+ FORTHWORD "MAX"
+MAX CMP @PSP,TOS ; n2-n1
+ JL SELn1 ; n2<n1
+SELn2 ADD #2,PSP
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/MIN
+;C MIN n1 n2 -- n3 signed minimum
+ FORTHWORD "MIN"
+MIN CMP @PSP,TOS ; n2-n1
+ JL SELn2 ; n2<n1
+SELn1 MOV @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/PlusStore
+;C +! n/u a-addr -- add to memory
+ FORTHWORD "+!"
+PLUSSTORE ADD @PSP+,0(TOS)
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/CHAR
+;C CHAR -- char parse ASCII character
+ FORTHWORD "CHAR"
+CHARR mDOCOL
+ .word FBLANK,WORDD,ONEPLUS,CFETCH,EXIT
+
+;https://forth-standard.org/standard/core/BracketCHAR
+;C [CHAR] -- compile character literal
+ FORTHWORDIMM "[CHAR]" ; immediate
+BRACCHAR mDOCOL
+ .word CHARR
+ .word lit,lit,COMMA
+ .word COMMA,EXIT
+
+;https://forth-standard.org/standard/core/FILL
+;C FILL c-addr u char -- fill memory with char
+ FORTHWORD "FILL"
+FILL MOV @PSP+,X ; count
+ MOV @PSP+,W ; address
+ CMP #0,X
+ JZ FILL_X
+FILL_1 MOV.B TOS,0(W) ; store char in memory
+ ADD #1,W
+ SUB #1,X
+ JNZ FILL_1
+FILL_X MOV @PSP+,TOS ; pop new TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/HEX
+ FORTHWORD "HEX"
+HEX MOV #16,&BASE
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/DECIMAL
+ FORTHWORD "DECIMAL"
+DECIMAL MOV #10,&BASE
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/HERE
+; HERE -- addr returns memory ptr
+ FORTHWORD "HERE"
+ MOV #BEGIN,PC
+
+;https://forth-standard.org/standard/core/p
+;C ( \ -- paren ; skip input until )
+ FORTHWORDIMM "\40" ; immediate
+PARENT mDOCOL
+ .word lit,')',WORDD,DROP,EXIT
+
+;https://forth-standard.org/standard/core/Dotp
+; .( \ -- dotparen ; type comment immediatly.
+ FORTHWORDIMM ".\40" ; immediate
+DOTPAREN MOV #0,&CAPS
+ mDOCOL
+ .word lit,')',WORDD
+ .word COUNT,TYPE
+ .word FBLANK,LIT,CAPS,STORE
+ .word EXIT
+
+;https://forth-standard.org/standard/core/J
+;C J -- n R: 4*sys -- 4*sys
+;C get the second loop index
+ FORTHWORD "J"
+JJ SUB #2,PSP ; make room in TOS
+ MOV TOS,0(PSP)
+ MOV 4(RSP),TOS ; index = loopctr - fudge
+ SUB 6(RSP),TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/UNLOOP
+;UNLOOP -- R: sys1 sys2 -- drop loop parms
+ FORTHWORD "UNLOOP"
+UNLOOP ADD #4,RSP
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/LEAVE
+;C LEAVE -- L: -- adrs
+ FORTHWORDIMM "LEAVE" ; immediate
+LEAV MOV &DDP,W ; compile three words
+ MOV #UNLOOP,0(W) ; [HERE] = UNLOOP
+ MOV #BRAN,2(W) ; [HERE+2] = BRAN
+ ADD #6,&DDP ; [HERE+4] = After LOOP adr
+ ADD #2,&LEAVEPTR
+ ADD #4,W
+ MOV &LEAVEPTR,X
+ MOV W,0(X) ; leave HERE+4 on LEAVEPTR stack
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/RECURSE
+;C RECURSE -- recurse to current definition (compile current definition)
+ FORTHWORDIMM "RECURSE" ; immediate
+RECURSE MOV &DDP,X ;
+ MOV &LAST_CFA,0(X) ;
+ ADD #2,&DDP ;
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/toBODY
+; >BODY -- addr leave BODY of a CREATEd word; also leave default ACTION-OF primary DEFERred word
+ FORTHWORD ">BODY"
+TOBODY ADD #4,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/SOURCE
+;C SOURCE -- adr u of current input buffer
+ FORTHWORD "SOURCE"
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &SOURCE_LEN,TOS
+ MOV &SOURCE_ORG,0(PSP)
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/BASE
+;C BASE -- a-addr holds conversion radix
+ FORTHWORD "BASE"
+ CALL rDOCON
+ .word BASE ; VARIABLE address in RAM space
+
+;https://forth-standard.org/standard/core/toIN
+;C >IN -- a-addr holds offset in input stream
+ FORTHWORD ">IN"
+FTOIN CALL rDOCON
+ .word TOIN ; VARIABLE address in RAM space
+
+;https://forth-standard.org/standard/core/PAD
+; PAD -- pad address
+ FORTHWORD "PAD"
+PAD CALL rDOCON
+ .WORD PAD_ORG
+
+; https://forth-standard.org/standard/core/MARKER
+; MARKER
+;( "<spaces>name" -- )
+;Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+;with the execution semantics defined below.
+
+;name Execution: ( -- )
+;Restore all dictionary allocation and search order pointers to the state they had just prior to the
+;definition of name. Remove the definition of name and all subsequent definitions. Restoration
+;of any structures still existing that could refer to deleted definitions or deallocated data space is
+;not necessarily provided. No other contextual information such as numeric base is affected
+
+MARKER_DOES .word $+2 ; execution part
+ MOV @RSP+,IP ; -- PFA
+ MOV @TOS+,&INIVOC ; set VOC_LINK value for RST_STATE
+ MOV @TOS,&INIDP ; set DP value for RST_STATE
+ MOV @PSP+,TOS ; --
+ MOV #RST_STATE,PC ; execute RST_STATE, PWR_STATE then STATE_DOES
+
+ FORTHWORD "MARKER" ; definition part
+ CALL #HEADER ;4 W = DP+4
+ MOV #DODOES,-4(W) ;4 CFA = DODOES
+ MOV #MARKER_DOES,-2(W) ;4 PFA = MARKER_DOES
+ MOV &LASTVOC,0(W) ;5 [BODY] = VOCLINK to be restored
+ SUB #2,Y ;1 Y = LFA
+ MOV Y,2(W) ;3 [BODY+2] = LFA = DP to be restored
+ ADD #4,&DDP ;3
+ MOV #GOOD_CSP,PC
+
FORTHWORD "{FIXPOINT}"
- mNEXT
+ MOV @IP+,PC
+
+ .IFNDEF DABS
+DABS AND #-1,TOS ; clear V, set N
+ JGE DABSEND ; if positive (N=0)
+ XOR #-1,0(PSP) ;4
+ XOR #-1,TOS ;1
+ ADD #1,0(PSP) ;4
+ ADDC #0,TOS ;1
+DABSEND MOV @IP+,PC
+ .ENDIF
+
; https://forth-standard.org/standard/core/HOLDS
; Adds the string represented by addr u to the pictured numeric output string
MOV &HP,Y ; 3 dst
HOLDSLOOP SUB #1,X ; 1 src-1
SUB #1,TOS ; 1 cnt-1
- JLO HOLDSNEXT ; 2
+ JNC HOLDSNEXT ; 2
SUB #1,Y ; 1 dst-1
MOV.B @X,0(Y) ; 4
JMP HOLDSLOOP ; 2
HOLDSNEXT MOV Y,&HP ; 3
MOV @PSP+,TOS ; 2
- mNEXT ; 4 15 words
+ MOV @IP+,PC ; 4 15 words
FORTHWORD "F+" ; -- d1lo d1hi d2lo d2hi
ADD @PSP+,2(PSP) ; -- sumlo d1hi d2hi
Q321 CMP TOS,W ;1 REMhi <> DIVhi ?
JNZ Q322 ;2 yes
CMP R6,X ;1 REMlo U< DIVlo ?
-Q322 JLO Q323 ;2 yes: REM U< DIV
+Q322 JNC Q323 ;2 yes: REM U< DIV
SUB R6,X ;1 no: REMlo - DIVlo (carry is set)
SUBC TOS,W ;1 REMhi - DIVhi
Q323 ADDC R7,R7 ;1 RLC quotLO
MOV &RES0,0(PSP) ; -- Qhi Qlo' x low result on stack
MOV &RES1,TOS ; -- Qhi Qlo' digit high result in TOS
CMP #10,TOS ; digit to char
- JLO FNUMS2CHAR
+ JNC FNUMS2CHAR
ADD #7,TOS
FNUMS2CHAR ADD #30h,TOS
MOV.B TOS,HOLDS_ORG(S) ; -- Qhi Qlo' char char to string
ADD #1,S ; count+1
CMP T,S ;2 count=limit ?
- JLO FNUMSLOOP ; loop back if U<
+ JNC FNUMSLOOP ; loop back if U<
MOV T,TOS ; -- Qhi Qlo' limit
MOV #0,0(PSP) ; -- Qhi 0 limit
MOV #HOLDS_ORG,X ; -- Qhi 0 len X= org
Q321 CMP TOS,W ;1 REMhi <> DIVhi ?
JNZ Q322 ;2 yes
CMP R6,X ;1 REMlo U< DIVlo ?
-Q322 JLO Q323 ;2 yes: REM U< DIV
+Q322 JNC Q323 ;2 yes: REM U< DIV
SUB R6,X ;1 no: REMlo - DIVlo (carry is set)
SUBC TOS,W ;1 REMhi - DIVhi
Q323 ADDC R7,R7 ;1 RLC quotLO
FNUMSLOOP PUSH S ; R-- limit IP count
MOV &BASE,TOS ; -- Qhi Qlo base
MOV #UMSTAR,PC
-FNUMSNEXT FORTHtoASM ; -- Qhi QloRem digit
+FNUMSNEXT .word $+2 ; -- Qhi QloRem digit
SUB #2,IP
CMP #10,TOS ; digit to char
- JLO FNUMS2CHAR
+ JNC FNUMS2CHAR
ADD #7,TOS
FNUMS2CHAR ADD #30h,TOS
MOV @RSP+,S ; R-- limit IP
MOV.B TOS,HOLDS_ORG(S) ; -- Qhi Qlorem char char to stringto string
ADD #1,S ; count+1
CMP 2(RSP),S ;3 count=limit ?
- JLO FNUMSLOOP ; no
+ JNC FNUMSLOOP ; no
POPM #2,TOS ; -- Qhi Qlorem limit POPM IP,TOS
MOV #0,0(PSP) ; -- Qhi 0 limit
MOV #HOLDS_ORG,X ; -- Qhi 0 len X= org
ADDC R5,R5 ; 1 (RLC MSBs) MDHI *2
ADD X,X ; 1 (RLA) NEXT BIT TO TEST
ADDC Y,Y ; 1 (RLA) NEXT BIT TO TEST
- JLO UDMT1 ; 2 IF BIT IN CARRY: FINISHED 32 * 16~ (average loop)
+ JNC UDMT1 ; 2 IF BIT IN CARRY: FINISHED 32 * 16~ (average loop)
MOV R6,0(PSP) ; 3
MOV R7,TOS ; 1 high result in TOS
POPM #4,R7 ; 6 POPM R4 R5 R6 R7
ADD #1,4(PSP)
ADDC #0,2(PSP)
FSTAR1 mDOCOL
- .word DABBS,UDMT
- FORTHtoASM ; -- RES0 RES1 RES2 RES3
+ .word DABS,UDMT
+ .word $+2 ; -- RES0 RES1 RES2 RES3
MOV @RSP+,IP
MOV @PSP+,TOS ; -- RES0 RES1 RES2
MOV @PSP+,0(PSP) ; -- RES1 RES2
.ENDIF
+ .IFNDEF TOR
+; https://forth-standard.org/standard/core/toR
+; >R x -- R: -- x push to return stack
+; FORTHWORD ">R"
+TOR PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
FORTHWORD "F." ; display a Q15.16 number with 4 digits after comma
mDOCOL
- .word LESSNUM,DUP,TOR,DABBS
+ .word LESSNUM,DUP,TOR,DABS
.word lit,4,FNUMS,lit,',',HOLD,NUMS
.word RFROM,SIGN,NUMGREATER,TYPE
.word lit,20h,EMIT,EXIT
MAX: CMP @PSP,TOS ; n2-n1
JL SELn1 ; n2<n1
SELn2: ADD #2,PSP
- mNEXT
+ MOV @IP+,PC
;https://forth-standard.org/standard/core/MIN
;C MIN n1 n2 -- n3 signed minimum
MIN: CMP @PSP,TOS ; n2-n1
JL SELn2 ; n2<n1
SELn1: MOV @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
.ENDIF
PUSH IP
MOV #SPACESNEXT,IP
JMP SPACE ;25~
-SPACESNEXT FORTHtoASM
+SPACESNEXT .word $+2
SUB #2,IP ;1
SUB #1,TOS ;1
JNZ SPACE ;25~ ==> 27~ by space ==> 2.963 MBds @ 8 MHz
MOV @RSP+,IP ;
SPACESNEXT2 MOV @PSP+,TOS ; -- drop n
- mNEXT ;
+ MOV @IP+,PC ;
.ENDIF
+ .IFNDEF II
+; https://forth-standard.org/standard/core/I
+; I -- n R: sys1 sys2 -- sys1 sys2
+; get the innermost loop index
+ FORTHWORD "I"
+II SUB #2,PSP ;1 make room in TOS
+ MOV TOS,0(PSP) ;3
+ MOV @RSP,TOS ;2 index = loopctr - fudge
+ SUB 2(RSP),TOS ;3
+ MOV @IP+,PC ;4 13~
+ .ENDIF
+
.IFNDEF OVER
;https://forth-standard.org/standard/core/OVER
;C OVER x1 x2 -- x1 x2 x1
OVER MOV TOS,-2(PSP) ; 3 -- x1 (x2) x2
MOV @PSP,TOS ; 2 -- x1 (x2) x1
SUB #2,PSP ; 1 -- x1 x2 x1
- mNEXT ; 4
+ MOV @IP+,PC ; 4
.ENDIF
+ .IFNDEF TOR
+; https://forth-standard.org/standard/core/toR
+; >R x -- R: -- x push to return stack
+ FORTHWORD ">R"
+TOR PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
.IFNDEF UDOTR
;https://forth-standard.org/standard/core/UDotR
;X U.R u n -- display u unsigned in n width
;C C@ c-addr -- char fetch char from memory
FORTHWORD "C@"
CFETCH MOV.B @TOS,TOS ;2
- mNEXT ;4
+ MOV @IP+,PC ;4
.ENDIF
.IFNDEF PLUS
;C + n1/u1 n2/u2 -- n3/u3 add n1+n2
FORTHWORD "+"
PLUS ADD @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
.ENDIF
.IFNDEF DUMP
.word lit,7Eh,MIN,FBLANK,MAX,EMIT
.word xloop,DUMP4 ; chars display loop
.word lit,10h,xploop,DUMP1 ; line loop
- .word RFROM,lit,BASE,STORE ; restore current base
+ .word RFROM,lit,BASE,STORE ; restore current base
.word EXIT
.ENDIF
FORTHWORD "{SD_TOOLS}"
- mNEXT
+ MOV @IP+,PC
; read logical sector and dump it
; ----------------------------------;
FORTHWORD "{TOOLS}"
- mNEXT
+ MOV @IP+,PC
+
+ .IFNDEF TOR
+; https://forth-standard.org/standard/core/toR
+; >R x -- R: -- x push to return stack
+ FORTHWORD ">R"
+TOR PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
.IFNDEF ANDD
;https://forth-standard.org/standard/core/AND
;C AND x1 x2 -- x3 logical AND
FORTHWORD "AND"
ANDD AND @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
.ENDIF
.IFNDEF CFETCH
;C C@ c-addr -- char fetch char from memory
FORTHWORD "C@"
CFETCH MOV.B @TOS,TOS ;2
- mNEXT ;4
+ MOV @IP+,PC ;4
.ENDIF
.IFNDEF SPACE
PUSH IP
MOV #SPACESNEXT,IP
JMP SPACE ;25~
-SPACESNEXT FORTHtoASM
+SPACESNEXT .word $+2
SUB #2,IP ;1
SUB #1,TOS ;1
JNZ SPACE ;25~ ==> 27~ by space ==> 2.963 MBds @ 8 MHz
MOV @RSP+,IP ;
SPACESNEXT2 MOV @PSP+,TOS ; -- drop n
- mNEXT ;
+ MOV @IP+,PC ;
.ENDIF
+ .IFNDEF II
+; https://forth-standard.org/standard/core/I
+; I -- n R: sys1 sys2 -- sys1 sys2
+; get the innermost loop index
+ FORTHWORD "I"
+II SUB #2,PSP ;1 make room in TOS
+ MOV TOS,0(PSP) ;3
+ MOV @RSP,TOS ;2 index = loopctr - fudge
+ SUB 2(RSP),TOS ;3
+ MOV @IP+,PC ;4 13~
+ .ENDIF
+
;https://forth-standard.org/standard/tools/DotS
FORTHWORD ".S" ; -- print <depth> of Param Stack and stack contents if not empty
DOTS MOV TOS,-2(PSP) ; -- TOS ( tos x x )
;https://forth-standard.org/standard/core/PAD
; PAD -- pad address
FORTHWORD "PAD"
-PAD mDOCON
+PAD CALL rDOCON
.WORD PAD_ORG
.ENDIF
MOV TOS,0(PSP) ; 3 store x3
MOV 2(PSP),TOS ; 3 fetch x1
MOV W,2(PSP) ; 3 store x2
- mNEXT ; 4
+ MOV @IP+,PC ; 4
.ENDIF
;https://forth-standard.org/standard/tools/WORDS
;https://forth-standard.org/standard/core/MAX
;C MAX n1 n2 -- n3 signed maximum
FORTHWORD "MAX"
-MAX: CMP @PSP,TOS ; n2-n1
+MAX CMP @PSP,TOS ; n2-n1
JL SELn1 ; n2<n1
-SELn2: ADD #2,PSP
- mNEXT
+SELn2 ADD #2,PSP
+ MOV @IP+,PC
;https://forth-standard.org/standard/core/MIN
;C MIN n1 n2 -- n3 signed minimum
FORTHWORD "MIN"
-MIN: CMP @PSP,TOS ; n2-n1
+MIN CMP @PSP,TOS ; n2-n1
JL SELn2 ; n2<n1
-SELn1: MOV @PSP+,TOS
- mNEXT
+SELn1 MOV @PSP+,TOS
+ MOV @IP+,PC
.ENDIF
;C + n1/u1 n2/u2 -- n3/u3 add n1+n2
FORTHWORD "+"
PLUS ADD @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
.ENDIF
.IFNDEF OVER
OVER MOV TOS,-2(PSP) ; 3 -- x1 (x2) x2
MOV @PSP,TOS ; 2 -- x1 (x2) x1
SUB #2,PSP ; 1 -- x1 x2 x1
- mNEXT ; 4
+ MOV @IP+,PC ; 4
.ENDIF
.IFNDEF UDOTR
+RETURN-STACK-CELLS = 48 maximum size of the return stack, in cells
+STACK-CELLS = 48 maximum size of the data stack, in cells
+/COUNTED-STRING = 255 maximum size of a counted string, in characters
+/HOLD = 34 size of the pictured numeric output string buffer, in characters
+/PAD = 84 size of the scratch area pointed to by PAD, in characters
+ADDRESS-UNIT-BITS = 16 size of one address unit, in bits
+FLOORED = true true if floored division is the default
+MAX-CHAR = 255 maximum value of any character in the implementation-defined character set
+MAX-N = 32767 largest usable signed integer
+MAX-U = 65535 largest usable unsigned integer
+MAX-D = 2147483647 largest usable signed double number
+MAX-UD = 4294967295 largest usable unsigned double number
+
+
FORTH vocabulary
----------------
-COLD WARM WIPE RST_HERE PWR_HERE RST_STATE PWR_STATE
-MOVE LEAVE +LOOP LOOP DO REPEAT WHILE
-AGAIN UNTIL BEGIN THEN ELSE IF >BODY
-DEFER DOES> CREATE CONSTANT VARIABLE : ;
-POSTPONE RECURSE IMMEDIATE IS ['] ] [
-\ ' ABORT" ABORT QUIT EVALUATE COUNT
-LITERAL , EXECUTE >NUMBER FIND WORD ."
-S" CR TYPE SPACES SPACE NOECHO ECHO
-EMIT ACCEPT KEY C, ALLOT HERE .
-D. U. SIGN HOLD #> #S #
-UM/MOD <# STATE BASE BL J I
-UNLOOP U< > < = 0< 0=
-DABS 1- 1+ 1- 1+ - +
-C! C@ ! @ DEPTH R@ R>
->R ROT OVER SWAP NIP DROP ?DUP
-DUP LIT EXIT
+COLD WARM WIPE RST_HERE PWR_HERE RST_STATE PWR_STATE
+BEGIN DOES> CREATE ; : IMMEDIATE POSTPONE
+] [ \ ['] ABORT" ABORT QUIT
+EVALUATE COUNT LITERAL ALLOT , >NUMBER FIND
+WORD ." S" . U. SIGN HOLD
+#> #S # <# KEY CR TYPE
+NOECHO ECHO EMIT ACCEPT
+
COLD Software reset
PWR_STATE removes all words defined after PWR_HERE (an occurring error has same effect)
-MOVE https://forth-standard.org/standard/core/MOVE
-LEAVE https://forth-standard.org/standard/core/LEAVE
-+LOOP https://forth-standard.org/standard/core/PlusLOOP
-LOOP https://forth-standard.org/standard/core/LOOP
-DO https://forth-standard.org/standard/core/DO
-REPEAT https://forth-standard.org/standard/core/REPEAT
-WHILE https://forth-standard.org/standard/core/WHILE
-AGAIN https://forth-standard.org/standard/core/AGAIN
-UNTIL https://forth-standard.org/standard/core/UNTIL
+NOECHO stop display on output
+
+ECHO start display on output
+
BEGIN https://forth-standard.org/standard/core/BEGIN
-THEN https://forth-standard.org/standard/core/THEN
-ELSE https://forth-standard.org/standard/core/ELSE
-IF https://forth-standard.org/standard/core/IF
-; https://forth-standard.org/standard/core/Semi
-: https://forth-standard.org/standard/core/Colon
-DEFER https://forth-standard.org/standard/core/DEFER
DOES> https://forth-standard.org/standard/core/DOES
CREATE https://forth-standard.org/standard/core/CREATE
-CONSTANT https://forth-standard.org/standard/core/CONSTANT
-VARIABLE https://forth-standard.org/standard/core/VARIABLE
-POSTPONE https://forth-standard.org/standard/core/POSTPONE
-RECURSE https://forth-standard.org/standard/core/RECURSE
+; https://forth-standard.org/standard/core/Semi
+: https://forth-standard.org/standard/core/Colon
IMMEDIATE https://forth-standard.org/standard/core/IMMEDIATE
-IS https://forth-standard.org/standard/core/IS
-['] https://forth-standard.org/standard/core/BracketTick
+POSTPONE https://forth-standard.org/standard/core/POSTPONE
] https://forth-standard.org/standard/core/right-bracket
[ https://forth-standard.org/standard/core/Bracket
\ https://forth-standard.org/standard/block/bs
+['] https://forth-standard.org/standard/core/BracketTick
' https://forth-standard.org/standard/core/Tick
ABORT" https://forth-standard.org/standard/core/ABORTq
ABORT https://forth-standard.org/standard/core/ABORT
EVALUATE https://forth-standard.org/standard/core/EVALUATE
COUNT https://forth-standard.org/standard/core/COUNT
LITERAL https://forth-standard.org/standard/core/LITERAL
+ALLOT https://forth-standard.org/standard/core/ALLOT
, https://forth-standard.org/standard/core/Comma
-EXECUTE https://forth-standard.org/standard/core/EXECUTE
>NUMBER https://forth-standard.org/standard/core/toNUMBER
FIND https://forth-standard.org/standard/core/FIND
WORD https://forth-standard.org/standard/core/WORD
." https://forth-standard.org/standard/core/Dotq
S" https://forth-standard.org/standard/core/Sq
-TYPE https://forth-standard.org/standard/core/TYPE
-SPACES https://forth-standard.org/standard/core/SPACES
-SPACE https://forth-standard.org/standard/core/SPACE
-CR DEFERed word, https://forth-standard.org/standard/core/CR
-NOECHO stop display on output
-ECHO start display on output
-EMIT DEFERed word, https://forth-standard.org/standard/core/EMIT
-ACCEPT DEFERed word, https://forth-standard.org/standard/core/ACCEPT
-KEY DEFERed word, https://forth-standard.org/standard/core/KEY
-C, https://forth-standard.org/standard/core/CComma
-ALLOT https://forth-standard.org/standard/core/ALLOT
-HERE https://forth-standard.org/standard/core/HERE
. https://forth-standard.org/standard/core/d
-D. https://forth-standard.org/standard/double/Dd
U. https://forth-standard.org/standard/core/Ud
SIGN https://forth-standard.org/standard/core/SIGN
HOLD https://forth-standard.org/standard/core/HOLD
#> https://forth-standard.org/standard/core/num-end
#S https://forth-standard.org/standard/core/numS
# https://forth-standard.org/standard/core/num
-UM/MOD https://forth-standard.org/standard/core/UMDivMOD
<# https://forth-standard.org/standard/core/num-start
-BL https://forth-standard.org/standard/core/BL
-STATE https://forth-standard.org/standard/core/STATE
-BASE https://forth-standard.org/standard/core/BASE
-J https://forth-standard.org/standard/core/J
-I https://forth-standard.org/standard/core/I
-UNLOOP https://forth-standard.org/standard/core/UNLOOP
-U< https://forth-standard.org/standard/core/Uless
-> https://forth-standard.org/standard/core/more
-< https://forth-standard.org/standard/core/less
-= https://forth-standard.org/standard/core/Equal
-0< https://forth-standard.org/standard/core/Zeroless
-0= https://forth-standard.org/standard/core/ZeroEqual
-DABS https://forth-standard.org/standard/double/DABS
-ABS https://forth-standard.org/standard/core/ABS
-NEGATE https://forth-standard.org/standard/core/NEGATE
-1- https://forth-standard.org/standard/core/OneMinus
-1+ https://forth-standard.org/standard/core/OnePlus
-- https://forth-standard.org/standard/core/Minus
-+ https://forth-standard.org/standard/core/Plus
-C! https://forth-standard.org/standard/core/CStore
-C@ https://forth-standard.org/standard/core/CFetch
-! https://forth-standard.org/standard/core/Store
-@ https://forth-standard.org/standard/core/Fetch
-DEPTH https://forth-standard.org/standard/core/DEPTH
-R@ https://forth-standard.org/standard/core/RFetch
-R> https://forth-standard.org/standard/core/Rfrom
->R https://forth-standard.org/standard/core/toR
-ROT https://forth-standard.org/standard/core/ROT
-OVER https://forth-standard.org/standard/core/OVER
-SWAP https://forth-standard.org/standard/core/SWAP
-NIP https://forth-standard.org/standard/core/NIP
-DROP https://forth-standard.org/standard/core/DROP
-?DUP https://forth-standard.org/standard/core/qDUP
-DUP https://forth-standard.org/standard/core/DUP
-LIT execution part of LITERAL
-EXIT https://forth-standard.org/standard/core/EXIT
+KEY DEFERed word, https://forth-standard.org/standard/core/KEY
+CR DEFERed word, https://forth-standard.org/standard/core/CR
+TYPE https://forth-standard.org/standard/core/TYPE
+EMIT DEFERed word, https://forth-standard.org/standard/core/EMIT
+ACCEPT DEFERed word, https://forth-standard.org/standard/core/ACCEPT
ASSEMBLER vocabulary
?GOTO used after a conditionnal (0=,0<>,U>=,U<,0<,S<,S>=) to branch to a label FWx or BWx
GOTO used as unconditionnal branch to a label FWx or BWx
-BW3 BACKWARD branch destination n°3
-BW2 n°2
-BW1 N°1
+BW3 BACKWARD branch destination n°3
+BW2 n°2
+BW1 N°1
-FW3 FORWARD branch destination n°3
-FW2 n°2
-FW1 n°1
+FW3 FORWARD branch destination n°3
+FW2 n°2
+FW1 n°1
?JMP used after a conditionnal (0=,0<>,U>=,U<,0<,S<,S>=) to jump to a predefined word
JMP unconditionnal jump to a predefined word
[ELSE] https://forth-standard.org/standard/tools/BracketELSE
[THEN] https://forth-standard.org/standard/tools/BracketTHEN
COMPARE https://forth-standard.org/standard/string/COMPARE
-MARKER https://forth-standard.org/standard/core/MARKER
VOCABULARY ADD-ON
ANS_COMPLEMENT ADD-ON
---------------------
-PAD >IN SOURCE .( ( DECIMAL HEX
-FILL [CHAR] CHAR +! MIN MAX 2/
-2* RSHIFT LSHIFT XOR OR AND INVERT
-2OVER 2SWAP 2DROP 2DUP 2VALUE 2! 2@
-S>D CELL+ CELLS CHAR+ CHARS ALIGN ALIGNED
-*/ */MOD MOD / /MOD * FM/MOD
-SM/REM M* UM* TO VALUE {ANS_COMP}
+SPACES SPACE BL PAD >IN BASE STATE
+CONSTANT VARIABLE SOURCE RECURSE EXECUTE >BODY .(
+( DECIMAL HEX HERE FILL MOVE +!
+[CHAR] CHAR CELL+ CELLS CHAR+ CHARS ALIGN
+ALIGNED 2OVER 2SWAP 2DROP 2DUP 2! 2@
+R@ ROT OVER */ */MOD MOD /
+/MOD * FM/MOD ABS NEGATE SM/REM UM/MOD
+M* UM* 2/ 2* MIN MAX RSHIFT
+LSHIFT INVERT 1- 1+ S>D XOR OR
+AND LEAVE UNLOOP J I +LOOP LOOP
+DO REPEAT WHILE AGAIN UNTIL ELSE THEN
+IF > < U< = 0< 0=
+C, C! C@ R> >R NIP DROP
+SWAP DEPTH EXIT ?DUP DUP ! @
+- + {CORE_COMP}
+SPACES https://forth-standard.org/standard/core/SPACES
+SPACE https://forth-standard.org/standard/core/SPACE
+BL https://forth-standard.org/standard/core/BL
PAD https://forth-standard.org/standard/core/PAD
>IN https://forth-standard.org/standard/core/toIN
->BODY https://forth-standard.org/standard/core/toBODY
+BASE https://forth-standard.org/standard/core/BASE
+STATE https://forth-standard.org/standard/core/STATE
+CONSTANT https://forth-standard.org/standard/core/CONSTANT
+VARIABLE https://forth-standard.org/standard/core/VARIABLE
SOURCE https://forth-standard.org/standard/core/SOURCE
+RECURSE https://forth-standard.org/standard/core/RECURSE
+EXECUTE https://forth-standard.org/standard/core/EXECUTE
+>BODY https://forth-standard.org/standard/core/toBODY
.( https://forth-standard.org/standard/core/Dotp
( https://forth-standard.org/standard/core/p
DECIMAL https://forth-standard.org/standard/core/DECIMAL
HEX https://forth-standard.org/standard/core/HEX
+HERE https://forth-standard.org/standard/core/HERE
FILL https://forth-standard.org/standard/core/FILL
+MOVE https://forth-standard.org/standard/core/MOVE
++! https://forth-standard.org/standard/core/PlusStore
[CHAR] https://forth-standard.org/standard/core/BracketCHAR
CHAR https://forth-standard.org/standard/core/CHAR
-+! https://forth-standard.org/standard/core/PlusStore
-2/ https://forth-standard.org/standard/core/TwoDiv
-2* https://forth-standard.org/standard/core/TwoTimes
-MIN https://forth-standard.org/standard/core/MIN
-MAX https://forth-standard.org/standard/core/MAX
-RSHIFT https://forth-standard.org/standard/core/RSHIFT
-LSHIFT https://forth-standard.org/standard/core/LSHIFT
-INVERT https://forth-standard.org/standard/core/INVERT
-XOR https://forth-standard.org/standard/core/XOR
-OR https://forth-standard.org/standard/core/OR
-AND https://forth-standard.org/standard/core/AND
-2OVER https://forth-standard.org/standard/core/TwoOVER
-2SWAP https://forth-standard.org/standard/core/TwoSWAP
-2DROP https://forth-standard.org/standard/core/TwoDROP
-2DUP https://forth-standard.org/standard/core/TwoDUP
-2VALUE https://forth-standard.org/standard/double/TwoVALUE
-2! https://forth-standard.org/standard/core/TwoStore
-2@ https://forth-standard.org/standard/core/TwoFetch
-S>D https://forth-standard.org/standard/core/StoD
CELL+ https://forth-standard.org/standard/core/CELLPlus
CELLS https://forth-standard.org/standard/core/CELLS
CHAR+ https://forth-standard.org/standard/core/CHARPlus
CHARS https://forth-standard.org/standard/core/CHARS
ALIGN https://forth-standard.org/standard/core/ALIGN
ALIGNED https://forth-standard.org/standard/core/ALIGNED
+2OVER https://forth-standard.org/standard/core/TwoOVER
+2SWAP https://forth-standard.org/standard/core/TwoSWAP
+2DROP https://forth-standard.org/standard/core/TwoDROP
+2DUP https://forth-standard.org/standard/core/TwoDUP
+2! https://forth-standard.org/standard/core/TwoStore
+2@ https://forth-standard.org/standard/core/TwoFetch
+R@ https://forth-standard.org/standard/core/RFetch
+ROT https://forth-standard.org/standard/core/ROT
+OVER https://forth-standard.org/standard/core/OVER
*/ https://forth-standard.org/standard/core/TimesDiv
*/MOD https://forth-standard.org/standard/core/TimesDivMOD
MOD https://forth-standard.org/standard/core/MOD
/MOD https://forth-standard.org/standard/core/DivMOD
* https://forth-standard.org/standard/core/Times
FM/MOD https://forth-standard.org/standard/core/FMDivMOD
+ABS https://forth-standard.org/standard/core/ABS
+NEGATE https://forth-standard.org/standard/core/NEGATE
SM/REM https://forth-standard.org/standard/core/SMDivREM
+UM/MOD https://forth-standard.org/standard/core/UMDivMOD
M* https://forth-standard.org/standard/core/MTimes
UM* https://forth-standard.org/standard/core/UMTimes
+2/ https://forth-standard.org/standard/core/TwoDiv
+2* https://forth-standard.org/standard/core/TwoTimes
+MIN https://forth-standard.org/standard/core/MIN
+MAX https://forth-standard.org/standard/core/MAX
+RSHIFT https://forth-standard.org/standard/core/RSHIFT
+LSHIFT https://forth-standard.org/standard/core/LSHIFT
+INVERT https://forth-standard.org/standard/core/INVERT
+1- https://forth-standard.org/standard/core/OneMinus
+1+ https://forth-standard.org/standard/core/OnePlus
+S>D https://forth-standard.org/standard/core/StoD
+XOR https://forth-standard.org/standard/core/XOR
+OR https://forth-standard.org/standard/core/OR
+AND https://forth-standard.org/standard/core/AND
+LEAVE https://forth-standard.org/standard/core/LEAVE
+UNLOOP https://forth-standard.org/standard/core/UNLOOP
+J https://forth-standard.org/standard/core/J
+I https://forth-standard.org/standard/core/I
++LOOP https://forth-standard.org/standard/core/PlusLOOP
+LOOP https://forth-standard.org/standard/core/LOOP
+DO https://forth-standard.org/standard/core/DO
+REPEAT https://forth-standard.org/standard/core/REPEAT
+WHILE https://forth-standard.org/standard/core/WHILE
+AGAIN https://forth-standard.org/standard/core/AGAIN
+UNTIL https://forth-standard.org/standard/core/UNTIL
+THEN https://forth-standard.org/standard/core/THEN
+ELSE https://forth-standard.org/standard/core/ELSE
+IF https://forth-standard.org/standard/core/IF
+> https://forth-standard.org/standard/core/more
+< https://forth-standard.org/standard/core/less
+U< https://forth-standard.org/standard/core/Uless
+= https://forth-standard.org/standard/core/Equal
+0< https://forth-standard.org/standard/core/Zeroless
+0= https://forth-standard.org/standard/core/ZeroEqual
+C, https://forth-standard.org/standard/core/CComma
+C! https://forth-standard.org/standard/core/CStore
+C@ https://forth-standard.org/standard/core/CFetch
+R> https://forth-standard.org/standard/core/Rfrom
+>R https://forth-standard.org/standard/core/toR
+NIP https://forth-standard.org/standard/core/NIP
+DROP https://forth-standard.org/standard/core/DROP
+SWAP https://forth-standard.org/standard/core/SWAP
+DEPTH https://forth-standard.org/standard/core/DEPTH
+EXIT https://forth-standard.org/standard/core/EXIT
+?DUP https://forth-standard.org/standard/core/qDUP
+DUP https://forth-standard.org/standard/core/DUP
+! https://forth-standard.org/standard/core/Store
+@ https://forth-standard.org/standard/core/Fetch
+- https://forth-standard.org/standard/core/Minus
++ https://forth-standard.org/standard/core/Plus
+{CORE_COMP}
+
+
+OTHER WORDS
+
+
+MARKER https://forth-standard.org/standard/core/MARKER
+DEFER https://forth-standard.org/standard/core/DEFER
+IS https://forth-standard.org/standard/core/IS
+D. https://forth-standard.org/standard/double/Dd
+DABS https://forth-standard.org/standard/double/DABS
TO https://forth-standard.org/standard/core/TO
VALUE https://forth-standard.org/standard/core/VALUE
-{ANS_COMP}
FIXPOINT ADD-ON
--- /dev/null
+
+; --------
+; BOOT.4th
+; --------
+\
+\ to see kernel options, download FastForthSpecs.f
+\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP, SD_CARD_LOADER, BOOTLOADER
+\
+\ TARGET SELECTION
+\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
+\ MSP_EXP430FR4133 MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\
+\ SYSRSTIV decimal/hex values for MSP430FR5994 (device specific)
+\ ----------------------------------------------------------
+\ #00 $00 No interrupt pending
+\ #02 $02 Brownout (BOR)
+\ #04 $04 RSTIFG RST/NMI (BOR)
+\ #06 $06 PMMSWBOR software BOR (BOR)
+\ #08 $08 LPMx.5 wake up (BOR)
+\ #10 $0A violation memory protected areas (BOR)
+\ #12 $0C Reserved
+\ #14 $0E SVSHIFG SVSH event (BOR)
+\ #16 $10 Reserved
+\ #18 $12 Reserved
+\ #20 $14 PMMSWPOR software POR (POR)
+\ #22 $16 WDTIFG watchdog timeout (PUC)
+\ #24 $18 WDTPW password violation (PUC)
+\ #26 $1A FRCTLPW password violation (PUC)
+\ #28 $1C Uncorrectable FRAM bit error detection (PUC)
+\ #30 $1E Peripheral area fetch (PUC)
+\ #32 $20 PMMPW PMM password violation (PUC)
+\ #34 $22 MPUPW MPU password violation (PUC)
+\ #36 $24 CSPW CS password violation (PUC)
+\ #38 $26 MPUSEGIPIFG encapsulated IP memory segment violation (PUC)
+\ #40 $28 MPUSEGIIFG information memory segment violation (PUC)
+\ #42 $2A MPUSEG1IFG segment 1 memory violation (PUC)
+\ #44 $2C MPUSEG2IFG segment 2 memory violation (PUC)
+\ #46 $2E MPUSEG3IFG segment 3 memory violation (PUC)
+
+
+
+
+
+\ SYSRSTIV values added by FAST FORTH
+\ -----------------------------------
+\ 05 reset after compilation of FAST FORTH kernel
+\ -1 hardware DEEP RESET: restores state of the lastest FastForth flashed
+
+
+\ note
+\ Origin of reset is kept in SYSRSTIV register. Their values are device specific.
+\ WARM displays the content of SYSRSTIV register.
+\ When BOOT.4TH is called by the FastForth bootstrap, the SYSRSTIV value is on
+\ the paramater stack, ready to test
+
+\ --------------------------------------------------------------------------------
+\ WARNING !
+\ --------------------------------------------------------------------------------
+\ it is not recommended to compile then execute a word to perform the bootstrap
+\ because the risk of crushing thereafter. Interpreting mode as below is required:
+\ --------------------------------------------------------------------------------
+
+
+\ it's an example:
+
+$04 = [IF] \ if origin of SYSRST is <reset>
+ LOAD" SD_TEST.4TH"
+[THEN]
; ------------
; CHNGBAUD.f
; ------------
-\
+
\ to see kernel options, download FastForthSpecs.f
\ FastForth kernel options: nothing
\
-\ TARGET SELECTION
+\ TARGET SELECTION : copy your target in (shift+F8) parameter 1:
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
\ MSP_EXP430FR4133 MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\ LP_MSP430FR2476
+\
\
-
PWR_STATE
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-DEFER
-HI2LO
-MOV @RSP+,IP
-MOV #DOCON,-4(W) \ CFA = DOCON
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ELSE \ 2
+ XOR #-1,TOS \ 1 flag Z = 1
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0= [IF]
+\ https://forth-standard.org/standard/core/ZeroEqual
+\ 0= n/u -- flag return true if TOS=0
+CODE 0=
+SUB #1,TOS \ borrow (clear cy) if TOS was 0
+SUBC TOS,TOS \ TOS=-1 if borrow was set
MOV @IP+,PC
ENDCODE
[THEN]
-[UNDEFINED] BL [IF]
-\ https://forth-standard.org/standard/core/BL
-\ BL -- char an ASCII space
-#32 CONSTANT BL
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
[THEN]
-[UNDEFINED] SPACE [IF]
-\ https://forth-standard.org/standard/core/SPACE
-\ SPACE -- output a space
-: SPACE
-BL EMIT ;
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+CODE BEGIN \ immediate
+MOV #HERE,PC \ BR HERE
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+CODE AGAIN \ immediate
+MOV #BRAN,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+: WHILE \ immediate
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+MOV rDOVAR,PC \ 4
+ENDCODE
[THEN]
[UNDEFINED] R@ [IF]
ENDCODE
[THEN]
+[UNDEFINED] DROP [IF]
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+CODE DROP
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] ?DUP [IF]
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+CODE ?DUP
+CMP #0,TOS \ 2 test for TOS nonzero
+0<> IF
+ SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] < [IF]
\ https://forth-standard.org/standard/core/less
\ < n1 n2 -- flag test n1<n2, signed
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] UM/MOD [IF]
\ https://forth-standard.org/standard/core/UMDivMOD
\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
CODE UM/MOD
PUSH #DROP \
- MOV #<#,X \ X = addr of <#
- ADD #8,X \ X = addr of MUSMOD
- MOV X,PC \ execute MUSMOD then RET to DROP
+ MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
ENDCODE
[THEN]
-: MCLK.
-0 1000 UM/MOD .
-;
-
-: ESC #27 EMIT ;
+[UNDEFINED] ESC" [IF]
+\ ESC" <escape sequence>" -- type an escape sequence
+: ESC" $1B POSTPONE LITERAL POSTPONE EMIT POSTPONE S" POSTPONE TYPE ; IMMEDIATE \ "
+[THEN]
: BAD_MHz
- 1 ABORT" only for 1,4,8,16,24 MHz MCLK!"
+$20 EMIT 1 ABORT" only for 1,4,8,16,24 MHz MCLK!"
;
-: BAD_SPEED
-SPACE ESC ." [7m" \ set reverse video
-." with MCLK = " MCLK. 1 ABORT" MHz? don't dream!"
+: OVR_BAUDS
+$20 EMIT ESC" [7m" \ set reverse video
+." with MCLK = " FREQ_KHZ @ 0 1000 UM/MOD . DROP
+1 ABORT" MHz? don't dream!"
;
: <> = 0= ;
: CHNGBAUD \ only for 8, 16, 24 MHz
PWR_STATE \ to remove this created word (garbage collector)
-
+ECHO
42 \ number of terminal lines
0 DO CR LOOP \ don't erase any line of source
-ESC ." [1J" \ erase up (42 empty lines)
-ESC ." [H" \ cursor home
+ESC" [1J" \ erase up (42 empty lines)
+ESC" [H" \ cursor home
FREQ_KHZ @ >R \ r-- target MCLCK frequency in MHz
-." target MCLK = " R@ MCLK. ." MHz" CR
+." target MCLK = " R@ 0 1000 UM/MOD . ." MHz" DROP CR
." choose your baudrate:" CR
-." 0 --> 6 MBds" CR
-." 1 --> 5 MBds" CR
-." 2 --> 4 MBds" CR \ linux driver max speed
-." 3 --> 2457600 Bds" CR
-." 4 --> 921600 Bds" CR
-." 5 --> 460800 Bds" CR
-." 6 --> 230400 Bds" CR
-." 7 --> 115200 Bds" CR
+." 0 --> 6 MBds" CR
+." 1 --> 5 MBds" CR
+." 2 --> 4 MBds" CR \ linux driver max speed
+." 3 --> 2457600 Bds" CR
+." 4 --> 921600 Bds" CR
+." 5 --> 460800 Bds" CR
+." 6 --> 230400 Bds" CR
+." 7 --> 115200 Bds" CR
+." 8 --> 38400 Bds" CR
+." 9 --> 19200 Bds" CR
+." A --> 9600 Bds" CR
." other --> abort" CR
." your choice: "
KEY
#48 - ?DUP 0= \ select 6MBds ?
IF ." 6 MBds" \ add this to the current line
- R@ #24000 < \ < 24MHz ?
- IF R@ BAD_SPEED
- THEN
- R@ #24000 <> \ 24 MHz ?
- IF BAD_MHz \ no: --> abort
- THEN
+ R@ #24000 < \ < 24MHz ?
+ IF OVR_BAUDS THEN
+ R@ #24000 <> \ > 24 MHz ?
+ IF BAD_MHz THEN \ yes --> abort
$4 \ TERM_BRW
$0 \ TERM_MCTLW
ELSE 1 - ?DUP 0= \ select 5MBds ?
IF ." 5 MBds"
R@ #16000 < \ < 16MHz ?
- IF R@ BAD_SPEED \ abort
- THEN
- R@ #16000 =
+ IF OVR_BAUDS THEN
+ R@ #16000 = \ 16 MHz ?
IF $3 \ TERM_BRW
$2100 \ TERM_MCTLW
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
+ IF BAD_MHz THEN
$4 \ TERM_BRW
$EE00 \ TERM_MCTLW
THEN
- ELSE 1 - ?DUP 0= \ select 4MBds ?
+ ELSE 1 - ?DUP 0= \ 4MBds ?
IF ." 4 MBds"
R@ #16000 <
- IF R@ BAD_SPEED \ abort
- THEN
+ IF OVR_BAUDS THEN
R@ #16000 =
- IF $4 \ TERM_BRW
- $0 \ TERM_MCTLW
+ IF $4 $0
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- $6 \ TERM_BRW
- $0 \ TERM_MCTLW
+ IF BAD_MHz THEN
+ $6 $0
THEN
- ELSE 1 - ?DUP 0= \ select 2457600 ?
+ ELSE 1 - ?DUP 0= \ 2457600 ?
IF ." 2457600 Bds"
R@ #8000 < \ < 8MHz ?
- IF R@ BAD_SPEED \ abort
- THEN
+ IF OVR_BAUDS THEN
R@ #8000 =
- IF $3 \ TERM_BRW
- $4400 \ TERM_MCTLW
+ IF $3 $4400
ELSE R@ #16000 =
- IF $6 \ TERM_BRW
- $AA00 \ TERM_MCTLW
+ IF $6 $AA00
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- $9 \ TERM_BRW
- $DD00 \ TERM_MCTLW
+ IF BAD_MHz THEN
+ $9 $DD00
THEN
THEN
- ELSE 1 - ?DUP 0= \ select 921600 ?
+ ELSE 1 - ?DUP 0= \ 921600 ?
IF ." 921600 Bds"
- R@ #4000 <
- IF R@ BAD_SPEED \ abort
- THEN
- R@ #4000 = \ 4MHz ?
- IF 4 \ TERM_BRW
- $4900 \ TERM_MCTLW
- ELSE
- R@ #8000 =
- IF 8 \ TERM_BRW
- $D600 \ TERM_MCTLW
+ R@ #4000 < \ < 4MHz ?
+ IF OVR_BAUDS THEN
+ R@ #4000 =
+ IF 4 $4900
+ ELSE R@ #8000 =
+ IF 8 $D600
ELSE R@ #16000 =
- IF $11 \ TERM_BRW
- $4A00 \ TERM_MCTLW
+ IF $11 $4A00
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- $1 \ TERM_BRW
- $00A1 \ TERM_MCTLW
+ IF BAD_MHz THEN
+ $1 $00A1
THEN
THEN
THEN
- ELSE 1 - ?DUP 0= \ select 230400 ?
+ ELSE 1 - ?DUP 0= \ 460800 ?
IF ." 460800 Bds"
R@ #4000 <
- IF R@ BAD_SPEED \ abort
- THEN
+ IF OVR_BAUDS THEN
R@ #4000 =
- IF 8 \ TERM_BRW
- $D600 \ TERM_MCTLW
- ELSE
- R@ #8000 =
- IF 17 \ TERM_BRW
- $4A00 \ TERM_MCTLW
+ IF 8 $D600
+ ELSE R@ #8000 =
+ IF $11 $4A00
ELSE R@ #16000 =
- IF 2 \ TERM_BRW
- $BB21 \ TERM_MCTLW
+ IF $2 $BB21
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- 6 \ TERM_BRW
- $0001 \ TERM_MCTLW
+ IF BAD_MHz THEN
+ $6 $0001
THEN
THEN
THEN
- ELSE 1 - ?DUP 0= \ select 230400 ?
+ ELSE 1 - ?DUP 0= \ 230400 ?
IF ." 230400 Bds"
R@ #1000 <
- IF R@ BAD_SPEED \ abort
- THEN
+ IF OVR_BAUDS THEN
R@ #1000 =
- IF 4
- $4900
- ELSE
- R@ #4000 =
- IF 17 \ TERM_BRW
- $4A00 \ TERM_MCTLW
- ELSE
- R@ #8000 =
- IF 2 \ TERM_BRW
- $BB21 \ TERM_MCTLW
+ IF 4 $4900
+ ELSE R@ #4000 =
+ IF $11 $4A00
+ ELSE R@ #8000 =
+ IF 2 $BB21
ELSE R@ #16000 =
- IF 4 \ TERM_BRW
- $5551 \ TERM_MCTLW
+ IF 4 $5551
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- 3 \ TERM_BRW
- $0241 \ TERM_MCTLW
+ IF BAD_MHz THEN
+ 3 $0241
THEN
THEN
THEN
THEN
- ELSE 1 - ?DUP 0= \ select 115200 ?
+ ELSE 1 - ?DUP 0= \ 115200 ?
IF ." 115200 Bds"
R@ #1000 =
- IF 8
- $D600
- ELSE
- R@ #4000 =
- IF 2 \ TERM_BRW
- $BB21 \ TERM_MCTLW
- ELSE
- R@ #8000 =
- IF 4 \ TERM_BRW
- $5551 \ TERM_MCTLW
+ IF 8 $D600
+ ELSE R@ #4000 =
+ IF 2 $BB21
+ ELSE R@ #8000 =
+ IF 4 $5551
ELSE R@ #16000 =
- IF 8 \ TERM_BRW
- $F7A1 \ TERM_MCTLW
+ IF 8 $F7A1
ELSE R@ #24000 <>
- IF BAD_MHz
+ IF BAD_MHz THEN
+ $0D $4901
+ THEN
+ THEN
+ THEN
+ THEN
+ ELSE 1 - ?DUP 0= \ 38400 ?
+ IF ." 38400 Bds"
+ R@ #1000 =
+ IF $1 $00A1
+ ELSE R@ #4000 =
+ IF $6 $2081
+ ELSE R@ #8000 =
+ IF $0D $4901
+ ELSE R@ #16000 =
+ IF $1A $D601
+ ELSE R@ #24000 <>
+ IF BAD_MHz THEN
+ $27 $0011
+ THEN
+ THEN
+ THEN
+ THEN
+ ELSE 1 - ?DUP 0= \ 19200 ?
+ IF ." 19200 Bds"
+ R@ #1000 =
+ IF $3 $0241
+ ELSE R@ #4000 =
+ IF $0D $4901
+ ELSE R@ #8000 =
+ IF $1A $D601
+ ELSE R@ #16000 =
+ IF $34 $4911
+ ELSE R@ #24000 <>
+ IF BAD_MHz THEN
+ $4E $0021
+ THEN
+ THEN
+ THEN
+ THEN
+ ELSE 8 - ?DUP 0= \ 9600 ?
+ IF ." 9600 Bds"
+ R@ #1000 =
+ IF $6 $2081
+ ELSE R@ #4000 =
+ IF $1A $D601
+ ELSE R@ #8000 =
+ IF $34 $4911
+ ELSE R@ #16000 =
+ IF $68 $D621
+ ELSE R@ #24000 <>
+ IF BAD_MHz THEN
+ $9C $0041
+ THEN
+ THEN
THEN
- $0D \ TERM_BRW
- $4901 \ TERM_MCTLW
THEN
+ ELSE \ other selected
+ ." abort" CR ABORT
THEN
THEN
THEN
- ELSE \ other selected
- ." abort" CR ABORT
THEN
THEN
THEN
TERMMCTLW_RST ! \ set UCAxMCTLW value in FRAM
TERMBRW_RST ! \ set UCAxBRW value in FRAM
R> DROP \ clear stacks
-CR ESC ." [7m" \ escape sequence to set reverse video
-." Change baudrate in Teraterm, save its setup then reset target."
+CR ESC" [7m" \ escape sequence to set reverse video
+." Change baudrate in Teraterm, save its setup, then reset target."
;
-ECHO CHNGBAUD
+CHNGBAUD
--- /dev/null
+\ -*- coding: utf-8 -*-
+
+; ------------
+; CHNGBAUD.f
+; ------------
+
+\ FastForth kernel options: ASSEMBLER, COND_COMP
+\ to see kernel options, download FF_SPECS.f
+\
+\ TARGET SELECTION : copy your target in (shift+F8) parameter 1:
+\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
+\ MSP_EXP430FR4133 MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\ LP_MSP430FR2476
+\
+PWR_STATE
+
+[UNDEFINED] EXIT [IF]
+\ https://forth-standard.org/standard/core/EXIT
+\ EXIT -- exit a colon definition
+CODE EXIT
+MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+MOV @IP+,PC \ 4 = NEXT
+ENDCODE
+[THEN]
+
+[UNDEFINED] EXECUTE [IF] \ "
+\ https://forth-standard.org/standard/core/EXECUTE
+\ EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+CODE EXECUTE
+MOV TOS,W \ 1 put word address into W
+MOV @PSP+,TOS \ 2 fetch new TOS
+MOV W,PC \ 3 fetch code address into PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] DROP [IF]
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+CODE DROP
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
+\ https://forth-standard.org/standard/core/Plus
+\ + n1/u1 n2/u2 -- n3/u3
+CODE +
+ADD @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV #XLOOP,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ESC" [IF]
+\ ESC" <escape sequence>" -- type an escape sequence
+: ESC" $1B POSTPONE LITERAL POSTPONE EMIT POSTPONE S" POSTPONE TYPE ; IMMEDIATE \ "
+[THEN]
+
+\ : OVER= OVER = ; \ replace 'n1 DUP n2 =' by 'n1 n2 OVER='
+CODE OVER= \ n1 n2 -- n1 flag
+SUB @PSP,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ELSE \ 2
+ XOR #-1,TOS \ 1 flag Z = 1
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+
+\ : OVRSWP< \ n1 n2 -- n1 flag flag = -1 if n1 < n2
+\ OVER SWAP < ;
+CODE OVRSWP< \ n1 n2 -- n1 flag flag = -1 if n1 < n2
+SUB @PSP,TOS \ -- n1 n TOS=n2-n1
+S>= IF \ if n2-n1 >= 0
+ 0<> IF \ if n2-n1 <> 0
+ MOV #-1,TOS \ -- n1 -1 flag Z = 0
+ THEN
+ MOV @IP+,PC
+THEN
+AND #0,TOS \ -- n1 0 flag Z = 1
+MOV @IP+,PC
+ENDCODE
+
+\ ;THEN \ EXIT condition ended by THEN
+\ POSTPONE EXIT POSTPONE THEN
+\ ; IMMEDIATE
+CODE ;THEN \ IFadr --
+ADD #2,&DP \
+MOV &DP,X
+MOV #EXIT,-2(X) \ compile EXIT
+MOV X,0(TOS) \ -- IFadr compile current DP at IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+\ UM/ udlo|udhi u1 -- q unsigned 32/16->q16
+CODE UM/
+CALL #MUSMOD \ -- r Qlo Qhi
+MOV @PSP,TOS \ -- r Qlo Qlo
+ADD #4,PSP \ -- Qlo
+MOV @IP+,PC
+ENDCODE
+
+: BAD_MHz \ abort
+$20 EMIT 1 ABORT" only for 1,4,8,16,24 MHz MCLK!"
+;
+
+: OVR_BAUDS \ abort
+$20 EMIT ESC" [7m" \ set reverse video
+FREQ_KHZ @ 0 1000 UM/ ." with MCLK = " .
+1 ABORT" MHz? don't dream!"
+;
+
+\ conditionnal EXIT structure
+: SELECT_BAUDS \ -- char frequency TERM_BRW TERM_MCTLW
+KEY \ -- char
+
+48 OVER= \ -- char flag choice 0 = 6MBds ?
+IF ." 6 MBds"
+ FREQ_KHZ @ \ -- char flag freq
+ #24000 OVRSWP< \ MCLK < 24MHz ?
+ IF OVR_BAUDS ;THEN \ ==> abort ( ;THEN does nothing but solve paired IF during compilation)
+ #24000 OVER= \ FREQ = 24 MHz ?
+ IF $4 $0 ;THEN \ -- char frequency TERM_BRW TERM_MCTLW
+ BAD_MHz \ ==> abort for other freq
+;THEN \ ;THEN does nothing but solve paired IF during compilation
+
+49 OVER= \ -- char flag choice 1 = 5MBds ?
+IF ." 5 MBds"
+ FREQ_KHZ @
+ #16000 OVRSWP< \ MCLK < 16MHz ? ==> abort
+ IF OVR_BAUDS ;THEN
+ #16000 OVER=
+ IF $3 $2100 ;THEN
+ #24000 OVER=
+ IF $4 $EE00 ;THEN
+ BAD_MHz \ other freq ==> abort
+;THEN
+50 OVER= \ -- char flag choice 2 = 4MBds ?
+IF ." 4 MBds"
+ FREQ_KHZ @
+ #16000 OVRSWP< \ MCLK < 16MHz ? ==> abort
+ IF OVR_BAUDS ;THEN
+ #16000 OVER=
+ IF $4 $0 ;THEN
+ #24000 OVER=
+ IF $6 $0 ;THEN
+ BAD_MHz \ other freq ==> abort
+;THEN
+51 OVER= \ -- char flag choice 3 = 2457600 ?
+IF ." 2457600 Bds"
+ FREQ_KHZ @
+ #8000 OVRSWP< \ MCLK < 8MHz ? ==> abort
+ IF OVR_BAUDS ;THEN
+ #8000 OVER=
+ IF $3 $4400 ;THEN
+ #16000 OVER=
+ IF $6 $AA00 ;THEN
+ #24000 OVER=
+ IF $9 $DD00 ;THEN
+ BAD_MHz
+;THEN
+52 OVER= \ -- char flag choice 4 = 921600 ?
+IF ." 921600 Bds"
+ FREQ_KHZ @
+ #4000 OVRSWP< \ MCLK < 4MHz ? ==> abort
+ IF OVR_BAUDS ;THEN
+ #4000 OVER=
+ IF $4 $4900 ;THEN
+ #8000 OVER=
+ IF $8 $D600 ;THEN
+ #16000 OVER=
+ IF $11 $4A00 ;THEN
+ #24000 OVER=
+ IF $1 $00A1 ;THEN
+ BAD_MHz
+;THEN
+53 OVER= \ -- char flag choice 5 = 460800 ?
+IF ." 460800 Bds"
+ FREQ_KHZ @
+ #4000 OVRSWP< \ MCLK < 4MHz ? ==> abort
+ IF OVR_BAUDS ;THEN
+ #4000 OVER=
+ IF $8 $D600 ;THEN
+ #8000 OVER=
+ IF $11 $4A00 ;THEN
+ #16000 OVER=
+ IF $2 $BB21 ;THEN
+ #24000 OVER=
+ IF $6 $0001 ;THEN
+ BAD_MHz
+;THEN
+54 OVER= \ -- char flag choice 6 = 230400 ?
+IF ." 230400 Bds"
+ FREQ_KHZ @
+ #1000 OVRSWP< \ MCLK < 1MHz ? ==> abort
+ IF OVR_BAUDS ;THEN
+ #1000 OVER=
+ IF $4 $4900 ;THEN
+ #4000 OVER=
+ IF $11 $4A00 ;THEN
+ #8000 OVER=
+ IF $2 $BB21 ;THEN
+ #16000 OVER=
+ IF $4 $5551 ;THEN
+ #24000 OVER=
+ IF $3 $0241 ;THEN
+ BAD_MHz
+;THEN
+55 OVER= \ -- char flag choice 7 = 115200 ?
+IF ." 115200 Bds"
+ FREQ_KHZ @
+ #1000 OVER=
+ IF $8 $D600 ;THEN
+ #4000 OVER=
+ IF $2 $BB21 ;THEN
+ #8000 OVER=
+ IF $4 $5551 ;THEN
+ #16000 OVER=
+ IF $8 $F7A1 ;THEN
+ #24000 OVER=
+ IF $0D $4901 ;THEN
+ BAD_MHz
+;THEN
+56 OVER= \ -- char flag choice 8 = 38400 Bds?
+IF ." 38400 Bds"
+ FREQ_KHZ @
+ #1000 OVER=
+ IF $1 $00A1 ;THEN
+ #4000 OVER=
+ IF $6 $2081 ;THEN
+ #8000 OVER=
+ IF $0D $4901 ;THEN
+ #16000 OVER=
+ IF $1A $D601 ;THEN
+ #24000 OVER=
+ IF $27 $0011 ;THEN
+ BAD_MHz
+;THEN
+57 OVER= \ -- char flag choice 9 = 19200 Bds?
+IF ." 19200 Bds"
+ FREQ_KHZ @
+ #1000 OVER=
+ IF $3 $0241 ;THEN
+ #4000 OVER=
+ IF $0D $4901 ;THEN
+ #8000 OVER=
+ IF $1A $D601 ;THEN
+ #16000 OVER=
+ IF $34 $4911 ;THEN
+ #24000 OVER=
+ IF $4E $0021 ;THEN
+ BAD_MHz
+;THEN
+65 OVER= \ -- char flag choice A = 9600 Bds?
+IF ." 9600 Bds"
+ FREQ_KHZ @
+ #1000 OVER=
+ IF $6 $2081 ;THEN
+ #4000 OVER=
+ IF $1A $D601 ;THEN
+ #8000 OVER=
+ IF $34 $4911 ;THEN
+ #16000 OVER=
+ IF $68 $D621 ;THEN
+ #24000 OVER=
+ IF $9C $0041 ;THEN
+ BAD_MHz
+;THEN \ -- char other key
+ ." abort" CR ABORT
+;
+
+\ CREATE ABUF 10 ALLOT
+\
+\ : TERM_LINES \ --
+\ ESC" [18t" \ TERMINAL reports '[8;y;xt' with y lines, x columns
+\ ABUF 10 \ -- adr len
+\ ACCEPT \ -- len'
+\ drop \ --
+\ ABUF 3 + 2 \ -- ABUF+3, len=2
+\ EVALUATE \ --
+\ ;
+
+\ TERM_LINES ABUF !
+
+: CHNGBAUD \ only for 1, 4, 8, 16, 24 MHz
+PWR_STATE \ to remove this created word (garbage collector)
+ECHO
+42 0 DO CR LOOP \ don't erase any line of source, create 42 empty lines
+\ TERM_LINES 0 DO CR LOOP \ don't erase any line of source, create y empty lines
+ESC" [H" \ then cursor home
+CR
+FREQ_KHZ @ 0 1000 UM/
+." target MCLK = " . ." MHz" CR
+." choose your baudrate:" CR
+." 0 --> 6 MBds" CR
+." 1 --> 5 MBds" CR
+." 2 --> 4 MBds" CR \ linux driver max speed
+." 3 --> 2457600 Bds" CR
+." 4 --> 921600 Bds" CR
+." 5 --> 460800 Bds" CR
+." 6 --> 230400 Bds" CR
+." 7 --> 115200 Bds" CR
+." 8 --> 38400 Bds" CR
+." 9 --> 19200 Bds" CR
+." A --> 9600 Bds" CR
+." other --> abort" CR
+." your choice: "
+
+SELECT_BAUDS \ -- char frequency TERM_BRW TERM_MCTLW
+
+TERMMCTLW_RST ! \ set UCAxMCTLW value in FRAM
+TERMBRW_RST ! \ set UCAxBRW value in FRAM
+DROP DROP \ clear stack
+
+CR ESC" [7m" \ escape sequence to set reverse video
+." Change baudrate in Teraterm, save its setup, then reset target."
+;
+
+CHNGBAUD
--- /dev/null
+\ -*- coding: utf-8 -*-
+\
+\ Fast Forth For Texas Instrument MSP430FRxxxx FRAM devices
+\ Copyright (C) <2017> <J.M. THOORENS>
+\
+\ This program is free software: you can redistribute it and/or modify
+\ it under the terms of the GNU General Public License as published by
+\ the Free Software Foundation, either version 3 of the License, or
+\ (at your option) any later version.
+\
+\ This program is distributed in the hope that it will be useful,
+\ but WITHOUT ANY WARRANTY; without even the implied warranty of
+\ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+\ GNU General Public License for more details.
+\
+\ You should have received a copy of the GNU General Public License
+\ along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+CODE BEGIN \ immediate
+MOV #HERE,PC \ BR HERE
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+CODE UNTIL \ immediate
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+\ COMPARE ( c-addr1 u1 c-addr2 u2 -- n )
+\ https://forth-standard.org/standard/string/COMPARE
+\ Compare the string specified by c-addr1 u1 to the string specified by c-addr2 u2.
+\ The strings are compared, beginning at the given addresses, character by character,
+\ up to the length of the shorter string or until a difference is found.
+\ If the two strings are identical, n is zero.
+\ If the two strings are identical up to the length of the shorter string,
+\ n is minus-one (-1) if u1 is less than u2 and one (1) otherwise.
+\ If the two strings are not identical up to the length of the shorter string,
+\ n is minus-one (-1) if the first non-matching character in the string specified by c-addr1 u1
+\ has a lesser numeric value than the corresponding character in the string specified by c-addr2 u2 and one (1) otherwise.
+CODE COMPARE
+ MOV TOS,S \ 1 u2 = S
+ MOV @PSP+,Y \ 2 addr2 = Y
+ MOV @PSP+,T \ 2 u1 = T
+ MOV @PSP+,X \ 2 addr1 = X
+BEGIN MOV T,TOS \ 1
+ ADD S,TOS \ 1
+ 0= ?GOTO FW3 \ 2 end of all successfull comparisons
+ SUB #1,S \ 1
+ 0< ?GOTO FW2 \ 2 u2<u1 ==> u1>u2
+ SUB #1,T \ 1
+ 0< ?GOTO FW1 \ 2 u1<u2
+ ADD #1,X \ 1
+ CMP.B @Y+,-1(X) \ 4 char1-char2
+0<> UNTIL \ 2 if char1=char2 loopback
+ U< IF \ char1<char2
+FW1 MOV #-1,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN \ 2 char1>char2
+FW2 MOV #1,TOS \ 1
+FW3 MOV @IP+,PC \ 4 20 words
+ENDCODE
+ \
+
+\ [DEFINED] COMPARE [IF]
+\ \ ------------------------------------------------------------------------
+\ TESTING COMPARE
+\ : CMOVE MOVE ;
+\ : s1 S" abcdefghijklmnopqrstuvwxyz" ;
+\ : s6 S" 123456" ;
+\
+\ T{ s1 s1 COMPARE -> 0 }T
+\ T{ s1 PAD SWAP CMOVE -> }T \ Copy s1 to PAD
+\ T{ s1 PAD OVER COMPARE -> 0 }T
+\ T{ s1 PAD 6 COMPARE -> 1 }T
+\ T{ PAD 10 s1 COMPARE -> -1 }T
+\ T{ s1 PAD 0 COMPARE -> 1 }T
+\ T{ PAD 0 s1 COMPARE -> -1 }T
+\ T{ s1 s6 COMPARE -> 1 }T
+\ T{ s6 s1 COMPARE -> -1 }T
+\ : "abdde" S" abdde" ;
+\ : "abbde" S" abbde" ;
+\ : "abcdf" S" abcdf" ;
+\ : "abcdee" S" abcdee" ;
+\
+\ T{ s1 "abdde" COMPARE -> -1 }T
+\ T{ s1 "abbde" COMPARE -> 1 }T
+\ T{ s1 "abcdf" COMPARE -> -1 }T
+\ T{ s1 "abcdee" COMPARE -> 1 }T
+\
+\ : s11 S" 0abc" ;
+\ : s12 S" 0aBc" ;
+\
+\ T{ s11 s12 COMPARE -> 1 }T
+\ T{ s12 s11 COMPARE -> -1 }T
+\
+\ [THEN] \ COMPARE
+
; ----------
\ see CORDICforDummies.pdf
\
+; -----------------------------------------------------------
+; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
+; -----------------------------------------------------------
+\
\ to see kernel options, download FastForthSpecs.f
-\ FastForth kernel options: ASSEMBLER, CONDCOMP, FIXPOINT_INPUT.
+\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP, FIXPOINT_INPUT
+\
\
-\ TARGET Current Selection (used by preprocessor GEMA to load the pattern: \config\gema\TARGET.pat)
+\ LP_MSP430FR2476
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
-\ MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\ MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
\
\ REGISTERS USAGE
\ rDODOES to rEXIT must be saved before use and restored after
[UNDEFINED] {CORDIC} [IF]
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {CORDIC}
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+CODE BEGIN \ immediate
+MOV #HERE,PC \ BR HERE
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+CODE UNTIL \ immediate
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+CODE AGAIN \ immediate
+MOV #BRAN,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+: WHILE \ immediate
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+
[UNDEFINED] {FIXPOINT} [IF] \ define words to display angle as Q15.16 number.
-[UNDEFINED] DABS [IF] \
+[UNDEFINED] DABS [IF]
\ https://forth-standard.org/standard/double/DABS
\ DABS d1 -- |d1| absolute value
CODE DABS
-MOV #1-,X
-ADD #4,X
-MOV X,PC
+AND #-1,TOS \ clear V, set N
+S< IF \ if positive (N=0)
+ XOR #-1,0(PSP) \ 4
+ XOR #-1,TOS \ 1
+ ADD #1,0(PSP) \ 4
+ ADDC #0,TOS \ 1
+THEN
+MOV @IP+,PC
ENDCODE
[THEN]
-
\ https://forth-standard.org/standard/core/HOLDS
\ Adds the string represented by addr u to the pictured numeric output string
\ compilation use: <# S" string" HOLDS #>
GOTO BW1 \ JMP HOLDS
ENDCODE
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+MOV rDOVAR,PC
+ENDCODE
+[THEN]
+
CODE F. \ display a Q15.16 number with 4/5/16 digits after comma
MOV TOS,S \ S = sign
MOV #4,T \ T = 4 preset 4 digits for base 16 and by default
ECHO
+; -----------------------------------------------------------
+; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
+; -----------------------------------------------------------
+
\
10000 89,0 POL2REC . . ; sin, cos -->
10000 75,0 POL2REC . . ; sin, cos -->
\ -*- coding: utf-8 -*-
; -----------------------------------------------------
-; ANS_COMP.f words complement to pass CORETEST.4TH
+; CORECOMP.f words complement to pass CORETEST.4TH
; -----------------------------------------------------
\
-\ to see kernel options, download FastForthSpecs.f
\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP
+\ to see FastForth kernel options, download FF_SPECS.f
\
\ TARGET Current Selection
-\ (used by preprocessor GEMA to load the pattern: \config\gema\TARGET.pat)
+\ (used by preprocessor GEMA to load the pattern: \inc\TARGET.pat)
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
\ MSP_EXP430FR2433 MSP_EXP430FR4133 MSP_EXP430FR2355 CHIPSTICK_FR2433
\
\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
\ ASSEMBLER conditionnal usage with ?GOTO S< S>= U< U>= 0= 0<> 0<
-[UNDEFINED] {ANS_COMP} [IF]
-
PWR_STATE
-MARKER {ANS_COMP}
+[DEFINED] {CORE_COMP} [IF] {CORE_COMP} [THEN] \ remove it if defined out of kernel
-\ https://forth-standard.org/standard/core/VALUE
-\ ( x "<spaces>name" -- ) define a Forth VALUE
-\ Skip leading space delimiters. Parse name delimited by a space.
-\ Create a definition for name with the execution semantics defined below,
-\ with an initial value equal to x.
-\
-\ name Execution: ( -- x )
-\ Place x on the stack. The value of x is that given when name was created,
-\ until the phrase x TO name is executed, causing a new value of x to be assigned to name.
+[UNDEFINED] {CORE_COMP} [IF] \
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
\
-\ TO name Run-time: ( x -- )
-\ Assign the value x to name.
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
-[UNDEFINED] VARIABLE [IF]
-\ https://forth-standard.org/standard/core/VARIABLE
-\ VARIABLE <name> -- define a Forth VARIABLE
+MARKER {CORE_COMP}
-: VARIABLE
-DEFER
-HI2LO
-MOV @RSP+,IP
-MOV #DOVAR,-4(W) \ CFA = DOVAR
+[UNDEFINED] + [IF]
+\ https://forth-standard.org/standard/core/Plus
+\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
+CODE +
+ADD @PSP+,TOS
MOV @IP+,PC
ENDCODE
-
[THEN]
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-DEFER
-HI2LO
-MOV @RSP+,IP
-MOV #DOCON,-4(W) \ CFA = DOCON
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
MOV @IP+,PC
ENDCODE
[THEN]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-
-[UNDEFINED] BASE [IF]
-\ https://forth-standard.org/standard/core/BASE
-\ BASE -- a-addr holds conversion radix
-BASEADR CONSTANT BASE
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
[THEN]
-[UNDEFINED] >IN [IF]
-\ https://forth-standard.org/standard/core/toIN
-\ C >IN -- a-addr holds offset in input stream
-TOIN CONSTANT >IN
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
[THEN]
-[UNDEFINED] PAD [IF]
-\ https://forth-standard.org/standard/core/PAD
-\ PAD -- addr
-PAD_ORG CONSTANT PAD
-[THEN]
+[UNDEFINED] DUP [IF]
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ENDCODE
-[UNDEFINED] BL [IF]
-\ https://forth-standard.org/standard/core/BL
-\ BL -- char an ASCII space
-#32 CONSTANT BL
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+CODE ?DUP
+CMP #0,TOS \ 2 test for TOS nonzero
+0<> ?GOTO BW1 \ 2
+MOV @IP+,PC \ 4
+ENDCODE
[THEN]
-[UNDEFINED] SPACE [IF]
-\ https://forth-standard.org/standard/core/SPACE
-\ SPACE -- output a space
-: SPACE
-BL EMIT ;
+[UNDEFINED] EXIT [IF]
+\ https://forth-standard.org/standard/core/EXIT
+\ EXIT -- exit a colon definition
+CODE EXIT
+MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+MOV @IP+,PC \ 4 = NEXT
+ \ 6 (ITC-2)
+ENDCODE
[THEN]
-[UNDEFINED] SPACES [IF]
-\ https://forth-standard.org/standard/core/SPACES
-\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- BL EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
+[UNDEFINED] DEPTH [IF]
+\ https://forth-standard.org/standard/core/DEPTH
+\ DEPTH -- +n number of items on stack, must leave 0 if stack empty
+CODE DEPTH
+MOV TOS,-2(PSP)
+MOV #PSTACK,TOS
+SUB PSP,TOS \ PSP-S0--> TOS
+RRA TOS \ TOS/2 --> TOS
+SUB #2,PSP \ post decrement stack...
+MOV @IP+,PC
ENDCODE
[THEN]
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
-\ \ https://forth-standard.org/standard/core/VALUE
-\ : VALUE \ x "<spaces>name" --
-\ CREATE ,
-\ DOES>
-\ HI2LO
-\ MOV @RSP+,IP
-\ BIT #UF10,SR \ see TO
-\ 0= IF
-\ MOV #@,PC
-\ THEN
-\ BIC #UF10,SR
-\ MOV #!,PC
-\ ENDCODE
-
-\ \ https://forth-standard.org/standard/core/TO
-\ \ TO name Run-time: ( x -- )
-\ \ Assign the value x to named VALUE.
-\ CODE TO
-\ BIS #UF10,SR
-\ MOV @IP+,PC
-\ ENDCODE
-
-\ https://forth-standard.org/standard/core/StoD
-\ S>D n -- d single -> double prec.
-: S>D
- DUP 0<
-;
+[UNDEFINED] DROP [IF]
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+CODE DROP
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
[UNDEFINED] NIP [IF]
\ https://forth-standard.org/standard/core/NIP
ENDCODE
[THEN]
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+SUB #2,PSP \ 1
+MOV TOS,0(PSP) \ 3
+MOV @RSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
ENDCODE
[THEN]
+[UNDEFINED] 0= [IF]
+\ https://forth-standard.org/standard/core/ZeroEqual
+\ 0= n/u -- flag return true if TOS=0
+CODE 0=
+SUB #1,TOS \ borrow (clear cy) if TOS was 0
+SUBC TOS,TOS \ TOS=-1 if borrow was set
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0< [IF]
+\ https://forth-standard.org/standard/core/Zeroless
+\ 0< n -- flag true if TOS negative
+CODE 0<
+ADD TOS,TOS \ 1 set carry if TOS negative
+SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
+XOR #-1,TOS \ 1 TOS=-1 if carry was set
+MOV @IP+,PC \
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+\ https://forth-standard.org/standard/core/Uless
+\ U< u1 u2 -- flag test u1<u2, unsigned
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @PSP+,TOS \ 2 u2-u1
+0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] < [IF]
+\ https://forth-standard.org/standard/core/less
+\ < n1 n2 -- flag test n1<n2, signed
+CODE <
+ SUB @PSP+,TOS \ 1 TOS=n2-n1
+ S< ?GOTO FW1 \ 2 signed
+ 0<> IF \ 2
+BW1 MOV #-1,TOS \ 1 flag Z = 0
+ THEN
+ MOV @IP+,PC
+ENDCODE
+
+\ https://forth-standard.org/standard/core/more
+\ > n1 n2 -- flag test n1>n2, signed
+CODE >
+ SUB @PSP+,TOS \ 2 TOS=n2-n1
+ S< ?GOTO BW1 \ 2 --> +5
+FW1 AND #0,TOS \ 1 flag Z = 1
+ MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ ------------------------------------------------------------------------------
+\ CONTROL STRUCTURES
+\ ------------------------------------------------------------------------------
+\ THEN and BEGIN compile nothing
+\ DO compile one word
+\ IF, ELSE, AGAIN, UNTIL, WHILE, REPEAT, LOOP & +LOOP compile two words
+\ LEAVE compile three words
+\
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+CODE BEGIN \ immediate
+MOV #HERE,PC \ BR HERE
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+CODE UNTIL \ immediate
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+CODE AGAIN \ immediate
+MOV #BRAN,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+: WHILE \ immediate
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP \ immediate
+MOV #XPLOOP,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
+[UNDEFINED] J [IF]
+\ https://forth-standard.org/standard/core/J
+\ J -- n R: 4*sys -- 4*sys
+\ C get the second loop index
+CODE J
+SUB #2,PSP
+MOV TOS,0(PSP)
+MOV 4(RSP),TOS
+SUB 6(RSP),TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] UNLOOP [IF]
+\ https://forth-standard.org/standard/core/UNLOOP
+\ UNLOOP -- R: sys1 sys2 -- drop loop parms
+CODE UNLOOP
+ADD #4,RSP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] LEAVE [IF]
+\ https://forth-standard.org/standard/core/LEAVE
+\ LEAVE -- L: -- adrs
+CODE LEAVE
+MOV &DP,W \ compile three words
+MOV #UNLOOP,0(W) \ [HERE] = UNLOOP
+MOV #BRAN,2(W) \ [HERE+2] = BRAN
+ADD #6,&DP \ [HERE+4] = After LOOP adr
+ADD #2,&LEAVEPTR
+ADD #4,W
+MOV &LEAVEPTR,X
+MOV W,0(X) \ leave HERE+4 on LEAVEPTR stack
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
[UNDEFINED] AND [IF]
\ https://forth-standard.org/standard/core/AND
\ C AND x1 x2 -- x3 logical AND
ENDCODE
[THEN]
+[UNDEFINED] S>D [IF]
+\ https://forth-standard.org/standard/core/StoD
+\ S>D n -- d single -> double prec.
+: S>D
+ DUP 0<
+;
+[THEN]
+
[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
-\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
+\ + n1/u1 n2/u2 -- n3/u3
CODE +
ADD @PSP+,TOS
MOV @IP+,PC
ENDCODE
[THEN]
-\ https://forth-standard.org/standard/core/INVERT
-\ INVERT x1 -- x2 bitwise inversion
-CODE INVERT
-XOR #-1,TOS
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
MOV @IP+,PC
ENDCODE
+[THEN]
-\ https://forth-standard.org/standard/core/less
-\ < n1 n2 -- flag test n1<n2, signed
-CODE <
- SUB @PSP+,TOS \ 1 TOS=n2-n1
- S< ?GOTO FW1 \ 2 signed
- 0<> IF \ 2
-BW1 MOV #-1,TOS \ 1 flag Z = 0
- THEN
- MOV @IP+,PC
+[UNDEFINED] 1+ [IF]
+\ https://forth-standard.org/standard/core/OnePlus
+\ 1+ n1/u1 -- n2/u2 add 1 to TOS
+CODE 1+
+ADD #1,TOS
+MOV @IP+,PC
ENDCODE
+[THEN]
-\ https://forth-standard.org/standard/core/more
-\ > n1 n2 -- flag test n1>n2, signed
-CODE >
- SUB @PSP+,TOS \ 2 TOS=n2-n1
- S< ?GOTO BW1 \ 2 --> +5
-FW1 AND #0,TOS \ 1 flag Z = 1
- MOV @IP+,PC
+[UNDEFINED] 1- [IF]
+\ https://forth-standard.org/standard/core/OneMinus
+\ 1- n1/u1 -- n2/u2 subtract 1 from TOS
+CODE 1-
+SUB #1,TOS
+MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] INVERT [IF]
+\ https://forth-standard.org/standard/core/INVERT
+\ INVERT x1 -- x2 bitwise inversion
+CODE INVERT
+XOR #-1,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] LSHIFT [IF]
\ https://forth-standard.org/standard/core/LSHIFT
\ LSHIFT x1 u -- x2 logical L shift u places
CODE LSHIFT
THEN MOV W,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] RSHIFT [IF]
\ https://forth-standard.org/standard/core/RSHIFT
\ RSHIFT x1 u -- x2 logical R7 shift u places
CODE RSHIFT
THEN MOV W,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
[UNDEFINED] MAX [IF]
\ https://forth-standard.org/standard/core/MAX
ENDCODE
[THEN]
+[THEN]
+
+[UNDEFINED] 2* [IF]
\ https://forth-standard.org/standard/core/TwoTimes
\ 2* x1 -- x2 arithmetic left shift
CODE 2*
ADD TOS,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] 2/ [IF]
\ https://forth-standard.org/standard/core/TwoDiv
\ 2/ x1 -- x2 arithmetic right shift
CODE 2/
RRA TOS
MOV @IP+,PC
ENDCODE
+[THEN]
\ --------------------
\ ARITHMETIC OPERATORS
\ --------------------
+[UNDEFINED] M* [IF]
+
TLV_ORG 4 + @ $81F3 U<
$81EF TLV_ORG 4 + @ U<
-= [IF] ; MSP430FR413x subfamily without hardware_MPY
+= [IF] ; MSP430FR2xxx|MSP430FR4xxx subfamilies without hardware_MPY
\ https://forth-standard.org/standard/core/MTimes
\ M* n1 n2 -- dlo dhi signed 16*16->32 multiply
[THEN]
+[THEN]
+
+[UNDEFINED] UM/MOD [IF]
\ https://forth-standard.org/standard/core/UMDivMOD
\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
CODE UM/MOD
PUSH #DROP \
- MOV #<#,X \ X = addr of <#
- ADD #8,X \ X = addr of MUSMOD
- MOV X,PC \ execute MUSMOD then RET to DROP
+ MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
ENDCODE
+[THEN]
+[UNDEFINED] SM/REM [IF]
\ https://forth-standard.org/standard/core/SMDivREM
\ SM/REM DVDlo DVDhi DIVlo -- r3 q4 symmetric signed div
CODE SM/REM
XOR S,T \ S=divisor T=quot_sign
CMP #0,T \ -- n3 u4 T=quot_sign
S< IF
-BW1
-BW2
XOR #-1,TOS
ADD #1,TOS
THEN \ -- n3 n4 S=divisor
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] NEGATE [IF]
\ https://forth-standard.org/standard/core/NEGATE
\ C NEGATE x1 -- x2 two's complement
CODE NEGATE
-GOTO BW1
+XOR #-1,TOS
+ADD #1,TOS
+MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] ABS [IF]
\ https://forth-standard.org/standard/core/ABS
\ C ABS n1 -- +n2 absolute value
CODE ABS
CMP #0,TOS \ 1
-0< ?GOTO BW2
-MOV @IP+,PC
+0>= IF
+ MOV @IP+,PC
+THEN
+MOV #NEGATE,PC
ENDCODE
+[THEN]
+[UNDEFINED] FM/MOD [IF]
\ https://forth-standard.org/standard/core/FMDivMOD
\ FM/MOD d1 n1 -- r q floored signed div'n
: FM/MOD
MOV @RSP+,IP
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] * [IF]
\ https://forth-standard.org/standard/core/Times
\ * n1 n2 -- n3 signed multiply
: *
M* DROP
;
+[THEN]
+[UNDEFINED] /MOD [IF]
\ https://forth-standard.org/standard/core/DivMOD
\ /MOD n1 n2 -- r3 q4 signed division
: /MOD
>R DUP 0< R> FM/MOD
;
+[THEN]
+[UNDEFINED] / [IF]
\ https://forth-standard.org/standard/core/Div
\ / n1 n2 -- n3 signed quotient
: /
>R DUP 0< R> FM/MOD NIP
;
+[THEN]
+[UNDEFINED] MOD [IF]
\ https://forth-standard.org/standard/core/MOD
\ MOD n1 n2 -- n3 signed remainder
: MOD
>R DUP 0< R> FM/MOD DROP
;
+[THEN]
+[UNDEFINED] */MOD [IF]
\ https://forth-standard.org/standard/core/TimesDivMOD
\ */MOD n1 n2 n3 -- r4 q5 signed mult/div
: */MOD
>R M* R> FM/MOD
;
+[THEN]
+[UNDEFINED] */ [IF]
\ https://forth-standard.org/standard/core/TimesDiv
\ */ n1 n2 n3 -- n4 n1*n2/q3
: */
\ -------------------------------------------------------------------------------
\ STACK OPERATIONS
\ -------------------------------------------------------------------------------
-
[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
ENDCODE
[THEN]
+[UNDEFINED] ROT [IF]
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
CODE ROT
MOV W,2(PSP) \ 3 store x2
MOV @IP+,PC
ENDCODE
+[THEN]
+[THEN]
+[UNDEFINED] R@ [IF]
\ https://forth-standard.org/standard/core/RFetch
\ R@ -- x R: x -- x fetch from return stack
CODE R@
MOV @RSP,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
\ ----------------------------------------------------------------------
\ DOUBLE OPERATORS
\ ----------------------------------------------------------------------
-
-[UNDEFINED] {DOUBLE} [IF]
-
+[UNDEFINED] 2@ [IF]
\ https://forth-standard.org/standard/core/TwoFetch
\ 2@ a-addr -- x1 x2 fetch 2 cells ; the lower address will appear on top of stack
CODE 2@
MOV @TOS,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] 2! [IF]
\ https://forth-standard.org/standard/core/TwoStore
\ 2! x1 x2 a-addr -- store 2 cells ; the top of stack is stored at the lower adr
CODE 2!
MOV @PSP+,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
-\ \ https://forth-standard.org/standard/double/TwoVALUE
-\ : 2VALUE \ x1 x2 "<spaces>name" --
-\ CREATE , , \ compile Shi then Flo
-\ DOES>
-\ HI2LO
-\ MOV @RSP+,IP
-\ BIT #UF10,SR \see TO
-\ 0= ?GOTO BW1
-\ BIC #UF10,SR
-\ GOTO BW2
-\ ENDCODE
+[UNDEFINED] 2DUP [IF]
+\ https://forth-standard.org/standard/core/TwoDUP
+\ 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
+CODE 2DUP
+MOV TOS,-2(PSP) \ 3
+MOV @PSP,-4(PSP) \ 4
+SUB #4,PSP \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+[UNDEFINED] 2DROP [IF]
\ https://forth-standard.org/standard/core/TwoDROP
\ 2DROP x1 x2 -- drop 2 cells
CODE 2DROP
MOV @PSP+,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] 2SWAP [IF]
\ https://forth-standard.org/standard/core/TwoSWAP
\ 2SWAP x1 x2 x3 x4 -- x3 x4 x1 x2
CODE 2SWAP
MOV W,2(PSP) \ -- x3 x4 x1 x2
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] 2OVER [IF]
\ https://forth-standard.org/standard/core/TwoOVER
\ 2OVER x1 x2 x3 x4 -- x1 x2 x3 x4 x1 x2
CODE 2OVER
MOV 6(PSP),TOS \ -- x1 x2 x3 x4 x1 x2
MOV @IP+,PC
ENDCODE
-
[THEN]
\ ----------------------------------------------------------------------
\ ALIGNMENT OPERATORS
\ ----------------------------------------------------------------------
+
+[UNDEFINED] ALIGNED [IF]
\ https://forth-standard.org/standard/core/ALIGNED
\ ALIGNED addr -- a-addr align given addr
CODE ALIGNED
ADDC #0,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] ALIGN [IF]
\ https://forth-standard.org/standard/core/ALIGN
\ ALIGN -- align HERE
CODE ALIGN
ADDC #0,&DP \ 4
MOV @IP+,PC
ENDCODE
+[THEN]
\ ---------------------
\ PORTABILITY OPERATORS
\ ---------------------
+
+[UNDEFINED] CHARS [IF]
\ https://forth-standard.org/standard/core/CHARS
\ CHARS n1 -- n2 chars->adrs units
CODE CHARS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] CHAR+ [IF]
\ https://forth-standard.org/standard/core/CHARPlus
\ CHAR+ c-addr1 -- c-addr2 add char size
CODE CHAR+
ADD #1,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] CELLS [IF]
\ https://forth-standard.org/standard/core/CELLS
\ CELLS n1 -- n2 cells->adrs units
CODE CELLS
ADD TOS,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] CELL+ [IF]
\ https://forth-standard.org/standard/core/CELLPlus
\ CELL+ a-addr1 -- a-addr2 add cell size
CODE CELL+
ADD #2,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
\ ---------------------------
\ BLOCK AND STRING COMPLEMENT
\ ---------------------------
+[UNDEFINED] CHAR [IF]
\ https://forth-standard.org/standard/core/CHAR
\ CHAR -- char parse ASCII character
: CHAR
- BL WORD 1+ C@
+ $20 WORD 1+ C@
;
+[THEN]
+[UNDEFINED] [CHAR] [IF]
\ https://forth-standard.org/standard/core/BracketCHAR
\ [CHAR] -- compile character literal
: [CHAR]
CHAR POSTPONE LITERAL
; IMMEDIATE
+[THEN]
+[UNDEFINED] +! [IF]
\ https://forth-standard.org/standard/core/PlusStore
\ +! n/u a-addr -- add n/u to memory
CODE +!
MOV @PSP+,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] MOVE [IF]
+\ https://forth-standard.org/standard/core/MOVE
+\ MOVE addr1 addr2 u -- smart move
+\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
+CODE MOVE
+MOV TOS,W \ W = cnt
+MOV @PSP+,Y \ Y = addr2 = dst
+MOV @PSP+,X \ X = addr1 = src
+MOV @PSP+,TOS \ pop new TOS
+CMP #0,W \ count = 0 ?
+0<> IF \ if 0, already done !
+ CMP X,Y \ Y-X \ dst - src
+ 0<> IF \ else already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC \ out 1 of MOVE ====>
+ THEN \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
+ SUB #1,W
+ 0= UNTIL
+ THEN
+THEN
+MOV @IP+,PC \ out 2 of MOVE ====>
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] FILL [IF]
\ https://forth-standard.org/standard/core/FILL
\ FILL c-addr u char -- fill memory with char
CODE FILL
MOV @PSP+,TOS \ empties stack
MOV @IP+,PC
ENDCODE
+[THEN]
+
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,PC
+ENDCODE
+[THEN]
\ --------------------
\ INTERPRET COMPLEMENT
\ --------------------
+[UNDEFINED] HEX [IF]
\ https://forth-standard.org/standard/core/HEX
CODE HEX
-MOV #$10,&BASE
+MOV #$10,&BASEADR
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] DECIMAL [IF]
\ https://forth-standard.org/standard/core/DECIMAL
CODE DECIMAL
-MOV #$0A,&BASE
+MOV #$0A,&BASEADR
MOV @IP+,PC
ENDCODE
+[THEN]
+[UNDEFINED] ( [IF]
\ https://forth-standard.org/standard/core/p
\ ( -- skip input until char ) or EOL
: (
$29 WORD DROP
; IMMEDIATE
+[THEN]
+[UNDEFINED] .( [IF] \ "
\ https://forth-standard.org/standard/core/Dotp
\ .( -- type comment immediatly.
CODE .( \ "
COLON
$29 WORD
COUNT TYPE
-BL CAPS ! \ CAPS ON
+$20 CAPS ! \ CAPS ON
; IMMEDIATE
+[THEN]
-\ https://forth-standard.org/standard/core/J
-\ J -- n R: 4*sys -- 4*sys
-\ C get the second loop index
-CODE J
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV 4(RSP),TOS
-SUB 6(RSP),TOS
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
MOV @IP+,PC
ENDCODE
+[THEN]
-\ https://forth-standard.org/standard/core/UNLOOP
-\ UNLOOP -- R: sys1 sys2 -- drop loop parms
-CODE UNLOOP
-ADD #4,RSP
-MOV @IP+,PC
+[UNDEFINED] EXECUTE [IF] \ "
+\ https://forth-standard.org/standard/core/EXECUTE
+\ EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+CODE EXECUTE
+MOV TOS,W \ 1 put word address into W
+MOV @PSP+,TOS \ 2 fetch new TOS
+MOV W,PC \ 3 fetch code address into PC
ENDCODE
+[THEN]
-\ https://forth-standard.org/standard/core/LEAVE
-\ LEAVE -- L: -- adrs
-CODE LEAVE
-MOV &DP,W \ compile three words
-MOV #UNLOOP,0(W) \ [HERE] = UNLOOP
-MOV #.,2(W) \ DOT + 8 = BRAN
-ADD #8,2(W) \ [HERE+2] = BRAN
-ADD #6,&DP \ [HERE+4] = After LOOP adr
-ADD #2,&LEAVEPTR
-ADD #4,W
-MOV &LEAVEPTR,X
-MOV W,0(X) \ leave HERE+4 on LEAVEPTR stack
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
+[UNDEFINED] RECURSE [IF]
\ https://forth-standard.org/standard/core/RECURSE
\ C RECURSE -- recurse to current definition (compile current definition)
CODE RECURSE
ADD #2,&DP
MOV @IP+,PC
ENDCODE IMMEDIATE
+[THEN]
+[UNDEFINED] SOURCE [IF]
\ https://forth-standard.org/standard/core/SOURCE
\ SOURCE -- adr u of current input buffer
CODE SOURCE
MOV &SOURCE_ORG,0(PSP)
MOV @IP+,PC
ENDCODE
+[THEN]
-RST_HERE
+\ [UNDEFINED] VARIABLE [IF]
+\ \ https://forth-standard.org/standard/core/VARIABLE
+\ \ VARIABLE <name> -- define a Forth VARIABLE
+\ : VARIABLE
+\ CREATE
+\ HI2LO
+\ MOV #DOVAR,-4(W) \ CFA = DOVAR
+\ MOV @RSP+,IP
+\ MOV @IP+,PC
+\ ENDCODE
+\ [THEN]
+
+[UNDEFINED] VARIABLE [IF]
+\ https://forth-standard.org/standard/core/VARIABLE
+\ VARIABLE <name> -- define a Forth VARIABLE
+: VARIABLE
+CREATE
+2 ALLOT
+;
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] BASE [IF]
+\ https://forth-standard.org/standard/core/BASE
+\ BASE -- a-addr holds conversion radix
+BASEADR CONSTANT BASE
+[THEN]
+
+[UNDEFINED] >IN [IF]
+\ https://forth-standard.org/standard/core/toIN
+\ C >IN -- a-addr holds offset in input stream
+TOIN CONSTANT >IN
+[THEN]
+
+[UNDEFINED] PAD [IF]
+\ https://forth-standard.org/standard/core/PAD
+\ PAD -- addr
+PAD_ORG CONSTANT PAD
+[THEN]
+[UNDEFINED] BL [IF]
+\ https://forth-standard.org/standard/core/BL
+\ BL -- char an ASCII space
+$20 CONSTANT BL
[THEN]
+
+[UNDEFINED] SPACE [IF]
+\ https://forth-standard.org/standard/core/SPACE
+\ SPACE -- output a space
+: SPACE
+$20 EMIT ;
+[THEN]
+
+[UNDEFINED] SPACES [IF]
+\ https://forth-standard.org/standard/core/SPACES
+\ SPACES n -- output n spaces
+CODE SPACES
+CMP #0,TOS
+0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+THEN
+MOV @PSP+,TOS \ -- drop n
+NEXT
+ENDCODE
+[THEN]
+
+RST_HERE
+
+[THEN] \ end of [UNDEFINED] {CORE_COMP}
+
ECHO
PWR_STATE
-: ESC #27 EMIT ;
-
-: PAGEUP
-ECHO
-41 \ number of terminal lines -1
-0 DO CR LOOP \ don't erase any line of source
-ESC ." [1J" \ erase up (41 empty lines)
-ESC ." [H" \ cursor home
-;
-
: ANSCOMPNOTFOUND
-PAGEUP
-1 ABORT" {ANS_COMP} word set not found!"
+$0D EMIT \ return to column 1
+1 ABORT" {CORE_COMP} word set not found!"
;
+[DEFINED] {CORE_COMP} [IF]
+
: CORETESTSUCCESS
-PAGEUP
+$0A BASE !
+$0D EMIT \ return to column 1
1 ABORT" CORE tests success!"
;
-[DEFINED] {ANS_COMP} [IF]
-
\ From: John Hayes S1I
\ Subject: tester.fr
T{ GDX -> 123 234 }T
-CR .( End of Core word set tests) CR
-
-[DEFINED] COMPARE [IF]
-\ ------------------------------------------------------------------------
-TESTING COMPARE
-: CMOVE MOVE ;
-: s1 S" abcdefghijklmnopqrstuvwxyz" ;
-: s6 S" 123456" ;
-
-T{ s1 s1 COMPARE -> 0 }T
-T{ s1 PAD SWAP CMOVE -> }T \ Copy s1 to PAD
-T{ s1 PAD OVER COMPARE -> 0 }T
-T{ s1 PAD 6 COMPARE -> 1 }T
-T{ PAD 10 s1 COMPARE -> -1 }T
-T{ s1 PAD 0 COMPARE -> 1 }T
-T{ PAD 0 s1 COMPARE -> -1 }T
-T{ s1 s6 COMPARE -> 1 }T
-T{ s6 s1 COMPARE -> -1 }T
-: "abdde" S" abdde" ;
-: "abbde" S" abbde" ;
-: "abcdf" S" abcdf" ;
-: "abcdee" S" abcdee" ;
-
-T{ s1 "abdde" COMPARE -> -1 }T
-T{ s1 "abbde" COMPARE -> 1 }T
-T{ s1 "abcdf" COMPARE -> -1 }T
-T{ s1 "abcdee" COMPARE -> 1 }T
-
-: s11 S" 0abc" ;
-: s12 S" 0aBc" ;
-
-T{ s11 s12 COMPARE -> 1 }T
-T{ s12 s11 COMPARE -> -1 }T
-
-[THEN] \ COMPARE
-
-$0A BASE !
+CR .( End of Core word set tests)
CORETESTSUCCESS
[ELSE]
-ANSCOMPNOTFOUND
+ECHO
+ANSCOMPNOTFOUND \ download CORECOMP.F before CORETEST.4TH
[THEN]
--- /dev/null
+\ -*- coding: utf-8 -*-
+
+; --------------------
+; DEFER.f
+; --------------------
+\
+\ to see kernel options, download FastForthSpecs.f
+\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP
+\
+\ TARGET SELECTION
+\ LP_MSP430FR2476
+\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
+\ MSP_EXP430FR4133 MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\
+\ REGISTERS USAGE
+\ R4 to R7 must be saved before use and restored after
+\ scratch registers Y to S are free for use
+\ under interrupt, IP is free for use
+\
+\ PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7 , R6 , R5 , R4 , R3, R2, R1, R0
+\
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM order : PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT, Y, X, W, T, S, IP,TOS,PSP
+\ POPM order : R0, R1, R2, R3, R4 , R5 , R6 , R7 , R8, R9,R10,R11,R12,R13,R14,R15
+\
+\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
+\
+\
+\ FORTH conditionnals: unary{ 0= 0< 0> }, binary{ = < > U< }
+\
+\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
+\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
+\
+
+PWR_STATE
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
; ------------------
; FF_SPECS.f
; ------------------
-
-; display all FastForth compilation options
-
-\ TARGET SELECTION
+\
+; displays all FastForth specifications
+\
+\ TARGET SELECTION : copy your target in (shift+F8) parameter 1:
+\ LP_MSP430FR2476
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
\ MSP_EXP430FR4133 CHIPSTICK_FR2433 MSP_EXP430FR2433 MSP_EXP430FR2355
\
\ drag and drop this file onto SendSourceFileToTarget.bat
\ then select your TARGET when asked.
\
+PWR_STATE \ remove volatile words
-RST_STATE
+[UNDEFINED] AND [IF]
+\ https://forth-standard.org/standard/core/AND
+\ C AND x1 x2 -- x3 logical AND
+CODE AND
+AND @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DUP [IF]
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ENDCODE
+
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+CODE ?DUP
+CMP #0,TOS \ 2 test for TOS nonzero
+0<> ?GOTO BW1 \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
ENDCODE
[THEN]
-: CASE 0 ; IMMEDIATE \ -- #of-1
-
-: OF \ #of-1 -- orgOF #of
-1+ \ count OFs
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE OVER POSTPONE = \ copy and test case value
-POSTPONE IF \ add orig to control flow stack
-POSTPONE DROP \ discards case value if =
-R> \ we can bring count back now
-; IMMEDIATE
-
-: ENDOF \ orgOF #of -- orgENDOF #of
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE ELSE
-R> \ we can bring count back now
-; IMMEDIATE
-
-: ENDCASE \ orgENDOF1..orgENDOFn #of --
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-
-: ESC #27 EMIT ;
-
-[UNDEFINED] + [IF]
-\ https://forth-standard.org/standard/core/Plus
-\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
+[UNDEFINED] DROP [IF]
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+CODE DROP
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
ENDCODE
[THEN]
-[UNDEFINED] AND [IF]
-\ https://forth-standard.org/standard/core/AND
-\ C AND x1 x2 -- x3 logical AND
-CODE AND
-AND @PSP+,TOS
-MOV @IP+,PC
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
ENDCODE
[THEN]
-
[UNDEFINED] ROT [IF]
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
ENDCODE
[THEN]
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+SUB #2,PSP \ 1
+MOV TOS,0(PSP) \ 3
+MOV @RSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0< [IF]
+\ https://forth-standard.org/standard/core/Zeroless
+\ 0< n -- flag true if TOS negative
+CODE 0<
+ADD TOS,TOS \ 1 set carry if TOS negative
+SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
+XOR #-1,TOS \ 1 TOS=-1 if carry was set
+MOV @IP+,PC \
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+\ https://forth-standard.org/standard/core/Uless
+\ U< u1 u2 -- flag test u1<u2, unsigned
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @PSP+,TOS \ 2 u2-u1
+0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+CODE UNTIL
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+CODE AGAIN
+MOV #BRAN,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP
+MOV #XPLOOP,X
+GOTO BW1 \ goto BW1 LOOP
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
MOV @RSP+,IP
THEN
MOV @PSP+,TOS \ -- drop n
-NEXT
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1+ [IF]
+\ https://forth-standard.org/standard/core/OnePlus
+\ 1+ n1/u1 -- n2/u2 add 1 to TOS
+CODE 1+
+ADD #1,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
+\ https://forth-standard.org/standard/core/Plus
+\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
+CODE +
+ADD @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2* [IF]
+\ https://forth-standard.org/standard/core/TwoTimes
+\ 2* x1 -- x2 arithmetic left shift
+CODE 2*
+ADD TOS,TOS
+MOV @IP+,PC
ENDCODE
[THEN]
\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
CODE UM/MOD
PUSH #DROP \
- MOV #<#,X \ X = addr of <#
- ADD #8,X \ X = addr of MUSMOD
- MOV X,PC \ execute MUSMOD then RET to DROP
+ MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
+ENDCODE
+[THEN]
+
+[UNDEFINED] MOVE [IF]
+\ https://forth-standard.org/standard/core/MOVE
+\ MOVE addr1 addr2 u -- smart move
+\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
+CODE MOVE
+MOV TOS,W \ W = cnt
+MOV @PSP+,Y \ Y = addr2 = dst
+MOV @PSP+,X \ X = addr1 = src
+MOV @PSP+,TOS \ pop new TOS
+CMP #0,W \ count = 0 ?
+0<> IF \ if 0, already done !
+ CMP X,Y \ Y-X \ dst - src
+ 0<> IF \ if dst = src, already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC
+ THEN \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
+ SUB #1,W
+ 0= UNTIL
+ THEN
+THEN
+MOV @IP+,PC
ENDCODE
[THEN]
: WORDS \ --
CR
CONTEXT @ PAD_ORG \ -- VOC_BODY PAD MOVE all threads of VOC_BODY in PAD_ORG
-INI_THREAD @ DUP + \ -- VOC_BODY PAD THREAD*2
-MOVE \ -- vocabumary entries are copied in PAD_ORG
+INI_THREAD @ 2* \ -- VOC_BODY PAD THREAD*2
+MOVE \ -- vocabulary entries are copied in PAD_ORG
BEGIN \ --
0 DUP \ -- ptr=0 MAX=0
- INI_THREAD @ DUP + 0 \ -- ptr=0 MAX=0 THREADS*2 0
+ INI_THREAD @ 2* 0 \ -- ptr=0 MAX=0 THREADS*2 0
DO \ -- ptr MAX I = PAD_ptr = thread*2
DUP I PAD_ORG + @ \ -- ptr MAX MAX NFAx
U< IF \ -- ptr MAX if MAX U< NFAx
; \ all threads in PAD are filled with 0
[THEN]
-: ADDONS \ see "compute value of FORTHADDON" in file \inc\ThingsInFirst.inc
-ESC ." [7m" \ escape sequence to set reverse video
-." KERNEL OPTIONS:" \ in reverse video
-ESC ." [0m" \ escape sequence to clear reverse video
-KERNEL_ADDON @ \ see ThingsInFirst.inc
-
- DUP 0< IF CR ." 32.768kHz XTAL" THEN
-DUP + DUP 0< IF DUP + CR ." HARDWARE (RTS/CTS) TERMINAL" \ 'DUP +' = one shift left
- ELSE DUP + DUP 0< IF CR ." HARDWARE (RTS) TERMINAL" THEN
- THEN
-DUP + DUP 0< IF CR ." XON/XOFF TERMINAL" THEN
-DUP + DUP 0< IF CR ." HALF-DUPLEX TERMINAL" THEN
-DUP + DUP 0< IF CR ." ASM DATA ACCESS BEYOND $FFFF" THEN
-DUP + DUP 0< IF CR ." BOOTLOADER" THEN
-DUP + DUP 0< IF CR ." SD_CARD READ/WRITE" THEN
-DUP + DUP 0< IF CR ." SD_CARD LOADER" THEN
-DUP + DUP 0< IF CR ." FIXPOINT INPUT" THEN
-DUP + DUP 0< IF CR ." DOUBLE INPUT" THEN
-DUP + DUP 0< IF CR ." VOCABULARY SET" THEN
-DUP + DUP 0< IF CR ." NONAME" THEN
-DUP + DUP 0< IF CR ." EXTENDED ASSEMBLER" THEN
-DUP + DUP 0< IF CR ." ASSEMBLER" THEN
-DUP + DUP 0< IF CR ." CONDITIONNAL COMPILATION" THEN
-
-0< IF \ true if CONDCOMP add-on
- CR ESC ." [7m" \ escape sequence to set reverse video
- ." OTHER OPTIONS:" \ in reverse video
- ESC ." [0m" \ escape sequence to clear reverse video
- CR ." none"
- ESC ." [G" \ cursor row 0
- [DEFINED] {ANS_COMP} [IF] ." ANS_COMPLEMENT" CR [THEN]
- [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
- [DEFINED] {FIXPOINT} [IF] ." FIXPOINT" CR [THEN]
- [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
- CR CR
- [DEFINED] VOCABULARY [IF]
- ESC ." [7m" \ escape sequence to set reverse video
- ." ASSEMBLER word set"
- ESC ." [0m" \ escape sequence to clear reverse video
- ALSO ASSEMBLER WORDS CR PREVIOUS
- [THEN]
-ESC ." [7m" ." FORTH word set" ESC ." [0m"
-WORDS \ Forth words set
-THEN
-;
+[UNDEFINED] CASE [IF]
+\ https://forth-standard.org/standard/core/CASE
+: CASE 0 ; IMMEDIATE \ -- #of-1
+[THEN]
-: specs \ to see Fast Forth specifications
+[UNDEFINED] OF [IF]
+\ https://forth-standard.org/standard/core/OF
+: OF \ #of-1 -- orgOF #of
+1+ \ count OFs
+>R \ move off the stack in case the control-flow stack is the data stack.
+POSTPONE OVER POSTPONE = \ copy and test case value
+POSTPONE IF \ add orig to control flow stack
+POSTPONE DROP \ discards case value if =
+R> \ we can bring count back now
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ENDOF [IF]
+\ https://forth-standard.org/standard/core/ENDOF
+: ENDOF \ orgOF #of -- orgENDOF #of
+>R \ move off the stack in case the control-flow stack is the data stack.
+POSTPONE ELSE
+R> \ we can bring count back now
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ENDCASE [IF]
+\ https://forth-standard.org/standard/core/ENDCASE
+: ENDCASE \ orgENDOF1..orgENDOFn #of --
+POSTPONE DROP
+0 DO
+ POSTPONE THEN
+LOOP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ESC" [IF]
+\ ESC" <escape sequence>" -- type an escape sequence
+: ESC"
+$1B \ ESC char
+POSTPONE LITERAL
+POSTPONE EMIT
+POSTPONE S"
+POSTPONE TYPE
+; IMMEDIATE \ "
+[THEN]
+
+: SPECS \ to see Fast Forth specifications
PWR_STATE \ before free bytes computing, remove all created words
HERE \ to compute bytes
ECHO
-41 \ number of terminal lines -1
-0 DO CR LOOP \ don't erase any line of source
-
-ESC ." [1J" \ erase up (41 empty lines)
-ESC ." [H" \ cursor home
-ESC ." [7m" \ escape sequence to set reverse video
+42 0 DO CR LOOP \ don't erase any line of source, create 42 empty lines
+ESC" [H" \ then cursor home
+ESC" [7m" \ set reverse video
+CR ." FastForth V" \ title line in reverse video
+VERSION @
+0 <# # 8 HOLD # 46 HOLD #S #> TYPE
+." for MSP430FR"
DEVICEID @ \ value kept in TLV area
-
-CR ." FastForth V" VERSION @ \ FastForth version,
-0 <# # 8 HOLD # 46 HOLD #S #> TYPE $20 EMIT
-." for MSP430FR" \ target,
CASE
-\ device ID of MSP430FRxxxx MAIN org
- $830C OF ." 2355," $8000 ENDOF
- $8328 OF ." 2476," $8000 ENDOF
- $8240 OF ." 2433," $C400 ENDOF
- $81F0 OF ." 4133," $C400 ENDOF
- $8103 OF ." 5739," $C200 ENDOF
$8102 OF ." 5738," $C200 ENDOF
- $8169 OF ." 5969," $4400 ENDOF
+ $8103 OF ." 5739," $C200 ENDOF
$8160 OF ." 5948," $4400 ENDOF
- $82A1 OF ." 5994," $4000 ENDOF
+ $8169 OF ." 5969," $4400 ENDOF
$81A8 OF ." 6989," $4400 ENDOF
-\ DevID OF ." xxxx," $MAIN ENDOF \ <-- add here your device
-
+ $81F0 OF ." 4133," $C400 ENDOF
+ $8240 OF ." 2433," $C400 ENDOF
+ $82A1 OF ." 5994," $4000 ENDOF
+ $830C OF ." 2355," $8000 ENDOF
+ $8328 OF ." 2476," $8000 ENDOF
+\ device_ID OF ." xxxx," $MAIN ENDOF \ <-- add here your device
ABORT" xxxx <-- unrecognized device!"
-ENDCASE $20 EMIT
-
-['] ['] DUP @ $1287 = IF ." DTC=1," DROP \ DTC model number,
- ELSE 2 + @ $1287 =
- IF ." DTC=2,"
- ELSE ." DTC=3,"
- THEN
- THEN $20 EMIT
-
+ENDCASE
+$20 EMIT
+['] ['] DUP @ DOCOL = \ DOCOL = CALL rDOCOL opcode
+IF ." DTC=1," DROP \ [CFA] = CALL rDOCOL
+ELSE 2 + @ DOCOL = \
+ IF ." DTC=2," \ [CFA] = PUSH IP, [CFA+2] = CALL rDOCOL
+ ELSE ." DTC=3," \ [CFA] = PUSH IP, [CFA+2] = MOV PC,IP
+ THEN
+THEN
+$20 EMIT
INI_THREAD @ U. #8 EMIT ." -Entry word sets, " \ number of Entry word sets,
-
FREQ_KHZ @ 0 1000 UM/MOD U. \ frequency,
?DUP IF #8 EMIT ." ," U. \ if remainder
THEN ." MHz, " \ MCLK
-
-- U. ." bytes" \ HERE - MAIN_ORG \ number of bytes code,
-
-\ ESC ." [0m"
-
-CR CR ADDONS \ addons
+- U. ." bytes" \ HERE - MAIN_ORG = number of bytes code,
+ESC" [0m" \ clear reverse video
+
+CR ." /COUNTED-STRING = 255"
+CR ." /HOLD = 34"
+CR ." /PAD = 84"
+CR ." ADDRESS-UNIT-BITS = 16"
+CR ." FLOORED = true"
+CR ." MAX-CHAR = 255"
+CR ." MAX-N = 32767"
+CR ." MAX-U = 65535"
+CR ." MAX-D = 2147483647"
+CR ." MAX-UD = 4294967295"
+CR ." STACK-CELLS = 48"
+CR ." RETURN-STACK-CELLS= 48"
+
+CR CR
+
+ESC" [7m" \ set reverse video
+." KERNEL ADDONS" \ subtitle in reverse video
+ESC" [0m" \ clear reverse video
+KERNEL_ADDON @
+ DUP 0< IF CR ." 32.768kHz XTAL" THEN
+2* DUP 0< IF 2* CR ." 5 WIRES (RTS/CTS) UART TERMINAL"
+ ELSE 2* DUP
+ 0< IF CR ." 4 WIRES (RTS) UART TERMINAL"
+ THEN
+ THEN
+2* DUP 0< IF CR ." 3 WIRES (XON/XOFF) UART TERMINAL" THEN
+2* DUP 0< IF CR ." HALF-DUPLEX TERMINAL" THEN
+2* DUP 0< IF CR ." ASM DATA ACCESS BEYOND $FFFF" THEN
+2* DUP 0< IF CR ." BOOTLOADER" THEN
+2* DUP 0< IF CR ." SD_CARD READ/WRITE" THEN
+2* DUP 0< IF CR ." SD_CARD LOADER" THEN
+2* DUP 0< IF CR ." FIXPOINT INPUT" THEN
+2* DUP 0< IF CR ." DOUBLE INPUT" THEN
+2* DUP 0< IF CR ." VOCABULARY SET" THEN
+2* DUP 0< IF CR ." NONAME" THEN
+2* DUP 0< IF CR ." EXTENDED ASSEMBLER" THEN
+2* DUP 0< IF CR ." ASSEMBLER" THEN
+2* DUP 0< IF CR ." CONDITIONNAL COMPILATION" THEN
+0< IF \ true if CONDCOMP add-on
+ CR CR ESC" [7m"
+ ." OPTIONS" \ subtitle in reverse video
+ ESC" [0m" CR
+ [DEFINED] {CORE_COMP} [IF] ." CORE COMPLEMENT" CR [THEN]
+ [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
+ [DEFINED] {FIXPOINT} [IF] ." FIXPOINT" CR [THEN]
+ [DEFINED] {CORDIC} [IF] ." CORDIC engine" CR [THEN]
+ [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
+ [DEFINED] {RTC} [IF] ." RTC utilities" CR [THEN]
+ CR
+ [DEFINED] VOCABULARY [IF]
+ ESC" [7m"
+ ." ASSEMBLER word set" \ subtitle in reverse video
+ ESC" [0m"
+ ALSO ASSEMBLER WORDS PREVIOUS CR
+ [THEN]
+THEN
+ ESC" [7m"
+ ." FORTH word set" \ subtitle in reverse video
+ ESC" [0m"
+ WORDS
CR WARM
;
-ECHO specs \ here FastForth types a (volatile) message with some informations
+SPECS \ here FastForth types a (volatile) message with some informations
\ -*- coding: utf-8 -*-
; -----------------------------------------------------
-; FIXPOINT.f
+; FIXPOINT.f
; -----------------------------------------------------
+
+; -----------------------------------------------------------
+; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
+; -----------------------------------------------------------
\
\ to see kernel options, download FastForthSpecs.f
\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP, FIXPOINT_INPUT
PWR_STATE
+[DEFINED] {FIXPOINT} [IF] {FIXPOINT} [THEN]
+
[UNDEFINED] {FIXPOINT} [IF]
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {FIXPOINT}
[UNDEFINED] + [IF]
ENDCODE
[THEN]
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+MOV rDOVAR,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+\ https://forth-standard.org/standard/core/Uless
+\ U< u1 u2 -- flag test u1<u2, unsigned
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @PSP+,TOS \ 2 u2-u1
+0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] HOLDS [IF]
\ https://forth-standard.org/standard/core/HOLDS
\ Adds the string represented by addr u to the pictured numeric output string
\ https://forth-standard.org/standard/double/DABS
\ DABS d1 -- |d1| absolute value
CODE DABS
-MOV #1-,X \ 2
-ADD #4,X \ 1
-MOV X,PC \ 3
+AND #-1,TOS \ clear V, set N
+S< IF \ if positive (N=0)
+ XOR #-1,0(PSP) \ 4
+ XOR #-1,TOS \ 1
+ ADD #1,0(PSP) \ 4
+ ADDC #0,TOS \ 1
+THEN
+MOV @IP+,PC
ENDCODE
[THEN]
; (volatile) tests
; -----------------------
-
3,14159 2CONSTANT PI
PI -1,0 F* 2CONSTANT -PI
$10 BASEADR ! PI F.
- -PI F.
+ -PI F.
%10 BASEADR ! PI F.
- -PI F.
+ -PI F.
#10 BASEADR ! PI F.
- -PI F.
+ -PI F.
PI 2,0 F* F.
PI -2,0 F* F.
-PI 2,0 F/ F.
-PI -2,0 F/ F.
-32767,99999 1,0 f* F.
-32767,99999 1,0 f/ F.
-32767,99999 2,0 f/ F.
-32767,99999 4,0 f/ F.
-32767,99999 8,0 f/ F.
-32767,99999 16,0 f/ F.
-
--32767,0 -1,0 f* F.
--32767,0 -1,0 f/ F.
--32767,0 -2,0 f/ F.
--32767,0 -4,0 f/ F.
--32767,0 -8,0 f/ F.
--32767,0 -16,0 f/ F.
--32767,0 -32,0 f/ F.
--32767,0 -64,0 f/ F.
-
-; sqrt(32768)^2 = 32768
-181,01933598375 181,01933598375 f* f.
-181,01933598375 -181,01933598375 f* f.
--181,01933598375 181,01933598375 f* f.
--181,01933598375 -181,01933598375 f* f.
+32767,99999 1,0 F* F.
+32767,99999 1,0 F/ F.
+32767,99999 2,0 F/ F.
+32767,99999 4,0 F/ F.
+32767,99999 8,0 F/ F.
+32767,99999 16,0 F/ F.
+
+-32767,0 -1,0 F* F.
+-32767,0 -1,0 F/ F.
+-32767,0 -2,0 F/ F.
+-32767,0 -4,0 F/ F.
+-32767,0 -8,0 F/ F.
+-32767,0 -16,0 F/ F.
+-32767,0 -32,0 F/ F.
+-32767,0 -64,0 F/ F.
+
+; SQRT(32768)^2 = 32768
+181,01933598375 181,01933598375 F* F.
+181,01933598375 -181,01933598375 F* F.
+-181,01933598375 181,01933598375 F* F.
+-181,01933598375 -181,01933598375 F* F.
+
--- /dev/null
+
+; ------------------
+; FF_SPECS.4th
+; ------------------
+; displays all FastForth specifications
+PWR_STATE
+
+[UNDEFINED] AND [IF]
+CODE AND
+AND @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+CODE ?DUP
+CMP #0,R14
+0<> ?GOTO BW1
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] OVER [IF]
+CODE OVER
+MOV R14,-2(R15)
+MOV @R15,R14
+SUB #2,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DROP [IF]
+CODE DROP
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ROT [IF]
+CODE ROT
+MOV @R15,R10
+MOV R14,0(R15)
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0< [IF]
+CODE 0<
+ADD R14,R14
+SUBC R14,R14
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C@ [IF]
+CODE C@
+MOV.B @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SPACES [IF]
+CODE SPACES
+CMP #0,R14
+0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+THEN
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1+ [IF]
+CODE 1+
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
+CODE +
+ADD @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2* [IF]
+CODE 2*
+ADD R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] UM/MOD [IF]
+CODE UM/MOD
+ PUSH #DROP
+ MOV #$407E,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MOVE [IF]
+CODE MOVE
+MOV R14,R10
+MOV @R15+,R8
+MOV @R15+,R9
+MOV @R15+,R14
+CMP #0,R10
+0<> IF
+ CMP R9,R8
+ 0<> IF
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ THEN
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] WORDS [IF]
+: WORDS
+CR
+$1DCA @ $1CE4
+$1800 @ 2*
+MOVE
+BEGIN
+ 0 DUP
+ $1800 @ 2* 0
+ DO
+ DUP I $1CE4 + @
+ U< IF
+ DROP DROP
+ I DUP $1CE4 + @
+ THEN
+ 2 +LOOP
+ ?DUP
+WHILE
+ DUP
+ 2 - @
+ ROT
+ $1CE4 +
+ !
+ DUP
+ COUNT $7F AND
+ TYPE
+ C@ $0F AND
+ $10 SWAP - SPACES
+REPEAT
+DROP
+;
+[THEN]
+
+[UNDEFINED] CASE [IF]
+: CASE 0 ; IMMEDIATE
+[THEN]
+
+[UNDEFINED] OF [IF]
+: OF
+1+
+>R
+POSTPONE OVER POSTPONE =
+POSTPONE IF
+POSTPONE DROP
+R>
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ENDOF [IF]
+: ENDOF
+>R
+POSTPONE ELSE
+R>
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ENDCASE [IF]
+: ENDCASE
+POSTPONE DROP
+0 DO
+ POSTPONE THEN
+LOOP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ESC" [IF]
+: ESC"
+$1B
+POSTPONE LITERAL
+POSTPONE EMIT
+POSTPONE S"
+POSTPONE TYPE
+; IMMEDIATE
+[THEN]
+
+: SPECS
+PWR_STATE
+HERE
+ECHO
+
+42 0 DO CR LOOP
+ESC" [H"
+
+ESC" [7m"
+CR ." FastForth V"
+$1810 @
+0 <# # 8 HOLD # 46 HOLD #S #> TYPE
+." for MSP430FR"
+$1A04 @
+CASE
+ $8102 OF ." 5738," $C200 ENDOF
+ $8103 OF ." 5739," $C200 ENDOF
+ $8160 OF ." 5948," $4400 ENDOF
+ $8169 OF ." 5969," $4400 ENDOF
+ $81A8 OF ." 6989," $4400 ENDOF
+ $81F0 OF ." 4133," $C400 ENDOF
+ $8240 OF ." 2433," $C400 ENDOF
+ $82A1 OF ." 5994," $4000 ENDOF
+ $830C OF ." 2355," $8000 ENDOF
+ $8328 OF ." 2476," $8000 ENDOF
+ ABORT" xxxx <-- unrecognized device!"
+ENDCASE
+$20 EMIT
+['] ['] DUP @ $1287 =
+IF ." DTC=1," DROP
+ELSE 2 + @ $1287 =
+ IF ." DTC=2,"
+ ELSE ." DTC=3,"
+ THEN
+THEN
+$20 EMIT
+$1800 @ U. #8 EMIT ." -Entry word sets, "
+$1806 @ 0 1000 UM/MOD U.
+?DUP IF #8 EMIT ." ," U.
+THEN ." MHz, "
+- U. ." bytes"
+ESC" [0m"
+
+CR ." /COUNTED-STRING = 255"
+CR ." /HOLD = 34"
+CR ." /PAD = 84"
+CR ." ADDRESS-UNIT-BITS = 16"
+CR ." FLOORED = true"
+CR ." MAX-CHAR = 255"
+CR ." MAX-N = 32767"
+CR ." MAX-U = 65535"
+CR ." MAX-D = 2147483647"
+CR ." MAX-UD = 4294967295"
+CR ." STACK-CELLS = 48"
+CR ." RETURN-STACK-CELLS= 48"
+
+CR CR
+
+ESC" [7m"
+." KERNEL ADDONS"
+ESC" [0m"
+$1812 @
+ DUP 0< IF CR ." 32.768kHz XTAL" THEN
+2* DUP 0< IF 2* CR ." 5 WIRES (RTS/CTS) UART TERMINAL"
+ ELSE 2* DUP
+ 0< IF CR ." 4 WIRES (RTS) UART TERMINAL"
+ THEN
+ THEN
+2* DUP 0< IF CR ." 3 WIRES (XON/XOFF) UART TERMINAL" THEN
+2* DUP 0< IF CR ." HALF-DUPLEX TERMINAL" THEN
+2* DUP 0< IF CR ." ASM DATA ACCESS BEYOND $FFFF" THEN
+2* DUP 0< IF CR ." BOOTLOADER" THEN
+2* DUP 0< IF CR ." SD_CARD READ/WRITE" THEN
+2* DUP 0< IF CR ." SD_CARD LOADER" THEN
+2* DUP 0< IF CR ." FIXPOINT INPUT" THEN
+2* DUP 0< IF CR ." DOUBLE INPUT" THEN
+2* DUP 0< IF CR ." VOCABULARY SET" THEN
+2* DUP 0< IF CR ." NONAME" THEN
+2* DUP 0< IF CR ." EXTENDED ASSEMBLER" THEN
+2* DUP 0< IF CR ." ASSEMBLER" THEN
+2* DUP 0< IF CR ." CONDITIONNAL COMPILATION" THEN
+0< IF
+ CR CR ESC" [7m"
+ ." OPTIONS"
+ ESC" [0m" CR
+ [DEFINED] {CORE_COMP} [IF] ." CORE COMPLEMENT" CR [THEN]
+ [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
+ [DEFINED] {FIXPOINT} [IF] ." FIXPOINT" CR [THEN]
+ [DEFINED] {CORDIC} [IF] ." CORDIC engine" CR [THEN]
+ [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
+ [DEFINED] {RTC} [IF] ." RTC utilities" CR [THEN]
+ CR
+ [DEFINED] VOCABULARY [IF]
+ ESC" [7m"
+ ." ASSEMBLER word set"
+ ESC" [0m"
+ ALSO ASSEMBLER WORDS PREVIOUS CR
+ [THEN]
+THEN
+ ESC" [7m"
+ ." FORTH word set"
+ ESC" [0m"
+ WORDS
+
+CR WARM
+;
+
+SPECS
+++ /dev/null
-
-; -----------------------------------------------------
-; ANS_COMP.4th words complement to pass CORETEST.4TH
-; -----------------------------------------------------
-
-[UNDEFINED] {ANS_COMP} [IF]
-
-PWR_STATE
-
-MARKER {ANS_COMP}
-
-
-[UNDEFINED] VARIABLE [IF]
-
-: VARIABLE
-DEFER
-HI2LO
-MOV @R1+,R13
-MOV #$1286,-4(R10)
-MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-DEFER
-HI2LO
-MOV @R1+,R13
-MOV #$1285,-4(R10)
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-$1DBE CONSTANT STATE
-
-[UNDEFINED] BASE [IF]
-$1DDC CONSTANT BASE
-[THEN]
-
-[UNDEFINED] >IN [IF]
-$1DC4 CONSTANT >IN
-[THEN]
-
-[UNDEFINED] PAD [IF]
-$1CE4 CONSTANT PAD
-[THEN]
-
-[UNDEFINED] BL [IF]
-#32 CONSTANT BL
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-BL EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- BL EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-: VALUE
-CREATE ,
-DOES>
-HI2LO
-MOV @R1+,R13
-BIT #$400,R2
-0= IF
- MOV #@,R0
-THEN
-BIC #$400,R2
-MOV #!,R0
-ENDCODE
-
-CODE TO
-BIS #$400,R2
-MOV @R13+,R0
-ENDCODE
-
-: S>D
- DUP 0<
-;
-
-[UNDEFINED] NIP [IF]
-CODE NIP
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C! [IF]
-CODE C!
-MOV.B @R15+,0(R14)
-ADD #1,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C, [IF]
-CODE C,
-MOV &$1DC6,R10
-MOV.B R14,0(R10)
-ADD #1,&$1DC6
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OR [IF]
-CODE OR
-BIS @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] XOR [IF]
-CODE XOR
-XOR @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] PLUS [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-CODE INVERT
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE <
- SUB @R15+,R14
- S< ?GOTO FW1
- 0<> IF
-BW1 MOV #-1,R14
- THEN
- MOV @R13+,R0
-ENDCODE
-
-CODE >
- SUB @R15+,R14
- S< ?GOTO BW1
-FW1 AND #0,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LSHIFT
- MOV @R15+,R10
- AND #$1F,R14
-0<> IF
- BEGIN ADD R10,R10
- SUB #1,R14
- 0= UNTIL
-THEN MOV R10,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE RSHIFT
- MOV @R15+,R10
- AND #$1F,R14
-0<> IF
- BEGIN BIC #1,R2
- RRC R10
- SUB #1,R14
- 0= UNTIL
-THEN MOV R10,R14
- MOV @R13+,R0
-ENDCODE
-
-[UNDEFINED] MAX [IF]
-CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
-ENDCODE
-
-CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-CODE 2*
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE 2/
-RRA R14
-MOV @R13+,R0
-ENDCODE
-
-$1A00 4 + @ $81F3 U<
-$81EF $1A00 4 + @ U<
-= [IF] ; MSP430FR413x subfamily without hardware_MPY
-
-CODE M*
-MOV @R15,R12
-CMP #0,R12
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
-THEN
-XOR R14,R12
-CMP #0,R14
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-PUSHM #2,R13
-LO2HI
-UM*
-HI2LO
-POPM #2,R13
-CMP #0,R12
-S< IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-
-[ELSE] ; MSP430FRxxxx with hardware_MPY
-
-CODE UM*
- MOV @R15,&$4C0
-BW1 MOV R14,&$4C8
- MOV &$4E4,0(R15)
- MOV &$4E6,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE M*
- MOV @R15,&$4C2
- GOTO BW1
-ENDCODE
-
-[THEN]
-
-CODE UM/MOD
- PUSH #DROP
- MOV #<#,R9
- ADD #8,R9
- MOV R9,R0
-ENDCODE
-
-CODE SM/REM
-MOV R14,R12
-MOV @R15,R11
-CMP #0,R14
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-CMP #0,0(R15)
-S< IF
- XOR #-1,2(R15)
- XOR #-1,0(R15)
- ADD #1,2(R15)
- ADDC #0,0(R15)
-THEN
-PUSHM #3,R13
-LO2HI
- UM/MOD
-HI2LO
-POPM #3,R13
-CMP #0,R11
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
-THEN
-XOR R12,R11
-CMP #0,R11
-S< IF
-BW1
-BW2
- XOR #-1,R14
- ADD #1,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-
-CODE NEGATE
-GOTO BW1
-ENDCODE
-
-CODE ABS
-CMP #0,R14
-0< ?GOTO BW2
-MOV @R13+,R0
-ENDCODE
-
-: FM/MOD
-SM/REM
-HI2LO
-CMP #0,0(R15)
-0<> IF
- CMP #1,R14
- S< IF
- ADD R12,0(R15)
- SUB #1,R14
- THEN
-THEN
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-
-: *
-M* DROP
-;
-
-: /MOD
->R DUP 0< R> FM/MOD
-;
-
-: /
->R DUP 0< R> FM/MOD NIP
-;
-
-: MOD
->R DUP 0< R> FM/MOD DROP
-;
-
-: */MOD
->R M* R> FM/MOD
-;
-
-: */
->R M* R> FM/MOD NIP
-;
-
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-
-CODE R@
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-MOV @R13+,R0
-ENDCODE
-
-
-[UNDEFINED] {DOUBLE} [IF]
-
-CODE 2@
-BW1 SUB #2,R15
- MOV 2(R14),0(R15)
- MOV @R14,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE 2!
-BW2 MOV @R15+,0(R14)
- MOV @R15+,2(R14)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-: 2VALUE
-CREATE , ,
-DOES>
-HI2LO
-MOV @R1+,R13
-BIT #$400,R2
-0= ?GOTO BW1
-BIC #$400,R2
-GOTO BW2
-ENDCODE
-
-CODE 2DROP
-ADD #2,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE 2SWAP
-MOV @R15,R10
-MOV 4(R15),0(R15)
-MOV R10,4(R15)
-MOV R14,R10
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-
-CODE 2OVER
-SUB #4,R15
-MOV R14,2(R15)
-MOV 8(R15),0(R15)
-MOV 6(R15),R14
-MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-CODE ALIGNED
-BIT #1,R14
-ADDC #0,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE ALIGN
-BIT #1,&$1DC6
-ADDC #0,&$1DC6
-MOV @R13+,R0
-ENDCODE
-
-CODE CHARS
-MOV @R13+,R0
-ENDCODE
-
-CODE CHAR+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE CELLS
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE CELL+
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: CHAR
- BL WORD 1+ C@
-;
-
-: [CHAR]
- CHAR POSTPONE LITERAL
-; IMMEDIATE
-
-CODE +!
-ADD @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE FILL
-MOV @R15+,R9
-MOV @R15+,R10
-CMP #0,R9
-0<> IF
- BEGIN
- MOV.B R14,0(R10)
- ADD #1,R10
- SUB #1,R9
- 0= UNTIL
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-CODE HEX
-MOV #$10,&BASE
-MOV @R13+,R0
-ENDCODE
-
-CODE DECIMAL
-MOV #$0A,&BASE
-MOV @R13+,R0
-ENDCODE
-
-: (
-$29 WORD DROP
-; IMMEDIATE
-
-CODE .(
-MOV #0,&$1DB4
-COLON
-$29 WORD
-COUNT TYPE
-BL $1DB4 !
-; IMMEDIATE
-
-CODE J
-SUB #2,R15
-MOV R14,0(R15)
-MOV 4(R1),R14
-SUB 6(R1),R14
-MOV @R13+,R0
-ENDCODE
-
-CODE UNLOOP
-ADD #4,R1
-MOV @R13+,R0
-ENDCODE
-
-CODE LEAVE
-MOV &$1DC6,R10
-MOV #UNLOOP,0(R10)
-MOV #.,2(R10)
-ADD #8,2(R10)
-ADD #6,&$1DC6
-ADD #2,&$1C00
-ADD #4,R10
-MOV &$1C00,R9
-MOV R10,0(R9)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE RECURSE
-MOV &$1DC6,R9
-MOV &$1DBA,0(R9)
-ADD #2,&$1DC6
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE SOURCE
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1DC0,R14
-MOV &$1DC2,0(R15)
-MOV @R13+,R0
-ENDCODE
-
-RST_HERE
-
-[THEN]
-
\ --------------------------------------------------------------------------------
+PWR_STATE
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
\ it's an example:
$04 = [IF] \ if origin of SYSRST is <reset>
PWR_STATE
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-DEFER
-HI2LO
-MOV @R1+,R13
-MOV #$1285,-4(R10)
-MOV R14,-2(R10)
-MOV @R15+,R14
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ELSE
+ XOR #-1,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0= [IF]
+CODE 0=
+SUB #1,R14
+SUBC R14,R14
MOV @R13+,R0
ENDCODE
[THEN]
-[UNDEFINED] BL [IF]
-#32 CONSTANT BL
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+CODE BEGIN
+MOV #HERE,R0
+ENDCODE IMMEDIATE
[THEN]
-[UNDEFINED] SPACE [IF]
-: SPACE
-BL EMIT ;
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R6,R0
+ENDCODE
[THEN]
[UNDEFINED] R@ [IF]
ENDCODE
[THEN]
+[UNDEFINED] DROP [IF]
+CODE DROP
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ?DUP [IF]
+CODE ?DUP
+CMP #0,R14
+0<> IF
+ SUB #2,R15
+ MOV R14,0(R15)
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] < [IF]
CODE <
SUB @R15+,R14
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] UM/MOD [IF]
CODE UM/MOD
PUSH #DROP
- MOV #<#,R9
- ADD #8,R9
- MOV R9,R0
+ MOV #$407E,R0
ENDCODE
[THEN]
-: MCLK.
-0 1000 UM/MOD .
-;
-
-: ESC #27 EMIT ;
+[UNDEFINED] ESC" [IF]
+: ESC" $1B POSTPONE LITERAL POSTPONE EMIT POSTPONE S" POSTPONE TYPE ; IMMEDIATE
+[THEN]
: BAD_MHz
- 1 ABORT" only for 1,4,8,16,24 MHz MCLK!"
+$20 EMIT 1 ABORT" only for 1,4,8,16,24 MHz MCLK!"
;
-: BAD_SPEED
-SPACE ESC ." [7m"
-." with MCLK = " MCLK. 1 ABORT" MHz? don't dream!"
+: OVR_BAUDS
+$20 EMIT ESC" [7m"
+." with MCLK = " $1806 @ 0 1000 UM/MOD . DROP
+1 ABORT" MHz? don't dream!"
;
: <> = 0= ;
: CHNGBAUD
PWR_STATE
-
+ECHO
42
0 DO CR LOOP
-ESC ." [1J"
-ESC ." [H"
+ESC" [1J"
+ESC" [H"
$1806 @ >R
-." target MCLK = " R@ MCLK. ." MHz" CR
+." target MCLK = " R@ 0 1000 UM/MOD . ." MHz" DROP CR
." choose your baudrate:" CR
-." 0 --> 6 MBds" CR
-." 1 --> 5 MBds" CR
-." 2 --> 4 MBds" CR
-." 3 --> 2457600 Bds" CR
-." 4 --> 921600 Bds" CR
-." 5 --> 460800 Bds" CR
-." 6 --> 230400 Bds" CR
-." 7 --> 115200 Bds" CR
+." 0 --> 6 MBds" CR
+." 1 --> 5 MBds" CR
+." 2 --> 4 MBds" CR
+." 3 --> 2457600 Bds" CR
+." 4 --> 921600 Bds" CR
+." 5 --> 460800 Bds" CR
+." 6 --> 230400 Bds" CR
+." 7 --> 115200 Bds" CR
+." 8 --> 38400 Bds" CR
+." 9 --> 19200 Bds" CR
+." A --> 9600 Bds" CR
." other --> abort" CR
." your choice: "
KEY
#48 - ?DUP 0=
IF ." 6 MBds"
R@ #24000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #24000 <>
- IF BAD_MHz
- THEN
+ IF BAD_MHz THEN
$4
$0
ELSE 1 - ?DUP 0=
IF ." 5 MBds"
R@ #16000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #16000 =
IF $3
$2100
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
+ IF BAD_MHz THEN
$4
$EE00
THEN
ELSE 1 - ?DUP 0=
IF ." 4 MBds"
R@ #16000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #16000 =
- IF $4
- $0
+ IF $4 $0
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- $6
- $0
+ IF BAD_MHz THEN
+ $6 $0
THEN
ELSE 1 - ?DUP 0=
IF ." 2457600 Bds"
R@ #8000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #8000 =
- IF $3
- $4400
+ IF $3 $4400
ELSE R@ #16000 =
- IF $6
- $AA00
+ IF $6 $AA00
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- $9
- $DD00
+ IF BAD_MHz THEN
+ $9 $DD00
THEN
THEN
ELSE 1 - ?DUP 0=
IF ." 921600 Bds"
R@ #4000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #4000 =
- IF 4
- $4900
- ELSE
- R@ #8000 =
- IF 8
- $D600
+ IF 4 $4900
+ ELSE R@ #8000 =
+ IF 8 $D600
ELSE R@ #16000 =
- IF $11
- $4A00
+ IF $11 $4A00
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- $1
- $00A1
+ IF BAD_MHz THEN
+ $1 $00A1
THEN
THEN
THEN
ELSE 1 - ?DUP 0=
IF ." 460800 Bds"
R@ #4000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #4000 =
- IF 8
- $D600
- ELSE
- R@ #8000 =
- IF 17
- $4A00
+ IF 8 $D600
+ ELSE R@ #8000 =
+ IF $11 $4A00
ELSE R@ #16000 =
- IF 2
- $BB21
+ IF $2 $BB21
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- 6
- $0001
+ IF BAD_MHz THEN
+ $6 $0001
THEN
THEN
THEN
ELSE 1 - ?DUP 0=
IF ." 230400 Bds"
R@ #1000 <
- IF R@ BAD_SPEED
- THEN
+ IF OVR_BAUDS THEN
R@ #1000 =
- IF 4
- $4900
- ELSE
- R@ #4000 =
- IF 17
- $4A00
- ELSE
- R@ #8000 =
- IF 2
- $BB21
+ IF 4 $4900
+ ELSE R@ #4000 =
+ IF $11 $4A00
+ ELSE R@ #8000 =
+ IF 2 $BB21
ELSE R@ #16000 =
- IF 4
- $5551
+ IF 4 $5551
ELSE R@ #24000 <>
- IF BAD_MHz
- THEN
- 3
- $0241
+ IF BAD_MHz THEN
+ 3 $0241
THEN
THEN
THEN
ELSE 1 - ?DUP 0=
IF ." 115200 Bds"
R@ #1000 =
- IF 8
- $D600
- ELSE
- R@ #4000 =
- IF 2
- $BB21
- ELSE
- R@ #8000 =
- IF 4
- $5551
+ IF 8 $D600
+ ELSE R@ #4000 =
+ IF 2 $BB21
+ ELSE R@ #8000 =
+ IF 4 $5551
ELSE R@ #16000 =
- IF 8
- $F7A1
+ IF 8 $F7A1
ELSE R@ #24000 <>
- IF BAD_MHz
+ IF BAD_MHz THEN
+ $0D $4901
+ THEN
+ THEN
+ THEN
+ THEN
+ ELSE 1 - ?DUP 0=
+ IF ." 38400 Bds"
+ R@ #1000 =
+ IF $1 $00A1
+ ELSE R@ #4000 =
+ IF $6 $2081
+ ELSE R@ #8000 =
+ IF $0D $4901
+ ELSE R@ #16000 =
+ IF $1A $D601
+ ELSE R@ #24000 <>
+ IF BAD_MHz THEN
+ $27 $0011
+ THEN
+ THEN
+ THEN
+ THEN
+ ELSE 1 - ?DUP 0=
+ IF ." 19200 Bds"
+ R@ #1000 =
+ IF $3 $0241
+ ELSE R@ #4000 =
+ IF $0D $4901
+ ELSE R@ #8000 =
+ IF $1A $D601
+ ELSE R@ #16000 =
+ IF $34 $4911
+ ELSE R@ #24000 <>
+ IF BAD_MHz THEN
+ $4E $0021
+ THEN
+ THEN
+ THEN
+ THEN
+ ELSE 8 - ?DUP 0=
+ IF ." 9600 Bds"
+ R@ #1000 =
+ IF $6 $2081
+ ELSE R@ #4000 =
+ IF $1A $D601
+ ELSE R@ #8000 =
+ IF $34 $4911
+ ELSE R@ #16000 =
+ IF $68 $D621
+ ELSE R@ #24000 <>
+ IF BAD_MHz THEN
+ $9C $0041
+ THEN
+ THEN
THEN
- $0D
- $4901
THEN
+ ELSE
+ ." abort" CR ABORT
THEN
THEN
THEN
- ELSE
- ." abort" CR ABORT
THEN
THEN
THEN
$1804 !
$1802 !
R> DROP
-CR ESC ." [7m"
-." Change baudrate in Teraterm, save its setup then reset target."
+CR ESC" [7m"
+." Change baudrate in Teraterm, save its setup, then reset target."
;
-ECHO CHNGBAUD
+CHNGBAUD
--- /dev/null
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+CODE BEGIN
+MOV #HERE,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+CODE COMPARE
+ MOV R14,R12
+ MOV @R15+,R8
+ MOV @R15+,R11
+ MOV @R15+,R9
+BEGIN MOV R11,R14
+ ADD R12,R14
+ 0= ?GOTO FW3
+ SUB #1,R12
+ 0< ?GOTO FW2
+ SUB #1,R11
+ 0< ?GOTO FW1
+ ADD #1,R9
+ CMP.B @R8+,-1(R9)
+0<> UNTIL
+ U< IF
+FW1 MOV #-1,R14
+ MOV @R13+,R0
+ THEN
+FW2 MOV #1,R14
+FW3 MOV @R13+,R0
+ENDCODE
+
+
+
; ----------
; CORDIC.4th
; ----------
+; -----------------------------------------------------------
+; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
+; -----------------------------------------------------------
PWR_STATE
[UNDEFINED] {CORDIC} [IF]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {CORDIC}
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+CODE BEGIN
+MOV #HERE,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+ ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+
[UNDEFINED] {FIXPOINT} [IF]
[UNDEFINED] DABS [IF]
CODE DABS
-MOV #1-,R9
-ADD #4,R9
-MOV R9,R0
+AND #-1,R14
+S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+THEN
+MOV @R13+,R0
ENDCODE
[THEN]
-
CODE HOLDS
BW1 MOV @R15+,R9
ADD R14,R9
GOTO BW1
ENDCODE
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R6,R0
+ENDCODE
[THEN]
CODE F.
$2C HOLD
#S
R> SIGN #>
- TYPE SPACE
+ TYPE $20 EMIT
;
[THEN]
ECHO
+; -----------------------------------------------------------
+; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
+; -----------------------------------------------------------
+
10000 89,0 POL2REC . . ; sin, cos -->
10000 75,0 POL2REC . . ; sin, cos -->
10000 60,0 POL2REC . . ; sin, cos -->
--- /dev/null
+
+; -----------------------------------------------------
+; CORECOMP.4th words complement to pass CORETEST.4TH
+; -----------------------------------------------------
+
+PWR_STATE
+
+[DEFINED] {CORE_COMP} [IF] {CORE_COMP} [THEN]
+
+[UNDEFINED] {CORE_COMP} [IF]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {CORE_COMP}
+
+[UNDEFINED] + [IF]
+CODE +
+ADD @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+CODE ?DUP
+CMP #0,R14
+0<> ?GOTO BW1
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] EXIT [IF]
+CODE EXIT
+MOV @R1+,R13
+MOV @R13+,R0
+
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEPTH [IF]
+CODE DEPTH
+MOV R14,-2(R15)
+MOV #$1C80,R14
+SUB R15,R14
+RRA R14
+SUB #2,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DROP [IF]
+CODE DROP
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] NIP [IF]
+CODE NIP
+ADD #2,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C@ [IF]
+CODE C@
+MOV.B @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C! [IF]
+CODE C!
+MOV.B @R15+,0(R14)
+ADD #1,R15
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C, [IF]
+CODE C,
+MOV &$1DC6,R10
+MOV.B R14,0(R10)
+ADD #1,&$1DC6
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0= [IF]
+CODE 0=
+SUB #1,R14
+SUBC R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0< [IF]
+CODE 0<
+ADD R14,R14
+SUBC R14,R14
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] < [IF]
+CODE <
+ SUB @R15+,R14
+ S< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,R14
+ THEN
+ MOV @R13+,R0
+ENDCODE
+
+CODE >
+ SUB @R15+,R14
+ S< ?GOTO BW1
+FW1 AND #0,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+CODE BEGIN
+MOV #HERE,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] J [IF]
+CODE J
+SUB #2,R15
+MOV R14,0(R15)
+MOV 4(R1),R14
+SUB 6(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] UNLOOP [IF]
+CODE UNLOOP
+ADD #4,R1
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] LEAVE [IF]
+CODE LEAVE
+MOV &$1DC6,R10
+MOV #UNLOOP,0(R10)
+MOV #$4048,2(R10)
+ADD #6,&$1DC6
+ADD #2,&$1C00
+ADD #4,R10
+MOV &$1C00,R9
+MOV R10,0(R9)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AND [IF]
+CODE AND
+AND @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] OR [IF]
+CODE OR
+BIS @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] XOR [IF]
+CODE XOR
+XOR @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] S>D [IF]
+: S>D
+ DUP 0<
+;
+[THEN]
+
+[UNDEFINED] + [IF]
+CODE +
+ADD @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1+ [IF]
+CODE 1+
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1- [IF]
+CODE 1-
+SUB #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] INVERT [IF]
+CODE INVERT
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] LSHIFT [IF]
+CODE LSHIFT
+ MOV @R15+,R10
+ AND #$1F,R14
+0<> IF
+ BEGIN ADD R10,R10
+ SUB #1,R14
+ 0= UNTIL
+THEN MOV R10,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] RSHIFT [IF]
+CODE RSHIFT
+ MOV @R15+,R10
+ AND #$1F,R14
+0<> IF
+ BEGIN BIC #1,R2
+ RRC R10
+ SUB #1,R14
+ 0= UNTIL
+THEN MOV R10,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MAX [IF]
+CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ENDCODE
+
+CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[THEN]
+
+[UNDEFINED] 2* [IF]
+CODE 2*
+ADD R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2/ [IF]
+CODE 2/
+RRA R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] M* [IF]
+
+$1A00 4 + @ $81F3 U<
+$81EF $1A00 4 + @ U<
+= [IF] ; MSP430FR2xxx|MSP430FR4xxx subfamilies without hardware_MPY
+
+CODE M*
+MOV @R15,R12
+CMP #0,R12
+S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+THEN
+XOR R14,R12
+CMP #0,R14
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+PUSHM #2,R13
+LO2HI
+UM*
+HI2LO
+POPM #2,R13
+CMP #0,R12
+S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+
+[ELSE] ; MSP430FRxxxx with hardware_MPY
+
+CODE UM*
+ MOV @R15,&$4C0
+BW1 MOV R14,&$4C8
+ MOV &$4E4,0(R15)
+ MOV &$4E6,R14
+ MOV @R13+,R0
+ENDCODE
+
+CODE M*
+ MOV @R15,&$4C2
+ GOTO BW1
+ENDCODE
+
+[THEN]
+
+[THEN]
+
+[UNDEFINED] UM/MOD [IF]
+CODE UM/MOD
+ PUSH #DROP
+ MOV #$407E,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SM/REM [IF]
+CODE SM/REM
+MOV R14,R12
+MOV @R15,R11
+CMP #0,R14
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+CMP #0,0(R15)
+S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+THEN
+PUSHM #3,R13
+LO2HI
+ UM/MOD
+HI2LO
+POPM #3,R13
+CMP #0,R11
+S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+THEN
+XOR R12,R11
+CMP #0,R11
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] NEGATE [IF]
+CODE NEGATE
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ABS [IF]
+CODE ABS
+CMP #0,R14
+0>= IF
+ MOV @R13+,R0
+THEN
+MOV #NEGATE,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] FM/MOD [IF]
+: FM/MOD
+SM/REM
+HI2LO
+CMP #0,0(R15)
+0<> IF
+ CMP #1,R14
+ S< IF
+ ADD R12,0(R15)
+ SUB #1,R14
+ THEN
+THEN
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] * [IF]
+: *
+M* DROP
+;
+[THEN]
+
+[UNDEFINED] /MOD [IF]
+: /MOD
+>R DUP 0< R> FM/MOD
+;
+[THEN]
+
+[UNDEFINED] / [IF]
+: /
+>R DUP 0< R> FM/MOD NIP
+;
+[THEN]
+
+[UNDEFINED] MOD [IF]
+: MOD
+>R DUP 0< R> FM/MOD DROP
+;
+[THEN]
+
+[UNDEFINED] */MOD [IF]
+: */MOD
+>R M* R> FM/MOD
+;
+[THEN]
+
+[UNDEFINED] */ [IF]
+: */
+>R M* R> FM/MOD NIP
+;
+
+[UNDEFINED] OVER [IF]
+CODE OVER
+MOV R14,-2(R15)
+MOV @R15,R14
+SUB #2,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ROT [IF]
+CODE ROT
+MOV @R15,R10
+MOV R14,0(R15)
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+[THEN]
+
+[UNDEFINED] R@ [IF]
+CODE R@
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2@ [IF]
+CODE 2@
+BW1 SUB #2,R15
+ MOV 2(R14),0(R15)
+ MOV @R14,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2! [IF]
+CODE 2!
+BW2 MOV @R15+,0(R14)
+ MOV @R15+,2(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2DUP [IF]
+CODE 2DUP
+MOV R14,-2(R15)
+MOV @R15,-4(R15)
+SUB #4,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2DROP [IF]
+CODE 2DROP
+ADD #2,R15
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2SWAP [IF]
+CODE 2SWAP
+MOV @R15,R10
+MOV 4(R15),0(R15)
+MOV R10,4(R15)
+MOV R14,R10
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2OVER [IF]
+CODE 2OVER
+SUB #4,R15
+MOV R14,2(R15)
+MOV 8(R15),0(R15)
+MOV 6(R15),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] ALIGNED [IF]
+CODE ALIGNED
+BIT #1,R14
+ADDC #0,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ALIGN [IF]
+CODE ALIGN
+BIT #1,&$1DC6
+ADDC #0,&$1DC6
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] CHARS [IF]
+CODE CHARS
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CHAR+ [IF]
+CODE CHAR+
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CELLS [IF]
+CODE CELLS
+ADD R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CELL+ [IF]
+CODE CELL+
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] CHAR [IF]
+: CHAR
+ $20 WORD 1+ C@
+;
+[THEN]
+
+[UNDEFINED] [CHAR] [IF]
+: [CHAR]
+ CHAR POSTPONE LITERAL
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] +! [IF]
+CODE +!
+ADD @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MOVE [IF]
+CODE MOVE
+MOV R14,R10
+MOV @R15+,R8
+MOV @R15+,R9
+MOV @R15+,R14
+CMP #0,R10
+0<> IF
+ CMP R9,R8
+ 0<> IF
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ THEN
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] FILL [IF]
+CODE FILL
+MOV @R15+,R9
+MOV @R15+,R10
+CMP #0,R9
+0<> IF
+ BEGIN
+ MOV.B R14,0(R10)
+ ADD #1,R10
+ SUB #1,R9
+ 0= UNTIL
+THEN
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] HEX [IF]
+CODE HEX
+MOV #$10,&$1DDC
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DECIMAL [IF]
+CODE DECIMAL
+MOV #$0A,&$1DDC
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ( [IF]
+: (
+$29 WORD DROP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] .( [IF]
+CODE .(
+MOV #0,&$1DB4
+COLON
+$29 WORD
+COUNT TYPE
+$20 $1DB4 !
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] EXECUTE [IF]
+CODE EXECUTE
+MOV R14,R10
+MOV @R15+,R14
+MOV R10,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] RECURSE [IF]
+CODE RECURSE
+MOV &$1DC6,R9
+MOV &$1DBA,0(R9)
+ADD #2,&$1DC6
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] SOURCE [IF]
+CODE SOURCE
+SUB #4,R15
+MOV R14,2(R15)
+MOV &$1DC0,R14
+MOV &$1DC2,0(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] VARIABLE [IF]
+: VARIABLE
+CREATE
+2 ALLOT
+;
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] BASE [IF]
+$1DDC CONSTANT BASE
+[THEN]
+
+[UNDEFINED] >IN [IF]
+$1DC4 CONSTANT >IN
+[THEN]
+
+[UNDEFINED] PAD [IF]
+$1CE4 CONSTANT PAD
+[THEN]
+
+[UNDEFINED] BL [IF]
+$20 CONSTANT BL
+[THEN]
+
+[UNDEFINED] SPACE [IF]
+: SPACE
+$20 EMIT ;
+[THEN]
+
+[UNDEFINED] SPACES [IF]
+CODE SPACES
+CMP #0,R14
+0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+THEN
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+RST_HERE
+
+[THEN]
+
+ECHO
PWR_STATE
-: ESC #27 EMIT ;
-
: ANSCOMPNOTFOUND
-ECHO
-41 \ number of terminal lines -1
-0 DO CR LOOP \ don't erase any line of source
-ESC ." [1J" \ erase up (41 empty lines)
-ESC ." [H" \ cursor home
-1 ABORT" {ANS_COMP} word set not found!"
+$0D EMIT \ return to column 1
+1 ABORT" {CORE_COMP} word set not found!"
;
+[DEFINED] {CORE_COMP} [IF]
+
: CORETESTSUCCESS
-ECHO
-41 \ number of terminal lines -1
-0 DO CR LOOP \ don't erase any line of source
-ESC ." [1J" \ erase up (41 empty lines)
-ESC ." [H" \ cursor home
+$0A BASE !
+$0D EMIT \ return to column 1
1 ABORT" CORE tests success!"
;
-[DEFINED] {ANS_COMP} [IF]
-
\ From: John Hayes S1I
\ Subject: tester.fr
\ ------------------------------------------------------------------------
TESTING COMPARISONS: 0= = 0< < > U< MIN MAX
-0 INVERT CONSTANT MAX-UINT
-0 INVERT 1 RSHIFT CONSTANT MAX-INT
+0 INVERT CONSTANT MAX-UINT
+0 INVERT 1 RSHIFT CONSTANT MAX-INT
0 INVERT 1 RSHIFT INVERT CONSTANT MIN-INT
-0 INVERT 1 RSHIFT CONSTANT MID-UINT
+0 INVERT 1 RSHIFT CONSTANT MID-UINT
0 INVERT 1 RSHIFT INVERT CONSTANT MID-UINT+1
0S CONSTANT <FALSE>
T{ GDX -> 123 234 }T
-CR .( End of Core word set tests) CR
-
-[DEFINED] COMPARE [IF]
-\ ------------------------------------------------------------------------
-TESTING COMPARE
-: CMOVE MOVE ;
-: s1 S" abcdefghijklmnopqrstuvwxyz" ;
-: s6 S" 123456" ;
-
-T{ s1 s1 COMPARE -> 0 }T
-T{ s1 PAD SWAP CMOVE -> }T \ Copy s1 to PAD
-T{ s1 PAD OVER COMPARE -> 0 }T
-T{ s1 PAD 6 COMPARE -> 1 }T
-T{ PAD 10 s1 COMPARE -> -1 }T
-T{ s1 PAD 0 COMPARE -> 1 }T
-T{ PAD 0 s1 COMPARE -> -1 }T
-T{ s1 s6 COMPARE -> 1 }T
-T{ s6 s1 COMPARE -> -1 }T
-: "abdde" S" abdde" ;
-: "abbde" S" abbde" ;
-: "abcdf" S" abcdf" ;
-: "abcdee" S" abcdee" ;
-
-T{ s1 "abdde" COMPARE -> -1 }T
-T{ s1 "abbde" COMPARE -> 1 }T
-T{ s1 "abcdf" COMPARE -> -1 }T
-T{ s1 "abcdee" COMPARE -> 1 }T
-
-: s11 S" 0abc" ;
-: s12 S" 0aBc" ;
-
-T{ s11 s12 COMPARE -> 1 }T
-T{ s12 s11 COMPARE -> -1 }T
-
-[THEN] \ COMPARE
-
-$0A BASE !
+CR .( End of Core word set tests)
CORETESTSUCCESS
[ELSE]
-ANSCOMPNOTFOUND
+ECHO
+ANSCOMPNOTFOUND \ download CORECOMP.F before CORETEST.4TH
[THEN]
; ------------------
; FF_SPECS.4th
; ------------------
+; displays all FastForth specifications
+PWR_STATE
-; display all FastForth compilation options
-
+[UNDEFINED] AND [IF]
+CODE AND
+AND @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-RST_STATE
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-DEFER
-HI2LO
-MOV @R1+,R13
-MOV #$1285,-4(R10)
-MOV R14,-2(R10)
-MOV @R15+,R14
+CODE ?DUP
+CMP #0,R14
+0<> ?GOTO BW1
MOV @R13+,R0
ENDCODE
[THEN]
ENDCODE
[THEN]
-0 CONSTANT CASE IMMEDIATE
-
-: OF
-1+
->R
-POSTPONE OVER POSTPONE =
-POSTPONE IF
-POSTPONE DROP
-R>
-; IMMEDIATE
+[UNDEFINED] DROP [IF]
+CODE DROP
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-: ENDOF
->R
-POSTPONE ELSE
-R>
-; IMMEDIATE
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-: ENDCASE
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
+[UNDEFINED] ROT [IF]
+CODE ROT
+MOV @R15,R10
+MOV R14,0(R15)
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
-: BS 8 EMIT ;
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-: ESC #27 EMIT ;
+[UNDEFINED] R> [IF]
+CODE R>
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-[UNDEFINED] PAD [IF]
-$1CE4 CONSTANT PAD
+[UNDEFINED] 0< [IF]
+CODE 0<
+ADD R14,R14
+SUBC R14,R14
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
[THEN]
-[UNDEFINED] PLUS [IF]
-CODE +
-ADD @R15+,R14
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
MOV @R13+,R0
ENDCODE
[THEN]
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
MOV @R13+,R0
ENDCODE
[THEN]
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
MOV @R13+,R0
ENDCODE
[THEN]
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
MOV @R13+,R0
ENDCODE
[THEN]
-[UNDEFINED] BL [IF]
-#32 CONSTANT BL
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
[THEN]
-[UNDEFINED] SPACE [IF]
-: SPACE
-BL EMIT ;
+[UNDEFINED] C@ [IF]
+CODE C@
+MOV.B @R14,R14
+MOV @R13+,R0
+ENDCODE
[THEN]
[UNDEFINED] SPACES [IF]
PUSH R13
BEGIN
LO2HI
- BL EMIT
+ $20 EMIT
HI2LO
SUB #2,R13
SUB #1,R14
MOV @R1+,R13
THEN
MOV @R15+,R14
-MOV @R13+,R0
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1+ [IF]
+CODE 1+
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
+CODE +
+ADD @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2* [IF]
+CODE 2*
+ADD R14,R14
+MOV @R13+,R0
ENDCODE
[THEN]
[UNDEFINED] UM/MOD [IF]
CODE UM/MOD
PUSH #DROP
- MOV #<#,R9
- ADD #8,R9
- MOV R9,R0
+ MOV #$407E,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MOVE [IF]
+CODE MOVE
+MOV R14,R10
+MOV @R15+,R8
+MOV @R15+,R9
+MOV @R15+,R14
+CMP #0,R10
+0<> IF
+ CMP R9,R8
+ 0<> IF
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ THEN
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+THEN
+MOV @R13+,R0
ENDCODE
[THEN]
[UNDEFINED] WORDS [IF]
: WORDS
CR
-$1DCA @ PAD
-$1800 @ DUP +
+$1DCA @ $1CE4
+$1800 @ 2*
MOVE
BEGIN
0 DUP
- $1800 @ DUP + 0
+ $1800 @ 2* 0
DO
- DUP I PAD + @
+ DUP I $1CE4 + @
U< IF
DROP DROP
- I DUP PAD + @
+ I DUP $1CE4 + @
THEN
2 +LOOP
?DUP
DUP
2 - @
ROT
- PAD +
+ $1CE4 +
!
DUP
COUNT $7F AND
;
[THEN]
-: ADDONS
-ESC ." [7m"
-." KERNEL OPTIONS:"
-ESC ." [0m"
-$1812 @
+[UNDEFINED] CASE [IF]
+: CASE 0 ; IMMEDIATE
+[THEN]
- DUP 0< IF CR ." 32.768kHz XTAL" THEN
-DUP + DUP 0< IF DUP + CR ." HARDWARE (RTS/CTS) TERMINAL"
- ELSE DUP + DUP 0< IF CR ." HARDWARE (RTS) TERMINAL" THEN
- THEN
-DUP + DUP 0< IF CR ." XON/XOFF TERMINAL" THEN
-DUP + DUP 0< IF CR ." HALF-DUPLEX TERMINAL" THEN
-DUP + DUP 0< IF CR ." ASM DATA ACCESS BEYOND $FFFF" THEN
-DUP + DUP 0< IF CR ." BOOTLOADER" THEN
-DUP + DUP 0< IF CR ." SD_CARD READ/WRITE" THEN
-DUP + DUP 0< IF CR ." SD_CARD LOADER" THEN
-DUP + DUP 0< IF CR ." FIXPOINT INPUT" THEN
-DUP + DUP 0< IF CR ." DOUBLE INPUT" THEN
-DUP + DUP 0< IF CR ." VOCABULARY SET" THEN
-DUP + DUP 0< IF CR ." NONAME" THEN
-DUP + DUP 0< IF CR ." EXTENDED ASSEMBLER" THEN
-DUP + DUP 0< IF CR ." ASSEMBLER" THEN
-DUP + DUP 0< IF CR ." CONDITIONNAL COMPILATION" THEN
+[UNDEFINED] OF [IF]
+: OF
+1+
+>R
+POSTPONE OVER POSTPONE =
+POSTPONE IF
+POSTPONE DROP
+R>
+; IMMEDIATE
+[THEN]
-0< IF
- CR ESC ." [7m"
- ." OTHER OPTIONS:"
- ESC ." [0m"
- CR ." none"
- ESC ." [G"
- [DEFINED] {ANS_COMP} [IF] ." ANS_COMPLEMENT" CR [THEN]
- [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
- [DEFINED] {FIXPOINT} [IF] ." FIXPOINT" CR [THEN]
- [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
- CR CR
- [DEFINED] VOCABULARY [IF]
- ESC ." [7m"
- ." ASSEMBLER word set"
- ESC ." [0m"
- ALSO ASSEMBLER WORDS CR PREVIOUS
- [THEN]
-ESC ." [7m" ." FORTH word set" ESC ." [0m"
-WORDS
-THEN
-;
+[UNDEFINED] ENDOF [IF]
+: ENDOF
+>R
+POSTPONE ELSE
+R>
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ENDCASE [IF]
+: ENDCASE
+POSTPONE DROP
+0 DO
+ POSTPONE THEN
+LOOP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] ESC" [IF]
+: ESC"
+$1B
+POSTPONE LITERAL
+POSTPONE EMIT
+POSTPONE S"
+POSTPONE TYPE
+; IMMEDIATE
+[THEN]
-: specs
+: SPECS
PWR_STATE
HERE
ECHO
-41
-0 DO CR LOOP
-
-ESC ." [1J"
-ESC ." [H"
-ESC ." [7m"
+42 0 DO CR LOOP
+ESC" [H"
+ESC" [7m"
+CR ." FastForth V"
+$1810 @
+0 <# # 8 HOLD # 46 HOLD #S #> TYPE
+." for MSP430FR"
$1A04 @
-
-CR ." FastForth V" $1810 @
-0 <# # 8 HOLD # 46 hold #S #> TYPE SPACE
-." for MSP430FR"
CASE
$830C OF ." 2355," $8000 ENDOF
$8328 OF ." 2476," $8000 ENDOF
$8160 OF ." 5948," $4400 ENDOF
$82A1 OF ." 5994," $4000 ENDOF
$81A8 OF ." 6989," $4400 ENDOF
-
ABORT" xxxx <-- unrecognized device!"
-ENDCASE SPACE
-
-['] ['] DUP @ $1287 = IF ." DTC=1," DROP
- ELSE 2 + @ $1287 =
- IF ." DTC=2,"
- ELSE ." DTC=3,"
- THEN
- THEN SPACE
-
-$1800 @ U. BS ." -Entry word sets, "
-
+ENDCASE
+$20 EMIT
+['] ['] DUP @ $1287 =
+IF ." DTC=1," DROP
+ELSE 2 + @ $1287 =
+ IF ." DTC=2,"
+ ELSE ." DTC=3,"
+ THEN
+THEN
+$20 EMIT
+$1800 @ U. #8 EMIT ." -Entry word sets, "
$1806 @ 0 1000 UM/MOD U.
-?DUP IF BS ." ," U.
+?DUP IF #8 EMIT ." ," U.
THEN ." MHz, "
-
- U. ." bytes"
-
-
-CR CR ADDONS
+ESC" [0m"
+
+CR ." /COUNTED-STRING = 255"
+CR ." /HOLD = 34"
+CR ." /PAD = 84"
+CR ." ADDRESS-UNIT-BITS = 16"
+CR ." FLOORED = true"
+CR ." MAX-CHAR = 255"
+CR ." MAX-N = 32767"
+CR ." MAX-U = 65535"
+CR ." MAX-D = 2147483647"
+CR ." MAX-UD = 4294967295"
+CR ." STACK-CELLS = 48"
+CR ." RETURN-STACK-CELLS= 48"
+
+CR CR
+
+ESC" [7m"
+." KERNEL ADDONS"
+ESC" [0m"
+$1812 @
+ DUP 0< IF CR ." 32.768kHz XTAL" THEN
+2* DUP 0< IF 2* CR ." 5 WIRES (RTS/CTS) UART TERMINAL"
+ ELSE 2* DUP
+ 0< IF CR ." 4 WIRES (RTS) UART TERMINAL"
+ THEN
+ THEN
+2* DUP 0< IF CR ." 3 WIRES (XON/XOFF) UART TERMINAL" THEN
+2* DUP 0< IF CR ." HALF-DUPLEX TERMINAL" THEN
+2* DUP 0< IF CR ." ASM DATA ACCESS BEYOND $FFFF" THEN
+2* DUP 0< IF CR ." BOOTLOADER" THEN
+2* DUP 0< IF CR ." SD_CARD READ/WRITE" THEN
+2* DUP 0< IF CR ." SD_CARD LOADER" THEN
+2* DUP 0< IF CR ." FIXPOINT INPUT" THEN
+2* DUP 0< IF CR ." DOUBLE INPUT" THEN
+2* DUP 0< IF CR ." VOCABULARY SET" THEN
+2* DUP 0< IF CR ." NONAME" THEN
+2* DUP 0< IF CR ." EXTENDED ASSEMBLER" THEN
+2* DUP 0< IF CR ." ASSEMBLER" THEN
+2* DUP 0< IF CR ." CONDITIONNAL COMPILATION" THEN
+0< IF
+ CR CR ESC" [7m"
+ ." OPTIONS"
+ ESC" [0m" CR
+ [DEFINED] {CORE_COMP} [IF] ." CORE COMPLEMENT" CR [THEN]
+ [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
+ [DEFINED] {FIXPOINT} [IF] ." FIXPOINT" CR [THEN]
+ [DEFINED] {CORDIC} [IF] ." CORDIC engine" CR [THEN]
+ [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
+ [DEFINED] {RTC} [IF] ." RTC utilities" CR [THEN]
+ CR
+ [DEFINED] VOCABULARY [IF]
+ ESC" [7m"
+ ." ASSEMBLER word set"
+ ESC" [0m"
+ ALSO ASSEMBLER WORDS PREVIOUS CR
+ [THEN]
+THEN
+ ESC" [7m"
+ ." FORTH word set"
+ ESC" [0m"
+ WORDS
CR WARM
;
-ECHO specs
+SPECS
; -----------------------------------------------------
-; FIXPOINT.4th
+; FIXPOINT.4th
; -----------------------------------------------------
+; -----------------------------------------------------------
+; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
+; -----------------------------------------------------------
+
PWR_STATE
+[DEFINED] {FIXPOINT} [IF] {FIXPOINT} [THEN]
+
[UNDEFINED] {FIXPOINT} [IF]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {FIXPOINT}
-[UNDEFINED] PLUS [IF]
+[UNDEFINED] + [IF]
CODE +
ADD @R15+,R14
MOV @R13+,R0
ENDCODE
[THEN]
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R6,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] HOLDS [IF]
CODE HOLDS
BW3 MOV @R15+,R9
[UNDEFINED] DABS [IF]
CODE DABS
-MOV #1-,R9
-ADD #4,R9
-MOV R9,R0
+AND #-1,R14
+S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+THEN
+MOV @R13+,R0
ENDCODE
[THEN]
[THEN]
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
[UNDEFINED] F. [IF]
CODE F.
MOV R14,R12
$2C HOLD
#S
R> SIGN #>
- TYPE SPACE
+ TYPE $20 EMIT
;
CODE S>F
; (volatile) tests
; -----------------------
-
3,14159 2CONSTANT PI
PI -1,0 F* 2CONSTANT -PI
$10 $1DDC ! PI F.
- -PI F.
+ -PI F.
%10 $1DDC ! PI F.
- -PI F.
+ -PI F.
#10 $1DDC ! PI F.
- -PI F.
+ -PI F.
PI 2,0 F* F.
PI -2,0 F* F.
-PI 2,0 F/ F.
-PI -2,0 F/ F.
-32767,99999 1,0 f* F.
-32767,99999 1,0 f/ F.
-32767,99999 2,0 f/ F.
-32767,99999 4,0 f/ F.
-32767,99999 8,0 f/ F.
-32767,99999 16,0 f/ F.
-
--32767,0 -1,0 f* F.
--32767,0 -1,0 f/ F.
--32767,0 -2,0 f/ F.
--32767,0 -4,0 f/ F.
--32767,0 -8,0 f/ F.
--32767,0 -16,0 f/ F.
--32767,0 -32,0 f/ F.
--32767,0 -64,0 f/ F.
-
-; sqrt(32768)^2 = 32768
-181,01933598375 181,01933598375 f* f.
-181,01933598375 -181,01933598375 f* f.
--181,01933598375 181,01933598375 f* f.
--181,01933598375 -181,01933598375 f* f.
+32767,99999 1,0 F* F.
+32767,99999 1,0 F/ F.
+32767,99999 2,0 F/ F.
+32767,99999 4,0 F/ F.
+32767,99999 8,0 F/ F.
+32767,99999 16,0 F/ F.
+
+-32767,0 -1,0 F* F.
+-32767,0 -1,0 F/ F.
+-32767,0 -2,0 F/ F.
+-32767,0 -4,0 F/ F.
+-32767,0 -8,0 F/ F.
+-32767,0 -16,0 F/ F.
+-32767,0 -32,0 F/ F.
+-32767,0 -64,0 F/ F.
+
+; SQRT(32768)^2 = 32768
+181,01933598375 181,01933598375 F* F.
+181,01933598375 -181,01933598375 F* F.
+-181,01933598375 181,01933598375 F* F.
+-181,01933598375 -181,01933598375 F* F.
+
; TEST_ASM.4th
; -----------------------------------------------------------------------
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R6,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] + [IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF]
CODE MAX
[THEN]
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
CODE C@
MOV.B @R14,R14
[UNDEFINED] VARIABLE [IF]
: VARIABLE
-DEFER
+CREATE
HI2LO
-MOV @R1+,R13
MOV #$1286,-4(R10)
+MOV @R1+,R13
MOV @R13+,R0
ENDCODE
[THEN]
[UNDEFINED] CONSTANT [IF]
: CONSTANT
-DEFER
+CREATE
HI2LO
-MOV @R1+,R13
-MOV #$1285,-4(R10)
MOV R14,-2(R10)
MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
MOV @R13+,R0
ENDCODE
[THEN]
ENDCODE
[THEN]
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
[UNDEFINED] OVER [IF]
CODE OVER
MOV R14,-2(R15)
;
[THEN]
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] DUMP [IF]
CODE DUMP
PUSH R13
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
-CODE START
-MOV #SLEEP,R9
-MOV #BACKGROUND,2(R9)
-MOV #WARM,R9
-MOV #APP_INIT,2(R9)
-MOV R9,R0
-ENDCODE
+CODE START
+MOV #$4000,R9
+MOV #BACKGROUND,2(R9)
+MOV #WARM,R9
+MOV #SYS_INIT,2(R9)
+MOV R9,R0
+ENDCODE
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
CODE 20_US
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
-
-
ECHO
; downloading RC5toLCD.4th is done
RST_HERE ; this app is protected against <reset>
; RC5TOLCD.4th
; -----------------------------------
-RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
CODE 20_US
BEGIN
BEGIN
AGAIN
ENDASM
+ASM SYS_OUT
+ MOV #WARM,R9
+ ADD #4,R9
+ MOV R9,R0
+ENDASM
+
CODE STOP
-BW1 MOV #SLEEP,R9
+BW1 MOV #$4000,R9
ADD #4,R9
MOV R9,-2(R9)
+ MOV #WARM,R9
+ MOV #SYS_OUT,2(R9)
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ CALL #$400E
COLON
-['] WARM >BODY IS WARM
ECHO
-." RC5toLCD is removed. type START to restart"
-COLD
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM
;
-CODE APP_INIT
-MOV #%1011010100,&$3C0
+CODE SYS_INIT
+MOV #%10_1101_0100,&$3C0
$1806 @ 16000 = [IF]
MOV #1,&$3E0
[THEN]
MOV #2,&$3E0
[THEN]
MOV #19,&$3D2
- MOV #%01100000,&$3C6
+MOV #%0110_0000,&$3C6
MOV #10,&$3D6
BIS.B #$20,&$204
BIS.B #$20,&$20A
BIS.B #4,&$20A
BIC.B #4,&$20C
MOV #RC5_INT,&$FFDE
- MOV #%0100010100,&$340
+MOV #%01_0001_0100,&$340
MOV ##3276,&$352
MOV #%10000,&$342
MOV #WDT_INT,&$FFEA
['] CR >BODY IS CR
['] EMIT >BODY IS EMIT
." RC5toLCD is running. Type STOP to quit"
- ABORT
+ PWR_STATE ABORT
;
CODE START
-MOV #SLEEP,R9
+MOV #$4000,R9
MOV #BACKGROUND,2(R9)
MOV #WARM,R9
-MOV #APP_INIT,2(R9)
+MOV #SYS_INIT,2(R9)
MOV R9,R0
ENDCODE
; downloading RC5toLCD.4th is done
RST_HERE ; this app is protected against <reset>
+START
PWR_STATE
-[UNDEFINED] {RTC} [IF]
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] AND [IF]
+CODE AND
+AND @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+: RTCNOTFOUND
+ECHO
+1 ABORT" no RTC found!"
+;
+
+$1A04 @ $831D SWAP U< [IF] RTCNOTFOUND [THEN]
+$1A04 @ $823C OVER U<
+ $8241 U< AND [IF] RTCNOTFOUND [THEN]
+$1A04 @ $81F0 OVER U<
+ $81F3 U< AND [IF] RTCNOTFOUND [THEN]
+
+[DEFINED] {RTC} [IF] {RTC} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
MARKER {RTC}
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF]
CODE MAX
[THEN]
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-DEFER
-HI2LO
-MOV @R1+,R13
-MOV #$1285,-4(R10)
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] BL [IF]
-#32 CONSTANT BL
-[THEN]
-
[UNDEFINED] SPACES [IF]
CODE SPACES
CMP #0,R14
PUSH R13
BEGIN
LO2HI
- BL EMIT
+ $20 EMIT
HI2LO
SUB #2,R13
SUB #1,R14
ENDCODE
[THEN]
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEPTH [IF]
+CODE DEPTH
+MOV R14,-2(R15)
+MOV #$1C80,R14
+SUB R15,R14
+RRA R14
+SUB #2,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] EXECUTE [IF]
+CODE EXECUTE
+MOV R14,R10
+MOV @R15+,R14
+MOV R10,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] U.R [IF]
: U.R
>R <# 0 # #S #>
." it is " TIME?
;
-RST_HERE
+PWR_HERE
+[UNDEFINED] ESC" [IF]
+: ESC" $1B POSTPONE LITERAL POSTPONE EMIT POSTPONE S" POSTPONE TYPE ; IMMEDIATE
[THEN]
-: ESC #27 EMIT ;
-
-: [ISDEFERRED?]
- DUP @ $4030 =
-; IMMEDIATE
-
CREATE ABUF 20 ALLOT
: GET_TIME
42
0 DO CR LOOP
-ESC ." [1J"
-ESC ." [H"
+ESC" [1J"
+ESC" [H"
CR ." DATE (DMY): "
-ABUF DUP 20
- ['] ACCEPT [ISDEFERRED?]
- [IF] >BODY
- [THEN] EXECUTE
-EVALUATE CR DATE!
+ABUF
+DUP 20 ['] ACCEPT >BODY EXECUTE
+ EVALUATE CR DATE!
CR CR ." TIME (HMS): "
-ABUF DUP 20
- ['] ACCEPT [ISDEFERRED?]
- [IF] >BODY
- [THEN] EXECUTE
-EVALUATE CR TIME!
+ABUF
+DUP 20 ['] ACCEPT >BODY EXECUTE
+ EVALUATE CR TIME!
CR
;
PWR_STATE
-[UNDEFINED] {SD_TEST} [IF]
+[DEFINED] {SD_TEST} [IF] {SD_TEST} [THEN]
+
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
MARKER {SD_TEST}
-[UNDEFINED] PLUS [IF]
+[UNDEFINED] EXIT [IF]
+CODE EXIT
+MOV @R1+,R13
+MOV @R13+,R0
+
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0= [IF]
+CODE 0=
+SUB #1,R14
+SUBC R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC6
+MOV &$1DC6,R10
+MOV #$4048,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
CODE +
ADD @R15+,R14
MOV @R13+,R0
ENDCODE
[THEN]
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] SPACE [IF]
: SPACE
$20 EMIT ;
ENDCODE
[THEN]
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+CODE ?DUP
+CMP #0,R14
+0<> ?GOTO BW1
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] OVER [IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBE CONSTANT STATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(R10)
+MOV #$402C,-2(R10)
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
[UNDEFINED] U.R [IF]
: U.R
>R <# 0 # #S #>
;
[THEN]
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,R0
+ENDCODE
+[THEN]
+
CODE SD_EMIT
CMP #512,&$201E
." 0 Set date and time" CR
." 1 Load {TOOLS} words" CR
." 2 Load {SD_TOOLS} words" CR
-." 3 Load {ANS_COMP} words" CR
+." 3 Load {CORE_COMP} words" CR
." 4 Load ANS core tests" CR
." 5 Load a 100k program " CR
." 6 Read only this source file" CR
LOAD" SD_TOOLS.4TH"
ELSE 1 - ?DUP
0= IF
- ." LOAD ANS_COMP.4TH" CR
- LOAD" ANS_COMP.4TH"
+ ." LOAD CORECOMP.4TH" CR
+ LOAD" CORECOMP.4TH"
ELSE 1 - ?DUP
0= IF
." LOAD CORETEST.4TH" CR
; SD_TOOLS.4th : BASIC TOOLS for SD Card : DIR FAT SECTOR CLUSTER
; ---------------------------------------------------------------
+[DEFINED] {SD_TOOLS} [IF] {SD_TOOLS} [THEN]
+
[UNDEFINED] {SD_TOOLS} [IF]
PWR_STATE
+[UNDEFINED] MARKER [IF]
+: MARKER
+CREATE
+HI2LO
+MOV &$1DC8,0(R10)
+SUB #2,R8
+MOV R8,2(R10)
+ADD #4,&$1DC6
+LO2HI
+DOES>
+HI2LO
+MOV @R1+,R13
+MOV @R14+,&$180E
+MOV @R14,&$180C
+MOV @R15+,R14
+MOV #RST_STATE,R0
+ENDCODE
+[THEN]
+
MARKER {SD_TOOLS}
[UNDEFINED] + [IF]
ENDCODE
[THEN]
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] SPACE [IF]
: SPACE
$20 EMIT ;
ENDCODE
[THEN]
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] OVER [IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R6,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] U.R [IF]
: U.R
>R <# 0 # #S #>
;
[THEN]
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] DUMP [IF]
CODE DUMP
PUSH R13
[THEN]
ECHO
+
PWR_STATE
-[UNDEFINED] PLUS [IF]
+[UNDEFINED] + [IF]
CODE +
ADD @R15+,R14
MOV @R13+,R0
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF]
CODE MAX
[THEN]
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
CODE C@
MOV.B @R14,R14
[UNDEFINED] CONSTANT [IF]
: CONSTANT
-DEFER
+CREATE
HI2LO
-MOV @R1+,R13
-MOV #$1285,-4(R10)
MOV R14,-2(R10)
MOV @R15+,R14
+MOV @R1+,R13
MOV @R13+,R0
ENDCODE
[THEN]
ENDCODE
[THEN]
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R6,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] U.R [IF]
: U.R
>R <# 0 # #S #>
;
[THEN]
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] DUMP [IF]
CODE DUMP
PUSH R13
; ------------------------------------------------------------------------------
+PWR_STATE
+
+[DEFINED] {TOOLS} [IF] {TOOLS} [THEN]
+
[UNDEFINED] {TOOLS} [IF]
-PWR_STATE
+[UNDEFINED] MARKER [IF]
+
+: MARKER
+CREATE
+$1DBA @ >BODY >R
+$1DC8 @ R@ !
+$1DB6 @ 2 - R> 2 + !
+DOES>
+DUP @ $180E !
+2 + @ $180C !
+RST_STATE
+;
+[THEN]
MARKER {TOOLS}
-[UNDEFINED] ? [IF]
-CODE ?
+PWR_HERE
+
+[UNDEFINED] EXIT [IF]
+CODE EXIT
+MOV @R1+,R13
+MOV @R13+,R0
+
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC6,R14
+ADD #4,&$1DC6
+MOV #$404C,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC6,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+CODE BEGIN
+MOV #HERE,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+CODE UNTIL
+ MOV #$404C,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+CODE AGAIN
+MOV #$4048,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+: WHILE
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+CODE DO
+SUB #2,R15
+MOV R14,0(R15)
+ADD #2,&$1DC6
+MOV &$1DC6,R14
+MOV #$4056,-2(R14)
+ADD #2,&$1C00
+MOV &$1C00,R10
+MOV #0,0(R10)
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+CODE LOOP
+ MOV #$4078,R9
+BW1 ADD #4,&$1DC6
+ MOV &$1DC6,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
MOV @R14,R14
- MOV #U.,R0
+ CMP #0,R14
+0<> WHILE
+ MOV R10,0(R14)
+REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+CODE +LOOP
+MOV #$4066,R9
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+CODE I
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1,R14
+SUB 2(R1),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+CODE ?DUP
+CMP #0,R14
+0<> ?GOTO BW1
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] DROP [IF]
+CODE DROP
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+CODE >R
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+SUB #2,R15
+MOV R14,0(R15)
+MOV @R1+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
ENDCODE
[THEN]
ENDCODE
[THEN]
+[UNDEFINED] 2DUP [IF]
+CODE 2DUP
+MOV R14,-2(R15)
+MOV @R15,-4(R15)
+SUB #4,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1+ [IF]
+CODE 1+
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
+CODE +
+ADD @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C@ [IF]
+CODE C@
+MOV.B @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] AND [IF]
+CODE AND
+AND @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ROT [IF]
+CODE ROT
+MOV @R15,R10
+MOV R14,0(R15)
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MAX [IF]
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+[THEN]
+
+[UNDEFINED] OVER [IF]
+CODE OVER
+MOV R14,-2(R15)
+MOV @R15,R14
+SUB #2,R15
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MOVE [IF]
+CODE MOVE
+MOV R14,R10
+MOV @R15+,R8
+MOV @R15+,R9
+MOV @R15+,R14
+CMP #0,R10
+0<> IF
+ CMP R9,R8
+ 0= ?GOTO FW1
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ ELSE
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+THEN
+FW1 MOV @R13+,R0
+ENDCODE
+[THEN]
+
[UNDEFINED] .S [IF]
CODE .S
MOV R14,-2(R15)
ENDCODE
[THEN]
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
+[UNDEFINED] ? [IF]
+CODE ?
+ MOV @R14,R14
+ MOV #U.,R0
ENDCODE
[THEN]
;
[THEN]
-[UNDEFINED] MAX [IF]
- CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
- ENDCODE
-
- CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
- ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
[UNDEFINED] U.R [IF]
: U.R
>R <# 0 # #S #>
RST_HERE
[THEN]
+ECHO
\ -*- coding: utf-8 -*-
; -----------------------------------
-; PROG100k.f = 77 x RC5toLCD.f
+; PROG100k.f = 76 x RC5toLCD.f
+; -----------------------------------
+; download source file sized to compile 100 kbytes
; -----------------------------------
\ TARGET SELECTION
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
ENDCODE
+[THEN]
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
+CODE 20_US \ n -- n * 20 us
+BEGIN \ here we presume that LCD_TIM_IFG = 1...
+ BEGIN
+ BIT #1,&LCD_TIM_CTL \ 3
+ 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
+ BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
+ SUB #1,TOS \ 1
+U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+
+CODE TOP_LCD \ LCD Sample
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
MOV @PSP+,TOS \
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
+
+\ ------------------------------\
+CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
+\ ------------------------------\
+MOV #SLEEP,X \ replace default background process SLEEP
+MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
+MOV #WARM,X \ replace default WARM
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
+ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
-\ ------------------------------\
-CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
-\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
-MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
-MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
-ENDCODE
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-MARKER {RC5TOLCD}
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
+
+\ ------------------------------\
+CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
+\ ------------------------------\
+MOV #SLEEP,X \ replace default background process SLEEP
+MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
+MOV #WARM,X \ replace default WARM
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
+ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
-\ ------------------------------\
-CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
-\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
-MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
-MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
-ENDCODE
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-MARKER {RC5TOLCD}
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
+
+\ ------------------------------\
+CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
+\ ------------------------------\
+MOV #SLEEP,X \ replace default background process SLEEP
+MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
+MOV #WARM,X \ replace default WARM
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
+ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
-\ ------------------------------\
-CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
-\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
-MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
-MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
-ENDCODE
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
-MARKER {RC5TOLCD}
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
+
+\ ------------------------------\
+CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
+\ ------------------------------\
+MOV #SLEEP,X \ replace default background process SLEEP
+MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
+MOV #WARM,X \ replace default WARM
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
+ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
-\ ------------------------------\
-CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
-\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
-MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
-MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
-ENDCODE
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-MARKER {RC5TOLCD}
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
+
+\ ------------------------------\
+CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
+\ ------------------------------\
+MOV #SLEEP,X \ replace default background process SLEEP
+MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
+MOV #WARM,X \ replace default WARM
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
+ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
-\ ------------------------------\
-CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
-\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
-MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
-MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
-ENDCODE
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
+MARKER {RC5TOLCD}
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
-MARKER {RC5TOLCD}
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
+
+ECHO
+ ; downloading RC5toLCD.4th is done
+RST_HERE ; this app is protected against <reset>
+
+
+RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
RET
ENDASM
-\ ------------------------------\
+\ ******************************\
ASM BACKGROUND \
-\ ------------------------------\
+\ ******************************\
BEGIN
\ ... \ insert here your background task
\ ... \
\ ... \
- CALL &RXON \ comment this line to disable TERMINAL
+ CALL &RXON \ comment this line to disable TERMINAL_INPUT
BIS &LPM_MODE,SR \
\ ******************************\
\ here start all interrupts \
\ ******************************\
AGAIN \
ENDASM \
+\ ******************************\
+
+\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
- MOV X,-2(X) \ restore the default background
+ MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ ------------------------------\
\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
\ ------------------------------\
-MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
\ ------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
\ ------------------------------\
- MOV #%01100000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
\ ------------------------------\
\ - \ TAIE
\ - \ TAIFG
\ ------------------------------\
- MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
\ ------------------------------\
\ 000 \ TAxEX0
\ --- \ TAIDEX pre divisor
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
\ ------------------------------\
-MOV #SLEEP,X \ replace default background process
+MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
-
-
+\ ------------------------------\
ECHO
; downloading RC5toLCD.4th is done
\
\ rc5 <--- OUT IR_Receiver (1 TSOP32236)
-RST_STATE
[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {RC5TOLCD}
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+\ CODE 20uS \ n -- 8MHz version
+\ BEGIN \ 4 + 16 ~ loop
+\ MOV #39,rDOCON \ 39
+\ BEGIN \ 4 ~ loop
+\ NOP
+\ SUB #1,rDOCON
+\ 0= UNTIL
+\ SUB #1,TOS \ 1
+\ 0= UNTIL
+\ MOV #XDOCON,rDOCON \ 2
+\ MOV @PSP+,TOS
+\ MOV @RSP+,IP \
+\ ENDCODE
+
CODE 20_US \ n -- n * 20 us
BEGIN \ here we presume that LCD_TIM_IFG = 1...
BEGIN
ENDCODE
CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxxWWWW --
-\ \ if read : -- %0000RRRR
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
0= IF \ write LCD bits pattern
CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxxLLLL %HHHHLLLL
- RRUM #4,TOS \ -- %xxxxLLLL %xxxxHHHH
+ MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
COLON \ high level word starts here
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000HHHH
-\ TOP_LCD 2 20_us \ -- %0000HHHH %0000LLLL
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH0000 %0000LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHHLLLL
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
\ ******************************\
\ ------------------------------\
+ASM SYS_OUT \ system OUT init, replaces WARM at the request of STOP.
+\ ------------------------------\
+\ ... \ init specific I/O sys as you want
+\ ... \ before executing default WARM
+ MOV #WARM,X \ ['] WARM
+ ADD #4,X \ >BODY
+ MOV X,PC \ EXECUTE (which activates IO and TERMINAL)
+ENDASM
+\ ------------------------------\
+
+\ ------------------------------\
CODE STOP \ stops multitasking, must to be used before downloading app
\ ------------------------------\
-\ restore default action of primary DEFERred word SLEEP (assembly version)
BW1 MOV #SLEEP,X \ the ASM word SLEEP is only visible in mode assembler.
ADD #4,X \ X = BODY of SLEEP, X-2 = PFA of SLEEP
MOV X,-2(X) \ restore the default background: SLEEP
+ MOV #WARM,X
+ MOV #SYS_OUT,2(X) \ default WARM is replaced by JMJ_BOX SYS_OUT (ended by default WARM)
+ BIC.B #RC5,&IR_IE \ clear RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ CALL #INIT_VECT \ reset all vectors other than TERMINAL_int
COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-['] WARM >BODY IS WARM \ restore the default WARM
ECHO \
-." RC5toLCD is removed. type START to restart"
-COLD \ performs reset to reset all interrupt vectors.
+." RC5toLCD is removed,"
+." type START to restart"
+ WARM \ performs reset to reset all interrupt vectors.
;
+\ ------------------------------\
\ ------------------------------\
-CODE APP_INIT \ this routine completes the init of system, i.e. FORTH + this app.
+CODE SYS_INIT \ this routine completes the init of system, i.e. FORTH + this app.
\ ------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
['] CR >BODY IS CR \ CR executes its default value
['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT \ ...and end APP_INIT with ABORT, no return.
+ PWR_STATE ABORT \ init DP and continues with ABORT
; \
+\ ------------------------------\
\ ------------------------------\
CODE START \ this routine replaces WARM and SLEEP default values by these of this application.
MOV #SLEEP,X \ replace default background process SLEEP
MOV #BACKGROUND,2(X) \ by RC5toLCD BACKGROUND
MOV #WARM,X \ replace default WARM
-MOV #APP_INIT,2(X) \ by RC5toLCD APP_INIT
-MOV X,PC \ then execute it
+MOV #SYS_INIT,2(X) \ by RC5toLCD SYS_INIT
+MOV X,PC \ then execute new WARM
ENDCODE
+\ ------------------------------\
ECHO
; downloading RC5toLCD.4th is done
RST_HERE ; this app is protected against <reset>
-\ START cold
+START
PWR_STATE
-[UNDEFINED] {RTC} [IF]
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @PSP+,TOS \ 2 u2-u1
+0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+CODE =
+SUB @PSP+,TOS \ 2
+0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+THEN
+XOR #-1,TOS \ 1 flag Z = 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] AND [IF]
+\ https://forth-standard.org/standard/core/AND
+\ C AND x1 x2 -- x3 logical AND
+CODE AND
+AND @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+: RTCNOTFOUND
+ECHO \ return to column 1
+1 ABORT" no RTC found!"
+;
+
+DEVICEID @ $831D SWAP U< [IF] RTCNOTFOUND [THEN] \ MSP430FR21xx/23xx
+DEVICEID @ $823C OVER U<
+ $8241 U< AND [IF] RTCNOTFOUND [THEN] \ MSP430FR25xx/26xx
+DEVICEID @ $81F0 OVER U<
+ $81F3 U< AND [IF] RTCNOTFOUND [THEN] \ MSP430FR41xx
+
+[DEFINED] {RTC} [IF] {RTC} [THEN]
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
MARKER {RTC}
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF]
CODE MAX \ n1 n2 -- n3 signed maximum
ENDCODE
[THEN]
+[UNDEFINED] DUP [IF]
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEPTH [IF]
+\ https://forth-standard.org/standard/core/DEPTH
+\ DEPTH -- +n number of items on stack, must leave 0 if stack empty
+CODE DEPTH
+MOV TOS,-2(PSP)
+MOV #PSTACK,TOS
+SUB PSP,TOS \ PSP-S0--> TOS
+RRA TOS \ TOS/2 --> TOS
+SUB #2,PSP \ post decrement stack...
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+SUB #2,PSP \ 1
+MOV TOS,0(PSP) \ 3
+MOV @RSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] EXECUTE [IF] \ "
+\ https://forth-standard.org/standard/core/EXECUTE
+\ EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+CODE EXECUTE
+MOV TOS,W \ 1 put word address into W
+MOV @PSP+,TOS \ 2 fetch new TOS
+MOV W,PC \ 3 fetch code address into PC
+ENDCODE
+[THEN]
+
[UNDEFINED] U.R [IF]
: U.R \ u n -- display u unsigned in n width (n >= 2)
>R <# 0 # #S #>
." it is " TIME?
;
-RST_HERE
+PWR_HERE
+[UNDEFINED] ESC" [IF]
+\ ESC" <string>" -- send an escape sequence
+: ESC" $1B POSTPONE LITERAL POSTPONE EMIT POSTPONE S" POSTPONE TYPE ; IMMEDIATE \ "
[THEN]
-: ESC #27 EMIT ;
-
-\ create a word to test DEFERred words
-: [ISDEFERRED?] \ [ISDEFERRED?] xt -- xt flag
- DUP @ $4030 = \ CFA of <name> = MOV @PC+,PC ?
-; IMMEDIATE
-
CREATE ABUF 20 ALLOT
: GET_TIME
42 \ number of terminal lines
0 DO CR LOOP \ don't erase any line of source
-ESC ." [1J" \ erase up (42 empty lines)
-ESC ." [H" \ cursor home
+ESC" [1J" \ erase up (42 empty lines)
+ESC" [H" \ cursor home
CR ." DATE (DMY): "
-ABUF DUP 20
- ['] ACCEPT [ISDEFERRED?]
- [IF] >BODY \ execute default part of ACCEPT
- [THEN] EXECUTE
-EVALUATE CR DATE!
+ABUF
+DUP 20 ['] ACCEPT >BODY EXECUTE \ execute default part of ACCEPT
+ EVALUATE CR DATE!
CR CR ." TIME (HMS): "
-ABUF DUP 20
- ['] ACCEPT [ISDEFERRED?]
- [IF] >BODY \ execute default part of ACCEPT
- [THEN] EXECUTE
-EVALUATE CR TIME!
+ABUF
+DUP 20 ['] ACCEPT >BODY EXECUTE \ execute default part of ACCEPT
+ EVALUATE CR TIME!
CR
;
PWR_STATE
-[UNDEFINED] {SD_TEST} [IF] \
+[DEFINED] {SD_TEST} [IF] {SD_TEST} [THEN] \ remove it if defined out of kernel
+
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
MARKER {SD_TEST}
+[UNDEFINED] EXIT [IF]
+\ https://forth-standard.org/standard/core/EXIT
+\ EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
+\ JMP #EXIT performs EXIT
+CODE EXIT
+MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+MOV @IP+,PC \ 4 = NEXT
+ \ 6 (ITC-2)
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] 0= [IF]
+\ https://forth-standard.org/standard/core/ZeroEqual
+\ 0= n/u -- flag return true if TOS=0
+CODE 0=
+SUB #1,TOS \ borrow (clear cy) if TOS was 0
+SUBC TOS,TOS \ TOS=-1 if borrow was set
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+CODE ELSE \ immediate
+ADD #4,&DP \ make room to compile two words
+MOV &DP,W \ W=HERE+4
+MOV #BRAN,-4(W)
+MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+SUB #2,W \ HERE+2
+MOV W,TOS \ -- ELSEadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+CODE UNTIL \ immediate
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+: WHILE \ immediate
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+CODE AGAIN \ immediate
+MOV #BRAN,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP \ immediate
+MOV #XPLOOP,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF] \ MAX and MIN are defined in {ANS_COMP}
CODE MAX \ n1 n2 -- n3 signed maximum
CMP @PSP,TOS \ n2-n1
ENDCODE
[THEN]
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
ENDCODE
[THEN]
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] SPACE [IF]
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
ENDCODE
[THEN]
+[UNDEFINED] DUP [IF]
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ENDCODE
+
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+CODE ?DUP
+CMP #0,TOS \ 2 test for TOS nonzero
+0<> ?GOTO BW1 \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
ENDCODE
[THEN]
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+SUB #2,PSP \ 1
+MOV TOS,0(PSP) \ 3
+MOV @RSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+: CONSTANT
+CREATE
+HI2LO
+MOV TOS,-2(W) \ PFA = n
+MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+\ https://forth-standard.org/standard/core/STATE
+\ STATE -- a-addr holds compiler state
+STATEADR CONSTANT STATE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+\ https://forth-standard.org/standard/core/DEFERStore
+\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+CODE DEFER! \ xt2 xt1 --
+MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+\ https://forth-standard.org/standard/core/IS
+\ IS <name> xt --
+\ used as is :
+\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ or in a definition : ... ['] U. IS DISPLAY ...
+\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\
+\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
[UNDEFINED] U.R [IF] \ defined in {UTILITY}
: U.R \ u n -- display u unsigned in n width (n >= 2)
>R <# 0 # #S #>
;
[THEN]
+[UNDEFINED] HERE [IF]
+CODE HERE
+MOV #BEGIN,PC
+ENDCODE
+[THEN]
+
\ SD_EMIT c -- output char c to a SD_CARD file opened as write
CODE SD_EMIT
CMP #512,&BufferPtr \ 512 bytes by sector
U>= IF \ if file buffer is full
- MOV #WRITE,X \ CALL WRITEFILE
+ MOV #WRITE,X \ CALL #Write_File
CALL 2(X) \ BufferPtr = 0
THEN
MOV &BufferPtr,Y \ 3
." 0 Set date and time" CR
." 1 Load {TOOLS} words" CR
." 2 Load {SD_TOOLS} words" CR
-." 3 Load {ANS_COMP} words" CR
+." 3 Load {CORE_COMP} words" CR
." 4 Load ANS core tests" CR
." 5 Load a 100k program " CR
." 6 Read only this source file" CR
LOAD" SD_TOOLS.4TH"
ELSE 1 - ?DUP
0= IF
- ." LOAD ANS_COMP.4TH" CR
- LOAD" ANS_COMP.4TH"
+ ." LOAD CORECOMP.4TH" CR
+ LOAD" CORECOMP.4TH"
ELSE 1 - ?DUP
0= IF
." LOAD CORETEST.4TH" CR
." WRITE YOURFILE.TXT" CR
WRITE" YOURFILE.TXT"
['] SD_EMIT IS EMIT
+\ ." va te faire voir"
MAIN_ORG HERE OVER - DUMP
['] EMIT >BODY IS EMIT
CLOSE
THEN
;
+
+
RST_HERE
[THEN]
\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
+[DEFINED] {SD_TOOLS} [IF] {SD_TOOLS} [THEN]
+
[UNDEFINED] {SD_TOOLS} [IF]
PWR_STATE
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+: MARKER
+CREATE
+HI2LO
+MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+SUB #2,Y \ 1 Y = LFA
+MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+ADD #4,&DP \ 3 add 2 cells
+LO2HI
+DOES>
+HI2LO
+MOV @RSP+,IP \ -- PFA
+MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+MOV @TOS,&INIDP \ set DP value for RST_STATE
+MOV @PSP+,TOS \ --
+MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+ENDCODE
+[THEN]
+
MARKER {SD_TOOLS}
[UNDEFINED] + [IF]
ENDCODE
[THEN]
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] SPACE [IF]
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
ENDCODE
[THEN]
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
ENDCODE
[THEN]
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+MOV rDOVAR,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] U.R [IF] \ defined in {UTILITY}
: U.R \ u n -- display u unsigned in n width (n >= 2)
>R <# 0 # #S #>
;
[THEN]
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP \ immediate
+MOV #XPLOOP,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
\ https://forth-standard.org/standard/tools/DUMP
CODE DUMP \ adr n -- dump memory
\
\ FORTH conditionnal : 0= 0< = < > U<
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+MOV rDOVAR,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF] \ MAX and MIN are defined in {UTILITY}
CODE MAX \ n1 n2 -- n3 signed maximum
[THEN]
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
\ https://forth-standard.org/standard/core/VARIABLE
\ VARIABLE <name> -- define a Forth VARIABLE
: VARIABLE
-DEFER
+CREATE
HI2LO
-MOV @RSP+,IP
MOV #DOVAR,-4(W) \ CFA = DOVAR
+MOV @RSP+,IP
MOV @IP+,PC
ENDCODE
[THEN]
\ https://forth-standard.org/standard/core/CONSTANT
\ CONSTANT <name> n -- define a Forth CONSTANT
: CONSTANT
-DEFER
+CREATE
HI2LO
-MOV @RSP+,IP
-MOV #DOCON,-4(W) \ CFA = DOCON
MOV TOS,-2(W) \ PFA = n
MOV @PSP+,TOS
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] DEFER [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ DEFER "<spaces>name" --
+\Skip leading space delimiters. Parse name delimited by a space.
+\Create a definition for name with the execution semantics defined below.
+
+\name Execution: --
+\Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+: DEFER
+CREATE
+HI2LO
+MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+MOV @RSP+,IP
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+CODE >BODY
+ADD #4,TOS
MOV @IP+,PC
ENDCODE
[THEN]
ENDCODE
[THEN]
+[UNDEFINED] DUP [IF]
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
;
[THEN]
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP \ immediate
+MOV #XPLOOP,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
\ https://forth-standard.org/standard/tools/DUMP
CODE DUMP \ adr n -- dump memory
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] MAX [IF] \ MAX and MIN are defined in {UTILITY}
CODE MAX \ n1 n2 -- n3 signed maximum
[THEN]
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
\ https://forth-standard.org/standard/core/CONSTANT
\ CONSTANT <name> n -- define a Forth CONSTANT
: CONSTANT
-DEFER
+CREATE
HI2LO
-MOV @RSP+,IP
-MOV #DOCON,-4(W) \ CFA = DOCON
MOV TOS,-2(W) \ PFA = n
MOV @PSP+,TOS
+MOV @RSP+,IP
MOV @IP+,PC
ENDCODE
[THEN]
ENDCODE
[THEN]
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+MOV rDOVAR,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
[UNDEFINED] U.R [IF] \ defined in {UTILITY}
: U.R \ u n -- display u unsigned in n width (n >= 2)
>R <# 0 # #S #>
;
[THEN]
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP \ immediate
+MOV #XPLOOP,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
\ https://forth-standard.org/standard/tools/DUMP
CODE DUMP \ adr n -- dump memory
--- /dev/null
+\ -----------------------------
+\ MSP-EXP430FR5969_TSTWORDS.4th
+\ -----------------------------
+
+PWR_STATE
+
+\ -----------------------------------------------------------------------
+\ test some assembler words and show how to mix FORTH/ASSEMBLER routines
+\ -----------------------------------------------------------------------
+LOAD" \misc\TestASM.4th"
+
+\ -------------------------------------
+\ here we returned in the TestWords.4th
+\ -------------------------------------
+ECHO
+\ ----------
+\ LOOP tests
+\ ----------
+: LOOP_TEST 8 0 DO I . LOOP
+;
+
+LOOP_TEST \ you should see 0 1 2 3 4 5 6 7 -->
+
+
+: LOOP_TEST1 \ n <LOOP_TEST1> ---
+
+ BEGIN DUP U. 1 -
+ ?DUP
+ 0= UNTIL
+;
+
+: LOOP_MAX \ FIND_NOTHING --
+ 0 0
+ DO
+ LOOP \ 14 cycles by loop
+ ABORT" 65536 LOOP "
+;
+
+ : FIND_TEST \ FIND_TEST <word> --
+ $20 WORD \ -- c-addr
+ 50000 0
+ DO \ -- c-addr
+ DUP
+ FIND DROP DROP
+ LOOP
+ FIND
+ 0= IF ABORT" <-- not found !"
+ ELSE ABORT" <-- found !"
+ THEN
+ ;
+
+\ seeking $ word, FIND jumps all words on their first character so time of word loop is 20 cycles
+\ see FIND in the source file for more information
+\
+\ FIND_TEST <lastword> result @ 8MHz, monothread : 1,2s
+\
+\ FIND_TEST $ results @ 8MHz, monothread, 201 words in vocabulary FORTH :
+\ 27 seconds with only FORTH vocabulary in CONTEXT
+\ 540 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ 2.6866 us / word, 21,49 cycles / word (for 20 cycles calculated (see FIND in source file)
+\
+\
+\ FIND_TEST $ results @ 8MHz, 2 threads, 201 words in vocabulary FORTH :
+\ 13 second with only FORTH vocabulary in CONTEXT
+\ 260 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ 1,293 us / word, 10,34 cycles / word
+\
+\ FIND_TEST $ results @ 8MHz, 4 threads, 201 words in vocabulary FORTH :
+\ 8 second with only FORTH vocabulary in CONTEXT
+\ 160 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ 0,796 us / word, 6,37 cycles / word
+\
+\ FIND_TEST $ results @ 8MHz, 8 threads, 201 words in vocabulary FORTH :
+\ 4.66 second with only FORTH vocabulary in CONTEXT
+\ 93 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ 0,4463 us / word, 3,7 cycles / word
+\
+\ FIND_TEST $ results @ 8MHz, 16 threads, 201 words in vocabulary FORTH :
+\ 2,8 second with only FORTH vocabulary in CONTEXT
+\ 56 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ 0,278 us / word, 2,22 cycles / word
+\
+\ --------
+\ KEY test
+\ --------
+: KEY_TEST
+ ." type a key : "
+ KEY EMIT \ wait for a KEY, then emit it
+;
+\ KEY_TEST
\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP
\
\ TARGET SELECTION
+\ LP_MSP430FR2476
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
\ MSP_EXP430FR4133 MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
\
\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
+PWR_STATE
+
+[DEFINED] {TOOLS} [IF] {TOOLS} [THEN]
+
[UNDEFINED] {TOOLS} [IF]
-PWR_STATE
+[UNDEFINED] MARKER [IF]
+\ https://forth-standard.org/standard/core/MARKER
+\ MARKER
+\ ( "<spaces>name" -- )
+\ Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+\ with the execution semantics defined below.
+\
+\ name Execution: ( -- )
+\ Restore all dictionary allocation and search order pointers to the state they had just prior to the
+\ definition of name. Remove the definition of name and all subsequent definitions. Restoration
+\ of any structures still existing that could refer to deleted definitions or deallocated data space is
+\ not necessarily provided. No other contextual information such as numeric base is affected
+\
+\ : MARKER
+\ CREATE
+\ HI2LO
+\ MOV &LASTVOC,0(W) \ [BODY] = LASTVOC
+\ SUB #2,Y \ 1 Y = LFA
+\ MOV Y,2(W) \ 3 [BODY+2] = LFA = DP to be restored
+\ ADD #4,&DP \ 3 add 2 cells
+\ LO2HI
+\ DOES>
+\ HI2LO
+\ MOV @RSP+,IP \ -- PFA
+\ MOV @TOS+,&INIVOC \ set VOC_LINK value for RST_STATE
+\ MOV @TOS,&INIDP \ set DP value for RST_STATE
+\ MOV @PSP+,TOS \ --
+\ MOV #RST_STATE,PC \ execute RST_STATE, PWR_STATE then STATE_DOES
+\ ENDCODE
+\ [THEN]
+
+: MARKER
+CREATE
+LAST_CFA @ >BODY >R
+LASTVOC @ R@ !
+LAST_NFA @ 2 - R> 2 + ! \ [BODY] = LASTVOC
+DOES>
+DUP @ INIVOC ! \ set VOC_LINK value for RST_STATE
+2 + @ INIDP ! \ set DP value for RST_STATE
+RST_STATE
+; \ execute RST_STATE, PWR_STATE then STATE_DOES
+[THEN]
MARKER {TOOLS}
-[UNDEFINED] ? [IF] \
-\ https://forth-standard.org/standard/tools/q
-\ ? adr -- display the content of adr
-CODE ?
- MOV @TOS,TOS
- MOV #U.,PC \ goto U.
+PWR_HERE
+
+[UNDEFINED] EXIT [IF]
+\ https://forth-standard.org/standard/core/EXIT
+\ EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
+\ JMP #EXIT performs EXIT
+CODE EXIT
+MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+MOV @IP+,PC \ 4 = NEXT
+ \ 6 (ITC-2)
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+\ https://forth-standard.org/standard/core/Uless
+\ U< u1 u2 -- flag test u1<u2, unsigned
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @PSP+,TOS \ 2 u2-u1
+0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
+THEN
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+CODE IF \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+MOV &DP,TOS \ -- HERE
+ADD #4,&DP \ compile one word, reserve one word
+MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ADD #2,TOS \ -- HERE+2=IFadr
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+CODE THEN \ immediate
+MOV &DP,0(TOS) \ -- IFadr
+MOV @PSP+,TOS \ --
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] BEGIN [IF]
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+CODE BEGIN \ immediate
+MOV #HERE,PC \ BR HERE
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] UNTIL [IF]
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+CODE UNTIL \ immediate
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] AGAIN [IF]
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+CODE AGAIN \ immediate
+MOV #BRAN,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] WHILE [IF]
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+: WHILE \ immediate
+POSTPONE IF SWAP
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] REPEAT [IF]
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+: REPEAT
+POSTPONE AGAIN POSTPONE THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] DO [IF]
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+CODE DO \ immediate
+SUB #2,PSP \
+MOV TOS,0(PSP) \
+ADD #2,&DP \ make room to compile xdo
+MOV &DP,TOS \ -- HERE+2
+MOV #XDO,-2(TOS) \ compile xdo
+ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+MOV &LEAVEPTR,W \
+MOV #0,0(W) \ -- HERE+2 L-- 0
+MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] LOOP [IF]
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+CODE LOOP \ immediate
+ MOV #XLOOP,X
+BW1 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] +LOOP [IF]
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+CODE +LOOP \ immediate
+MOV #XPLOOP,X
+GOTO BW1
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] I [IF]
+\ https://forth-standard.org/standard/core/I
+\ I -- n R: sys1 sys2 -- sys1 sys2
+\ get the innermost loop index
+CODE I
+SUB #2,PSP \ 1 make room in TOS
+MOV TOS,0(PSP) \ 3
+MOV @RSP,TOS \ 2 index = loopctr - fudge
+SUB 2(RSP),TOS \ 3
+MOV @IP+,PC \ 4 13~
+ENDCODE
+[THEN]
+
+[UNDEFINED] DUP [IF]
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ENDCODE
+
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+CODE ?DUP
+CMP #0,TOS \ 2 test for TOS nonzero
+0<> ?GOTO BW1 \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+CODE SWAP
+MOV @PSP,W \ 2
+MOV TOS,0(PSP) \ 3
+MOV W,TOS \ 1
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] DROP [IF]
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+CODE DROP
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] >R [IF]
+\ https://forth-standard.org/standard/core/toR
+\ >R x -- R: -- x push to return stack
+CODE >R
+PUSH TOS
+MOV @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] R> [IF]
+\ https://forth-standard.org/standard/core/Rfrom
+\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
+CODE R>
+SUB #2,PSP \ 1
+MOV TOS,0(PSP) \ 3
+MOV @RSP+,TOS \ 2
+MOV @IP+,PC \ 4
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+\ https://forth-standard.org/standard/core/Fetch
+\ @ c-addr -- char fetch char from memory
+CODE @
+MOV @TOS,TOS
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+\ https://forth-standard.org/standard/core/Store
+\ ! x a-addr -- store cell in memory
+CODE !
+MOV @PSP+,0(TOS) \ 4
+MOV @PSP+,TOS \ 2
+MOV @IP+,PC \ 4
ENDCODE
[THEN]
ENDCODE
[THEN]
-[UNDEFINED] .S [IF] \
-\ https://forth-standard.org/standard/tools/DotS
-\ .S -- display <depth> of param Stack and stack contents in hedadecimal if not empty
-CODE .S
- MOV TOS,-2(PSP) \ -- TOS ( tos x x )
- MOV PSP,TOS
- SUB #2,TOS \ to take count that TOS is first cell
- MOV TOS,-6(PSP) \ -- TOS ( tos x PSP )
- MOV #PSTACK,TOS \ -- P0 ( tos x PSP )
- SUB #2,TOS \ to take count that TOS is first cell
-BW1 MOV TOS,-4(PSP) \ -- S0 ( tos S0 SP )
- SUB #6,PSP \ -- S0 SP S0
- SUB @PSP,TOS \ -- S0 SP S0-SP
- RRA TOS \ -- S0 SP #cells
-COLON
- $3C EMIT \ char '<'
- . \ display #cells
- $08 EMIT \ backspace
- $3E EMIT SPACE \ char '>' SPACE
- 2DUP 1+ \
- U< IF
- DROP DROP EXIT
- THEN \ display content of stack in hexadecimal
- BASEADR @ >R
- $10 BASEADR !
- DO
- I @ U.
- 2 +LOOP
- R> BASEADR !
-;
+[UNDEFINED] 2DUP [IF] \
+\ https://forth-standard.org/standard/core/TwoDUP
+\ 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
+CODE 2DUP
+MOV TOS,-2(PSP) \ 3
+MOV @PSP,-4(PSP) \ 4
+SUB #4,PSP \ 1
+MOV @IP+,PC \ 4
+ENDCODE
[THEN]
-[UNDEFINED] .RS [IF] \
-\ .RS -- display <depth> of Return Stack and stack contents if not empty
-CODE .RS
- MOV TOS,-2(PSP) \ -- TOS ( tos x x )
- MOV RSP,-6(PSP) \ -- TOS ( tos x RSP )
- MOV #RSTACK,TOS \ -- R0 ( tos x RSP )
- GOTO BW1
+[UNDEFINED] 1+ [IF]
+\ https://forth-standard.org/standard/core/OnePlus
+\ 1+ n1/u1 -- n2/u2 add 1 to TOS
+CODE 1+
+ADD #1,TOS
+MOV @IP+,PC
ENDCODE
[THEN]
ENDCODE
[THEN]
+[UNDEFINED] - [IF]
+\ https://forth-standard.org/standard/core/Minus
+\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+CODE -
+SUB @PSP+,TOS \ 2 -- n2-n1
+XOR #-1,TOS \ 1
+ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
ENDCODE
[THEN]
+[UNDEFINED] MAX [IF] \ MAX and MIN are defined in {ANS_COMP}
+ CODE MAX \ n1 n2 -- n3 signed maximum
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO FW1 \ n2<n1
+BW1 ADD #2,PSP
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE MIN \ n1 n2 -- n3 signed minimum
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO BW1 \ n2<n1
+FW1 MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+[THEN]
+
+[UNDEFINED] OVER [IF]
+\ https://forth-standard.org/standard/core/OVER
+\ OVER x1 x2 -- x1 x2 x1
+CODE OVER
+MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+MOV @PSP,TOS \ 2 -- x1 (x2) x1
+SUB #2,PSP \ 1 -- x1 x2 x1
+MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] MOVE [IF]
+\ https://forth-standard.org/standard/core/MOVE
+\ MOVE addr1 addr2 u -- smart move
+\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
+CODE MOVE
+MOV TOS,W \ W = cnt
+MOV @PSP+,Y \ Y = addr2 = dst
+MOV @PSP+,X \ X = addr1 = src
+MOV @PSP+,TOS \ pop new TOS
+CMP #0,W \ count = 0 ?
+0<> IF \ if 0, already done !
+ CMP X,Y \ Y-X \ dst - src
+ 0= ?GOTO FW1 \ already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC
+ ELSE \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
+ SUB #1,W
+ 0= UNTIL
+ THEN
+THEN
+FW1 MOV @IP+,PC
+ENDCODE
+[THEN]
+
+[UNDEFINED] .S [IF] \
+\ https://forth-standard.org/standard/tools/DotS
+\ .S TOS -- TOS display <depth> of param Stack and stack contents in hedadecimal if not empty
+CODE .S
+ MOV TOS,-2(PSP) \ -- TOS ( TOS x x )
+ MOV PSP,TOS \ -- PSP ( TOS x x )
+ SUB #2,TOS \ -- PSP ( TOS x x ) to take count that TOS is first cell
+ MOV TOS,-6(PSP) \ -- TOS ( TOS x PSP )
+ MOV #PSTACK,TOS \ -- P0 ( TOS x PSP )
+ SUB #2,TOS \ -- P0 ( TOS x PSP ) to take count that TOS is first cell
+BW1 MOV TOS,-4(PSP) \ -- S0 ( TOS S0 PSP ) | -- TOS ( TOS R0 RSP )
+ SUB #6,PSP \ -- TOS S0 PSP S0 | -- TOS R0 RSP R0
+ SUB @PSP,TOS \ -- TOS S0 PSP S0-SP | -- TOS R0 RSP R0-RSP
+ RRA TOS \ -- TOS S0 PSP #cells | -- TOS R0 RSP #cells
+COLON
+ $3C EMIT \ char '<'
+ . \ display #cells
+ $08 EMIT \ backspace
+ $3E EMIT SPACE \ char '>' SPACE
+ 2DUP 1+ \
+ U< IF
+ DROP DROP EXIT
+ THEN \ display content of stack in hexadecimal
+ BASEADR @ >R
+ $10 BASEADR !
+ DO
+ I @ U.
+ 2 +LOOP
+ R> BASEADR !
+;
+[THEN]
+
+[UNDEFINED] .RS [IF] \
+\ .RS TOS -- TOS display <depth> of Return Stack and stack contents if not empty
+CODE .RS
+ MOV TOS,-2(PSP) \ -- TOS ( TOS x x )
+ MOV RSP,-6(PSP) \ -- TOS ( TOS x RSP )
+ MOV #RSTACK,TOS \ -- R0 ( TOS x RSP )
+ GOTO BW1
+ENDCODE
+[THEN]
+
+[UNDEFINED] ? [IF] \
+\ https://forth-standard.org/standard/tools/q
+\ ? adr -- display the content of adr
+CODE ?
+ MOV @TOS,TOS
+ MOV #U.,PC \ goto U.
+ENDCODE
+[THEN]
+
[UNDEFINED] WORDS [IF]
\ https://forth-standard.org/standard/tools/WORDS
\ list all words of vocabulary first in CONTEXT.
; \ all threads in PAD_ORG are filled with 0
[THEN]
-[UNDEFINED] MAX [IF] \ MAX and MIN are defined in {ANS_COMP}
- CODE MAX \ n1 n2 -- n3 signed maximum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO FW1 \ n2<n1
-BW1 ADD #2,PSP
- MOV @IP+,PC
- ENDCODE
-
- CODE MIN \ n1 n2 -- n3 signed minimum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO BW1 \ n2<n1
-FW1 MOV @PSP+,TOS
- MOV @IP+,PC
- ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-\ https://forth-standard.org/standard/core/OVER
-\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
[UNDEFINED] U.R [IF]
: U.R \ u n -- display u unsigned in n width (n >= 2)
>R <# 0 # #S #>
--- /dev/null
+\ -*- coding: utf-8 -*-
+
+; -----------------------------------------------------
+; VALUE.f
+; -----------------------------------------------------
+\
+\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP
+\ to see FastForth kernel options, download FF_SPECS.f
+\
+\ TARGET Current Selection
+\ (used by preprocessor GEMA to load the pattern: \inc\TARGET.pat)
+\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
+\ MSP_EXP430FR2433 MSP_EXP430FR4133 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\
+\ REGISTERS USAGE
+\ rDODOES to rEXIT must be saved before use and restored after
+\ scratch registers Y to S are free for use
+\ under interrupt, IP is free for use
+\
+\ PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT, rDOVAR, rDOCON, rDODOES
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM order : rDODOES, rDOCON, rDOVAR, rEXIT, Y, X, W, T, S, IP,TOS,PSP
+\ example : POPM #6,IP pulls Y,X,W,T,S,IP registers from return stack
+\
+\ FORTH conditionnals: unary{ 0= 0< 0> }, binary{ = < > U< }
+\
+\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
+\ ASSEMBLER conditionnal usage with ?GOTO S< S>= U< U>= 0= 0<> 0<
+
+PWR_STATE
+
+\ https://forth-standard.org/standard/core/VALUE
+\ ( x "<spaces>name" -- ) define a Forth VALUE
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below,
+\ with an initial value equal to x.
+\
+\ name Execution: ( -- x )
+\ Place x on the stack. The value of x is that given when name was created,
+\ until the phrase x TO name is executed, causing a new value of x to be assigned to name.
+\
+: VALUE \ x "<spaces>name" --
+CREATE ,
+DOES>
+HI2LO
+MOV @RSP+,IP
+BIT #UF10,SR \ see TO
+0= IF
+ MOV #@,PC
+THEN
+BIC #UF10,SR
+MOV #!,PC
+ENDCODE
+
+\ https://forth-standard.org/standard/double/TwoVALUE
+: 2VALUE \ x1 x2 "<spaces>name" --
+CREATE , , \ compile Shi then Flo
+DOES>
+HI2LO
+MOV @RSP+,IP
+BIT #UF10,SR \see TO
+0= IF
+ MOV #2@,PC
+THEN
+BIC #UF10,SR
+MOV #2!,PC
+ENDCODE
+
+\ https://forth-standard.org/standard/core/TO
+\ TO name Run-time: ( x -- )
+\ Assign the value x to named VALUE.
+CODE TO
+BIS #UF10,SR
+MOV @IP+,PC
+ENDCODE
+
+PWR_HERE
FastForth for MSP430FRxxxx TI's chips, from 16k FRAM
==================================================
-Tested on all MSP-EXP430FRxxxx TI launchpads (5739,5969,5994,6989,4133,2355,2433,2476), at 0.5, 1, 2, 4, 8, 12, 16 MHz plus 20MHz and 24MHz with FR23xx,FR57xx devices.
+Tested on all MSP-EXP430FR TI launchpads (5739,5969,5994,6989,4133,2355,2433,2476), at 0.5, 1, 2, 4, 8, 12, 16 MHz plus 20MHz and 24MHz with FR23xx,FR57xx devices.
-Fast Forth is a fast and well-made embedded interpreter/assembler/compiler, very interesting because of its size under 5.5 KB.
-This includes the FORTH language, an amazing and powerful assembler with conditional compilation, a 16-input search engine which
-speeds up the Forth interpreter by a factor of 4, and a connection to the serial terminal (TERATERM.exe), with 3 wires software flow control (XON/XOFF) and/or 4 wires hardware control flow, up to 6 Mbds.
-If your goal is to program a MSP430FRxxxx in assembler or just to learn assembler, enjoy yourself, try it!
-However, if the IDE works well with Windows 10, it works less well with Linux which suffers from the lack of a good alternative to TERATERM...
+FastForth, a name that's not stolen: it loads from terminal and executes the test file \MSP430-FORTH\CORETEST.4th in less than a second.
-For only 3 kbytes in addition, you have the primitives to access the SD\_CARD FAT16 and FAT32: read, write, del, download source files and to copy them from PC to the SD_Card.
-It works with all SD\_CARD memories from 64MB to 64GB. The cycle of read/write a byte is below 1 us @ 16 MHz.
+Fast and well-made "interpret/compile" operating system for MSP430, very interesting because of its 5kB size.
+This includes a kernel FORTH, an amazing assembler with conditional compilation, conditional jumps without labels, a 16-input search engine which speeds up the interpreter by 4, and a connection to the serial terminal, with software (XON/XOFF) and/or hardware (RTS) control flow, up to 6 Mbds.
+Don't panic, Forth is used not (only) as programming language but rather like a superstructure for the embedded assembler.
+If your goal is to program a MSP430FRxxxx in assembler or just to learn assembler, enjoy yourself: try it!
+However, if the IDE works well with Windows 10, it works less well with Linux due to the lack of a good alternative to TERATERM...
+
+For only 3 kbytes in addition, you have the primitives to access the SD\_CARD FAT16 and FAT32: read, write, del, download source files and to copy them from PC to the SD_Card. It works with all SD\_CARD memories from 64MB to 64GB. The cycle of read/write a byte is below 1 us @ 16 MHz.
This enables to make a fast data logger with a small footprint as a MSP430FR5738 QFN24.
-With all kernel options, including extended_ASM and SD_Card driver, FastForth size is below 10.5 kB.
+With all kernel addons, including extended_ASM and SD_Card driver, FastForth size is 10 kB.
The files launchpad_xMHz.txt are the executables ready to use with a PL2303HXD cable and
a serial terminal (TERATERM.exe) at 115200Bds with XON/XOFF, or RTS hardware flow control
RX <--- TX
TX ---> RX
GND <--> GND
- RTS ---> CTS (not necessary if software XON/XOFF flow control
- see in your launchpad.asm to find RTS pin).
-
+ RTS ---> CTS see in your launchpad.asm file to find RTS pin.
+ (not necessary if software XON/XOFF flow control)
+
The interest of XON/XOFF flow control is to allow 3.75kV galvanic isolation of terminal input
with SOIC8 Si8622EC|ISO7421E, or better yet, powered 5kV galvanic isolation with SOIC16 ISOW7821.
-
- Once the Fast Forth kernel is loaded in the target FRAM memory, you add assembly code or
- FORTH code, or both, by downloading your source files that the embedded FastForth interprets and
- compiles.
+
+ Once FastForth is loaded in the target FRAM memory, you add assembly code or FORTH code, or both,
+ by downloading your source files that the embedded FastForth interprets and compiles.
Beforehand, the preprocessor GEMA, by means of a \config\gema\target.pat file, will have translated
- your generic source file.f in a targeted source file.4th. This allows the embedded assembler to use
- symbolic addresses for all peripheral registers without having to declare them with FORTH words.
+ your generic source file.f in a targeted source file.4th, allowing you to use
+ symbolic addresses for all peripheral registers without having to declare them via FORTH words.
A set of .bat files in \MSP430-FORTH folder is furnished to do all this automatically.
If you want to change the terminal baudrate on the fly (230400 bds up to 6 Mbds),
And that the high limit of FORTH program memory is $FF80.
Finally, using the SCITE editor as IDE, all is ready to do everything from its "tools" menu.
- Once the Forth kernel is programmed, say goodbye to owner's any DLL and FET dongle...
What is new ?
-------------
-V301
+V302
- -584 bytes, Kernel+CondComp+Assembler is under 5.5 kb.
+ -646 bytes
+ Kernel + FIXPOINT input + DOUBLE input + :NONAME + Conditional Compilation + Assembler under 5 kB.
+
+ the FORTH kernel is drastically reduced to 55 strutural words.
+ All others are moved in the \ADDON\ANS_COMPLEMENT.asm file,
+ the conditionnal compilation with the assembler allowing to reuse them on request.
+ Fixed: QNUMBER,
+ ACCEPT (XON/XOFF TERMINAL with MSP430FR2xxx).
+ Modified: [ELSE].
+
+ FF_SPECS.f displays FastForth environment.
+
+V301
+
+ -584 bytes, Kernel + Conditional Compilation + Assembler under 5.5 kb.
+
the FORTH kernel is drastically reduced to 82 words, just what the operating system needs.
All others are moved in the \ADDON\ANS_COMPLEMENT.asm file, the conditionnal compilation
allowing you to use them on request.
-
+
Taking into account the new TI launchpad LP_MSP430FR2476.
Fixed: :NONAME (now aligned), LOAD" (no more crash on error).
By rewriting the defered word SLEEP, we can easily disable the TERMINAL_INPUT interrupt.
See BACKGROUND, START and STOP in \MSP430-FORTH\RC5toLCD.f.
-
-
V300
-4 bytes.
$(FileNameExt) : $(FileDate) \97 $(FileTime) | $(FileAttr)
if PLAT_WIN
- command.scite.help=C:\Program Files\SRWare Iron\iron.exe "C:\Program Files\SciTE\SciTEDoc.html"
+ command.scite.help="https://www.scintilla.org/SciTEDoc.html"
command.scite.help.subsystem=2
if PLAT_GTK
command.print.*=a2ps "$(FileNameExt)"
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 66 DA D0 D0
-2D 01 6B 30 B6 C6 C8 C6
+10 00 08 00 A1 F7 80 3E 05 00 18 00 04 D8 88 CE
+2E 01 6B 30 06 C5 18 C5 D4 CF
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+26 00 29 83 B9 40 6E D0 DA FF FB 23 B2 40 68 C5
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 42 CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 E2 C2 22 02 30 41 B2 40 13 00 0E 05 E2 D2
-22 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 B0 CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-B0 CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D 82 C4 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 C9 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C9 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C5 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C6 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 C4 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC C6 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 C7 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE CA 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 C8 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C8 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 CB 42 CB 80 C8 50 CB
-3D 40 58 CB CC 22 82 3E 5A CB 0A 4E 3E 4F 3D 40
-70 CB 23 27 3D 40 4A CB 1A E2 BE 21 A1 27 B5 23
-72 CB 3E 4F 3D 40 4A CB B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CE CB 3F D2 CA
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 E2 C2 22 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 E2 D2 22 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 70 CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 F8 C9 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 F8 C9 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 C9 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C9 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C4
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C9
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 C4 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C7 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C4 70 CA F2 C7 80 CA
+3D 40 88 CA E2 22 A4 26 8A CA 0A 4E 3E 4F 3D 40
+A0 CA 39 27 3D 40 7A CA 1A E2 BE 21 BD 23 AC 27
+A2 CA 3E 4F 3D 40 7A CA BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CD D2 3F D0 C5
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C4 46 CB AE CB B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 C5 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A C4
-04 C8 8C C7 42 CB 82 C7 46 CB A4 C4 0C C5 1E C8
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CC
-14 C8 30 FF A0 CA 26 C5 1E C8 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CC 3C C6 E0 CB C2 CA 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E CC 86 41 42 4F
-52 54 22 00 87 12 38 C8 14 C8 40 CC B0 CA 2A C4
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 D1
-B0 12 B6 C6 92 C3 1C 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 D1 14 C8 DE 21 EA C4 AC C7 1E C8 04 1B 5B 37
-6D 00 D6 C7 58 C4 40 C6 9A CC 04 C8 1E C8 05 6C
-69 6E 65 3A D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B
-5B 30 6D 00 D6 C7 24 CC 00 00 83 5B 27 5D 87 12
-C0 CC 14 C8 14 C8 B0 CA B0 CA 2A C4 E8 C8 01 27
-87 12 42 CB 80 C8 EE C8 40 C6 CE CC 2A C4 7A CB
-32 C5 81 5C 92 42 C0 21 C4 21 30 4D AA CC 81 5B
-82 43 BE 21 30 4D D2 CC 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A CA 82 49 53 00 87 12
-BE CB EA C4 40 C6 12 CD AE CC 14 C8 F0 CC B0 CA
-2A C4 C0 CC F0 CC 2A C4 FA CC 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 CB 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 CB
-80 C8 EE C8 58 C4 40 C6 CE CC 0C C5 40 C6 5C CD
-14 C8 14 C8 B0 CA B0 CA 14 C8 B0 CA B0 CA 2A C4
-DE CC 81 3B 82 93 BE 21 B5 27 87 12 14 C8 2A C4
-B0 CA FA CD E0 CC 2A C4 62 CD 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CD 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A CD 01 3A 30 12 A0 CD 92 B3 C6 21 A2 63 C6 21
-87 12 42 CB 80 C8 C8 CD 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C8 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CC 90 CB 05 44 45 46 45 52
-B0 12 B8 CD BA 40 30 40 FC FF BA 40 AE CD FE FF
-E3 3F 1E CB 06 43 52 45 41 54 45 00 B0 12 B8 CD
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CE 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C9 05 3E 42 4F 44 59 2E 52
-30 4D 44 CE 04 43 4F 44 45 00 B0 12 B8 CD A2 82
-C6 21 87 12 D2 D0 AC D0 2A C4 84 CE 07 43 4F 44
-45 4E 4E 4D B0 12 86 CD F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 D0 FA CD 2A C4 2C CC 03 41
-53 4D B2 40 B0 D0 DA 21 E0 3F AC CE 06 45 4E 44
-41 53 4D 00 87 12 B4 CE F4 D0 2A C4 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 D0 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A C4
-02 00 A2 52 C6 21 ED 3F 1A CD 85 48 49 32 4C 4F
-87 12 A0 CA 4A CF B0 CA E0 CC D2 D0 AC D0 2A C4
-1A CF 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 C6 00 00 2E 53 30 4D 5E CE
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C C6 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C7
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C CE 85 42 45 47 49 4E 30 40 A0 CA 70 CF 85 55
-4E 54 49 4C 39 40 40 C6 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CE 85 41
-47 41 49 4E 39 40 3C C6 EF 3F 7A C8 85 57 48 49
-4C 45 87 12 36 CF 76 C4 2A C4 34 C8 86 52 45 50
-45 41 54 00 87 12 B4 CF 76 CF 2A C4 50 CF 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 C6 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 CA 84 4C 4F 4F 50 00 39 40 76 C6
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50
-39 40 64 C6 E5 3F 06 D0 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C8
-CA 21 F2 C4 2A C4 84 12 7E D0 AE CF 4C D3 DE CF
-BE CC 32 CF 3A D0 60 D4 64 C8 66 D1 80 D1 8E CF
-00 D2 00 00 32 D4 E8 CC 78 CE 00 00 84 12 7E D0
-7E D9 E0 D9 32 D9 54 DA F8 D8 00 00 28 D6 00 00
-EE D8 9E D9 50 D9 8E D9 38 D7 00 00 00 00 30 DA
-AA D0 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 D0 EE D0
-F4 D0 04 D1 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CD 09 50 57 52 5F 53 54 41
-54 45 84 12 FC D0 D0 D0 66 DA CC CF 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 D1 92 42 0C 18
-48 D1 EF 3F 38 D1 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 D1 92 42 C6 21 48 D1 30 4D 4C D1
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC CF 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C6
-DE C6 B2 40 0A D2 08 D2 B2 40 D0 D0 0E 18 B2 40
-66 DA 0C 18 30 12 56 D1 B2 40 86 C7 84 C7 B2 40
-08 C8 06 C8 B2 40 98 C6 96 C6 B2 40 18 00 0A 18
-37 40 1A C4 36 40 92 C4 35 40 0E C4 34 40 00 C4
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A D1
-04 57 41 52 4D 00 30 40 0A D2 3D 40 40 D2 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E C8 06 0D 1B 5B 37 6D 23 00 D6 C7 34 C6 1E C8
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 C7 14 C8 30 FF
-A0 CA B8 C4 24 C6 1E C8 0A 62 79 74 65 73 20 66
-72 65 65 00 3C C6 9A CC 82 CF 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 D2 B2 40
-88 5A CC 01 B2 43 02 02 B2 D3 06 02 D2 43 24 02
-F2 D3 26 02 F2 40 FD 00 22 02 E2 D2 24 02 F2 40
-A5 00 A1 01 F2 40 10 00 A0 01 D2 43 A1 01 B2 40
-00 A5 60 01 B2 40 29 01 80 01 B2 40 0B 00 82 01
-B2 40 E9 01 84 01 39 40 00 01 B2 D0 10 00 86 01
-92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23 19 83
-FA 23 39 40 00 10 29 83 89 43 00 20 FC 23 39 40
-26 00 29 83 B9 40 9E D2 DA FF FB 23 B2 40 26 C7
-E4 FF B2 40 81 00 00 05 92 42 02 18 06 05 92 42
-04 18 08 05 92 C3 00 05 92 D3 1A 05 3F 40 80 20
-31 40 E0 20 30 12 06 D2 48 3F 8A D2 07 43 4F 4D
-50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C
-0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF
-F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 CD 86 5B
-54 48 45 4E 5D 00 30 4D 7E D3 86 5B 45 4C 53 45
-5D 00 87 12 14 C8 00 00 C6 C4 42 CB 80 C8 24 CB
-34 C4 40 C6 F4 D3 44 C4 1E C8 06 5B 54 48 45 4E
-5D 00 54 D3 4A C6 C4 D3 F8 C7 D0 C4 58 C4 4A C6
-9A D3 2A C4 44 C4 1E C8 06 5B 45 4C 53 45 5D 00
-54 D3 4A C6 E2 D3 F8 C7 D0 C4 58 C4 4A C6 98 D3
-2A C4 1E C8 04 5B 49 46 5D 00 54 D3 4A C6 9A D3
-3C C6 98 D3 F8 C7 1E C8 05 0D 0A 6B 6F 20 D6 C7
-8C C7 32 CB 3C C6 9A D3 8A D3 84 5B 49 46 5D 00
-0E 93 3E 4F BE 27 30 4D 0A D4 89 5B 44 45 46 49
-4E 45 44 5D 87 12 42 CB 80 C8 EE C8 6A C4 2A C4
-1A D4 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 87 12
-42 CB 80 C8 EE C8 6A C4 00 C5 2A C4 4E D4 3D 41
-B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 D1 48 D0
-06 4D 41 52 4B 45 52 00 B0 12 B8 CD BA 40 84 12
-FC FF BA 40 4C D4 FE FF 9A 42 C8 21 00 00 28 83
-8A 48 02 00 A2 52 C6 21 30 40 00 CE 1C 15 B0 12
-2A C4 80 C8 EE C8 4A C6 A2 D4 AA C9 40 C6 CE CC
-BC D4 A4 D4 39 4E 39 80 86 12 08 24 19 53 02 20
-2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41
-3E 40 28 00 B0 12 8C D4 19 42 C6 21 A2 53 C6 21
-89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53
-C4 21 B0 12 2A C4 80 C8 AA C9 40 C6 FA D4 F0 D4
-21 53 3E 90 10 00 7D 2D E1 2B FC D4 B2 41 C4 21
-DD 3F 87 12 42 CB 74 C8 0A D5 0C 43 1B 42 C6 21
-A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20 92 53
-C4 21 B0 12 8C D4 3C 40 00 03 0E 93 1C 24 3C 40
-10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40
-20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40
-30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21 A2 53
-C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00
-07 20 3C 40 10 02 92 53 C4 21 B0 12 8C D4 ED 3F
-7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21 B0 12
-D8 D4 0C 20 3C 50 10 00 3E 40 2B 00 B0 12 D8 D4
-92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E
-DA 3F B0 12 D8 D4 FA 23 3C 50 10 00 B0 12 C0 D4
-EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 87 12 42 CB
-74 C8 D4 D5 FE 90 26 00 00 00 3E 40 20 00 03 20
-3C 50 82 00 C8 3F B0 12 D8 D4 E1 23 3C 50 80 00
-B0 12 C0 D4 DC 3F D6 C6 04 52 45 54 49 00 87 12
-14 C8 00 13 B0 CA 2A C4 14 C8 2C 00 02 D5 CC D5
-12 D6 09 4B 2E 4E 0E DC A4 3F FC CE 03 4D 4F 56
-84 12 08 D6 00 40 1C D6 05 4D 4F 56 2E 42 84 12
-08 D6 40 40 00 00 03 41 44 44 84 12 08 D6 00 50
-36 D6 05 41 44 44 2E 42 84 12 08 D6 40 50 42 D6
-04 41 44 44 43 00 84 12 08 D6 00 60 50 D6 06 41
-44 44 43 2E 42 00 84 12 08 D6 40 60 F8 D5 04 53
-55 42 43 00 84 12 08 D6 00 70 6E D6 06 53 55 42
-43 2E 42 00 84 12 08 D6 40 70 7C D6 03 53 55 42
-84 12 08 D6 00 80 8C D6 05 53 55 42 2E 42 84 12
-08 D6 40 80 DE CE 03 43 4D 50 84 12 08 D6 00 90
-A6 D6 05 43 4D 50 2E 42 84 12 08 D6 40 90 CC CE
-04 44 41 44 44 00 84 12 08 D6 00 A0 C0 D6 06 44
-41 44 44 2E 42 00 84 12 08 D6 40 A0 B2 D6 03 42
-49 54 84 12 08 D6 00 B0 DE D6 05 42 49 54 2E 42
-84 12 08 D6 40 B0 EA D6 03 42 49 43 84 12 08 D6
-00 C0 F8 D6 05 42 49 43 2E 42 84 12 08 D6 40 C0
-04 D7 03 42 49 53 84 12 08 D6 00 D0 12 D7 05 42
-49 53 2E 42 84 12 08 D6 40 D0 00 00 03 58 4F 52
-84 12 08 D6 00 E0 2C D7 05 58 4F 52 2E 42 84 12
-08 D6 40 E0 5E D6 03 41 4E 44 84 12 08 D6 00 F0
-46 D7 05 41 4E 44 2E 42 84 12 08 D6 40 F0 42 CB
-02 D5 64 D7 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
-0C DA 4F 3F 98 D6 03 52 52 43 84 12 5E D7 00 10
-76 D7 05 52 52 43 2E 42 84 12 5E D7 40 10 82 D7
-04 53 57 50 42 00 84 12 5E D7 80 10 90 D7 03 52
-52 41 84 12 5E D7 00 11 9E D7 05 52 52 41 2E 42
-84 12 5E D7 40 11 AA D7 03 53 58 54 84 12 5E D7
-80 11 00 00 04 50 55 53 48 00 84 12 5E D7 00 12
-C4 D7 06 50 55 53 48 2E 42 00 84 12 5E D7 40 12
-1E D7 04 43 41 4C 4C 00 84 12 5E D7 80 12 1A 53
-0E 4A 87 12 34 C6 1E C8 0D 6F 75 74 20 6F 66 20
-62 6F 75 6E 64 73 4C CC 42 CB 74 C8 0E D8 92 53
-C4 21 3E 40 2C 00 B0 12 2A C4 80 C8 AA C9 40 C6
-CE CC C2 D5 26 D8 0A 4E 3E 4F 1A 83 E0 33 29 4E
-59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
-10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
-8F 3F B8 D7 04 52 52 43 4D 00 84 12 08 D8 50 00
-54 D8 04 52 52 41 4D 00 84 12 08 D8 50 01 62 D8
-04 52 4C 41 4D 00 84 12 08 D8 50 02 70 D8 04 52
-52 55 4D 00 84 12 08 D8 50 03 D2 D7 05 50 55 53
-48 4D 84 12 08 D8 00 15 8C D8 04 50 4F 50 4D 00
-84 12 08 D8 00 17 7E D8 03 53 3E 3D 85 12 00 38
-A8 D8 02 53 3C 00 85 12 00 34 9A D8 03 30 3E 3D
-85 12 00 30 BC D8 02 30 3C 00 85 12 00 30 00 00
-02 55 3C 00 85 12 00 2C D0 D8 03 55 3E 3D 85 12
-00 28 C6 D8 03 30 3C 3E 85 12 00 24 E4 D8 02 30
-3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
-8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D DA D8 04 54
-48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
-0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
-CE D6 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
-00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F 0E D9
-05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
-2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
-08 DA 89 48 00 00 A2 53 C6 21 30 4D 52 D7 05 41
-47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
-48 49 4C 45 87 12 FC D8 76 C4 2A C4 B2 D8 06 52
-45 50 45 41 54 00 87 12 84 D9 14 D9 2A C4 B0 D9
-3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F 98 42
-C6 21 00 00 30 4D E2 D7 03 42 57 31 84 12 AE D9
-00 00 C8 D9 03 42 57 32 84 12 AE D9 00 00 D4 D9
-03 42 57 33 84 12 AE D9 00 00 EC D9 3D 41 1A 42
-C6 21 28 4E B2 92 C4 21 90 2B BA 4F 00 00 A2 53
-C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
-84 12 EA D9 00 00 0C DA 03 46 57 32 84 12 EA D9
-00 00 18 DA 03 46 57 33 84 12 EA D9 00 00 00 00
-05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04
-3E B0 00 10 02 24 3E E0 00 08 87 12 C0 CC DA CA
-2A C4 24 DA 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
-3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 CA DC CA B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E C6 D4 C4
+70 CA C4 C5 74 CA 8C C6 BC C6 2E C4 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E CB 24 C4 40 FF
+2A CE C4 C6 2E C4 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E CB 48 C4 0C CB 0A CA 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A CB 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C7 24 C4 6E CB F8 C9 26 C7 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CF B0 12
+06 C5 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 CF 24 C4 DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37
+6D 00 00 C6 7C C6 4C C4 C8 CB 2E C6 2E C4 05 6C
+69 6E 65 3A 00 C6 66 C7 00 C6 2E C4 04 1B 5B 30
+6D 00 00 C6 50 CB 00 00 83 5B 27 5D 0D 12 87 12
+F0 CB 24 C4 24 C4 F8 C9 F8 C9 26 C7 44 C8 01 27
+0D 12 87 12 70 CA F2 C7 4A C8 4C C4 00 CC 26 C7
+AA CA D2 C6 81 5C 92 42 C0 21 C4 21 30 4D D8 CB
+81 5B 82 43 BE 21 30 4D 04 CC 01 5D B2 43 BE 21
+30 4D F2 CA 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 CA F2 C7 4A C8 7C C6 4C C4 00 CC BC C6
+4C C4 50 CC 24 C4 24 C4 F8 C9 F8 C9 24 C4 F8 C9
+F8 C9 26 C7 40 C7 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 CC 01 3A
+30 12 B8 CC 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 CA F2 C7 86 CC 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E CC 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CC 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C4
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A CB CC CC 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 C4 26 C7 F8 C9 F2 CC 12 CC 26 C7 5C CA 06 43
+52 45 41 54 45 00 B0 12 74 CC BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 CA 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CD 04 43 4F 44 45 00 B0 12 74 CC A2 82 C6 21
+0D 12 87 12 8A CE 64 CE 26 C7 72 CD 07 43 4F 44
+45 4E 4E 4D 30 12 7C CD 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CC A4 CE 26 C7 58 CB
+03 41 53 4D B2 40 68 CE DA 21 DE 3F 9C CD 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CD C2 CE 26 C7
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 CE 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 CC 85 48 49 32 4C 4F 0D 12
+87 12 2A CE 1E CE F8 C9 12 CC 80 CD 26 C7 2E 53
+30 4D 8C CD 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 C4 CA 21 AE C6 26 C7 84 12
+36 CE B0 CD 5C D0 58 CD EE CB 08 CE 42 C6 20 CA
+D8 C7 34 CF 4E CF 62 C7 CE CF 00 00 E4 D1 1A CC
+AA C8 00 00 84 12 36 CE 16 D7 7C D7 CA D6 CC D7
+90 D6 00 00 C0 D3 00 00 86 D6 38 D7 E8 D6 26 D7
+D0 D4 00 00 00 00 E8 D7 62 CE 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E CE BC CE C2 CE
+D2 CE 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CC 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CE 88 CE 04 D8 A6 C7 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CF 92 42 0C 18 16 CF
+EF 3F 06 CF 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 CF 92 42 C6 21 16 CF 30 4D 1A CF 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC C7 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C4 02 C4
+B2 40 D8 CF D6 CF B2 40 88 CE 0E 18 B2 40 04 D8
+0C 18 30 12 24 CF B2 40 C8 C5 C6 C5 B2 40 32 C6
+30 C6 B2 40 4A C6 48 C6 B2 40 18 00 0A 18 37 40
+26 C7 36 40 9C C6 35 40 FA C4 34 40 EC C4 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 CF 04 57
+41 52 4D 00 30 40 D8 CF 3D 40 12 D0 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E C4 07 0D 0A 1B 5B 37 6D 23 00 C6 9C C7
+2E C4 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 C6 24 C4
+40 FF 2A CE A6 C6 66 C7 2E C4 0A 62 79 74 65 73
+20 66 72 65 65 00 48 C4 C8 CB 24 CE 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 43 02 02 B2 D3 06 02
+D2 43 24 02 F2 D3 26 02 F2 40 FD 00 22 02 E2 D2
+24 02 F2 40 A5 00 A1 01 F2 40 10 00 A0 01 D2 43
+A1 01 B2 40 00 A5 60 01 B2 40 29 01 80 01 B2 40
+0B 00 82 01 B2 40 E9 01 84 01 39 40 00 01 B2 D0
+10 00 86 01 92 D2 5E 01 08 18 38 40 59 14 18 83
+FE 23 19 83 FA 23 39 40 00 10 29 83 89 43 00 20
+FC 23 B0 12 0E C4 B2 40 81 00 00 05 92 42 02 18
+06 05 92 42 04 18 08 05 92 C3 00 05 3F 40 80 20
+30 12 D4 CF 51 3F 24 CD 86 5B 54 48 45 4E 5D 00
+30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24
+1B 83 06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27
+2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53
+2D 53 F7 3F 08 D1 86 5B 45 4C 53 45 5D 00 0D 12
+87 12 24 C4 00 00 AA C6 70 CA F2 C7 62 CA 68 C6
+4C C4 A0 D1 70 C6 2E C4 06 5B 54 48 45 4E 5D 00
+12 D1 7A D1 36 D1 58 D1 26 C7 70 C6 2E C4 06 5B
+45 4C 53 45 5D 00 12 D1 90 D1 36 D1 56 D1 26 C7
+2E C4 04 5B 49 46 5D 00 12 D1 58 D1 48 C4 56 D1
+22 C6 2E C4 05 0D 0A 6B 6F 20 00 C6 D4 C4 C4 C4
+48 C4 58 D1 46 D1 84 5B 49 46 5D 00 0E 93 3E 4F
+C6 27 30 4D 2F 53 30 4D B6 D1 89 5B 44 45 46 49
+4E 45 44 5D 0D 12 87 12 70 CA F2 C7 4A C8 C4 D1
+26 C7 CA D1 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
+0D 12 87 12 D4 D1 F8 D1 3D 41 30 40 B6 C6 38 40
+C0 21 0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E
+03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21
+30 4D 1C 15 87 12 F2 C7 4A C8 42 C4 36 D2 06 C9
+4C C4 00 CC 50 D2 38 D2 39 4E 39 80 86 12 08 24
+19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
+1B 17 30 41 3E 40 28 00 B0 12 22 D2 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12
+C4 21 92 53 C4 21 87 12 F2 C7 06 C9 4C C4 8C D2
+82 D2 21 53 3E 90 10 00 80 2D E2 2B 8E D2 B2 41
+C4 21 DE 3F 0D 12 87 12 70 CA FE D1 9E D2 0C 43
+1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00
+27 20 92 53 C4 21 B0 12 22 D2 3C 40 00 03 0E 93
+1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
+14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
+0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
+C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D
+7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12
+22 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
+C4 21 B0 12 6C D2 0C 20 3C 50 10 00 3E 40 2B 00
+B0 12 6C D2 92 92 C0 21 C4 21 02 24 92 53 C4 21
+8E 10 0C 5E DA 3F B0 12 6C D2 FA 23 3C 50 10 00
+B0 12 54 D2 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21
+0D 12 87 12 70 CA FE D1 6A D3 FE 90 26 00 00 00
+3E 40 20 00 03 20 3C 50 82 00 C7 3F B0 12 6C D2
+E0 23 3C 50 80 00 B0 12 54 D2 DB 3F 00 00 04 52
+45 54 49 00 0D 12 87 12 24 C4 00 13 F8 C9 26 C7
+24 C4 2C 00 94 D2 60 D3 AA D3 09 4B 2E 4E 0E DC
+A2 3F F6 CD 03 4D 4F 56 84 12 A0 D3 00 40 B4 D3
+05 4D 4F 56 2E 42 84 12 A0 D3 40 40 00 00 03 41
+44 44 84 12 A0 D3 00 50 CE D3 05 41 44 44 2E 42
+84 12 A0 D3 40 50 DA D3 04 41 44 44 43 00 84 12
+A0 D3 00 60 E8 D3 06 41 44 44 43 2E 42 00 84 12
+A0 D3 40 60 8E D3 04 53 55 42 43 00 84 12 A0 D3
+00 70 06 D4 06 53 55 42 43 2E 42 00 84 12 A0 D3
+40 70 14 D4 03 53 55 42 84 12 A0 D3 00 80 24 D4
+05 53 55 42 2E 42 84 12 A0 D3 40 80 D2 CD 03 43
+4D 50 84 12 A0 D3 00 90 3E D4 05 43 4D 50 2E 42
+84 12 A0 D3 40 90 BE CD 04 44 41 44 44 00 84 12
+A0 D3 00 A0 58 D4 06 44 41 44 44 2E 42 00 84 12
+A0 D3 40 A0 4A D4 03 42 49 54 84 12 A0 D3 00 B0
+76 D4 05 42 49 54 2E 42 84 12 A0 D3 40 B0 82 D4
+03 42 49 43 84 12 A0 D3 00 C0 90 D4 05 42 49 43
+2E 42 84 12 A0 D3 40 C0 9C D4 03 42 49 53 84 12
+A0 D3 00 D0 AA D4 05 42 49 53 2E 42 84 12 A0 D3
+40 D0 00 00 03 58 4F 52 84 12 A0 D3 00 E0 C4 D4
+05 58 4F 52 2E 42 84 12 A0 D3 40 E0 F6 D3 03 41
+4E 44 84 12 A0 D3 00 F0 DE D4 05 41 4E 44 2E 42
+84 12 A0 D3 40 F0 70 CA 94 D2 FC D4 0A 4C 3C F0
+70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 30 D4 03 52
+52 43 84 12 F6 D4 00 10 0E D5 05 52 52 43 2E 42
+84 12 F6 D4 40 10 1A D5 04 53 57 50 42 00 84 12
+F6 D4 80 10 28 D5 03 52 52 41 84 12 F6 D4 00 11
+36 D5 05 52 52 41 2E 42 84 12 F6 D4 40 11 42 D5
+03 53 58 54 84 12 F6 D4 80 11 00 00 04 50 55 53
+48 00 84 12 F6 D4 00 12 5C D5 06 50 55 53 48 2E
+42 00 84 12 F6 D4 40 12 B6 D4 04 43 41 4C 4C 00
+84 12 F6 D4 80 12 1A 53 0E 4A 0D 12 87 12 9C C7
+2E C4 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
+7A CB 70 CA FE D1 A8 D5 92 53 C4 21 3E 40 2C 00
+87 12 F2 C7 06 C9 4C C4 00 CC 56 D3 BE D5 0A 4E
+3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
+01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
+2A 92 D1 2F 8A 10 5A 06 8F 3F 50 D5 04 52 52 43
+4D 00 84 12 A2 D5 50 00 EC D5 04 52 52 41 4D 00
+84 12 A2 D5 50 01 FA D5 04 52 4C 41 4D 00 84 12
+A2 D5 50 02 08 D6 04 52 52 55 4D 00 84 12 A2 D5
+50 03 6A D5 05 50 55 53 48 4D 84 12 A2 D5 00 15
+24 D6 04 50 4F 50 4D 00 84 12 A2 D5 00 17 16 D6
+03 53 3E 3D 85 12 00 38 40 D6 02 53 3C 00 85 12
+00 34 32 D6 03 30 3E 3D 85 12 00 30 54 D6 02 30
+3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
+68 D6 03 55 3E 3D 85 12 00 28 5E D6 03 30 3C 3E
+85 12 00 24 7C D6 02 30 3D 00 85 12 00 20 00 00
+02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+0E 4A 30 4D 72 D6 04 54 48 45 4E 00 1A 42 C6 21
+08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
+63 2F 88 DA 00 00 30 4D 66 D4 04 45 4C 53 45 00
+1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
+8F 4A 00 00 E3 3F A6 D6 05 55 4E 54 49 4C 3A 4F
+08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
+00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
+C6 21 30 4D EA D4 05 41 47 41 49 4E 0A 4E 38 40
+00 3C E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12
+94 D6 82 C6 26 C7 4A D6 06 52 45 50 45 41 54 00
+0D 12 87 12 1C D7 AC D6 26 C7 4C D7 3D 41 08 4E
+3E 4F 2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00
+30 4D 7A D5 03 42 57 31 84 12 4A D7 00 00 64 D7
+03 42 57 32 84 12 4A D7 00 00 70 D7 03 42 57 33
+84 12 4A D7 00 00 88 D7 3D 41 1A 42 C6 21 28 4E
+B2 92 C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A
+00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 86 D7
+00 00 A8 D7 03 46 57 32 84 12 86 D7 00 00 B4 D7
+03 46 57 33 84 12 86 D7 00 00 C0 D7 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12
+F0 CB 18 CA 26 C7 00 00 05 3F 47 4F 54 4F 3E 90
+00 30 F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0
+00 08 EC 3F
@FFFE
-9E D2
+6E D0
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 54 DA D0 D0
-2D 01 6B 30 B6 C6 C8 C6
+10 00 08 00 00 D6 E8 03 05 00 18 00 F2 D7 88 CE
+2E 01 6B 30 06 C5 18 C5 D4 CF
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+26 00 29 83 B9 40 6E D0 DA FF FB 23 B2 40 68 C5
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 42 CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 E2 C2 22 02 30 41 B2 40 13 00 0E 05 E2 D2
-22 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 B0 CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-B0 CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D 82 C4 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 C9 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C9 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C5 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C6 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 C4 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC C6 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 C7 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE CA 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 C8 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C8 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 CB 42 CB 80 C8 50 CB
-3D 40 58 CB CC 22 82 3E 5A CB 0A 4E 3E 4F 3D 40
-70 CB 23 27 3D 40 4A CB 1A E2 BE 21 A1 27 B5 23
-72 CB 3E 4F 3D 40 4A CB B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CE CB 3F D2 CA
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 E2 C2 22 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 E2 D2 22 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 70 CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 F8 C9 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 F8 C9 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 C9 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C9 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C4
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C9
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 C4 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C7 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C4 70 CA F2 C7 80 CA
+3D 40 88 CA E2 22 A4 26 8A CA 0A 4E 3E 4F 3D 40
+A0 CA 39 27 3D 40 7A CA 1A E2 BE 21 BD 23 AC 27
+A2 CA 3E 4F 3D 40 7A CA BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CD D2 3F D0 C5
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C4 46 CB AE CB B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 C5 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A C4
-04 C8 8C C7 42 CB 82 C7 46 CB A4 C4 0C C5 1E C8
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CC
-14 C8 30 FF A0 CA 26 C5 1E C8 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CC 3C C6 E0 CB C2 CA 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E CC 86 41 42 4F
-52 54 22 00 87 12 38 C8 14 C8 40 CC B0 CA 2A C4
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 D1
-B0 12 B6 C6 92 C3 1C 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 D1 14 C8 DE 21 EA C4 AC C7 1E C8 04 1B 5B 37
-6D 00 D6 C7 58 C4 40 C6 9A CC 04 C8 1E C8 05 6C
-69 6E 65 3A D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B
-5B 30 6D 00 D6 C7 24 CC 00 00 83 5B 27 5D 87 12
-C0 CC 14 C8 14 C8 B0 CA B0 CA 2A C4 E8 C8 01 27
-87 12 42 CB 80 C8 EE C8 40 C6 CE CC 2A C4 7A CB
-32 C5 81 5C 92 42 C0 21 C4 21 30 4D AA CC 81 5B
-82 43 BE 21 30 4D D2 CC 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A CA 82 49 53 00 87 12
-BE CB EA C4 40 C6 12 CD AE CC 14 C8 F0 CC B0 CA
-2A C4 C0 CC F0 CC 2A C4 FA CC 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 CB 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 CB
-80 C8 EE C8 58 C4 40 C6 CE CC 0C C5 40 C6 5C CD
-14 C8 14 C8 B0 CA B0 CA 14 C8 B0 CA B0 CA 2A C4
-DE CC 81 3B 82 93 BE 21 B5 27 87 12 14 C8 2A C4
-B0 CA FA CD E0 CC 2A C4 62 CD 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CD 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A CD 01 3A 30 12 A0 CD 92 B3 C6 21 A2 63 C6 21
-87 12 42 CB 80 C8 C8 CD 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C8 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CC 90 CB 05 44 45 46 45 52
-B0 12 B8 CD BA 40 30 40 FC FF BA 40 AE CD FE FF
-E3 3F 1E CB 06 43 52 45 41 54 45 00 B0 12 B8 CD
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CE 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C9 05 3E 42 4F 44 59 2E 52
-30 4D 44 CE 04 43 4F 44 45 00 B0 12 B8 CD A2 82
-C6 21 87 12 D2 D0 AC D0 2A C4 84 CE 07 43 4F 44
-45 4E 4E 4D B0 12 86 CD F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 D0 FA CD 2A C4 2C CC 03 41
-53 4D B2 40 B0 D0 DA 21 E0 3F AC CE 06 45 4E 44
-41 53 4D 00 87 12 B4 CE F4 D0 2A C4 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 D0 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A C4
-02 00 A2 52 C6 21 ED 3F 1A CD 85 48 49 32 4C 4F
-87 12 A0 CA 4A CF B0 CA E0 CC D2 D0 AC D0 2A C4
-1A CF 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 C6 00 00 2E 53 30 4D 5E CE
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C C6 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C7
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C CE 85 42 45 47 49 4E 30 40 A0 CA 70 CF 85 55
-4E 54 49 4C 39 40 40 C6 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CE 85 41
-47 41 49 4E 39 40 3C C6 EF 3F 7A C8 85 57 48 49
-4C 45 87 12 36 CF 76 C4 2A C4 34 C8 86 52 45 50
-45 41 54 00 87 12 B4 CF 76 CF 2A C4 50 CF 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 C6 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 CA 84 4C 4F 4F 50 00 39 40 76 C6
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50
-39 40 64 C6 E5 3F 06 D0 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C8
-CA 21 F2 C4 2A C4 84 12 7E D0 AE CF 3A D3 DE CF
-BE CC 32 CF 3A D0 4E D4 64 C8 66 D1 80 D1 8E CF
-00 D2 00 00 20 D4 E8 CC 78 CE 00 00 84 12 7E D0
-6C D9 CE D9 20 D9 42 DA E6 D8 00 00 16 D6 00 00
-DC D8 8C D9 3E D9 7C D9 26 D7 00 00 00 00 1E DA
-AA D0 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 D0 EE D0
-F4 D0 04 D1 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CD 09 50 57 52 5F 53 54 41
-54 45 84 12 FC D0 D0 D0 54 DA CC CF 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 D1 92 42 0C 18
-48 D1 EF 3F 38 D1 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 D1 92 42 C6 21 48 D1 30 4D 4C D1
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC CF 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C6
-DE C6 B2 40 0A D2 08 D2 B2 40 D0 D0 0E 18 B2 40
-54 DA 0C 18 30 12 56 D1 B2 40 86 C7 84 C7 B2 40
-08 C8 06 C8 B2 40 98 C6 96 C6 B2 40 18 00 0A 18
-37 40 1A C4 36 40 92 C4 35 40 0E C4 34 40 00 C4
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A D1
-04 57 41 52 4D 00 30 40 0A D2 3D 40 40 D2 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E C8 06 0D 1B 5B 37 6D 23 00 D6 C7 34 C6 1E C8
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 C7 14 C8 30 FF
-A0 CA B8 C4 24 C6 1E C8 0A 62 79 74 65 73 20 66
-72 65 65 00 3C C6 9A CC 82 CF 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 D2 B2 40
-88 5A CC 01 B2 43 02 02 B2 D3 06 02 D2 43 24 02
-F2 D3 26 02 F2 40 FD 00 22 02 E2 D2 24 02 B2 40
-00 A5 60 01 B2 40 B4 00 80 01 92 43 82 01 B2 40
-1E 00 84 01 39 40 10 00 B2 D0 10 00 86 01 92 D2
-5E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
-39 40 00 10 29 83 89 43 00 20 FC 23 39 40 26 00
-29 83 B9 40 9E D2 DA FF FB 23 B2 40 26 C7 E4 FF
-B2 40 81 00 00 05 92 42 02 18 06 05 92 42 04 18
-08 05 92 C3 00 05 92 D3 1A 05 3F 40 80 20 31 40
-E0 20 30 12 06 D2 51 3F 8A D2 07 43 4F 4D 50 41
-52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24
-1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF F5 27
-02 2C 3E 43 30 4D 1E 43 30 4D B2 CD 86 5B 54 48
-45 4E 5D 00 30 4D 6C D3 86 5B 45 4C 53 45 5D 00
-87 12 14 C8 00 00 C6 C4 42 CB 80 C8 24 CB 34 C4
-40 C6 E2 D3 44 C4 1E C8 06 5B 54 48 45 4E 5D 00
-42 D3 4A C6 B2 D3 F8 C7 D0 C4 58 C4 4A C6 88 D3
-2A C4 44 C4 1E C8 06 5B 45 4C 53 45 5D 00 42 D3
-4A C6 D0 D3 F8 C7 D0 C4 58 C4 4A C6 86 D3 2A C4
-1E C8 04 5B 49 46 5D 00 42 D3 4A C6 88 D3 3C C6
-86 D3 F8 C7 1E C8 05 0D 0A 6B 6F 20 D6 C7 8C C7
-32 CB 3C C6 88 D3 78 D3 84 5B 49 46 5D 00 0E 93
-3E 4F BE 27 30 4D F8 D3 89 5B 44 45 46 49 4E 45
-44 5D 87 12 42 CB 80 C8 EE C8 6A C4 2A C4 08 D4
-8B 5B 55 4E 44 45 46 49 4E 45 44 5D 87 12 42 CB
-80 C8 EE C8 6A C4 00 C5 2A C4 3C D4 3D 41 B2 4E
-0E 18 A2 4E 0C 18 3E 4F 30 40 56 D1 48 D0 06 4D
-41 52 4B 45 52 00 B0 12 B8 CD BA 40 84 12 FC FF
-BA 40 3A D4 FE FF 9A 42 C8 21 00 00 28 83 8A 48
-02 00 A2 52 C6 21 30 40 00 CE 1C 15 B0 12 2A C4
-80 C8 EE C8 4A C6 90 D4 AA C9 40 C6 CE CC AA D4
-92 D4 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
-04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
-28 00 B0 12 7A D4 19 42 C6 21 A2 53 C6 21 89 4E
-00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21
-B0 12 2A C4 80 C8 AA C9 40 C6 E8 D4 DE D4 21 53
-3E 90 10 00 7D 2D E1 2B EA D4 B2 41 C4 21 DD 3F
-87 12 42 CB 74 C8 F8 D4 0C 43 1B 42 C6 21 A2 53
-C6 21 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21
-B0 12 7A D4 3C 40 00 03 0E 93 1C 24 3C 40 10 03
-1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
-2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
-3E 93 08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21
-89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
-3C 40 10 02 92 53 C4 21 B0 12 7A D4 ED 3F 7A 90
-40 00 16 20 3C 40 20 00 92 53 C4 21 B0 12 C6 D4
-0C 20 3C 50 10 00 3E 40 2B 00 B0 12 C6 D4 92 92
-C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F
-B0 12 C6 D4 FA 23 3C 50 10 00 B0 12 AE D4 EF 3F
-0C 43 1B 42 C6 21 A2 53 C6 21 87 12 42 CB 74 C8
-C2 D5 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
-82 00 C8 3F B0 12 C6 D4 E1 23 3C 50 80 00 B0 12
-AE D4 DC 3F D6 C6 04 52 45 54 49 00 87 12 14 C8
-00 13 B0 CA 2A C4 14 C8 2C 00 F0 D4 BA D5 00 D6
-09 4B 2E 4E 0E DC A4 3F FC CE 03 4D 4F 56 84 12
-F6 D5 00 40 0A D6 05 4D 4F 56 2E 42 84 12 F6 D5
-40 40 00 00 03 41 44 44 84 12 F6 D5 00 50 24 D6
-05 41 44 44 2E 42 84 12 F6 D5 40 50 30 D6 04 41
-44 44 43 00 84 12 F6 D5 00 60 3E D6 06 41 44 44
-43 2E 42 00 84 12 F6 D5 40 60 E6 D5 04 53 55 42
-43 00 84 12 F6 D5 00 70 5C D6 06 53 55 42 43 2E
-42 00 84 12 F6 D5 40 70 6A D6 03 53 55 42 84 12
-F6 D5 00 80 7A D6 05 53 55 42 2E 42 84 12 F6 D5
-40 80 DE CE 03 43 4D 50 84 12 F6 D5 00 90 94 D6
-05 43 4D 50 2E 42 84 12 F6 D5 40 90 CC CE 04 44
-41 44 44 00 84 12 F6 D5 00 A0 AE D6 06 44 41 44
-44 2E 42 00 84 12 F6 D5 40 A0 A0 D6 03 42 49 54
-84 12 F6 D5 00 B0 CC D6 05 42 49 54 2E 42 84 12
-F6 D5 40 B0 D8 D6 03 42 49 43 84 12 F6 D5 00 C0
-E6 D6 05 42 49 43 2E 42 84 12 F6 D5 40 C0 F2 D6
-03 42 49 53 84 12 F6 D5 00 D0 00 D7 05 42 49 53
-2E 42 84 12 F6 D5 40 D0 00 00 03 58 4F 52 84 12
-F6 D5 00 E0 1A D7 05 58 4F 52 2E 42 84 12 F6 D5
-40 E0 4C D6 03 41 4E 44 84 12 F6 D5 00 F0 34 D7
-05 41 4E 44 2E 42 84 12 F6 D5 40 F0 42 CB F0 D4
-52 D7 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA
-4F 3F 86 D6 03 52 52 43 84 12 4C D7 00 10 64 D7
-05 52 52 43 2E 42 84 12 4C D7 40 10 70 D7 04 53
-57 50 42 00 84 12 4C D7 80 10 7E D7 03 52 52 41
-84 12 4C D7 00 11 8C D7 05 52 52 41 2E 42 84 12
-4C D7 40 11 98 D7 03 53 58 54 84 12 4C D7 80 11
-00 00 04 50 55 53 48 00 84 12 4C D7 00 12 B2 D7
-06 50 55 53 48 2E 42 00 84 12 4C D7 40 12 0C D7
-04 43 41 4C 4C 00 84 12 4C D7 80 12 1A 53 0E 4A
-87 12 34 C6 1E C8 0D 6F 75 74 20 6F 66 20 62 6F
-75 6E 64 73 4C CC 42 CB 74 C8 FC D7 92 53 C4 21
-3E 40 2C 00 B0 12 2A C4 80 C8 AA C9 40 C6 CE CC
-B0 D5 14 D8 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E
-0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
-D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F
-A6 D7 04 52 52 43 4D 00 84 12 F6 D7 50 00 42 D8
-04 52 52 41 4D 00 84 12 F6 D7 50 01 50 D8 04 52
-4C 41 4D 00 84 12 F6 D7 50 02 5E D8 04 52 52 55
-4D 00 84 12 F6 D7 50 03 C0 D7 05 50 55 53 48 4D
-84 12 F6 D7 00 15 7A D8 04 50 4F 50 4D 00 84 12
-F6 D7 00 17 6C D8 03 53 3E 3D 85 12 00 38 96 D8
-02 53 3C 00 85 12 00 34 88 D8 03 30 3E 3D 85 12
-00 30 AA D8 02 30 3C 00 85 12 00 30 00 00 02 55
-3C 00 85 12 00 2C BE D8 03 55 3E 3D 85 12 00 28
-B4 D8 03 30 3C 3E 85 12 00 24 D2 D8 02 30 3D 00
-85 12 00 20 00 00 02 49 46 00 1A 42 C6 21 8A 4E
-00 00 A2 53 C6 21 0E 4A 30 4D C8 D8 04 54 48 45
-4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53 0A 89
-0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D BC D6
-04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C 00 00
-A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F FC D8 05 55
-4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21 2A 83
-0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03 08 DA
-89 48 00 00 A2 53 C6 21 30 4D 40 D7 05 41 47 41
-49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49
-4C 45 87 12 EA D8 76 C4 2A C4 A0 D8 06 52 45 50
-45 41 54 00 87 12 72 D9 02 D9 2A C4 9E D9 3D 41
-08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F 98 42 C6 21
-00 00 30 4D D0 D7 03 42 57 31 84 12 9C D9 00 00
-B6 D9 03 42 57 32 84 12 9C D9 00 00 C2 D9 03 42
-57 33 84 12 9C D9 00 00 DA D9 3D 41 1A 42 C6 21
-28 4E B2 92 C4 21 90 2B BA 4F 00 00 A2 53 C6 21
-8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12
-D8 D9 00 00 FA D9 03 46 57 32 84 12 D8 D9 00 00
-06 DA 03 46 57 33 84 12 D8 D9 00 00 00 00 05 3F
-47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04 3E B0
-00 10 02 24 3E E0 00 08 87 12 C0 CC DA CA 2A C4
-12 DA 04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40
-00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 CA DC CA B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E C6 D4 C4
+70 CA C4 C5 74 CA 8C C6 BC C6 2E C4 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E CB 24 C4 40 FF
+2A CE C4 C6 2E C4 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E CB 48 C4 0C CB 0A CA 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A CB 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C7 24 C4 6E CB F8 C9 26 C7 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CF B0 12
+06 C5 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 CF 24 C4 DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37
+6D 00 00 C6 7C C6 4C C4 C8 CB 2E C6 2E C4 05 6C
+69 6E 65 3A 00 C6 66 C7 00 C6 2E C4 04 1B 5B 30
+6D 00 00 C6 50 CB 00 00 83 5B 27 5D 0D 12 87 12
+F0 CB 24 C4 24 C4 F8 C9 F8 C9 26 C7 44 C8 01 27
+0D 12 87 12 70 CA F2 C7 4A C8 4C C4 00 CC 26 C7
+AA CA D2 C6 81 5C 92 42 C0 21 C4 21 30 4D D8 CB
+81 5B 82 43 BE 21 30 4D 04 CC 01 5D B2 43 BE 21
+30 4D F2 CA 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 CA F2 C7 4A C8 7C C6 4C C4 00 CC BC C6
+4C C4 50 CC 24 C4 24 C4 F8 C9 F8 C9 24 C4 F8 C9
+F8 C9 26 C7 40 C7 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 CC 01 3A
+30 12 B8 CC 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 CA F2 C7 86 CC 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E CC 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CC 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C4
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A CB CC CC 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 C4 26 C7 F8 C9 F2 CC 12 CC 26 C7 5C CA 06 43
+52 45 41 54 45 00 B0 12 74 CC BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 CA 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CD 04 43 4F 44 45 00 B0 12 74 CC A2 82 C6 21
+0D 12 87 12 8A CE 64 CE 26 C7 72 CD 07 43 4F 44
+45 4E 4E 4D 30 12 7C CD 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CC A4 CE 26 C7 58 CB
+03 41 53 4D B2 40 68 CE DA 21 DE 3F 9C CD 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CD C2 CE 26 C7
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 CE 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 CC 85 48 49 32 4C 4F 0D 12
+87 12 2A CE 1E CE F8 C9 12 CC 80 CD 26 C7 2E 53
+30 4D 8C CD 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 C4 CA 21 AE C6 26 C7 84 12
+36 CE B0 CD 5C D0 58 CD EE CB 08 CE 42 C6 20 CA
+D8 C7 34 CF 4E CF 62 C7 CE CF 00 00 D2 D1 1A CC
+AA C8 00 00 84 12 36 CE 04 D7 6A D7 B8 D6 BA D7
+7E D6 00 00 AE D3 00 00 74 D6 26 D7 D6 D6 14 D7
+BE D4 00 00 00 00 D6 D7 62 CE 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E CE BC CE C2 CE
+D2 CE 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CC 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CE 88 CE F2 D7 A6 C7 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CF 92 42 0C 18 16 CF
+EF 3F 06 CF 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 CF 92 42 C6 21 16 CF 30 4D 1A CF 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC C7 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C4 02 C4
+B2 40 D8 CF D6 CF B2 40 88 CE 0E 18 B2 40 F2 D7
+0C 18 30 12 24 CF B2 40 C8 C5 C6 C5 B2 40 32 C6
+30 C6 B2 40 4A C6 48 C6 B2 40 18 00 0A 18 37 40
+26 C7 36 40 9C C6 35 40 FA C4 34 40 EC C4 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 CF 04 57
+41 52 4D 00 30 40 D8 CF 3D 40 12 D0 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E C4 07 0D 0A 1B 5B 37 6D 23 00 C6 9C C7
+2E C4 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 C6 24 C4
+40 FF 2A CE A6 C6 66 C7 2E C4 0A 62 79 74 65 73
+20 66 72 65 65 00 48 C4 C8 CB 24 CE 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 43 02 02 B2 D3 06 02
+D2 43 24 02 F2 D3 26 02 F2 40 FD 00 22 02 E2 D2
+24 02 B2 40 00 A5 60 01 B2 40 B4 00 80 01 92 43
+82 01 B2 40 1E 00 84 01 39 40 10 00 B2 D0 10 00
+86 01 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
+19 83 FA 23 39 40 00 10 29 83 89 43 00 20 FC 23
+B0 12 0E C4 B2 40 81 00 00 05 92 42 02 18 06 05
+92 42 04 18 08 05 92 C3 00 05 3F 40 80 20 30 12
+D4 CF 5A 3F 24 CD 86 5B 54 48 45 4E 5D 00 30 4D
+0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83
+06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27 2D 4D
+3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53 2D 53
+F7 3F F6 D0 86 5B 45 4C 53 45 5D 00 0D 12 87 12
+24 C4 00 00 AA C6 70 CA F2 C7 62 CA 68 C6 4C C4
+8E D1 70 C6 2E C4 06 5B 54 48 45 4E 5D 00 00 D1
+68 D1 24 D1 46 D1 26 C7 70 C6 2E C4 06 5B 45 4C
+53 45 5D 00 00 D1 7E D1 24 D1 44 D1 26 C7 2E C4
+04 5B 49 46 5D 00 00 D1 46 D1 48 C4 44 D1 22 C6
+2E C4 05 0D 0A 6B 6F 20 00 C6 D4 C4 C4 C4 48 C4
+46 D1 34 D1 84 5B 49 46 5D 00 0E 93 3E 4F C6 27
+30 4D 2F 53 30 4D A4 D1 89 5B 44 45 46 49 4E 45
+44 5D 0D 12 87 12 70 CA F2 C7 4A C8 B2 D1 26 C7
+B8 D1 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 0D 12
+87 12 C2 D1 E6 D1 3D 41 30 40 B6 C6 38 40 C0 21
+0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E 03 24
+7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21 30 4D
+1C 15 87 12 F2 C7 4A C8 42 C4 24 D2 06 C9 4C C4
+00 CC 3E D2 26 D2 39 4E 39 80 86 12 08 24 19 53
+02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
+30 41 3E 40 28 00 B0 12 10 D2 19 42 C6 21 A2 53
+C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
+92 53 C4 21 87 12 F2 C7 06 C9 4C C4 7A D2 70 D2
+21 53 3E 90 10 00 80 2D E2 2B 7C D2 B2 41 C4 21
+DE 3F 0D 12 87 12 70 CA EC D1 8C D2 0C 43 1B 42
+C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
+92 53 C4 21 B0 12 10 D2 3C 40 00 03 0E 93 1C 24
+3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
+3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
+3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
+26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 10 D2
+ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
+B0 12 5A D2 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
+5A D2 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
+0C 5E DA 3F B0 12 5A D2 FA 23 3C 50 10 00 B0 12
+42 D2 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 0D 12
+87 12 70 CA EC D1 58 D3 FE 90 26 00 00 00 3E 40
+20 00 03 20 3C 50 82 00 C7 3F B0 12 5A D2 E0 23
+3C 50 80 00 B0 12 42 D2 DB 3F 00 00 04 52 45 54
+49 00 0D 12 87 12 24 C4 00 13 F8 C9 26 C7 24 C4
+2C 00 82 D2 4E D3 98 D3 09 4B 2E 4E 0E DC A2 3F
+F6 CD 03 4D 4F 56 84 12 8E D3 00 40 A2 D3 05 4D
+4F 56 2E 42 84 12 8E D3 40 40 00 00 03 41 44 44
+84 12 8E D3 00 50 BC D3 05 41 44 44 2E 42 84 12
+8E D3 40 50 C8 D3 04 41 44 44 43 00 84 12 8E D3
+00 60 D6 D3 06 41 44 44 43 2E 42 00 84 12 8E D3
+40 60 7C D3 04 53 55 42 43 00 84 12 8E D3 00 70
+F4 D3 06 53 55 42 43 2E 42 00 84 12 8E D3 40 70
+02 D4 03 53 55 42 84 12 8E D3 00 80 12 D4 05 53
+55 42 2E 42 84 12 8E D3 40 80 D2 CD 03 43 4D 50
+84 12 8E D3 00 90 2C D4 05 43 4D 50 2E 42 84 12
+8E D3 40 90 BE CD 04 44 41 44 44 00 84 12 8E D3
+00 A0 46 D4 06 44 41 44 44 2E 42 00 84 12 8E D3
+40 A0 38 D4 03 42 49 54 84 12 8E D3 00 B0 64 D4
+05 42 49 54 2E 42 84 12 8E D3 40 B0 70 D4 03 42
+49 43 84 12 8E D3 00 C0 7E D4 05 42 49 43 2E 42
+84 12 8E D3 40 C0 8A D4 03 42 49 53 84 12 8E D3
+00 D0 98 D4 05 42 49 53 2E 42 84 12 8E D3 40 D0
+00 00 03 58 4F 52 84 12 8E D3 00 E0 B2 D4 05 58
+4F 52 2E 42 84 12 8E D3 40 E0 E4 D3 03 41 4E 44
+84 12 8E D3 00 F0 CC D4 05 41 4E 44 2E 42 84 12
+8E D3 40 F0 70 CA 82 D2 EA D4 0A 4C 3C F0 70 00
+8A 10 3A F0 0F 00 0C DA 4F 3F 1E D4 03 52 52 43
+84 12 E4 D4 00 10 FC D4 05 52 52 43 2E 42 84 12
+E4 D4 40 10 08 D5 04 53 57 50 42 00 84 12 E4 D4
+80 10 16 D5 03 52 52 41 84 12 E4 D4 00 11 24 D5
+05 52 52 41 2E 42 84 12 E4 D4 40 11 30 D5 03 53
+58 54 84 12 E4 D4 80 11 00 00 04 50 55 53 48 00
+84 12 E4 D4 00 12 4A D5 06 50 55 53 48 2E 42 00
+84 12 E4 D4 40 12 A4 D4 04 43 41 4C 4C 00 84 12
+E4 D4 80 12 1A 53 0E 4A 0D 12 87 12 9C C7 2E C4
+0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 7A CB
+70 CA EC D1 96 D5 92 53 C4 21 3E 40 2C 00 87 12
+F2 C7 06 C9 4C C4 00 CC 44 D3 AC D5 0A 4E 3E 4F
+1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
+0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
+D1 2F 8A 10 5A 06 8F 3F 3E D5 04 52 52 43 4D 00
+84 12 90 D5 50 00 DA D5 04 52 52 41 4D 00 84 12
+90 D5 50 01 E8 D5 04 52 4C 41 4D 00 84 12 90 D5
+50 02 F6 D5 04 52 52 55 4D 00 84 12 90 D5 50 03
+58 D5 05 50 55 53 48 4D 84 12 90 D5 00 15 12 D6
+04 50 4F 50 4D 00 84 12 90 D5 00 17 04 D6 03 53
+3E 3D 85 12 00 38 2E D6 02 53 3C 00 85 12 00 34
+20 D6 03 30 3E 3D 85 12 00 30 42 D6 02 30 3C 00
+85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 56 D6
+03 55 3E 3D 85 12 00 28 4C D6 03 30 3C 3E 85 12
+00 24 6A D6 02 30 3D 00 85 12 00 20 00 00 02 49
+46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
+30 4D 60 D6 04 54 48 45 4E 00 1A 42 C6 21 08 4E
+3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
+88 DA 00 00 30 4D 54 D4 04 45 4C 53 45 00 1A 42
+C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
+00 00 E3 3F 94 D6 05 55 4E 54 49 4C 3A 4F 08 4E
+3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
+42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
+30 4D D8 D4 05 41 47 41 49 4E 0A 4E 38 40 00 3C
+E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12 82 D6
+82 C6 26 C7 38 D6 06 52 45 50 45 41 54 00 0D 12
+87 12 0A D7 9A D6 26 C7 3A D7 3D 41 08 4E 3E 4F
+2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00 30 4D
+68 D5 03 42 57 31 84 12 38 D7 00 00 52 D7 03 42
+57 32 84 12 38 D7 00 00 5E D7 03 42 57 33 84 12
+38 D7 00 00 76 D7 3D 41 1A 42 C6 21 28 4E B2 92
+C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
+3E 4F 30 4D 00 00 03 46 57 31 84 12 74 D7 00 00
+96 D7 03 46 57 32 84 12 74 D7 00 00 A2 D7 03 46
+57 33 84 12 74 D7 00 00 AE D7 04 47 4F 54 4F 00
+2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12 F0 CB
+18 CA 26 C7 00 00 05 3F 47 4F 54 4F 3E 90 00 30
+F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0 00 08
+EC 3F
@FFFE
-9E D2
+6E D0
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 56 DA D0 D0
-2D 01 6B 30 B6 C6 C8 C6
+10 00 04 00 51 55 40 1F 05 00 18 00 F4 D7 88 CE
+2E 01 6B 30 06 C5 18 C5 D4 CF
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+26 00 29 83 B9 40 6E D0 DA FF FB 23 B2 40 68 C5
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 42 CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 E2 C2 22 02 30 41 B2 40 13 00 0E 05 E2 D2
-22 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 B0 CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-B0 CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D 82 C4 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 C9 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C9 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C5 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C6 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 C4 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC C6 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 C7 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE CA 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 C8 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C8 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 CB 42 CB 80 C8 50 CB
-3D 40 58 CB CC 22 82 3E 5A CB 0A 4E 3E 4F 3D 40
-70 CB 23 27 3D 40 4A CB 1A E2 BE 21 A1 27 B5 23
-72 CB 3E 4F 3D 40 4A CB B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CE CB 3F D2 CA
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 E2 C2 22 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 E2 D2 22 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 70 CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 F8 C9 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 F8 C9 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 C9 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C9 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C4
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C9
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 C4 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C7 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C4 70 CA F2 C7 80 CA
+3D 40 88 CA E2 22 A4 26 8A CA 0A 4E 3E 4F 3D 40
+A0 CA 39 27 3D 40 7A CA 1A E2 BE 21 BD 23 AC 27
+A2 CA 3E 4F 3D 40 7A CA BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CD D2 3F D0 C5
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C4 46 CB AE CB B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 C5 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A C4
-04 C8 8C C7 42 CB 82 C7 46 CB A4 C4 0C C5 1E C8
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CC
-14 C8 30 FF A0 CA 26 C5 1E C8 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CC 3C C6 E0 CB C2 CA 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E CC 86 41 42 4F
-52 54 22 00 87 12 38 C8 14 C8 40 CC B0 CA 2A C4
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 D1
-B0 12 B6 C6 92 C3 1C 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 D1 14 C8 DE 21 EA C4 AC C7 1E C8 04 1B 5B 37
-6D 00 D6 C7 58 C4 40 C6 9A CC 04 C8 1E C8 05 6C
-69 6E 65 3A D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B
-5B 30 6D 00 D6 C7 24 CC 00 00 83 5B 27 5D 87 12
-C0 CC 14 C8 14 C8 B0 CA B0 CA 2A C4 E8 C8 01 27
-87 12 42 CB 80 C8 EE C8 40 C6 CE CC 2A C4 7A CB
-32 C5 81 5C 92 42 C0 21 C4 21 30 4D AA CC 81 5B
-82 43 BE 21 30 4D D2 CC 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A CA 82 49 53 00 87 12
-BE CB EA C4 40 C6 12 CD AE CC 14 C8 F0 CC B0 CA
-2A C4 C0 CC F0 CC 2A C4 FA CC 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 CB 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 CB
-80 C8 EE C8 58 C4 40 C6 CE CC 0C C5 40 C6 5C CD
-14 C8 14 C8 B0 CA B0 CA 14 C8 B0 CA B0 CA 2A C4
-DE CC 81 3B 82 93 BE 21 B5 27 87 12 14 C8 2A C4
-B0 CA FA CD E0 CC 2A C4 62 CD 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CD 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A CD 01 3A 30 12 A0 CD 92 B3 C6 21 A2 63 C6 21
-87 12 42 CB 80 C8 C8 CD 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C8 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CC 90 CB 05 44 45 46 45 52
-B0 12 B8 CD BA 40 30 40 FC FF BA 40 AE CD FE FF
-E3 3F 1E CB 06 43 52 45 41 54 45 00 B0 12 B8 CD
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CE 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C9 05 3E 42 4F 44 59 2E 52
-30 4D 44 CE 04 43 4F 44 45 00 B0 12 B8 CD A2 82
-C6 21 87 12 D2 D0 AC D0 2A C4 84 CE 07 43 4F 44
-45 4E 4E 4D B0 12 86 CD F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 D0 FA CD 2A C4 2C CC 03 41
-53 4D B2 40 B0 D0 DA 21 E0 3F AC CE 06 45 4E 44
-41 53 4D 00 87 12 B4 CE F4 D0 2A C4 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 D0 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A C4
-02 00 A2 52 C6 21 ED 3F 1A CD 85 48 49 32 4C 4F
-87 12 A0 CA 4A CF B0 CA E0 CC D2 D0 AC D0 2A C4
-1A CF 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 C6 00 00 2E 53 30 4D 5E CE
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C C6 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C7
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C CE 85 42 45 47 49 4E 30 40 A0 CA 70 CF 85 55
-4E 54 49 4C 39 40 40 C6 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CE 85 41
-47 41 49 4E 39 40 3C C6 EF 3F 7A C8 85 57 48 49
-4C 45 87 12 36 CF 76 C4 2A C4 34 C8 86 52 45 50
-45 41 54 00 87 12 B4 CF 76 CF 2A C4 50 CF 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 C6 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 CA 84 4C 4F 4F 50 00 39 40 76 C6
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50
-39 40 64 C6 E5 3F 06 D0 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C8
-CA 21 F2 C4 2A C4 84 12 7E D0 AE CF 3C D3 DE CF
-BE CC 32 CF 3A D0 50 D4 64 C8 66 D1 80 D1 8E CF
-00 D2 00 00 22 D4 E8 CC 78 CE 00 00 84 12 7E D0
-6E D9 D0 D9 22 D9 44 DA E8 D8 00 00 18 D6 00 00
-DE D8 8E D9 40 D9 7E D9 28 D7 00 00 00 00 20 DA
-AA D0 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 D0 EE D0
-F4 D0 04 D1 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CD 09 50 57 52 5F 53 54 41
-54 45 84 12 FC D0 D0 D0 56 DA CC CF 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 D1 92 42 0C 18
-48 D1 EF 3F 38 D1 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 D1 92 42 C6 21 48 D1 30 4D 4C D1
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC CF 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C6
-DE C6 B2 40 0A D2 08 D2 B2 40 D0 D0 0E 18 B2 40
-56 DA 0C 18 30 12 56 D1 B2 40 86 C7 84 C7 B2 40
-08 C8 06 C8 B2 40 98 C6 96 C6 B2 40 18 00 0A 18
-37 40 1A C4 36 40 92 C4 35 40 0E C4 34 40 00 C4
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A D1
-04 57 41 52 4D 00 30 40 0A D2 3D 40 40 D2 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E C8 06 0D 1B 5B 37 6D 23 00 D6 C7 34 C6 1E C8
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 C7 14 C8 30 FF
-A0 CA B8 C4 24 C6 1E C8 0A 62 79 74 65 73 20 66
-72 65 65 00 3C C6 9A CC 82 CF 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 D2 B2 40
-88 5A CC 01 B2 43 02 02 B2 D3 06 02 D2 43 24 02
-F2 D3 26 02 F2 40 FD 00 22 02 E2 D2 24 02 B2 40
-00 A5 60 01 B2 40 F3 00 80 01 B2 40 07 00 82 01
-B2 40 FC 00 84 01 39 40 80 00 B2 D0 10 00 86 01
-92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23 19 83
-FA 23 39 40 00 10 29 83 89 43 00 20 FC 23 39 40
-26 00 29 83 B9 40 9E D2 DA FF FB 23 B2 40 26 C7
-E4 FF B2 40 81 00 00 05 92 42 02 18 06 05 92 42
-04 18 08 05 92 C3 00 05 92 D3 1A 05 3F 40 80 20
-31 40 E0 20 30 12 06 D2 50 3F 8A D2 07 43 4F 4D
-50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C
-0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF
-F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 CD 86 5B
-54 48 45 4E 5D 00 30 4D 6E D3 86 5B 45 4C 53 45
-5D 00 87 12 14 C8 00 00 C6 C4 42 CB 80 C8 24 CB
-34 C4 40 C6 E4 D3 44 C4 1E C8 06 5B 54 48 45 4E
-5D 00 44 D3 4A C6 B4 D3 F8 C7 D0 C4 58 C4 4A C6
-8A D3 2A C4 44 C4 1E C8 06 5B 45 4C 53 45 5D 00
-44 D3 4A C6 D2 D3 F8 C7 D0 C4 58 C4 4A C6 88 D3
-2A C4 1E C8 04 5B 49 46 5D 00 44 D3 4A C6 8A D3
-3C C6 88 D3 F8 C7 1E C8 05 0D 0A 6B 6F 20 D6 C7
-8C C7 32 CB 3C C6 8A D3 7A D3 84 5B 49 46 5D 00
-0E 93 3E 4F BE 27 30 4D FA D3 89 5B 44 45 46 49
-4E 45 44 5D 87 12 42 CB 80 C8 EE C8 6A C4 2A C4
-0A D4 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 87 12
-42 CB 80 C8 EE C8 6A C4 00 C5 2A C4 3E D4 3D 41
-B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 D1 48 D0
-06 4D 41 52 4B 45 52 00 B0 12 B8 CD BA 40 84 12
-FC FF BA 40 3C D4 FE FF 9A 42 C8 21 00 00 28 83
-8A 48 02 00 A2 52 C6 21 30 40 00 CE 1C 15 B0 12
-2A C4 80 C8 EE C8 4A C6 92 D4 AA C9 40 C6 CE CC
-AC D4 94 D4 39 4E 39 80 86 12 08 24 19 53 02 20
-2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41
-3E 40 28 00 B0 12 7C D4 19 42 C6 21 A2 53 C6 21
-89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53
-C4 21 B0 12 2A C4 80 C8 AA C9 40 C6 EA D4 E0 D4
-21 53 3E 90 10 00 7D 2D E1 2B EC D4 B2 41 C4 21
-DD 3F 87 12 42 CB 74 C8 FA D4 0C 43 1B 42 C6 21
-A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20 92 53
-C4 21 B0 12 7C D4 3C 40 00 03 0E 93 1C 24 3C 40
-10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40
-20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40
-30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21 A2 53
-C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00
-07 20 3C 40 10 02 92 53 C4 21 B0 12 7C D4 ED 3F
-7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21 B0 12
-C8 D4 0C 20 3C 50 10 00 3E 40 2B 00 B0 12 C8 D4
-92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E
-DA 3F B0 12 C8 D4 FA 23 3C 50 10 00 B0 12 B0 D4
-EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 87 12 42 CB
-74 C8 C4 D5 FE 90 26 00 00 00 3E 40 20 00 03 20
-3C 50 82 00 C8 3F B0 12 C8 D4 E1 23 3C 50 80 00
-B0 12 B0 D4 DC 3F D6 C6 04 52 45 54 49 00 87 12
-14 C8 00 13 B0 CA 2A C4 14 C8 2C 00 F2 D4 BC D5
-02 D6 09 4B 2E 4E 0E DC A4 3F FC CE 03 4D 4F 56
-84 12 F8 D5 00 40 0C D6 05 4D 4F 56 2E 42 84 12
-F8 D5 40 40 00 00 03 41 44 44 84 12 F8 D5 00 50
-26 D6 05 41 44 44 2E 42 84 12 F8 D5 40 50 32 D6
-04 41 44 44 43 00 84 12 F8 D5 00 60 40 D6 06 41
-44 44 43 2E 42 00 84 12 F8 D5 40 60 E8 D5 04 53
-55 42 43 00 84 12 F8 D5 00 70 5E D6 06 53 55 42
-43 2E 42 00 84 12 F8 D5 40 70 6C D6 03 53 55 42
-84 12 F8 D5 00 80 7C D6 05 53 55 42 2E 42 84 12
-F8 D5 40 80 DE CE 03 43 4D 50 84 12 F8 D5 00 90
-96 D6 05 43 4D 50 2E 42 84 12 F8 D5 40 90 CC CE
-04 44 41 44 44 00 84 12 F8 D5 00 A0 B0 D6 06 44
-41 44 44 2E 42 00 84 12 F8 D5 40 A0 A2 D6 03 42
-49 54 84 12 F8 D5 00 B0 CE D6 05 42 49 54 2E 42
-84 12 F8 D5 40 B0 DA D6 03 42 49 43 84 12 F8 D5
-00 C0 E8 D6 05 42 49 43 2E 42 84 12 F8 D5 40 C0
-F4 D6 03 42 49 53 84 12 F8 D5 00 D0 02 D7 05 42
-49 53 2E 42 84 12 F8 D5 40 D0 00 00 03 58 4F 52
-84 12 F8 D5 00 E0 1C D7 05 58 4F 52 2E 42 84 12
-F8 D5 40 E0 4E D6 03 41 4E 44 84 12 F8 D5 00 F0
-36 D7 05 41 4E 44 2E 42 84 12 F8 D5 40 F0 42 CB
-F2 D4 54 D7 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
-0C DA 4F 3F 88 D6 03 52 52 43 84 12 4E D7 00 10
-66 D7 05 52 52 43 2E 42 84 12 4E D7 40 10 72 D7
-04 53 57 50 42 00 84 12 4E D7 80 10 80 D7 03 52
-52 41 84 12 4E D7 00 11 8E D7 05 52 52 41 2E 42
-84 12 4E D7 40 11 9A D7 03 53 58 54 84 12 4E D7
-80 11 00 00 04 50 55 53 48 00 84 12 4E D7 00 12
-B4 D7 06 50 55 53 48 2E 42 00 84 12 4E D7 40 12
-0E D7 04 43 41 4C 4C 00 84 12 4E D7 80 12 1A 53
-0E 4A 87 12 34 C6 1E C8 0D 6F 75 74 20 6F 66 20
-62 6F 75 6E 64 73 4C CC 42 CB 74 C8 FE D7 92 53
-C4 21 3E 40 2C 00 B0 12 2A C4 80 C8 AA C9 40 C6
-CE CC B2 D5 16 D8 0A 4E 3E 4F 1A 83 E0 33 29 4E
-59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
-10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
-8F 3F A8 D7 04 52 52 43 4D 00 84 12 F8 D7 50 00
-44 D8 04 52 52 41 4D 00 84 12 F8 D7 50 01 52 D8
-04 52 4C 41 4D 00 84 12 F8 D7 50 02 60 D8 04 52
-52 55 4D 00 84 12 F8 D7 50 03 C2 D7 05 50 55 53
-48 4D 84 12 F8 D7 00 15 7C D8 04 50 4F 50 4D 00
-84 12 F8 D7 00 17 6E D8 03 53 3E 3D 85 12 00 38
-98 D8 02 53 3C 00 85 12 00 34 8A D8 03 30 3E 3D
-85 12 00 30 AC D8 02 30 3C 00 85 12 00 30 00 00
-02 55 3C 00 85 12 00 2C C0 D8 03 55 3E 3D 85 12
-00 28 B6 D8 03 30 3C 3E 85 12 00 24 D4 D8 02 30
-3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
-8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D CA D8 04 54
-48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
-0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
-BE D6 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
-00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F FE D8
-05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
-2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
-08 DA 89 48 00 00 A2 53 C6 21 30 4D 42 D7 05 41
-47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
-48 49 4C 45 87 12 EC D8 76 C4 2A C4 A2 D8 06 52
-45 50 45 41 54 00 87 12 74 D9 04 D9 2A C4 A0 D9
-3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F 98 42
-C6 21 00 00 30 4D D2 D7 03 42 57 31 84 12 9E D9
-00 00 B8 D9 03 42 57 32 84 12 9E D9 00 00 C4 D9
-03 42 57 33 84 12 9E D9 00 00 DC D9 3D 41 1A 42
-C6 21 28 4E B2 92 C4 21 90 2B BA 4F 00 00 A2 53
-C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
-84 12 DA D9 00 00 FC D9 03 46 57 32 84 12 DA D9
-00 00 08 DA 03 46 57 33 84 12 DA D9 00 00 00 00
-05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04
-3E B0 00 10 02 24 3E E0 00 08 87 12 C0 CC DA CA
-2A C4 14 DA 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
-3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 CA DC CA B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E C6 D4 C4
+70 CA C4 C5 74 CA 8C C6 BC C6 2E C4 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E CB 24 C4 40 FF
+2A CE C4 C6 2E C4 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E CB 48 C4 0C CB 0A CA 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A CB 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C7 24 C4 6E CB F8 C9 26 C7 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CF B0 12
+06 C5 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 CF 24 C4 DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37
+6D 00 00 C6 7C C6 4C C4 C8 CB 2E C6 2E C4 05 6C
+69 6E 65 3A 00 C6 66 C7 00 C6 2E C4 04 1B 5B 30
+6D 00 00 C6 50 CB 00 00 83 5B 27 5D 0D 12 87 12
+F0 CB 24 C4 24 C4 F8 C9 F8 C9 26 C7 44 C8 01 27
+0D 12 87 12 70 CA F2 C7 4A C8 4C C4 00 CC 26 C7
+AA CA D2 C6 81 5C 92 42 C0 21 C4 21 30 4D D8 CB
+81 5B 82 43 BE 21 30 4D 04 CC 01 5D B2 43 BE 21
+30 4D F2 CA 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 CA F2 C7 4A C8 7C C6 4C C4 00 CC BC C6
+4C C4 50 CC 24 C4 24 C4 F8 C9 F8 C9 24 C4 F8 C9
+F8 C9 26 C7 40 C7 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 CC 01 3A
+30 12 B8 CC 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 CA F2 C7 86 CC 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E CC 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CC 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C4
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A CB CC CC 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 C4 26 C7 F8 C9 F2 CC 12 CC 26 C7 5C CA 06 43
+52 45 41 54 45 00 B0 12 74 CC BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 CA 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CD 04 43 4F 44 45 00 B0 12 74 CC A2 82 C6 21
+0D 12 87 12 8A CE 64 CE 26 C7 72 CD 07 43 4F 44
+45 4E 4E 4D 30 12 7C CD 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CC A4 CE 26 C7 58 CB
+03 41 53 4D B2 40 68 CE DA 21 DE 3F 9C CD 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CD C2 CE 26 C7
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 CE 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 CC 85 48 49 32 4C 4F 0D 12
+87 12 2A CE 1E CE F8 C9 12 CC 80 CD 26 C7 2E 53
+30 4D 8C CD 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 C4 CA 21 AE C6 26 C7 84 12
+36 CE B0 CD 5C D0 58 CD EE CB 08 CE 42 C6 20 CA
+D8 C7 34 CF 4E CF 62 C7 CE CF 00 00 D4 D1 1A CC
+AA C8 00 00 84 12 36 CE 06 D7 6C D7 BA D6 BC D7
+80 D6 00 00 B0 D3 00 00 76 D6 28 D7 D8 D6 16 D7
+C0 D4 00 00 00 00 D8 D7 62 CE 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E CE BC CE C2 CE
+D2 CE 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CC 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CE 88 CE F4 D7 A6 C7 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CF 92 42 0C 18 16 CF
+EF 3F 06 CF 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 CF 92 42 C6 21 16 CF 30 4D 1A CF 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC C7 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C4 02 C4
+B2 40 D8 CF D6 CF B2 40 88 CE 0E 18 B2 40 F4 D7
+0C 18 30 12 24 CF B2 40 C8 C5 C6 C5 B2 40 32 C6
+30 C6 B2 40 4A C6 48 C6 B2 40 18 00 0A 18 37 40
+26 C7 36 40 9C C6 35 40 FA C4 34 40 EC C4 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 CF 04 57
+41 52 4D 00 30 40 D8 CF 3D 40 12 D0 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E C4 07 0D 0A 1B 5B 37 6D 23 00 C6 9C C7
+2E C4 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 C6 24 C4
+40 FF 2A CE A6 C6 66 C7 2E C4 0A 62 79 74 65 73
+20 66 72 65 65 00 48 C4 C8 CB 24 CE 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 43 02 02 B2 D3 06 02
+D2 43 24 02 F2 D3 26 02 F2 40 FD 00 22 02 E2 D2
+24 02 B2 40 00 A5 60 01 B2 40 F3 00 80 01 B2 40
+07 00 82 01 B2 40 FC 00 84 01 39 40 80 00 B2 D0
+10 00 86 01 92 D2 5E 01 08 18 38 40 59 14 18 83
+FE 23 19 83 FA 23 39 40 00 10 29 83 89 43 00 20
+FC 23 B0 12 0E C4 B2 40 81 00 00 05 92 42 02 18
+06 05 92 42 04 18 08 05 92 C3 00 05 3F 40 80 20
+30 12 D4 CF 59 3F 24 CD 86 5B 54 48 45 4E 5D 00
+30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24
+1B 83 06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27
+2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53
+2D 53 F7 3F F8 D0 86 5B 45 4C 53 45 5D 00 0D 12
+87 12 24 C4 00 00 AA C6 70 CA F2 C7 62 CA 68 C6
+4C C4 90 D1 70 C6 2E C4 06 5B 54 48 45 4E 5D 00
+02 D1 6A D1 26 D1 48 D1 26 C7 70 C6 2E C4 06 5B
+45 4C 53 45 5D 00 02 D1 80 D1 26 D1 46 D1 26 C7
+2E C4 04 5B 49 46 5D 00 02 D1 48 D1 48 C4 46 D1
+22 C6 2E C4 05 0D 0A 6B 6F 20 00 C6 D4 C4 C4 C4
+48 C4 48 D1 36 D1 84 5B 49 46 5D 00 0E 93 3E 4F
+C6 27 30 4D 2F 53 30 4D A6 D1 89 5B 44 45 46 49
+4E 45 44 5D 0D 12 87 12 70 CA F2 C7 4A C8 B4 D1
+26 C7 BA D1 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
+0D 12 87 12 C4 D1 E8 D1 3D 41 30 40 B6 C6 38 40
+C0 21 0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E
+03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21
+30 4D 1C 15 87 12 F2 C7 4A C8 42 C4 26 D2 06 C9
+4C C4 00 CC 40 D2 28 D2 39 4E 39 80 86 12 08 24
+19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
+1B 17 30 41 3E 40 28 00 B0 12 12 D2 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12
+C4 21 92 53 C4 21 87 12 F2 C7 06 C9 4C C4 7C D2
+72 D2 21 53 3E 90 10 00 80 2D E2 2B 7E D2 B2 41
+C4 21 DE 3F 0D 12 87 12 70 CA EE D1 8E D2 0C 43
+1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00
+27 20 92 53 C4 21 B0 12 12 D2 3C 40 00 03 0E 93
+1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
+14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
+0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
+C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D
+7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12
+12 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
+C4 21 B0 12 5C D2 0C 20 3C 50 10 00 3E 40 2B 00
+B0 12 5C D2 92 92 C0 21 C4 21 02 24 92 53 C4 21
+8E 10 0C 5E DA 3F B0 12 5C D2 FA 23 3C 50 10 00
+B0 12 44 D2 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21
+0D 12 87 12 70 CA EE D1 5A D3 FE 90 26 00 00 00
+3E 40 20 00 03 20 3C 50 82 00 C7 3F B0 12 5C D2
+E0 23 3C 50 80 00 B0 12 44 D2 DB 3F 00 00 04 52
+45 54 49 00 0D 12 87 12 24 C4 00 13 F8 C9 26 C7
+24 C4 2C 00 84 D2 50 D3 9A D3 09 4B 2E 4E 0E DC
+A2 3F F6 CD 03 4D 4F 56 84 12 90 D3 00 40 A4 D3
+05 4D 4F 56 2E 42 84 12 90 D3 40 40 00 00 03 41
+44 44 84 12 90 D3 00 50 BE D3 05 41 44 44 2E 42
+84 12 90 D3 40 50 CA D3 04 41 44 44 43 00 84 12
+90 D3 00 60 D8 D3 06 41 44 44 43 2E 42 00 84 12
+90 D3 40 60 7E D3 04 53 55 42 43 00 84 12 90 D3
+00 70 F6 D3 06 53 55 42 43 2E 42 00 84 12 90 D3
+40 70 04 D4 03 53 55 42 84 12 90 D3 00 80 14 D4
+05 53 55 42 2E 42 84 12 90 D3 40 80 D2 CD 03 43
+4D 50 84 12 90 D3 00 90 2E D4 05 43 4D 50 2E 42
+84 12 90 D3 40 90 BE CD 04 44 41 44 44 00 84 12
+90 D3 00 A0 48 D4 06 44 41 44 44 2E 42 00 84 12
+90 D3 40 A0 3A D4 03 42 49 54 84 12 90 D3 00 B0
+66 D4 05 42 49 54 2E 42 84 12 90 D3 40 B0 72 D4
+03 42 49 43 84 12 90 D3 00 C0 80 D4 05 42 49 43
+2E 42 84 12 90 D3 40 C0 8C D4 03 42 49 53 84 12
+90 D3 00 D0 9A D4 05 42 49 53 2E 42 84 12 90 D3
+40 D0 00 00 03 58 4F 52 84 12 90 D3 00 E0 B4 D4
+05 58 4F 52 2E 42 84 12 90 D3 40 E0 E6 D3 03 41
+4E 44 84 12 90 D3 00 F0 CE D4 05 41 4E 44 2E 42
+84 12 90 D3 40 F0 70 CA 84 D2 EC D4 0A 4C 3C F0
+70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 20 D4 03 52
+52 43 84 12 E6 D4 00 10 FE D4 05 52 52 43 2E 42
+84 12 E6 D4 40 10 0A D5 04 53 57 50 42 00 84 12
+E6 D4 80 10 18 D5 03 52 52 41 84 12 E6 D4 00 11
+26 D5 05 52 52 41 2E 42 84 12 E6 D4 40 11 32 D5
+03 53 58 54 84 12 E6 D4 80 11 00 00 04 50 55 53
+48 00 84 12 E6 D4 00 12 4C D5 06 50 55 53 48 2E
+42 00 84 12 E6 D4 40 12 A6 D4 04 43 41 4C 4C 00
+84 12 E6 D4 80 12 1A 53 0E 4A 0D 12 87 12 9C C7
+2E C4 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
+7A CB 70 CA EE D1 98 D5 92 53 C4 21 3E 40 2C 00
+87 12 F2 C7 06 C9 4C C4 00 CC 46 D3 AE D5 0A 4E
+3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
+01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
+2A 92 D1 2F 8A 10 5A 06 8F 3F 40 D5 04 52 52 43
+4D 00 84 12 92 D5 50 00 DC D5 04 52 52 41 4D 00
+84 12 92 D5 50 01 EA D5 04 52 4C 41 4D 00 84 12
+92 D5 50 02 F8 D5 04 52 52 55 4D 00 84 12 92 D5
+50 03 5A D5 05 50 55 53 48 4D 84 12 92 D5 00 15
+14 D6 04 50 4F 50 4D 00 84 12 92 D5 00 17 06 D6
+03 53 3E 3D 85 12 00 38 30 D6 02 53 3C 00 85 12
+00 34 22 D6 03 30 3E 3D 85 12 00 30 44 D6 02 30
+3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
+58 D6 03 55 3E 3D 85 12 00 28 4E D6 03 30 3C 3E
+85 12 00 24 6C D6 02 30 3D 00 85 12 00 20 00 00
+02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+0E 4A 30 4D 62 D6 04 54 48 45 4E 00 1A 42 C6 21
+08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
+63 2F 88 DA 00 00 30 4D 56 D4 04 45 4C 53 45 00
+1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
+8F 4A 00 00 E3 3F 96 D6 05 55 4E 54 49 4C 3A 4F
+08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
+00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
+C6 21 30 4D DA D4 05 41 47 41 49 4E 0A 4E 38 40
+00 3C E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12
+84 D6 82 C6 26 C7 3A D6 06 52 45 50 45 41 54 00
+0D 12 87 12 0C D7 9C D6 26 C7 3C D7 3D 41 08 4E
+3E 4F 2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00
+30 4D 6A D5 03 42 57 31 84 12 3A D7 00 00 54 D7
+03 42 57 32 84 12 3A D7 00 00 60 D7 03 42 57 33
+84 12 3A D7 00 00 78 D7 3D 41 1A 42 C6 21 28 4E
+B2 92 C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A
+00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 76 D7
+00 00 98 D7 03 46 57 32 84 12 76 D7 00 00 A4 D7
+03 46 57 33 84 12 76 D7 00 00 B0 D7 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12
+F0 CB 18 CA 26 C7 00 00 05 3F 47 4F 54 4F 3E 90
+00 30 F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0
+00 08 EC 3F
@FFFE
-9E D2
+6E D0
q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 6E 96 D0 8C
-2D 01 6B 30 B6 82 C8 82
+10 00 08 00 A1 F7 80 3E 05 00 18 00 12 94 88 8A
+2E 01 6B 30 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+38 00 29 83 B9 40 6E 8C 8C FF FB 23 B2 40 68 81
+E0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 82 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 E2 C3 43 02 30 41 B2 40 13 00 0E 05 E2 D3
-43 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A 83 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 E2 C3 43 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 E2 D3 43 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C 81 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 1C 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 54 8F DE 8B
-BE 88 32 8B 3A 8C 68 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 3A 90 E8 88 78 8A 00 00 84 12 7E 8C
-86 95 E8 95 3A 95 5C 96 00 95 00 00 30 92 00 00
-F6 94 A6 95 58 95 96 95 40 93 00 00 00 00 38 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 6E 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-6E 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 40 8E 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E 84 06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF
-A0 86 B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66
-72 65 65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 8E B2 40
-88 5A CC 01 B2 D3 06 02 B2 40 FE FF 02 02 B2 D3
-26 02 B2 40 FF 7F 22 02 B2 D3 46 02 B2 40 FC FF
-42 02 E2 D3 45 02 F2 40 A5 00 A1 01 F2 40 10 00
-A0 01 D2 43 A1 01 B2 40 00 A5 60 01 B2 40 FF 1E
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5C 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 F2 8D 1A 88
+AA 84 00 00 84 12 36 8A 24 93 8A 93 D8 92 DA 93
+9E 92 00 00 CE 8F 00 00 94 92 46 93 F6 92 34 93
+DE 90 00 00 00 00 F6 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A 12 94 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 12 94
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 12 8C 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83
+2E 80 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80
+40 FF 2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73
+20 66 72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 D3 06 02 B2 40 FE FF
+02 02 B2 D3 26 02 B2 40 FF 7F 22 02 B2 D3 46 02
+B2 40 FC FF 42 02 E2 D3 45 02 F2 40 A5 00 A1 01
+F2 40 10 00 A0 01 D2 43 A1 01 B2 40 00 A5 60 01
+B2 D0 10 00 86 01 F2 D0 03 00 0B 02 B2 40 FF 1E
80 01 B2 40 BA 00 82 01 B2 40 E8 01 84 01 39 40
-00 01 B2 D0 10 00 86 01 92 D2 5E 01 08 18 38 40
-59 14 18 83 FE 23 19 83 FA 23 39 40 00 20 29 83
-89 43 00 20 FC 23 39 40 38 00 29 83 B9 40 9E 8E
-8C FF FB 23 B2 40 26 83 E0 FF B2 40 81 00 00 05
-92 42 02 18 06 05 92 42 04 18 08 05 92 C3 00 05
-92 D3 1A 05 3F 40 80 20 31 40 E0 20 30 12 06 8E
-44 3F 8A 8E 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D B2 89 86 5B 54 48 45 4E 5D 00 30 4D
-86 8F 86 5B 45 4C 53 45 5D 00 87 12 14 84 00 00
-C6 80 42 87 80 84 24 87 34 80 40 82 FC 8F 44 80
-1E 84 06 5B 54 48 45 4E 5D 00 5C 8F 4A 82 CC 8F
-F8 83 D0 80 58 80 4A 82 A2 8F 2A 80 44 80 1E 84
-06 5B 45 4C 53 45 5D 00 5C 8F 4A 82 EA 8F F8 83
-D0 80 58 80 4A 82 A0 8F 2A 80 1E 84 04 5B 49 46
-5D 00 5C 8F 4A 82 A2 8F 3C 82 A0 8F F8 83 1E 84
-05 0D 0A 6B 6F 20 D6 83 8C 83 32 87 3C 82 A2 8F
-92 8F 84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D
-12 90 89 5B 44 45 46 49 4E 45 44 5D 87 12 42 87
-80 84 EE 84 6A 80 2A 80 22 90 8B 5B 55 4E 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-00 81 2A 80 56 90 3D 41 B2 4E 0E 18 A2 4E 0C 18
-3E 4F 30 40 56 8D 48 8C 06 4D 41 52 4B 45 52 00
-B0 12 B8 89 BA 40 84 12 FC FF BA 40 54 90 FE FF
-9A 42 C8 21 00 00 28 83 8A 48 02 00 A2 52 C6 21
-30 40 00 8A 1C 15 B0 12 2A 80 80 84 EE 84 4A 82
-AA 90 AA 85 40 82 CE 88 C4 90 AC 90 39 4E 39 80
-86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
-01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12 94 90
-19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 40 29 00
-1C 15 12 12 C4 21 92 53 C4 21 B0 12 2A 80 80 84
-AA 85 40 82 02 91 F8 90 21 53 3E 90 10 00 7D 2D
-E1 2B 04 91 B2 41 C4 21 DD 3F 87 12 42 87 74 84
-12 91 0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F
-7A 90 23 00 27 20 92 53 C4 21 B0 12 94 90 3C 40
-00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40
-20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40
-30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40
-30 00 19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 4F
-3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53
-C4 21 B0 12 94 90 ED 3F 7A 90 40 00 16 20 3C 40
-20 00 92 53 C4 21 B0 12 E0 90 0C 20 3C 50 10 00
-3E 40 2B 00 B0 12 E0 90 92 92 C0 21 C4 21 02 24
-92 53 C4 21 8E 10 0C 5E DA 3F B0 12 E0 90 FA 23
-3C 50 10 00 B0 12 C8 90 EF 3F 0C 43 1B 42 C6 21
-A2 53 C6 21 87 12 42 87 74 84 DC 91 FE 90 26 00
-00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12
-E0 90 E1 23 3C 50 80 00 B0 12 C8 90 DC 3F D6 82
-04 52 45 54 49 00 87 12 14 84 00 13 B0 86 2A 80
-14 84 2C 00 0A 91 D4 91 1A 92 09 4B 2E 4E 0E DC
-A4 3F FC 8A 03 4D 4F 56 84 12 10 92 00 40 24 92
-05 4D 4F 56 2E 42 84 12 10 92 40 40 00 00 03 41
-44 44 84 12 10 92 00 50 3E 92 05 41 44 44 2E 42
-84 12 10 92 40 50 4A 92 04 41 44 44 43 00 84 12
-10 92 00 60 58 92 06 41 44 44 43 2E 42 00 84 12
-10 92 40 60 00 92 04 53 55 42 43 00 84 12 10 92
-00 70 76 92 06 53 55 42 43 2E 42 00 84 12 10 92
-40 70 84 92 03 53 55 42 84 12 10 92 00 80 94 92
-05 53 55 42 2E 42 84 12 10 92 40 80 DE 8A 03 43
-4D 50 84 12 10 92 00 90 AE 92 05 43 4D 50 2E 42
-84 12 10 92 40 90 CC 8A 04 44 41 44 44 00 84 12
-10 92 00 A0 C8 92 06 44 41 44 44 2E 42 00 84 12
-10 92 40 A0 BA 92 03 42 49 54 84 12 10 92 00 B0
-E6 92 05 42 49 54 2E 42 84 12 10 92 40 B0 F2 92
-03 42 49 43 84 12 10 92 00 C0 00 93 05 42 49 43
-2E 42 84 12 10 92 40 C0 0C 93 03 42 49 53 84 12
-10 92 00 D0 1A 93 05 42 49 53 2E 42 84 12 10 92
-40 D0 00 00 03 58 4F 52 84 12 10 92 00 E0 34 93
-05 58 4F 52 2E 42 84 12 10 92 40 E0 66 92 03 41
-4E 44 84 12 10 92 00 F0 4E 93 05 41 4E 44 2E 42
-84 12 10 92 40 F0 42 87 0A 91 6C 93 0A 4C 3C F0
-70 00 8A 10 3A F0 0F 00 0C DA 4F 3F A0 92 03 52
-52 43 84 12 66 93 00 10 7E 93 05 52 52 43 2E 42
-84 12 66 93 40 10 8A 93 04 53 57 50 42 00 84 12
-66 93 80 10 98 93 03 52 52 41 84 12 66 93 00 11
-A6 93 05 52 52 41 2E 42 84 12 66 93 40 11 B2 93
-03 53 58 54 84 12 66 93 80 11 00 00 04 50 55 53
-48 00 84 12 66 93 00 12 CC 93 06 50 55 53 48 2E
-42 00 84 12 66 93 40 12 26 93 04 43 41 4C 4C 00
-84 12 66 93 80 12 1A 53 0E 4A 87 12 34 82 1E 84
-0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 4C 88
-42 87 74 84 16 94 92 53 C4 21 3E 40 2C 00 B0 12
-2A 80 80 84 AA 85 40 82 CE 88 CA 91 2E 94 0A 4E
-3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
-01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
-2A 92 D1 2F 8A 10 5A 06 8F 3F C0 93 04 52 52 43
-4D 00 84 12 10 94 50 00 5C 94 04 52 52 41 4D 00
-84 12 10 94 50 01 6A 94 04 52 4C 41 4D 00 84 12
-10 94 50 02 78 94 04 52 52 55 4D 00 84 12 10 94
-50 03 DA 93 05 50 55 53 48 4D 84 12 10 94 00 15
-94 94 04 50 4F 50 4D 00 84 12 10 94 00 17 86 94
-03 53 3E 3D 85 12 00 38 B0 94 02 53 3C 00 85 12
-00 34 A2 94 03 30 3E 3D 85 12 00 30 C4 94 02 30
-3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
-D8 94 03 55 3E 3D 85 12 00 28 CE 94 03 30 3C 3E
-85 12 00 24 EC 94 02 30 3D 00 85 12 00 20 00 00
-02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
-0E 4A 30 4D E2 94 04 54 48 45 4E 00 1A 42 C6 21
-08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
-63 2F 88 DA 00 00 30 4D D6 92 04 45 4C 53 45 00
-1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
-8F 4A 00 00 E3 3F 16 95 05 55 4E 54 49 4C 3A 4F
-08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
-00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
-C6 21 30 4D 5A 93 05 41 47 41 49 4E 0A 4E 38 40
-00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12 04 95
-76 80 2A 80 BA 94 06 52 45 50 45 41 54 00 87 12
-8C 95 1C 95 2A 80 B8 95 3D 41 08 4E 3E 4F 2A 48
-B2 92 C4 21 CD 2F 98 42 C6 21 00 00 30 4D EA 93
-03 42 57 31 84 12 B6 95 00 00 D0 95 03 42 57 32
-84 12 B6 95 00 00 DC 95 03 42 57 33 84 12 B6 95
-00 00 F4 95 3D 41 1A 42 C6 21 28 4E B2 92 C4 21
-90 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F
-30 4D 00 00 03 46 57 31 84 12 F2 95 00 00 14 96
-03 46 57 32 84 12 F2 95 00 00 20 96 03 46 57 33
-84 12 F2 95 00 00 00 00 05 3F 47 4F 54 4F 3E 90
-00 30 07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0
-00 08 87 12 C0 88 DA 86 2A 80 2C 96 04 47 4F 54
-4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+00 01 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
+19 83 FA 23 39 40 00 20 29 83 89 43 00 20 FC 23
+B0 12 0E 80 B2 40 81 00 00 05 92 42 02 18 06 05
+92 42 04 18 08 05 92 C3 00 05 3F 40 80 20 30 12
+D4 8B 4A 3F 24 89 86 5B 54 48 45 4E 5D 00 30 4D
+0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83
+06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27 2D 4D
+3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53 2D 53
+F7 3F 16 8D 86 5B 45 4C 53 45 5D 00 0D 12 87 12
+24 80 00 00 AA 82 70 86 F2 83 62 86 68 82 4C 80
+AE 8D 70 82 2E 80 06 5B 54 48 45 4E 5D 00 20 8D
+88 8D 44 8D 66 8D 26 83 70 82 2E 80 06 5B 45 4C
+53 45 5D 00 20 8D 9E 8D 44 8D 64 8D 26 83 2E 80
+04 5B 49 46 5D 00 20 8D 66 8D 48 80 64 8D 22 82
+2E 80 05 0D 0A 6B 6F 20 00 82 D4 80 C4 80 48 80
+66 8D 54 8D 84 5B 49 46 5D 00 0E 93 3E 4F C6 27
+30 4D 2F 53 30 4D C4 8D 89 5B 44 45 46 49 4E 45
+44 5D 0D 12 87 12 70 86 F2 83 4A 84 D2 8D 26 83
+D8 8D 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 0D 12
+87 12 E2 8D 06 8E 3D 41 30 40 B6 82 38 40 C0 21
+0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E 03 24
+7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21 30 4D
+1C 15 87 12 F2 83 4A 84 42 80 44 8E 06 85 4C 80
+00 88 5E 8E 46 8E 39 4E 39 80 86 12 08 24 19 53
+02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
+30 41 3E 40 28 00 B0 12 30 8E 19 42 C6 21 A2 53
+C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
+92 53 C4 21 87 12 F2 83 06 85 4C 80 9A 8E 90 8E
+21 53 3E 90 10 00 80 2D E2 2B 9C 8E B2 41 C4 21
+DE 3F 0D 12 87 12 70 86 0C 8E AC 8E 0C 43 1B 42
+C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
+92 53 C4 21 B0 12 30 8E 3C 40 00 03 0E 93 1C 24
+3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
+3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
+3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
+26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 30 8E
+ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
+B0 12 7A 8E 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
+7A 8E 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
+0C 5E DA 3F B0 12 7A 8E FA 23 3C 50 10 00 B0 12
+62 8E EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 0D 12
+87 12 70 86 0C 8E 78 8F FE 90 26 00 00 00 3E 40
+20 00 03 20 3C 50 82 00 C7 3F B0 12 7A 8E E0 23
+3C 50 80 00 B0 12 62 8E DB 3F 00 00 04 52 45 54
+49 00 0D 12 87 12 24 80 00 13 F8 85 26 83 24 80
+2C 00 A2 8E 6E 8F B8 8F 09 4B 2E 4E 0E DC A2 3F
+F6 89 03 4D 4F 56 84 12 AE 8F 00 40 C2 8F 05 4D
+4F 56 2E 42 84 12 AE 8F 40 40 00 00 03 41 44 44
+84 12 AE 8F 00 50 DC 8F 05 41 44 44 2E 42 84 12
+AE 8F 40 50 E8 8F 04 41 44 44 43 00 84 12 AE 8F
+00 60 F6 8F 06 41 44 44 43 2E 42 00 84 12 AE 8F
+40 60 9C 8F 04 53 55 42 43 00 84 12 AE 8F 00 70
+14 90 06 53 55 42 43 2E 42 00 84 12 AE 8F 40 70
+22 90 03 53 55 42 84 12 AE 8F 00 80 32 90 05 53
+55 42 2E 42 84 12 AE 8F 40 80 D2 89 03 43 4D 50
+84 12 AE 8F 00 90 4C 90 05 43 4D 50 2E 42 84 12
+AE 8F 40 90 BE 89 04 44 41 44 44 00 84 12 AE 8F
+00 A0 66 90 06 44 41 44 44 2E 42 00 84 12 AE 8F
+40 A0 58 90 03 42 49 54 84 12 AE 8F 00 B0 84 90
+05 42 49 54 2E 42 84 12 AE 8F 40 B0 90 90 03 42
+49 43 84 12 AE 8F 00 C0 9E 90 05 42 49 43 2E 42
+84 12 AE 8F 40 C0 AA 90 03 42 49 53 84 12 AE 8F
+00 D0 B8 90 05 42 49 53 2E 42 84 12 AE 8F 40 D0
+00 00 03 58 4F 52 84 12 AE 8F 00 E0 D2 90 05 58
+4F 52 2E 42 84 12 AE 8F 40 E0 04 90 03 41 4E 44
+84 12 AE 8F 00 F0 EC 90 05 41 4E 44 2E 42 84 12
+AE 8F 40 F0 70 86 A2 8E 0A 91 0A 4C 3C F0 70 00
+8A 10 3A F0 0F 00 0C DA 4F 3F 3E 90 03 52 52 43
+84 12 04 91 00 10 1C 91 05 52 52 43 2E 42 84 12
+04 91 40 10 28 91 04 53 57 50 42 00 84 12 04 91
+80 10 36 91 03 52 52 41 84 12 04 91 00 11 44 91
+05 52 52 41 2E 42 84 12 04 91 40 11 50 91 03 53
+58 54 84 12 04 91 80 11 00 00 04 50 55 53 48 00
+84 12 04 91 00 12 6A 91 06 50 55 53 48 2E 42 00
+84 12 04 91 40 12 C4 90 04 43 41 4C 4C 00 84 12
+04 91 80 12 1A 53 0E 4A 0D 12 87 12 9C 83 2E 80
+0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 7A 87
+70 86 0C 8E B6 91 92 53 C4 21 3E 40 2C 00 87 12
+F2 83 06 85 4C 80 00 88 64 8F CC 91 0A 4E 3E 4F
+1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
+0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
+D1 2F 8A 10 5A 06 8F 3F 5E 91 04 52 52 43 4D 00
+84 12 B0 91 50 00 FA 91 04 52 52 41 4D 00 84 12
+B0 91 50 01 08 92 04 52 4C 41 4D 00 84 12 B0 91
+50 02 16 92 04 52 52 55 4D 00 84 12 B0 91 50 03
+78 91 05 50 55 53 48 4D 84 12 B0 91 00 15 32 92
+04 50 4F 50 4D 00 84 12 B0 91 00 17 24 92 03 53
+3E 3D 85 12 00 38 4E 92 02 53 3C 00 85 12 00 34
+40 92 03 30 3E 3D 85 12 00 30 62 92 02 30 3C 00
+85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 76 92
+03 55 3E 3D 85 12 00 28 6C 92 03 30 3C 3E 85 12
+00 24 8A 92 02 30 3D 00 85 12 00 20 00 00 02 49
+46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
+30 4D 80 92 04 54 48 45 4E 00 1A 42 C6 21 08 4E
+3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
+88 DA 00 00 30 4D 74 90 04 45 4C 53 45 00 1A 42
+C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
+00 00 E3 3F B4 92 05 55 4E 54 49 4C 3A 4F 08 4E
+3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
+42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
+30 4D F8 90 05 41 47 41 49 4E 0A 4E 38 40 00 3C
+E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12 A2 92
+82 82 26 83 58 92 06 52 45 50 45 41 54 00 0D 12
+87 12 2A 93 BA 92 26 83 5A 93 3D 41 08 4E 3E 4F
+2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00 30 4D
+88 91 03 42 57 31 84 12 58 93 00 00 72 93 03 42
+57 32 84 12 58 93 00 00 7E 93 03 42 57 33 84 12
+58 93 00 00 96 93 3D 41 1A 42 C6 21 28 4E B2 92
+C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
+3E 4F 30 4D 00 00 03 46 57 31 84 12 94 93 00 00
+B6 93 03 46 57 32 84 12 94 93 00 00 C2 93 03 46
+57 33 84 12 94 93 00 00 CE 93 04 47 4F 54 4F 00
+2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12 F0 87
+18 86 26 83 00 00 05 3F 47 4F 54 4F 3E 90 00 30
+F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0 00 08
+EC 3F
@FFFE
-9E 8E
+6E 8C
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 5E 96 D0 8C
-2D 01 6B 30 B6 82 C8 82
+10 00 08 00 00 D6 E8 03 05 00 18 00 02 94 88 8A
+2E 01 6B 30 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+38 00 29 83 B9 40 6E 8C 8C FF FB 23 B2 40 68 81
+E0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 82 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 E2 C3 43 02 30 41 B2 40 13 00 0E 05 E2 D3
-43 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A 83 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 E2 C3 43 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 E2 D3 43 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C 81 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 1C 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 44 8F DE 8B
-BE 88 32 8B 3A 8C 58 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 2A 90 E8 88 78 8A 00 00 84 12 7E 8C
-76 95 D8 95 2A 95 4C 96 F0 94 00 00 20 92 00 00
-E6 94 96 95 48 95 86 95 30 93 00 00 00 00 28 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 5E 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-5E 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 40 8E 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E 84 06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF
-A0 86 B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66
-72 65 65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 8E B2 40
-88 5A CC 01 B2 D3 06 02 B2 40 FE FF 02 02 B2 D3
-26 02 B2 40 FF 7F 22 02 B2 D3 46 02 B2 40 FC FF
-42 02 E2 D3 45 02 B2 40 00 A5 60 01 B2 40 FF 1E
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5C 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 E2 8D 1A 88
+AA 84 00 00 84 12 36 8A 14 93 7A 93 C8 92 CA 93
+8E 92 00 00 BE 8F 00 00 84 92 36 93 E6 92 24 93
+CE 90 00 00 00 00 E6 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A 02 94 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 02 94
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 12 8C 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83
+2E 80 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80
+40 FF 2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73
+20 66 72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 D3 06 02 B2 40 FE FF
+02 02 B2 D3 26 02 B2 40 FF 7F 22 02 B2 D3 46 02
+B2 40 FC FF 42 02 E2 D3 45 02 B2 40 00 A5 60 01
+B2 D0 10 00 86 01 F2 D0 03 00 0B 02 B2 40 FF 1E
80 01 B2 40 B0 00 82 01 B2 40 1E 00 84 01 39 40
-10 00 B2 D0 10 00 86 01 92 D2 5E 01 08 18 38 40
-59 14 18 83 FE 23 19 83 FA 23 39 40 00 20 29 83
-89 43 00 20 FC 23 39 40 38 00 29 83 B9 40 9E 8E
-8C FF FB 23 B2 40 26 83 E0 FF B2 40 81 00 00 05
-92 42 02 18 06 05 92 42 04 18 08 05 92 C3 00 05
-92 D3 1A 05 3F 40 80 20 31 40 E0 20 30 12 06 8E
-4C 3F 8A 8E 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D B2 89 86 5B 54 48 45 4E 5D 00 30 4D
-76 8F 86 5B 45 4C 53 45 5D 00 87 12 14 84 00 00
-C6 80 42 87 80 84 24 87 34 80 40 82 EC 8F 44 80
-1E 84 06 5B 54 48 45 4E 5D 00 4C 8F 4A 82 BC 8F
-F8 83 D0 80 58 80 4A 82 92 8F 2A 80 44 80 1E 84
-06 5B 45 4C 53 45 5D 00 4C 8F 4A 82 DA 8F F8 83
-D0 80 58 80 4A 82 90 8F 2A 80 1E 84 04 5B 49 46
-5D 00 4C 8F 4A 82 92 8F 3C 82 90 8F F8 83 1E 84
-05 0D 0A 6B 6F 20 D6 83 8C 83 32 87 3C 82 92 8F
-82 8F 84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D
-02 90 89 5B 44 45 46 49 4E 45 44 5D 87 12 42 87
-80 84 EE 84 6A 80 2A 80 12 90 8B 5B 55 4E 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-00 81 2A 80 46 90 3D 41 B2 4E 0E 18 A2 4E 0C 18
-3E 4F 30 40 56 8D 48 8C 06 4D 41 52 4B 45 52 00
-B0 12 B8 89 BA 40 84 12 FC FF BA 40 44 90 FE FF
-9A 42 C8 21 00 00 28 83 8A 48 02 00 A2 52 C6 21
-30 40 00 8A 1C 15 B0 12 2A 80 80 84 EE 84 4A 82
-9A 90 AA 85 40 82 CE 88 B4 90 9C 90 39 4E 39 80
-86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
-01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12 84 90
-19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 40 29 00
-1C 15 12 12 C4 21 92 53 C4 21 B0 12 2A 80 80 84
-AA 85 40 82 F2 90 E8 90 21 53 3E 90 10 00 7D 2D
-E1 2B F4 90 B2 41 C4 21 DD 3F 87 12 42 87 74 84
-02 91 0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F
-7A 90 23 00 27 20 92 53 C4 21 B0 12 84 90 3C 40
-00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40
-20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40
-30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40
-30 00 19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 4F
-3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53
-C4 21 B0 12 84 90 ED 3F 7A 90 40 00 16 20 3C 40
-20 00 92 53 C4 21 B0 12 D0 90 0C 20 3C 50 10 00
-3E 40 2B 00 B0 12 D0 90 92 92 C0 21 C4 21 02 24
-92 53 C4 21 8E 10 0C 5E DA 3F B0 12 D0 90 FA 23
-3C 50 10 00 B0 12 B8 90 EF 3F 0C 43 1B 42 C6 21
-A2 53 C6 21 87 12 42 87 74 84 CC 91 FE 90 26 00
-00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12
-D0 90 E1 23 3C 50 80 00 B0 12 B8 90 DC 3F D6 82
-04 52 45 54 49 00 87 12 14 84 00 13 B0 86 2A 80
-14 84 2C 00 FA 90 C4 91 0A 92 09 4B 2E 4E 0E DC
-A4 3F FC 8A 03 4D 4F 56 84 12 00 92 00 40 14 92
-05 4D 4F 56 2E 42 84 12 00 92 40 40 00 00 03 41
-44 44 84 12 00 92 00 50 2E 92 05 41 44 44 2E 42
-84 12 00 92 40 50 3A 92 04 41 44 44 43 00 84 12
-00 92 00 60 48 92 06 41 44 44 43 2E 42 00 84 12
-00 92 40 60 F0 91 04 53 55 42 43 00 84 12 00 92
-00 70 66 92 06 53 55 42 43 2E 42 00 84 12 00 92
-40 70 74 92 03 53 55 42 84 12 00 92 00 80 84 92
-05 53 55 42 2E 42 84 12 00 92 40 80 DE 8A 03 43
-4D 50 84 12 00 92 00 90 9E 92 05 43 4D 50 2E 42
-84 12 00 92 40 90 CC 8A 04 44 41 44 44 00 84 12
-00 92 00 A0 B8 92 06 44 41 44 44 2E 42 00 84 12
-00 92 40 A0 AA 92 03 42 49 54 84 12 00 92 00 B0
-D6 92 05 42 49 54 2E 42 84 12 00 92 40 B0 E2 92
-03 42 49 43 84 12 00 92 00 C0 F0 92 05 42 49 43
-2E 42 84 12 00 92 40 C0 FC 92 03 42 49 53 84 12
-00 92 00 D0 0A 93 05 42 49 53 2E 42 84 12 00 92
-40 D0 00 00 03 58 4F 52 84 12 00 92 00 E0 24 93
-05 58 4F 52 2E 42 84 12 00 92 40 E0 56 92 03 41
-4E 44 84 12 00 92 00 F0 3E 93 05 41 4E 44 2E 42
-84 12 00 92 40 F0 42 87 FA 90 5C 93 0A 4C 3C F0
-70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 90 92 03 52
-52 43 84 12 56 93 00 10 6E 93 05 52 52 43 2E 42
-84 12 56 93 40 10 7A 93 04 53 57 50 42 00 84 12
-56 93 80 10 88 93 03 52 52 41 84 12 56 93 00 11
-96 93 05 52 52 41 2E 42 84 12 56 93 40 11 A2 93
-03 53 58 54 84 12 56 93 80 11 00 00 04 50 55 53
-48 00 84 12 56 93 00 12 BC 93 06 50 55 53 48 2E
-42 00 84 12 56 93 40 12 16 93 04 43 41 4C 4C 00
-84 12 56 93 80 12 1A 53 0E 4A 87 12 34 82 1E 84
-0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 4C 88
-42 87 74 84 06 94 92 53 C4 21 3E 40 2C 00 B0 12
-2A 80 80 84 AA 85 40 82 CE 88 BA 91 1E 94 0A 4E
-3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
-01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
-2A 92 D1 2F 8A 10 5A 06 8F 3F B0 93 04 52 52 43
-4D 00 84 12 00 94 50 00 4C 94 04 52 52 41 4D 00
-84 12 00 94 50 01 5A 94 04 52 4C 41 4D 00 84 12
-00 94 50 02 68 94 04 52 52 55 4D 00 84 12 00 94
-50 03 CA 93 05 50 55 53 48 4D 84 12 00 94 00 15
-84 94 04 50 4F 50 4D 00 84 12 00 94 00 17 76 94
-03 53 3E 3D 85 12 00 38 A0 94 02 53 3C 00 85 12
-00 34 92 94 03 30 3E 3D 85 12 00 30 B4 94 02 30
-3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
-C8 94 03 55 3E 3D 85 12 00 28 BE 94 03 30 3C 3E
-85 12 00 24 DC 94 02 30 3D 00 85 12 00 20 00 00
-02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
-0E 4A 30 4D D2 94 04 54 48 45 4E 00 1A 42 C6 21
-08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
-63 2F 88 DA 00 00 30 4D C6 92 04 45 4C 53 45 00
-1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
-8F 4A 00 00 E3 3F 06 95 05 55 4E 54 49 4C 3A 4F
-08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
-00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
-C6 21 30 4D 4A 93 05 41 47 41 49 4E 0A 4E 38 40
-00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12 F4 94
-76 80 2A 80 AA 94 06 52 45 50 45 41 54 00 87 12
-7C 95 0C 95 2A 80 A8 95 3D 41 08 4E 3E 4F 2A 48
-B2 92 C4 21 CD 2F 98 42 C6 21 00 00 30 4D DA 93
-03 42 57 31 84 12 A6 95 00 00 C0 95 03 42 57 32
-84 12 A6 95 00 00 CC 95 03 42 57 33 84 12 A6 95
-00 00 E4 95 3D 41 1A 42 C6 21 28 4E B2 92 C4 21
-90 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F
-30 4D 00 00 03 46 57 31 84 12 E2 95 00 00 04 96
-03 46 57 32 84 12 E2 95 00 00 10 96 03 46 57 33
-84 12 E2 95 00 00 00 00 05 3F 47 4F 54 4F 3E 90
-00 30 07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0
-00 08 87 12 C0 88 DA 86 2A 80 1C 96 04 47 4F 54
-4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+10 00 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
+19 83 FA 23 39 40 00 20 29 83 89 43 00 20 FC 23
+B0 12 0E 80 B2 40 81 00 00 05 92 42 02 18 06 05
+92 42 04 18 08 05 92 C3 00 05 3F 40 80 20 30 12
+D4 8B 52 3F 24 89 86 5B 54 48 45 4E 5D 00 30 4D
+0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83
+06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27 2D 4D
+3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53 2D 53
+F7 3F 06 8D 86 5B 45 4C 53 45 5D 00 0D 12 87 12
+24 80 00 00 AA 82 70 86 F2 83 62 86 68 82 4C 80
+9E 8D 70 82 2E 80 06 5B 54 48 45 4E 5D 00 10 8D
+78 8D 34 8D 56 8D 26 83 70 82 2E 80 06 5B 45 4C
+53 45 5D 00 10 8D 8E 8D 34 8D 54 8D 26 83 2E 80
+04 5B 49 46 5D 00 10 8D 56 8D 48 80 54 8D 22 82
+2E 80 05 0D 0A 6B 6F 20 00 82 D4 80 C4 80 48 80
+56 8D 44 8D 84 5B 49 46 5D 00 0E 93 3E 4F C6 27
+30 4D 2F 53 30 4D B4 8D 89 5B 44 45 46 49 4E 45
+44 5D 0D 12 87 12 70 86 F2 83 4A 84 C2 8D 26 83
+C8 8D 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 0D 12
+87 12 D2 8D F6 8D 3D 41 30 40 B6 82 38 40 C0 21
+0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E 03 24
+7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21 30 4D
+1C 15 87 12 F2 83 4A 84 42 80 34 8E 06 85 4C 80
+00 88 4E 8E 36 8E 39 4E 39 80 86 12 08 24 19 53
+02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
+30 41 3E 40 28 00 B0 12 20 8E 19 42 C6 21 A2 53
+C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
+92 53 C4 21 87 12 F2 83 06 85 4C 80 8A 8E 80 8E
+21 53 3E 90 10 00 80 2D E2 2B 8C 8E B2 41 C4 21
+DE 3F 0D 12 87 12 70 86 FC 8D 9C 8E 0C 43 1B 42
+C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
+92 53 C4 21 B0 12 20 8E 3C 40 00 03 0E 93 1C 24
+3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
+3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
+3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
+26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 20 8E
+ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
+B0 12 6A 8E 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
+6A 8E 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
+0C 5E DA 3F B0 12 6A 8E FA 23 3C 50 10 00 B0 12
+52 8E EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 0D 12
+87 12 70 86 FC 8D 68 8F FE 90 26 00 00 00 3E 40
+20 00 03 20 3C 50 82 00 C7 3F B0 12 6A 8E E0 23
+3C 50 80 00 B0 12 52 8E DB 3F 00 00 04 52 45 54
+49 00 0D 12 87 12 24 80 00 13 F8 85 26 83 24 80
+2C 00 92 8E 5E 8F A8 8F 09 4B 2E 4E 0E DC A2 3F
+F6 89 03 4D 4F 56 84 12 9E 8F 00 40 B2 8F 05 4D
+4F 56 2E 42 84 12 9E 8F 40 40 00 00 03 41 44 44
+84 12 9E 8F 00 50 CC 8F 05 41 44 44 2E 42 84 12
+9E 8F 40 50 D8 8F 04 41 44 44 43 00 84 12 9E 8F
+00 60 E6 8F 06 41 44 44 43 2E 42 00 84 12 9E 8F
+40 60 8C 8F 04 53 55 42 43 00 84 12 9E 8F 00 70
+04 90 06 53 55 42 43 2E 42 00 84 12 9E 8F 40 70
+12 90 03 53 55 42 84 12 9E 8F 00 80 22 90 05 53
+55 42 2E 42 84 12 9E 8F 40 80 D2 89 03 43 4D 50
+84 12 9E 8F 00 90 3C 90 05 43 4D 50 2E 42 84 12
+9E 8F 40 90 BE 89 04 44 41 44 44 00 84 12 9E 8F
+00 A0 56 90 06 44 41 44 44 2E 42 00 84 12 9E 8F
+40 A0 48 90 03 42 49 54 84 12 9E 8F 00 B0 74 90
+05 42 49 54 2E 42 84 12 9E 8F 40 B0 80 90 03 42
+49 43 84 12 9E 8F 00 C0 8E 90 05 42 49 43 2E 42
+84 12 9E 8F 40 C0 9A 90 03 42 49 53 84 12 9E 8F
+00 D0 A8 90 05 42 49 53 2E 42 84 12 9E 8F 40 D0
+00 00 03 58 4F 52 84 12 9E 8F 00 E0 C2 90 05 58
+4F 52 2E 42 84 12 9E 8F 40 E0 F4 8F 03 41 4E 44
+84 12 9E 8F 00 F0 DC 90 05 41 4E 44 2E 42 84 12
+9E 8F 40 F0 70 86 92 8E FA 90 0A 4C 3C F0 70 00
+8A 10 3A F0 0F 00 0C DA 4F 3F 2E 90 03 52 52 43
+84 12 F4 90 00 10 0C 91 05 52 52 43 2E 42 84 12
+F4 90 40 10 18 91 04 53 57 50 42 00 84 12 F4 90
+80 10 26 91 03 52 52 41 84 12 F4 90 00 11 34 91
+05 52 52 41 2E 42 84 12 F4 90 40 11 40 91 03 53
+58 54 84 12 F4 90 80 11 00 00 04 50 55 53 48 00
+84 12 F4 90 00 12 5A 91 06 50 55 53 48 2E 42 00
+84 12 F4 90 40 12 B4 90 04 43 41 4C 4C 00 84 12
+F4 90 80 12 1A 53 0E 4A 0D 12 87 12 9C 83 2E 80
+0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 7A 87
+70 86 FC 8D A6 91 92 53 C4 21 3E 40 2C 00 87 12
+F2 83 06 85 4C 80 00 88 54 8F BC 91 0A 4E 3E 4F
+1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
+0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
+D1 2F 8A 10 5A 06 8F 3F 4E 91 04 52 52 43 4D 00
+84 12 A0 91 50 00 EA 91 04 52 52 41 4D 00 84 12
+A0 91 50 01 F8 91 04 52 4C 41 4D 00 84 12 A0 91
+50 02 06 92 04 52 52 55 4D 00 84 12 A0 91 50 03
+68 91 05 50 55 53 48 4D 84 12 A0 91 00 15 22 92
+04 50 4F 50 4D 00 84 12 A0 91 00 17 14 92 03 53
+3E 3D 85 12 00 38 3E 92 02 53 3C 00 85 12 00 34
+30 92 03 30 3E 3D 85 12 00 30 52 92 02 30 3C 00
+85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 66 92
+03 55 3E 3D 85 12 00 28 5C 92 03 30 3C 3E 85 12
+00 24 7A 92 02 30 3D 00 85 12 00 20 00 00 02 49
+46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
+30 4D 70 92 04 54 48 45 4E 00 1A 42 C6 21 08 4E
+3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
+88 DA 00 00 30 4D 64 90 04 45 4C 53 45 00 1A 42
+C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
+00 00 E3 3F A4 92 05 55 4E 54 49 4C 3A 4F 08 4E
+3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
+42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
+30 4D E8 90 05 41 47 41 49 4E 0A 4E 38 40 00 3C
+E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12 92 92
+82 82 26 83 48 92 06 52 45 50 45 41 54 00 0D 12
+87 12 1A 93 AA 92 26 83 4A 93 3D 41 08 4E 3E 4F
+2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00 30 4D
+78 91 03 42 57 31 84 12 48 93 00 00 62 93 03 42
+57 32 84 12 48 93 00 00 6E 93 03 42 57 33 84 12
+48 93 00 00 86 93 3D 41 1A 42 C6 21 28 4E B2 92
+C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
+3E 4F 30 4D 00 00 03 46 57 31 84 12 84 93 00 00
+A6 93 03 46 57 32 84 12 84 93 00 00 B2 93 03 46
+57 33 84 12 84 93 00 00 BE 93 04 47 4F 54 4F 00
+2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12 F0 87
+18 86 26 83 00 00 05 3F 47 4F 54 4F 3E 90 00 30
+F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0 00 08
+EC 3F
@FFFE
-9E 8E
+6E 8C
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 5E 96 D0 8C
-2D 01 6B 30 B6 82 C8 82
+10 00 04 00 51 55 40 1F 05 00 18 00 02 94 88 8A
+2E 01 6B 30 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+38 00 29 83 B9 40 6E 8C 8C FF FB 23 B2 40 68 81
+E0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 82 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 E2 C3 43 02 30 41 B2 40 13 00 0E 05 E2 D3
-43 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A 83 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 E2 C3 43 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 E2 D3 43 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C 81 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 1C 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 44 8F DE 8B
-BE 88 32 8B 3A 8C 58 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 2A 90 E8 88 78 8A 00 00 84 12 7E 8C
-76 95 D8 95 2A 95 4C 96 F0 94 00 00 20 92 00 00
-E6 94 96 95 48 95 86 95 30 93 00 00 00 00 28 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 5E 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-5E 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 40 8E 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E 84 06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF
-A0 86 B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66
-72 65 65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 8E B2 40
-88 5A CC 01 B2 D3 06 02 B2 40 FE FF 02 02 B2 D3
-26 02 B2 40 FF 7F 22 02 B2 D3 46 02 B2 40 FC FF
-42 02 E2 D3 45 02 B2 40 00 A5 60 01 B2 40 FF 1E
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5C 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 E2 8D 1A 88
+AA 84 00 00 84 12 36 8A 14 93 7A 93 C8 92 CA 93
+8E 92 00 00 BE 8F 00 00 84 92 36 93 E6 92 24 93
+CE 90 00 00 00 00 E6 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A 02 94 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 02 94
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 12 8C 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83
+2E 80 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80
+40 FF 2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73
+20 66 72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 D3 06 02 B2 40 FE FF
+02 02 B2 D3 26 02 B2 40 FF 7F 22 02 B2 D3 46 02
+B2 40 FC FF 42 02 E2 D3 45 02 B2 40 00 A5 60 01
+B2 D0 10 00 86 01 F2 D0 03 00 0B 02 B2 40 FF 1E
80 01 B2 40 B6 00 82 01 B2 40 F4 00 84 01 39 40
-80 00 B2 D0 10 00 86 01 92 D2 5E 01 08 18 38 40
-59 14 18 83 FE 23 19 83 FA 23 39 40 00 20 29 83
-89 43 00 20 FC 23 39 40 38 00 29 83 B9 40 9E 8E
-8C FF FB 23 B2 40 26 83 E0 FF B2 40 81 00 00 05
-92 42 02 18 06 05 92 42 04 18 08 05 92 C3 00 05
-92 D3 1A 05 3F 40 80 20 31 40 E0 20 30 12 06 8E
-4C 3F 8A 8E 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D B2 89 86 5B 54 48 45 4E 5D 00 30 4D
-76 8F 86 5B 45 4C 53 45 5D 00 87 12 14 84 00 00
-C6 80 42 87 80 84 24 87 34 80 40 82 EC 8F 44 80
-1E 84 06 5B 54 48 45 4E 5D 00 4C 8F 4A 82 BC 8F
-F8 83 D0 80 58 80 4A 82 92 8F 2A 80 44 80 1E 84
-06 5B 45 4C 53 45 5D 00 4C 8F 4A 82 DA 8F F8 83
-D0 80 58 80 4A 82 90 8F 2A 80 1E 84 04 5B 49 46
-5D 00 4C 8F 4A 82 92 8F 3C 82 90 8F F8 83 1E 84
-05 0D 0A 6B 6F 20 D6 83 8C 83 32 87 3C 82 92 8F
-82 8F 84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D
-02 90 89 5B 44 45 46 49 4E 45 44 5D 87 12 42 87
-80 84 EE 84 6A 80 2A 80 12 90 8B 5B 55 4E 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-00 81 2A 80 46 90 3D 41 B2 4E 0E 18 A2 4E 0C 18
-3E 4F 30 40 56 8D 48 8C 06 4D 41 52 4B 45 52 00
-B0 12 B8 89 BA 40 84 12 FC FF BA 40 44 90 FE FF
-9A 42 C8 21 00 00 28 83 8A 48 02 00 A2 52 C6 21
-30 40 00 8A 1C 15 B0 12 2A 80 80 84 EE 84 4A 82
-9A 90 AA 85 40 82 CE 88 B4 90 9C 90 39 4E 39 80
-86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
-01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12 84 90
-19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 40 29 00
-1C 15 12 12 C4 21 92 53 C4 21 B0 12 2A 80 80 84
-AA 85 40 82 F2 90 E8 90 21 53 3E 90 10 00 7D 2D
-E1 2B F4 90 B2 41 C4 21 DD 3F 87 12 42 87 74 84
-02 91 0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F
-7A 90 23 00 27 20 92 53 C4 21 B0 12 84 90 3C 40
-00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40
-20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40
-30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40
-30 00 19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 4F
-3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53
-C4 21 B0 12 84 90 ED 3F 7A 90 40 00 16 20 3C 40
-20 00 92 53 C4 21 B0 12 D0 90 0C 20 3C 50 10 00
-3E 40 2B 00 B0 12 D0 90 92 92 C0 21 C4 21 02 24
-92 53 C4 21 8E 10 0C 5E DA 3F B0 12 D0 90 FA 23
-3C 50 10 00 B0 12 B8 90 EF 3F 0C 43 1B 42 C6 21
-A2 53 C6 21 87 12 42 87 74 84 CC 91 FE 90 26 00
-00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12
-D0 90 E1 23 3C 50 80 00 B0 12 B8 90 DC 3F D6 82
-04 52 45 54 49 00 87 12 14 84 00 13 B0 86 2A 80
-14 84 2C 00 FA 90 C4 91 0A 92 09 4B 2E 4E 0E DC
-A4 3F FC 8A 03 4D 4F 56 84 12 00 92 00 40 14 92
-05 4D 4F 56 2E 42 84 12 00 92 40 40 00 00 03 41
-44 44 84 12 00 92 00 50 2E 92 05 41 44 44 2E 42
-84 12 00 92 40 50 3A 92 04 41 44 44 43 00 84 12
-00 92 00 60 48 92 06 41 44 44 43 2E 42 00 84 12
-00 92 40 60 F0 91 04 53 55 42 43 00 84 12 00 92
-00 70 66 92 06 53 55 42 43 2E 42 00 84 12 00 92
-40 70 74 92 03 53 55 42 84 12 00 92 00 80 84 92
-05 53 55 42 2E 42 84 12 00 92 40 80 DE 8A 03 43
-4D 50 84 12 00 92 00 90 9E 92 05 43 4D 50 2E 42
-84 12 00 92 40 90 CC 8A 04 44 41 44 44 00 84 12
-00 92 00 A0 B8 92 06 44 41 44 44 2E 42 00 84 12
-00 92 40 A0 AA 92 03 42 49 54 84 12 00 92 00 B0
-D6 92 05 42 49 54 2E 42 84 12 00 92 40 B0 E2 92
-03 42 49 43 84 12 00 92 00 C0 F0 92 05 42 49 43
-2E 42 84 12 00 92 40 C0 FC 92 03 42 49 53 84 12
-00 92 00 D0 0A 93 05 42 49 53 2E 42 84 12 00 92
-40 D0 00 00 03 58 4F 52 84 12 00 92 00 E0 24 93
-05 58 4F 52 2E 42 84 12 00 92 40 E0 56 92 03 41
-4E 44 84 12 00 92 00 F0 3E 93 05 41 4E 44 2E 42
-84 12 00 92 40 F0 42 87 FA 90 5C 93 0A 4C 3C F0
-70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 90 92 03 52
-52 43 84 12 56 93 00 10 6E 93 05 52 52 43 2E 42
-84 12 56 93 40 10 7A 93 04 53 57 50 42 00 84 12
-56 93 80 10 88 93 03 52 52 41 84 12 56 93 00 11
-96 93 05 52 52 41 2E 42 84 12 56 93 40 11 A2 93
-03 53 58 54 84 12 56 93 80 11 00 00 04 50 55 53
-48 00 84 12 56 93 00 12 BC 93 06 50 55 53 48 2E
-42 00 84 12 56 93 40 12 16 93 04 43 41 4C 4C 00
-84 12 56 93 80 12 1A 53 0E 4A 87 12 34 82 1E 84
-0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 4C 88
-42 87 74 84 06 94 92 53 C4 21 3E 40 2C 00 B0 12
-2A 80 80 84 AA 85 40 82 CE 88 BA 91 1E 94 0A 4E
-3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
-01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
-2A 92 D1 2F 8A 10 5A 06 8F 3F B0 93 04 52 52 43
-4D 00 84 12 00 94 50 00 4C 94 04 52 52 41 4D 00
-84 12 00 94 50 01 5A 94 04 52 4C 41 4D 00 84 12
-00 94 50 02 68 94 04 52 52 55 4D 00 84 12 00 94
-50 03 CA 93 05 50 55 53 48 4D 84 12 00 94 00 15
-84 94 04 50 4F 50 4D 00 84 12 00 94 00 17 76 94
-03 53 3E 3D 85 12 00 38 A0 94 02 53 3C 00 85 12
-00 34 92 94 03 30 3E 3D 85 12 00 30 B4 94 02 30
-3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
-C8 94 03 55 3E 3D 85 12 00 28 BE 94 03 30 3C 3E
-85 12 00 24 DC 94 02 30 3D 00 85 12 00 20 00 00
-02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
-0E 4A 30 4D D2 94 04 54 48 45 4E 00 1A 42 C6 21
-08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
-63 2F 88 DA 00 00 30 4D C6 92 04 45 4C 53 45 00
-1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
-8F 4A 00 00 E3 3F 06 95 05 55 4E 54 49 4C 3A 4F
-08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
-00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
-C6 21 30 4D 4A 93 05 41 47 41 49 4E 0A 4E 38 40
-00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12 F4 94
-76 80 2A 80 AA 94 06 52 45 50 45 41 54 00 87 12
-7C 95 0C 95 2A 80 A8 95 3D 41 08 4E 3E 4F 2A 48
-B2 92 C4 21 CD 2F 98 42 C6 21 00 00 30 4D DA 93
-03 42 57 31 84 12 A6 95 00 00 C0 95 03 42 57 32
-84 12 A6 95 00 00 CC 95 03 42 57 33 84 12 A6 95
-00 00 E4 95 3D 41 1A 42 C6 21 28 4E B2 92 C4 21
-90 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F
-30 4D 00 00 03 46 57 31 84 12 E2 95 00 00 04 96
-03 46 57 32 84 12 E2 95 00 00 10 96 03 46 57 33
-84 12 E2 95 00 00 00 00 05 3F 47 4F 54 4F 3E 90
-00 30 07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0
-00 08 87 12 C0 88 DA 86 2A 80 1C 96 04 47 4F 54
-4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+80 00 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
+19 83 FA 23 39 40 00 20 29 83 89 43 00 20 FC 23
+B0 12 0E 80 B2 40 81 00 00 05 92 42 02 18 06 05
+92 42 04 18 08 05 92 C3 00 05 3F 40 80 20 30 12
+D4 8B 52 3F 24 89 86 5B 54 48 45 4E 5D 00 30 4D
+0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83
+06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27 2D 4D
+3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53 2D 53
+F7 3F 06 8D 86 5B 45 4C 53 45 5D 00 0D 12 87 12
+24 80 00 00 AA 82 70 86 F2 83 62 86 68 82 4C 80
+9E 8D 70 82 2E 80 06 5B 54 48 45 4E 5D 00 10 8D
+78 8D 34 8D 56 8D 26 83 70 82 2E 80 06 5B 45 4C
+53 45 5D 00 10 8D 8E 8D 34 8D 54 8D 26 83 2E 80
+04 5B 49 46 5D 00 10 8D 56 8D 48 80 54 8D 22 82
+2E 80 05 0D 0A 6B 6F 20 00 82 D4 80 C4 80 48 80
+56 8D 44 8D 84 5B 49 46 5D 00 0E 93 3E 4F C6 27
+30 4D 2F 53 30 4D B4 8D 89 5B 44 45 46 49 4E 45
+44 5D 0D 12 87 12 70 86 F2 83 4A 84 C2 8D 26 83
+C8 8D 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 0D 12
+87 12 D2 8D F6 8D 3D 41 30 40 B6 82 38 40 C0 21
+0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E 03 24
+7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21 30 4D
+1C 15 87 12 F2 83 4A 84 42 80 34 8E 06 85 4C 80
+00 88 4E 8E 36 8E 39 4E 39 80 86 12 08 24 19 53
+02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
+30 41 3E 40 28 00 B0 12 20 8E 19 42 C6 21 A2 53
+C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
+92 53 C4 21 87 12 F2 83 06 85 4C 80 8A 8E 80 8E
+21 53 3E 90 10 00 80 2D E2 2B 8C 8E B2 41 C4 21
+DE 3F 0D 12 87 12 70 86 FC 8D 9C 8E 0C 43 1B 42
+C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
+92 53 C4 21 B0 12 20 8E 3C 40 00 03 0E 93 1C 24
+3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
+3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
+3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
+26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 20 8E
+ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
+B0 12 6A 8E 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
+6A 8E 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
+0C 5E DA 3F B0 12 6A 8E FA 23 3C 50 10 00 B0 12
+52 8E EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 0D 12
+87 12 70 86 FC 8D 68 8F FE 90 26 00 00 00 3E 40
+20 00 03 20 3C 50 82 00 C7 3F B0 12 6A 8E E0 23
+3C 50 80 00 B0 12 52 8E DB 3F 00 00 04 52 45 54
+49 00 0D 12 87 12 24 80 00 13 F8 85 26 83 24 80
+2C 00 92 8E 5E 8F A8 8F 09 4B 2E 4E 0E DC A2 3F
+F6 89 03 4D 4F 56 84 12 9E 8F 00 40 B2 8F 05 4D
+4F 56 2E 42 84 12 9E 8F 40 40 00 00 03 41 44 44
+84 12 9E 8F 00 50 CC 8F 05 41 44 44 2E 42 84 12
+9E 8F 40 50 D8 8F 04 41 44 44 43 00 84 12 9E 8F
+00 60 E6 8F 06 41 44 44 43 2E 42 00 84 12 9E 8F
+40 60 8C 8F 04 53 55 42 43 00 84 12 9E 8F 00 70
+04 90 06 53 55 42 43 2E 42 00 84 12 9E 8F 40 70
+12 90 03 53 55 42 84 12 9E 8F 00 80 22 90 05 53
+55 42 2E 42 84 12 9E 8F 40 80 D2 89 03 43 4D 50
+84 12 9E 8F 00 90 3C 90 05 43 4D 50 2E 42 84 12
+9E 8F 40 90 BE 89 04 44 41 44 44 00 84 12 9E 8F
+00 A0 56 90 06 44 41 44 44 2E 42 00 84 12 9E 8F
+40 A0 48 90 03 42 49 54 84 12 9E 8F 00 B0 74 90
+05 42 49 54 2E 42 84 12 9E 8F 40 B0 80 90 03 42
+49 43 84 12 9E 8F 00 C0 8E 90 05 42 49 43 2E 42
+84 12 9E 8F 40 C0 9A 90 03 42 49 53 84 12 9E 8F
+00 D0 A8 90 05 42 49 53 2E 42 84 12 9E 8F 40 D0
+00 00 03 58 4F 52 84 12 9E 8F 00 E0 C2 90 05 58
+4F 52 2E 42 84 12 9E 8F 40 E0 F4 8F 03 41 4E 44
+84 12 9E 8F 00 F0 DC 90 05 41 4E 44 2E 42 84 12
+9E 8F 40 F0 70 86 92 8E FA 90 0A 4C 3C F0 70 00
+8A 10 3A F0 0F 00 0C DA 4F 3F 2E 90 03 52 52 43
+84 12 F4 90 00 10 0C 91 05 52 52 43 2E 42 84 12
+F4 90 40 10 18 91 04 53 57 50 42 00 84 12 F4 90
+80 10 26 91 03 52 52 41 84 12 F4 90 00 11 34 91
+05 52 52 41 2E 42 84 12 F4 90 40 11 40 91 03 53
+58 54 84 12 F4 90 80 11 00 00 04 50 55 53 48 00
+84 12 F4 90 00 12 5A 91 06 50 55 53 48 2E 42 00
+84 12 F4 90 40 12 B4 90 04 43 41 4C 4C 00 84 12
+F4 90 80 12 1A 53 0E 4A 0D 12 87 12 9C 83 2E 80
+0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 7A 87
+70 86 FC 8D A6 91 92 53 C4 21 3E 40 2C 00 87 12
+F2 83 06 85 4C 80 00 88 54 8F BC 91 0A 4E 3E 4F
+1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
+0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
+D1 2F 8A 10 5A 06 8F 3F 4E 91 04 52 52 43 4D 00
+84 12 A0 91 50 00 EA 91 04 52 52 41 4D 00 84 12
+A0 91 50 01 F8 91 04 52 4C 41 4D 00 84 12 A0 91
+50 02 06 92 04 52 52 55 4D 00 84 12 A0 91 50 03
+68 91 05 50 55 53 48 4D 84 12 A0 91 00 15 22 92
+04 50 4F 50 4D 00 84 12 A0 91 00 17 14 92 03 53
+3E 3D 85 12 00 38 3E 92 02 53 3C 00 85 12 00 34
+30 92 03 30 3E 3D 85 12 00 30 52 92 02 30 3C 00
+85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 66 92
+03 55 3E 3D 85 12 00 28 5C 92 03 30 3C 3E 85 12
+00 24 7A 92 02 30 3D 00 85 12 00 20 00 00 02 49
+46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
+30 4D 70 92 04 54 48 45 4E 00 1A 42 C6 21 08 4E
+3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
+88 DA 00 00 30 4D 64 90 04 45 4C 53 45 00 1A 42
+C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
+00 00 E3 3F A4 92 05 55 4E 54 49 4C 3A 4F 08 4E
+3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
+42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
+30 4D E8 90 05 41 47 41 49 4E 0A 4E 38 40 00 3C
+E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12 92 92
+82 82 26 83 48 92 06 52 45 50 45 41 54 00 0D 12
+87 12 1A 93 AA 92 26 83 4A 93 3D 41 08 4E 3E 4F
+2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00 30 4D
+78 91 03 42 57 31 84 12 48 93 00 00 62 93 03 42
+57 32 84 12 48 93 00 00 6E 93 03 42 57 33 84 12
+48 93 00 00 86 93 3D 41 1A 42 C6 21 28 4E B2 92
+C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
+3E 4F 30 4D 00 00 03 46 57 31 84 12 84 93 00 00
+A6 93 03 46 57 32 84 12 84 93 00 00 B2 93 03 46
+57 33 84 12 84 93 00 00 BE 93 04 47 4F 54 4F 00
+2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12 F0 87
+18 86 26 83 00 00 05 3F 47 4F 54 4F 3E 90 00 30
+F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0 00 08
+EC 3F
@FFFE
-9E 8E
+6E 8C
q
+++ /dev/null
-Tue Jun 11 13:46:45 2019: * -----/|-------------------------------------------------------------------- *
-Tue Jun 11 13:46:45 2019: * / |__ *
-Tue Jun 11 13:46:45 2019: * /_ / MSP Flasher v1.3.18 *
-Tue Jun 11 13:46:45 2019: * | / *
-Tue Jun 11 13:46:45 2019: * -----|/-------------------------------------------------------------------- *
-Tue Jun 11 13:46:45 2019: *
-Tue Jun 11 13:46:45 2019: * Evaluating triggers...done
-Tue Jun 11 13:46:45 2019: * Checking for available FET debuggers:
-Tue Jun 11 13:46:45 2019: * Found USB FET @ COM4 <- Selected
-Tue Jun 11 13:46:45 2019: * Initializing interface @ COM4...done
-Tue Jun 11 13:46:46 2019: * Checking firmware compatibility:
-Tue Jun 11 13:46:46 2019: * FET firmware is up to date.
-Tue Jun 11 13:46:46 2019: * Reading FW version...
-Tue Jun 11 13:46:46 2019: * Debugger does not support target voltages other than 3000 mV!
-Tue Jun 11 13:46:46 2019: * Setting VCC to 3000 mV...done
-Tue Jun 11 13:46:48 2019: * Accessing device...done
-Tue Jun 11 13:46:48 2019: * Reading device information...done
-Tue Jun 11 13:46:48 2019: * Loading file into device...done
-Tue Jun 11 13:46:50 2019: * Verifying memory (B:\binaries\MSP_EXP430FR5994_16MHz.txt)...done
-Tue Jun 11 13:46:52 2019: *
-Tue Jun 11 13:46:52 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:46:52 2019: * Arguments : -s -m SBW2 -n MSP430FR5994 -v -w B:\binaries\MSP_EXP430FR5994_16MHz.txt -z [RESET,VCC]
-Tue Jun 11 13:46:52 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:46:52 2019: * Driver : loaded
-Tue Jun 11 13:46:52 2019: * Dll Version : 31300001
-Tue Jun 11 13:46:52 2019: * FwVersion : 31200000
-Tue Jun 11 13:46:52 2019: * Interface : TIUSB
-Tue Jun 11 13:46:52 2019: * HwVersion : E 4.0
-Tue Jun 11 13:46:52 2019: * JTAG Mode : AUTO
-Tue Jun 11 13:46:52 2019: * Device : MSP430FR5994
-Tue Jun 11 13:46:52 2019: * EEM : Level 5, ClockCntrl 2
-Tue Jun 11 13:46:52 2019: * Erase Mode : ERASE_ALL
-Tue Jun 11 13:46:52 2019: * Prog.File : B:\binaries\MSP_EXP430FR5994_16MHz.txt
-Tue Jun 11 13:46:52 2019: * Verified : TRUE
-Tue Jun 11 13:46:52 2019: * BSL Unlock : FALSE
-Tue Jun 11 13:46:52 2019: * InfoA Access: FALSE
-Tue Jun 11 13:46:52 2019: * VCC ON : 3000 mV
-Tue Jun 11 13:46:52 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:46:52 2019: * Resetting device (RST/NMI)...done
-Tue Jun 11 13:46:53 2019: * Starting target code execution...done
-Tue Jun 11 13:46:53 2019: * Disconnecting from device...done
-Tue Jun 11 13:46:53 2019: *
-Tue Jun 11 13:46:53 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:46:53 2019: * Driver : closed (No error)
-Tue Jun 11 13:46:53 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:46:53 2019: */
-Tue Jun 11 13:48:24 2019: * -----/|-------------------------------------------------------------------- *
-Tue Jun 11 13:48:24 2019: * / |__ *
-Tue Jun 11 13:48:24 2019: * /_ / MSP Flasher v1.3.18 *
-Tue Jun 11 13:48:24 2019: * | / *
-Tue Jun 11 13:48:24 2019: * -----|/-------------------------------------------------------------------- *
-Tue Jun 11 13:48:24 2019: *
-Tue Jun 11 13:48:24 2019: * Evaluating triggers...done
-Tue Jun 11 13:48:24 2019: * Checking for available FET debuggers:
-Tue Jun 11 13:48:25 2019: * Found USB FET @ COM4 <- Selected
-Tue Jun 11 13:48:25 2019: * Initializing interface @ COM4...done
-Tue Jun 11 13:48:25 2019: * Checking firmware compatibility:
-Tue Jun 11 13:48:25 2019: * FET firmware is up to date.
-Tue Jun 11 13:48:25 2019: * Reading FW version...
-Tue Jun 11 13:48:25 2019: * Debugger does not support target voltages other than 3000 mV!
-Tue Jun 11 13:48:25 2019: * Setting VCC to 3000 mV...done
-Tue Jun 11 13:48:27 2019: * Accessing device...done
-Tue Jun 11 13:48:27 2019: * Reading device information...done
-Tue Jun 11 13:48:27 2019: * Loading file into device...done
-Tue Jun 11 13:48:29 2019: * Verifying memory (B:\binaries\MSP_EXP430FR5994_16MHz.txt)...done
-Tue Jun 11 13:48:31 2019: *
-Tue Jun 11 13:48:31 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:48:31 2019: * Arguments : -s -m SBW2 -n MSP430FR5994 -v -w B:\binaries\MSP_EXP430FR5994_16MHz.txt -z [RESET,VCC]
-Tue Jun 11 13:48:31 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:48:31 2019: * Driver : loaded
-Tue Jun 11 13:48:31 2019: * Dll Version : 31300001
-Tue Jun 11 13:48:31 2019: * FwVersion : 31200000
-Tue Jun 11 13:48:31 2019: * Interface : TIUSB
-Tue Jun 11 13:48:31 2019: * HwVersion : E 4.0
-Tue Jun 11 13:48:31 2019: * JTAG Mode : AUTO
-Tue Jun 11 13:48:31 2019: * Device : MSP430FR5994
-Tue Jun 11 13:48:31 2019: * EEM : Level 5, ClockCntrl 2
-Tue Jun 11 13:48:31 2019: * Erase Mode : ERASE_ALL
-Tue Jun 11 13:48:31 2019: * Prog.File : B:\binaries\MSP_EXP430FR5994_16MHz.txt
-Tue Jun 11 13:48:31 2019: * Verified : TRUE
-Tue Jun 11 13:48:31 2019: * BSL Unlock : FALSE
-Tue Jun 11 13:48:31 2019: * InfoA Access: FALSE
-Tue Jun 11 13:48:31 2019: * VCC ON : 3000 mV
-Tue Jun 11 13:48:31 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:48:31 2019: * Resetting device (RST/NMI)...done
-Tue Jun 11 13:48:32 2019: * Starting target code execution...done
-Tue Jun 11 13:48:32 2019: * Disconnecting from device...done
-Tue Jun 11 13:48:32 2019: *
-Tue Jun 11 13:48:32 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:48:32 2019: * Driver : closed (No error)
-Tue Jun 11 13:48:32 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 13:48:32 2019: */
-Tue Jun 11 14:01:29 2019: * -----/|-------------------------------------------------------------------- *
-Tue Jun 11 14:01:29 2019: * / |__ *
-Tue Jun 11 14:01:29 2019: * /_ / MSP Flasher v1.3.18 *
-Tue Jun 11 14:01:29 2019: * | / *
-Tue Jun 11 14:01:29 2019: * -----|/-------------------------------------------------------------------- *
-Tue Jun 11 14:01:29 2019: *
-Tue Jun 11 14:01:29 2019: * Evaluating triggers...done
-Tue Jun 11 14:01:29 2019: * Checking for available FET debuggers:
-Tue Jun 11 14:01:30 2019: * Found USB FET @ COM4 <- Selected
-Tue Jun 11 14:01:30 2019: * Initializing interface @ COM4...done
-Tue Jun 11 14:01:30 2019: * Checking firmware compatibility:
-Tue Jun 11 14:01:30 2019: * FET firmware is up to date.
-Tue Jun 11 14:01:30 2019: * Reading FW version...
-Tue Jun 11 14:01:30 2019: * Debugger does not support target voltages other than 3000 mV!
-Tue Jun 11 14:01:30 2019: * Setting VCC to 3000 mV...done
-Tue Jun 11 14:01:30 2019: * Accessing device...done
-Tue Jun 11 14:01:31 2019: * Reading device information...done
-Tue Jun 11 14:01:31 2019: * Loading file into device...done
-Tue Jun 11 14:01:33 2019: * Verifying memory (B:\binaries\MSP_EXP430FR5994_16MHz.txt)...done
-Tue Jun 11 14:01:34 2019: *
-Tue Jun 11 14:01:34 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 14:01:34 2019: * Arguments : -s -m SBW2 -n MSP430FR5994 -v -w B:\binaries\MSP_EXP430FR5994_16MHz.txt -z [RESET,VCC]
-Tue Jun 11 14:01:34 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 14:01:34 2019: * Driver : loaded
-Tue Jun 11 14:01:34 2019: * Dll Version : 31300001
-Tue Jun 11 14:01:34 2019: * FwVersion : 31200000
-Tue Jun 11 14:01:34 2019: * Interface : TIUSB
-Tue Jun 11 14:01:34 2019: * HwVersion : E 4.0
-Tue Jun 11 14:01:34 2019: * JTAG Mode : AUTO
-Tue Jun 11 14:01:34 2019: * Device : MSP430FR5994
-Tue Jun 11 14:01:34 2019: * EEM : Level 5, ClockCntrl 2
-Tue Jun 11 14:01:34 2019: * Erase Mode : ERASE_ALL
-Tue Jun 11 14:01:34 2019: * Prog.File : B:\binaries\MSP_EXP430FR5994_16MHz.txt
-Tue Jun 11 14:01:34 2019: * Verified : TRUE
-Tue Jun 11 14:01:34 2019: * BSL Unlock : FALSE
-Tue Jun 11 14:01:34 2019: * InfoA Access: FALSE
-Tue Jun 11 14:01:34 2019: * VCC ON : 3000 mV
-Tue Jun 11 14:01:34 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 14:01:34 2019: * Resetting device (RST/NMI)...done
-Tue Jun 11 14:01:35 2019: * Starting target code execution...done
-Tue Jun 11 14:01:36 2019: * Disconnecting from device...done
-Tue Jun 11 14:01:36 2019: *
-Tue Jun 11 14:01:36 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 14:01:36 2019: * Driver : closed (No error)
-Tue Jun 11 14:01:36 2019: * ----------------------------------------------------------------------------
-Tue Jun 11 14:01:36 2019: */
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 68 96 D0 8C
-2D 01 6B B0 B6 82 C8 82
+10 00 08 00 A1 F7 80 3E 05 00 18 00 0C 94 88 8A
+2E 01 6B B0 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C 8C CE FF FB 23 B2 40 68 81
+E2 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 8C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 9C 05 FD 27 1E 42 8C 05
-B0 12 C8 82 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
-8E 05 D2 C3 03 02 30 41 B2 40 13 00 8E 05 D2 D3
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 8C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 9C 05
-FD 27 82 48 8E 05 30 4D 5A 83 2D 83 92 B3 9C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
+8E 05 D2 C3 03 02 30 41 A2 B3 9C 05 FD 27 B2 40
+13 00 8E 05 D2 D3 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 8C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+9C 05 FD 27 82 48 8E 05 30 4D 9C 81 2D 83 92 B3
+9C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 8C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 9C 05 FD 27 1E 42
+8C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 9C 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 9C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 4E 8F DE 8B
-BE 88 32 8B 3A 8C 62 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 34 90 E8 88 78 8A 00 00 84 12 7E 8C
-80 95 E2 95 34 95 56 96 FA 94 00 00 2A 92 00 00
-F0 94 A0 95 52 95 90 95 3A 93 00 00 00 00 32 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 68 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-68 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 3E 8E 92 C3
-30 01 1E 42 08 18 0E 93 11 24 F2 B2 21 02 02 20
-3E E3 1E 53 F2 D0 0C 00 2B 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 84
-06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF A0 86
-B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00 92 B3
-8A 05 FD 23 B2 40 04 A5 20 01 3E 8E B2 40 88 5A
-CC 01 B2 43 06 02 B2 40 FE FF 02 02 D2 D3 05 02
-F2 D3 26 02 F2 43 22 02 F2 D3 47 02 F2 40 BF 00
-43 02 F2 40 A5 00 A1 01 F2 40 10 00 A0 01 D2 43
-A1 01 B2 40 00 A5 60 01 82 43 88 01 B2 40 FF 1E
-80 01 B2 40 BA 00 82 01 B2 40 E8 01 84 01 39 40
-00 01 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
-19 83 FA 23 39 40 00 10 29 83 89 43 00 20 FC 23
-39 40 32 00 29 83 B9 40 9C 8E CE FF FB 23 B2 40
-26 83 E2 FF B2 40 81 00 80 05 92 42 02 18 86 05
-92 42 04 18 88 05 92 C3 80 05 92 D3 9A 05 3F 40
-80 20 31 40 E0 20 30 12 06 8E 47 3F 88 8E 07 43
-4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B
-0E 5C 0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98
-FF FF F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 89
-86 5B 54 48 45 4E 5D 00 30 4D 80 8F 86 5B 45 4C
-53 45 5D 00 87 12 14 84 00 00 C6 80 42 87 80 84
-24 87 34 80 40 82 F6 8F 44 80 1E 84 06 5B 54 48
-45 4E 5D 00 56 8F 4A 82 C6 8F F8 83 D0 80 58 80
-4A 82 9C 8F 2A 80 44 80 1E 84 06 5B 45 4C 53 45
-5D 00 56 8F 4A 82 E4 8F F8 83 D0 80 58 80 4A 82
-9A 8F 2A 80 1E 84 04 5B 49 46 5D 00 56 8F 4A 82
-9C 8F 3C 82 9A 8F F8 83 1E 84 05 0D 0A 6B 6F 20
-D6 83 8C 83 32 87 3C 82 9C 8F 8C 8F 84 5B 49 46
-5D 00 0E 93 3E 4F BE 27 30 4D 0C 90 89 5B 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-2A 80 1C 90 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
-87 12 42 87 80 84 EE 84 6A 80 00 81 2A 80 50 90
-3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 8D
-48 8C 06 4D 41 52 4B 45 52 00 B0 12 B8 89 BA 40
-84 12 FC FF BA 40 4E 90 FE FF 9A 42 C8 21 00 00
-28 83 8A 48 02 00 A2 52 C6 21 30 40 00 8A 1C 15
-B0 12 2A 80 80 84 EE 84 4A 82 A4 90 AA 85 40 82
-CE 88 BE 90 A6 90 39 4E 39 80 86 12 08 24 19 53
-02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
-30 41 3E 40 28 00 B0 12 8E 90 19 42 C6 21 A2 53
-C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
-92 53 C4 21 B0 12 2A 80 80 84 AA 85 40 82 FC 90
-F2 90 21 53 3E 90 10 00 7D 2D E1 2B FE 90 B2 41
-C4 21 DD 3F 87 12 42 87 74 84 0C 91 0C 43 1B 42
-C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
-92 53 C4 21 B0 12 8E 90 3C 40 00 03 0E 93 1C 24
-3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
-3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
-3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
-A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
-26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 8E 90
-ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
-B0 12 DA 90 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-DA 90 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
-0C 5E DA 3F B0 12 DA 90 FA 23 3C 50 10 00 B0 12
-C2 90 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 87 12
-42 87 74 84 D6 91 FE 90 26 00 00 00 3E 40 20 00
-03 20 3C 50 82 00 C8 3F B0 12 DA 90 E1 23 3C 50
-80 00 B0 12 C2 90 DC 3F D6 82 04 52 45 54 49 00
-87 12 14 84 00 13 B0 86 2A 80 14 84 2C 00 04 91
-CE 91 14 92 09 4B 2E 4E 0E DC A4 3F FC 8A 03 4D
-4F 56 84 12 0A 92 00 40 1E 92 05 4D 4F 56 2E 42
-84 12 0A 92 40 40 00 00 03 41 44 44 84 12 0A 92
-00 50 38 92 05 41 44 44 2E 42 84 12 0A 92 40 50
-44 92 04 41 44 44 43 00 84 12 0A 92 00 60 52 92
-06 41 44 44 43 2E 42 00 84 12 0A 92 40 60 FA 91
-04 53 55 42 43 00 84 12 0A 92 00 70 70 92 06 53
-55 42 43 2E 42 00 84 12 0A 92 40 70 7E 92 03 53
-55 42 84 12 0A 92 00 80 8E 92 05 53 55 42 2E 42
-84 12 0A 92 40 80 DE 8A 03 43 4D 50 84 12 0A 92
-00 90 A8 92 05 43 4D 50 2E 42 84 12 0A 92 40 90
-CC 8A 04 44 41 44 44 00 84 12 0A 92 00 A0 C2 92
-06 44 41 44 44 2E 42 00 84 12 0A 92 40 A0 B4 92
-03 42 49 54 84 12 0A 92 00 B0 E0 92 05 42 49 54
-2E 42 84 12 0A 92 40 B0 EC 92 03 42 49 43 84 12
-0A 92 00 C0 FA 92 05 42 49 43 2E 42 84 12 0A 92
-40 C0 06 93 03 42 49 53 84 12 0A 92 00 D0 14 93
-05 42 49 53 2E 42 84 12 0A 92 40 D0 00 00 03 58
-4F 52 84 12 0A 92 00 E0 2E 93 05 58 4F 52 2E 42
-84 12 0A 92 40 E0 60 92 03 41 4E 44 84 12 0A 92
-00 F0 48 93 05 41 4E 44 2E 42 84 12 0A 92 40 F0
-42 87 04 91 66 93 0A 4C 3C F0 70 00 8A 10 3A F0
-0F 00 0C DA 4F 3F 9A 92 03 52 52 43 84 12 60 93
-00 10 78 93 05 52 52 43 2E 42 84 12 60 93 40 10
-84 93 04 53 57 50 42 00 84 12 60 93 80 10 92 93
-03 52 52 41 84 12 60 93 00 11 A0 93 05 52 52 41
-2E 42 84 12 60 93 40 11 AC 93 03 53 58 54 84 12
-60 93 80 11 00 00 04 50 55 53 48 00 84 12 60 93
-00 12 C6 93 06 50 55 53 48 2E 42 00 84 12 60 93
-40 12 20 93 04 43 41 4C 4C 00 84 12 60 93 80 12
-1A 53 0E 4A 87 12 34 82 1E 84 0D 6F 75 74 20 6F
-66 20 62 6F 75 6E 64 73 4C 88 42 87 74 84 10 94
-92 53 C4 21 3E 40 2C 00 B0 12 2A 80 80 84 AA 85
-40 82 CE 88 C4 91 28 94 0A 4E 3E 4F 1A 83 E0 33
-29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
-38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
-5A 06 8F 3F BA 93 04 52 52 43 4D 00 84 12 0A 94
-50 00 56 94 04 52 52 41 4D 00 84 12 0A 94 50 01
-64 94 04 52 4C 41 4D 00 84 12 0A 94 50 02 72 94
-04 52 52 55 4D 00 84 12 0A 94 50 03 D4 93 05 50
-55 53 48 4D 84 12 0A 94 00 15 8E 94 04 50 4F 50
-4D 00 84 12 0A 94 00 17 80 94 03 53 3E 3D 85 12
-00 38 AA 94 02 53 3C 00 85 12 00 34 9C 94 03 30
-3E 3D 85 12 00 30 BE 94 02 30 3C 00 85 12 00 30
-00 00 02 55 3C 00 85 12 00 2C D2 94 03 55 3E 3D
-85 12 00 28 C8 94 03 30 3C 3E 85 12 00 24 E6 94
-02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
-C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D DC 94
-04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
-29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
-30 4D D0 92 04 45 4C 53 45 00 1A 42 C6 21 BA 40
-00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
-10 95 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
-C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
-FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D 54 93
-05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
-05 57 48 49 4C 45 87 12 FE 94 76 80 2A 80 B4 94
-06 52 45 50 45 41 54 00 87 12 86 95 16 95 2A 80
-B2 95 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F
-98 42 C6 21 00 00 30 4D E4 93 03 42 57 31 84 12
-B0 95 00 00 CA 95 03 42 57 32 84 12 B0 95 00 00
-D6 95 03 42 57 33 84 12 B0 95 00 00 EE 95 3D 41
-1A 42 C6 21 28 4E B2 92 C4 21 90 2B BA 4F 00 00
-A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
-57 31 84 12 EC 95 00 00 0E 96 03 46 57 32 84 12
-EC 95 00 00 1A 96 03 46 57 33 84 12 EC 95 00 00
-00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0
-00 04 3E B0 00 10 02 24 3E E0 00 08 87 12 C0 88
-DA 86 2A 80 26 96 04 47 4F 54 4F 00 2F 83 8F 4E
-00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 9C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 9C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5A 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 EC 8D 1A 88
+AA 84 00 00 84 12 36 8A 1E 93 84 93 D2 92 D4 93
+98 92 00 00 C8 8F 00 00 8E 92 40 93 F0 92 2E 93
+D8 90 00 00 00 00 F0 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A 0C 94 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 0C 94
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 10 8C 92 C3 30 01
+1E 42 08 18 0E 93 13 24 F2 B2 21 02 02 20 3E E3
+1E 53 F2 D0 0C 00 2B 02 92 D3 9A 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83 2E 80
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80 40 FF
+2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73 20 66
+72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C 44 00
+92 B3 8A 05 FD 23 B2 40 04 A5 20 01 31 40 E0 20
+B2 40 88 5A CC 01 B2 43 06 02 B2 40 FE FF 02 02
+D2 D3 05 02 F2 D3 26 02 F2 43 22 02 F2 D3 47 02
+F2 40 BF 00 43 02 F2 40 A5 00 A1 01 F2 40 10 00
+A0 01 D2 43 A1 01 B2 40 00 A5 60 01 82 43 88 01
+F2 D0 C0 00 0D 02 B2 40 FF 1E 80 01 B2 40 BA 00
+82 01 B2 40 E8 01 84 01 39 40 00 01 92 D2 5E 01
+08 18 38 40 59 14 18 83 FE 23 19 83 FA 23 39 40
+00 10 29 83 89 43 00 20 FC 23 B0 12 0E 80 B2 40
+81 00 80 05 92 42 02 18 86 05 92 42 04 18 88 05
+92 C3 80 05 3F 40 80 20 30 12 D4 8B 4D 3F 24 89
+86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F
+39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83 04 30
+19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53
+9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 10 8D 86 5B
+45 4C 53 45 5D 00 0D 12 87 12 24 80 00 00 AA 82
+70 86 F2 83 62 86 68 82 4C 80 A8 8D 70 82 2E 80
+06 5B 54 48 45 4E 5D 00 1A 8D 82 8D 3E 8D 60 8D
+26 83 70 82 2E 80 06 5B 45 4C 53 45 5D 00 1A 8D
+98 8D 3E 8D 5E 8D 26 83 2E 80 04 5B 49 46 5D 00
+1A 8D 60 8D 48 80 5E 8D 22 82 2E 80 05 0D 0A 6B
+6F 20 00 82 D4 80 C4 80 48 80 60 8D 4E 8D 84 5B
+49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53 30 4D
+BE 8D 89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12
+70 86 F2 83 4A 84 CC 8D 26 83 D2 8D 8B 5B 55 4E
+44 45 46 49 4E 45 44 5D 0D 12 87 12 DC 8D 00 8E
+3D 41 30 40 B6 82 38 40 C0 21 0A 4E 39 48 2E 48
+09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27 1E 83
+0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12 F2 83
+4A 84 42 80 3E 8E 06 85 4C 80 00 88 58 8E 40 8E
+39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C
+2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00
+B0 12 2A 8E 19 42 C6 21 A2 53 C6 21 89 4E 00 00
+3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21 87 12
+F2 83 06 85 4C 80 94 8E 8A 8E 21 53 3E 90 10 00
+80 2D E2 2B 96 8E B2 41 C4 21 DE 3F 0D 12 87 12
+70 86 06 8E A6 8E 0C 43 1B 42 C6 21 A2 53 C6 21
+6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12
+2A 8E 3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93
+18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92
+10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93
+08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40
+10 02 92 53 C4 21 B0 12 2A 8E ED 3F 7A 90 40 00
+16 20 3C 40 20 00 92 53 C4 21 B0 12 74 8E 0C 20
+3C 50 10 00 3E 40 2B 00 B0 12 74 8E 92 92 C0 21
+C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12
+74 8E FA 23 3C 50 10 00 B0 12 5C 8E EF 3F 0C 43
+1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 86 06 8E
+72 8F FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
+82 00 C7 3F B0 12 74 8E E0 23 3C 50 80 00 B0 12
+5C 8E DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12
+24 80 00 13 F8 85 26 83 24 80 2C 00 9C 8E 68 8F
+B2 8F 09 4B 2E 4E 0E DC A2 3F F6 89 03 4D 4F 56
+84 12 A8 8F 00 40 BC 8F 05 4D 4F 56 2E 42 84 12
+A8 8F 40 40 00 00 03 41 44 44 84 12 A8 8F 00 50
+D6 8F 05 41 44 44 2E 42 84 12 A8 8F 40 50 E2 8F
+04 41 44 44 43 00 84 12 A8 8F 00 60 F0 8F 06 41
+44 44 43 2E 42 00 84 12 A8 8F 40 60 96 8F 04 53
+55 42 43 00 84 12 A8 8F 00 70 0E 90 06 53 55 42
+43 2E 42 00 84 12 A8 8F 40 70 1C 90 03 53 55 42
+84 12 A8 8F 00 80 2C 90 05 53 55 42 2E 42 84 12
+A8 8F 40 80 D2 89 03 43 4D 50 84 12 A8 8F 00 90
+46 90 05 43 4D 50 2E 42 84 12 A8 8F 40 90 BE 89
+04 44 41 44 44 00 84 12 A8 8F 00 A0 60 90 06 44
+41 44 44 2E 42 00 84 12 A8 8F 40 A0 52 90 03 42
+49 54 84 12 A8 8F 00 B0 7E 90 05 42 49 54 2E 42
+84 12 A8 8F 40 B0 8A 90 03 42 49 43 84 12 A8 8F
+00 C0 98 90 05 42 49 43 2E 42 84 12 A8 8F 40 C0
+A4 90 03 42 49 53 84 12 A8 8F 00 D0 B2 90 05 42
+49 53 2E 42 84 12 A8 8F 40 D0 00 00 03 58 4F 52
+84 12 A8 8F 00 E0 CC 90 05 58 4F 52 2E 42 84 12
+A8 8F 40 E0 FE 8F 03 41 4E 44 84 12 A8 8F 00 F0
+E6 90 05 41 4E 44 2E 42 84 12 A8 8F 40 F0 70 86
+9C 8E 04 91 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
+0C DA 4F 3F 38 90 03 52 52 43 84 12 FE 90 00 10
+16 91 05 52 52 43 2E 42 84 12 FE 90 40 10 22 91
+04 53 57 50 42 00 84 12 FE 90 80 10 30 91 03 52
+52 41 84 12 FE 90 00 11 3E 91 05 52 52 41 2E 42
+84 12 FE 90 40 11 4A 91 03 53 58 54 84 12 FE 90
+80 11 00 00 04 50 55 53 48 00 84 12 FE 90 00 12
+64 91 06 50 55 53 48 2E 42 00 84 12 FE 90 40 12
+BE 90 04 43 41 4C 4C 00 84 12 FE 90 80 12 1A 53
+0E 4A 0D 12 87 12 9C 83 2E 80 0D 6F 75 74 20 6F
+66 20 62 6F 75 6E 64 73 7A 87 70 86 06 8E B0 91
+92 53 C4 21 3E 40 2C 00 87 12 F2 83 06 85 4C 80
+00 88 5E 8F C6 91 0A 4E 3E 4F 1A 83 E0 33 29 4E
+59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
+10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
+8F 3F 58 91 04 52 52 43 4D 00 84 12 AA 91 50 00
+F4 91 04 52 52 41 4D 00 84 12 AA 91 50 01 02 92
+04 52 4C 41 4D 00 84 12 AA 91 50 02 10 92 04 52
+52 55 4D 00 84 12 AA 91 50 03 72 91 05 50 55 53
+48 4D 84 12 AA 91 00 15 2C 92 04 50 4F 50 4D 00
+84 12 AA 91 00 17 1E 92 03 53 3E 3D 85 12 00 38
+48 92 02 53 3C 00 85 12 00 34 3A 92 03 30 3E 3D
+85 12 00 30 5C 92 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 70 92 03 55 3E 3D 85 12
+00 28 66 92 03 30 3C 3E 85 12 00 24 84 92 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
+8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 7A 92 04 54
+48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
+6E 90 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
+00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F AE 92
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
+2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 21 30 4D F2 90 05 41
+47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
+48 49 4C 45 0D 12 87 12 9C 92 82 82 26 83 52 92
+06 52 45 50 45 41 54 00 0D 12 87 12 24 93 B4 92
+26 83 54 93 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21
+CB 2F 98 42 C6 21 00 00 30 4D 82 91 03 42 57 31
+84 12 52 93 00 00 6C 93 03 42 57 32 84 12 52 93
+00 00 78 93 03 42 57 33 84 12 52 93 00 00 90 93
+3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B BA 4F
+00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00
+03 46 57 31 84 12 8E 93 00 00 B0 93 03 46 57 32
+84 12 8E 93 00 00 BC 93 03 46 57 33 84 12 8E 93
+00 00 C8 93 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
+3E 40 00 3C 0D 12 87 12 F0 87 18 86 26 83 00 00
+05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0 00 04
+3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C 8E
+6C 8C
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 58 96 D0 8C
-2D 01 6B B0 B6 82 C8 82
+10 00 08 00 00 D6 E8 03 05 00 18 00 FC 93 88 8A
+2E 01 6B B0 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C 8C CE FF FB 23 B2 40 68 81
+E2 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 8C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 9C 05 FD 27 1E 42 8C 05
-B0 12 C8 82 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
-8E 05 D2 C3 03 02 30 41 B2 40 13 00 8E 05 D2 D3
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 8C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 9C 05
-FD 27 82 48 8E 05 30 4D 5A 83 2D 83 92 B3 9C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
+8E 05 D2 C3 03 02 30 41 A2 B3 9C 05 FD 27 B2 40
+13 00 8E 05 D2 D3 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 8C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+9C 05 FD 27 82 48 8E 05 30 4D 9C 81 2D 83 92 B3
+9C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 8C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 9C 05 FD 27 1E 42
+8C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 9C 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 9C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 3E 8F DE 8B
-BE 88 32 8B 3A 8C 52 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 24 90 E8 88 78 8A 00 00 84 12 7E 8C
-70 95 D2 95 24 95 46 96 EA 94 00 00 1A 92 00 00
-E0 94 90 95 42 95 80 95 2A 93 00 00 00 00 22 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 58 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-58 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 3E 8E 92 C3
-30 01 1E 42 08 18 0E 93 11 24 F2 B2 21 02 02 20
-3E E3 1E 53 F2 D0 0C 00 2B 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 84
-06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF A0 86
-B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00 92 B3
-8A 05 FD 23 B2 40 04 A5 20 01 3E 8E B2 40 88 5A
-CC 01 B2 43 06 02 B2 40 FE FF 02 02 D2 D3 05 02
-F2 D3 26 02 F2 43 22 02 F2 D3 47 02 F2 40 BF 00
-43 02 B2 40 00 A5 60 01 82 43 88 01 B2 40 FF 1E
-80 01 B2 40 B0 00 82 01 B2 40 1E 00 84 01 39 40
-10 00 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
-19 83 FA 23 39 40 00 10 29 83 89 43 00 20 FC 23
-39 40 32 00 29 83 B9 40 9C 8E CE FF FB 23 B2 40
-26 83 E2 FF B2 40 81 00 80 05 92 42 02 18 86 05
-92 42 04 18 88 05 92 C3 80 05 92 D3 9A 05 3F 40
-80 20 31 40 E0 20 30 12 06 8E 4F 3F 88 8E 07 43
-4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B
-0E 5C 0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98
-FF FF F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 89
-86 5B 54 48 45 4E 5D 00 30 4D 70 8F 86 5B 45 4C
-53 45 5D 00 87 12 14 84 00 00 C6 80 42 87 80 84
-24 87 34 80 40 82 E6 8F 44 80 1E 84 06 5B 54 48
-45 4E 5D 00 46 8F 4A 82 B6 8F F8 83 D0 80 58 80
-4A 82 8C 8F 2A 80 44 80 1E 84 06 5B 45 4C 53 45
-5D 00 46 8F 4A 82 D4 8F F8 83 D0 80 58 80 4A 82
-8A 8F 2A 80 1E 84 04 5B 49 46 5D 00 46 8F 4A 82
-8C 8F 3C 82 8A 8F F8 83 1E 84 05 0D 0A 6B 6F 20
-D6 83 8C 83 32 87 3C 82 8C 8F 7C 8F 84 5B 49 46
-5D 00 0E 93 3E 4F BE 27 30 4D FC 8F 89 5B 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-2A 80 0C 90 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
-87 12 42 87 80 84 EE 84 6A 80 00 81 2A 80 40 90
-3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 8D
-48 8C 06 4D 41 52 4B 45 52 00 B0 12 B8 89 BA 40
-84 12 FC FF BA 40 3E 90 FE FF 9A 42 C8 21 00 00
-28 83 8A 48 02 00 A2 52 C6 21 30 40 00 8A 1C 15
-B0 12 2A 80 80 84 EE 84 4A 82 94 90 AA 85 40 82
-CE 88 AE 90 96 90 39 4E 39 80 86 12 08 24 19 53
-02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
-30 41 3E 40 28 00 B0 12 7E 90 19 42 C6 21 A2 53
-C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
-92 53 C4 21 B0 12 2A 80 80 84 AA 85 40 82 EC 90
-E2 90 21 53 3E 90 10 00 7D 2D E1 2B EE 90 B2 41
-C4 21 DD 3F 87 12 42 87 74 84 FC 90 0C 43 1B 42
-C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
-92 53 C4 21 B0 12 7E 90 3C 40 00 03 0E 93 1C 24
-3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
-3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
-3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
-A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
-26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 7E 90
-ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
-B0 12 CA 90 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-CA 90 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
-0C 5E DA 3F B0 12 CA 90 FA 23 3C 50 10 00 B0 12
-B2 90 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 87 12
-42 87 74 84 C6 91 FE 90 26 00 00 00 3E 40 20 00
-03 20 3C 50 82 00 C8 3F B0 12 CA 90 E1 23 3C 50
-80 00 B0 12 B2 90 DC 3F D6 82 04 52 45 54 49 00
-87 12 14 84 00 13 B0 86 2A 80 14 84 2C 00 F4 90
-BE 91 04 92 09 4B 2E 4E 0E DC A4 3F FC 8A 03 4D
-4F 56 84 12 FA 91 00 40 0E 92 05 4D 4F 56 2E 42
-84 12 FA 91 40 40 00 00 03 41 44 44 84 12 FA 91
-00 50 28 92 05 41 44 44 2E 42 84 12 FA 91 40 50
-34 92 04 41 44 44 43 00 84 12 FA 91 00 60 42 92
-06 41 44 44 43 2E 42 00 84 12 FA 91 40 60 EA 91
-04 53 55 42 43 00 84 12 FA 91 00 70 60 92 06 53
-55 42 43 2E 42 00 84 12 FA 91 40 70 6E 92 03 53
-55 42 84 12 FA 91 00 80 7E 92 05 53 55 42 2E 42
-84 12 FA 91 40 80 DE 8A 03 43 4D 50 84 12 FA 91
-00 90 98 92 05 43 4D 50 2E 42 84 12 FA 91 40 90
-CC 8A 04 44 41 44 44 00 84 12 FA 91 00 A0 B2 92
-06 44 41 44 44 2E 42 00 84 12 FA 91 40 A0 A4 92
-03 42 49 54 84 12 FA 91 00 B0 D0 92 05 42 49 54
-2E 42 84 12 FA 91 40 B0 DC 92 03 42 49 43 84 12
-FA 91 00 C0 EA 92 05 42 49 43 2E 42 84 12 FA 91
-40 C0 F6 92 03 42 49 53 84 12 FA 91 00 D0 04 93
-05 42 49 53 2E 42 84 12 FA 91 40 D0 00 00 03 58
-4F 52 84 12 FA 91 00 E0 1E 93 05 58 4F 52 2E 42
-84 12 FA 91 40 E0 50 92 03 41 4E 44 84 12 FA 91
-00 F0 38 93 05 41 4E 44 2E 42 84 12 FA 91 40 F0
-42 87 F4 90 56 93 0A 4C 3C F0 70 00 8A 10 3A F0
-0F 00 0C DA 4F 3F 8A 92 03 52 52 43 84 12 50 93
-00 10 68 93 05 52 52 43 2E 42 84 12 50 93 40 10
-74 93 04 53 57 50 42 00 84 12 50 93 80 10 82 93
-03 52 52 41 84 12 50 93 00 11 90 93 05 52 52 41
-2E 42 84 12 50 93 40 11 9C 93 03 53 58 54 84 12
-50 93 80 11 00 00 04 50 55 53 48 00 84 12 50 93
-00 12 B6 93 06 50 55 53 48 2E 42 00 84 12 50 93
-40 12 10 93 04 43 41 4C 4C 00 84 12 50 93 80 12
-1A 53 0E 4A 87 12 34 82 1E 84 0D 6F 75 74 20 6F
-66 20 62 6F 75 6E 64 73 4C 88 42 87 74 84 00 94
-92 53 C4 21 3E 40 2C 00 B0 12 2A 80 80 84 AA 85
-40 82 CE 88 B4 91 18 94 0A 4E 3E 4F 1A 83 E0 33
-29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
-38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
-5A 06 8F 3F AA 93 04 52 52 43 4D 00 84 12 FA 93
-50 00 46 94 04 52 52 41 4D 00 84 12 FA 93 50 01
-54 94 04 52 4C 41 4D 00 84 12 FA 93 50 02 62 94
-04 52 52 55 4D 00 84 12 FA 93 50 03 C4 93 05 50
-55 53 48 4D 84 12 FA 93 00 15 7E 94 04 50 4F 50
-4D 00 84 12 FA 93 00 17 70 94 03 53 3E 3D 85 12
-00 38 9A 94 02 53 3C 00 85 12 00 34 8C 94 03 30
-3E 3D 85 12 00 30 AE 94 02 30 3C 00 85 12 00 30
-00 00 02 55 3C 00 85 12 00 2C C2 94 03 55 3E 3D
-85 12 00 28 B8 94 03 30 3C 3E 85 12 00 24 D6 94
-02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
-C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D CC 94
-04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
-29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
-30 4D C0 92 04 45 4C 53 45 00 1A 42 C6 21 BA 40
-00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
-00 95 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
-C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
-FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D 44 93
-05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
-05 57 48 49 4C 45 87 12 EE 94 76 80 2A 80 A4 94
-06 52 45 50 45 41 54 00 87 12 76 95 06 95 2A 80
-A2 95 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F
-98 42 C6 21 00 00 30 4D D4 93 03 42 57 31 84 12
-A0 95 00 00 BA 95 03 42 57 32 84 12 A0 95 00 00
-C6 95 03 42 57 33 84 12 A0 95 00 00 DE 95 3D 41
-1A 42 C6 21 28 4E B2 92 C4 21 90 2B BA 4F 00 00
-A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
-57 31 84 12 DC 95 00 00 FE 95 03 46 57 32 84 12
-DC 95 00 00 0A 96 03 46 57 33 84 12 DC 95 00 00
-00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0
-00 04 3E B0 00 10 02 24 3E E0 00 08 87 12 C0 88
-DA 86 2A 80 16 96 04 47 4F 54 4F 00 2F 83 8F 4E
-00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 9C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 9C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5A 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 DC 8D 1A 88
+AA 84 00 00 84 12 36 8A 0E 93 74 93 C2 92 C4 93
+88 92 00 00 B8 8F 00 00 7E 92 30 93 E0 92 1E 93
+C8 90 00 00 00 00 E0 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A FC 93 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 FC 93
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 10 8C 92 C3 30 01
+1E 42 08 18 0E 93 13 24 F2 B2 21 02 02 20 3E E3
+1E 53 F2 D0 0C 00 2B 02 92 D3 9A 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83 2E 80
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80 40 FF
+2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73 20 66
+72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C 44 00
+92 B3 8A 05 FD 23 B2 40 04 A5 20 01 31 40 E0 20
+B2 40 88 5A CC 01 B2 43 06 02 B2 40 FE FF 02 02
+D2 D3 05 02 F2 D3 26 02 F2 43 22 02 F2 D3 47 02
+F2 40 BF 00 43 02 B2 40 00 A5 60 01 82 43 88 01
+F2 D0 C0 00 0D 02 B2 40 FF 1E 80 01 B2 40 B0 00
+82 01 B2 40 1E 00 84 01 39 40 10 00 92 D2 5E 01
+08 18 38 40 59 14 18 83 FE 23 19 83 FA 23 39 40
+00 10 29 83 89 43 00 20 FC 23 B0 12 0E 80 B2 40
+81 00 80 05 92 42 02 18 86 05 92 42 04 18 88 05
+92 C3 80 05 3F 40 80 20 30 12 D4 8B 55 3F 24 89
+86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F
+39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83 04 30
+19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53
+9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 00 8D 86 5B
+45 4C 53 45 5D 00 0D 12 87 12 24 80 00 00 AA 82
+70 86 F2 83 62 86 68 82 4C 80 98 8D 70 82 2E 80
+06 5B 54 48 45 4E 5D 00 0A 8D 72 8D 2E 8D 50 8D
+26 83 70 82 2E 80 06 5B 45 4C 53 45 5D 00 0A 8D
+88 8D 2E 8D 4E 8D 26 83 2E 80 04 5B 49 46 5D 00
+0A 8D 50 8D 48 80 4E 8D 22 82 2E 80 05 0D 0A 6B
+6F 20 00 82 D4 80 C4 80 48 80 50 8D 3E 8D 84 5B
+49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53 30 4D
+AE 8D 89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12
+70 86 F2 83 4A 84 BC 8D 26 83 C2 8D 8B 5B 55 4E
+44 45 46 49 4E 45 44 5D 0D 12 87 12 CC 8D F0 8D
+3D 41 30 40 B6 82 38 40 C0 21 0A 4E 39 48 2E 48
+09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27 1E 83
+0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12 F2 83
+4A 84 42 80 2E 8E 06 85 4C 80 00 88 48 8E 30 8E
+39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C
+2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00
+B0 12 1A 8E 19 42 C6 21 A2 53 C6 21 89 4E 00 00
+3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21 87 12
+F2 83 06 85 4C 80 84 8E 7A 8E 21 53 3E 90 10 00
+80 2D E2 2B 86 8E B2 41 C4 21 DE 3F 0D 12 87 12
+70 86 F6 8D 96 8E 0C 43 1B 42 C6 21 A2 53 C6 21
+6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12
+1A 8E 3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93
+18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92
+10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93
+08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40
+10 02 92 53 C4 21 B0 12 1A 8E ED 3F 7A 90 40 00
+16 20 3C 40 20 00 92 53 C4 21 B0 12 64 8E 0C 20
+3C 50 10 00 3E 40 2B 00 B0 12 64 8E 92 92 C0 21
+C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12
+64 8E FA 23 3C 50 10 00 B0 12 4C 8E EF 3F 0C 43
+1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 86 F6 8D
+62 8F FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
+82 00 C7 3F B0 12 64 8E E0 23 3C 50 80 00 B0 12
+4C 8E DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12
+24 80 00 13 F8 85 26 83 24 80 2C 00 8C 8E 58 8F
+A2 8F 09 4B 2E 4E 0E DC A2 3F F6 89 03 4D 4F 56
+84 12 98 8F 00 40 AC 8F 05 4D 4F 56 2E 42 84 12
+98 8F 40 40 00 00 03 41 44 44 84 12 98 8F 00 50
+C6 8F 05 41 44 44 2E 42 84 12 98 8F 40 50 D2 8F
+04 41 44 44 43 00 84 12 98 8F 00 60 E0 8F 06 41
+44 44 43 2E 42 00 84 12 98 8F 40 60 86 8F 04 53
+55 42 43 00 84 12 98 8F 00 70 FE 8F 06 53 55 42
+43 2E 42 00 84 12 98 8F 40 70 0C 90 03 53 55 42
+84 12 98 8F 00 80 1C 90 05 53 55 42 2E 42 84 12
+98 8F 40 80 D2 89 03 43 4D 50 84 12 98 8F 00 90
+36 90 05 43 4D 50 2E 42 84 12 98 8F 40 90 BE 89
+04 44 41 44 44 00 84 12 98 8F 00 A0 50 90 06 44
+41 44 44 2E 42 00 84 12 98 8F 40 A0 42 90 03 42
+49 54 84 12 98 8F 00 B0 6E 90 05 42 49 54 2E 42
+84 12 98 8F 40 B0 7A 90 03 42 49 43 84 12 98 8F
+00 C0 88 90 05 42 49 43 2E 42 84 12 98 8F 40 C0
+94 90 03 42 49 53 84 12 98 8F 00 D0 A2 90 05 42
+49 53 2E 42 84 12 98 8F 40 D0 00 00 03 58 4F 52
+84 12 98 8F 00 E0 BC 90 05 58 4F 52 2E 42 84 12
+98 8F 40 E0 EE 8F 03 41 4E 44 84 12 98 8F 00 F0
+D6 90 05 41 4E 44 2E 42 84 12 98 8F 40 F0 70 86
+8C 8E F4 90 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
+0C DA 4F 3F 28 90 03 52 52 43 84 12 EE 90 00 10
+06 91 05 52 52 43 2E 42 84 12 EE 90 40 10 12 91
+04 53 57 50 42 00 84 12 EE 90 80 10 20 91 03 52
+52 41 84 12 EE 90 00 11 2E 91 05 52 52 41 2E 42
+84 12 EE 90 40 11 3A 91 03 53 58 54 84 12 EE 90
+80 11 00 00 04 50 55 53 48 00 84 12 EE 90 00 12
+54 91 06 50 55 53 48 2E 42 00 84 12 EE 90 40 12
+AE 90 04 43 41 4C 4C 00 84 12 EE 90 80 12 1A 53
+0E 4A 0D 12 87 12 9C 83 2E 80 0D 6F 75 74 20 6F
+66 20 62 6F 75 6E 64 73 7A 87 70 86 F6 8D A0 91
+92 53 C4 21 3E 40 2C 00 87 12 F2 83 06 85 4C 80
+00 88 4E 8F B6 91 0A 4E 3E 4F 1A 83 E0 33 29 4E
+59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
+10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
+8F 3F 48 91 04 52 52 43 4D 00 84 12 9A 91 50 00
+E4 91 04 52 52 41 4D 00 84 12 9A 91 50 01 F2 91
+04 52 4C 41 4D 00 84 12 9A 91 50 02 00 92 04 52
+52 55 4D 00 84 12 9A 91 50 03 62 91 05 50 55 53
+48 4D 84 12 9A 91 00 15 1C 92 04 50 4F 50 4D 00
+84 12 9A 91 00 17 0E 92 03 53 3E 3D 85 12 00 38
+38 92 02 53 3C 00 85 12 00 34 2A 92 03 30 3E 3D
+85 12 00 30 4C 92 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 60 92 03 55 3E 3D 85 12
+00 28 56 92 03 30 3C 3E 85 12 00 24 74 92 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
+8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 6A 92 04 54
+48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
+5E 90 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
+00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F 9E 92
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
+2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 21 30 4D E2 90 05 41
+47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
+48 49 4C 45 0D 12 87 12 8C 92 82 82 26 83 42 92
+06 52 45 50 45 41 54 00 0D 12 87 12 14 93 A4 92
+26 83 44 93 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21
+CB 2F 98 42 C6 21 00 00 30 4D 72 91 03 42 57 31
+84 12 42 93 00 00 5C 93 03 42 57 32 84 12 42 93
+00 00 68 93 03 42 57 33 84 12 42 93 00 00 80 93
+3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B BA 4F
+00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00
+03 46 57 31 84 12 7E 93 00 00 A0 93 03 46 57 32
+84 12 7E 93 00 00 AC 93 03 46 57 33 84 12 7E 93
+00 00 B8 93 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
+3E 40 00 3C 0D 12 87 12 F0 87 18 86 26 83 00 00
+05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0 00 04
+3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C 8E
+6C 8C
q
@1800
-10 00 0D 00 01 49 C0 5D 05 00 18 00 68 96 D0 8C
-2D 01 6B B0 B6 82 C8 82
+10 00 0D 00 01 49 C0 5D 05 00 18 00 0C 94 88 8A
+2E 01 6B B0 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C 8C CE FF FB 23 B2 40 68 81
+E2 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 8C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 9C 05 FD 27 1E 42 8C 05
-B0 12 C8 82 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
-8E 05 D2 C3 03 02 30 41 B2 40 13 00 8E 05 D2 D3
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 8C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 9C 05
-FD 27 82 48 8E 05 30 4D 5A 83 2D 83 92 B3 9C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
+8E 05 D2 C3 03 02 30 41 A2 B3 9C 05 FD 27 B2 40
+13 00 8E 05 D2 D3 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 8C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+9C 05 FD 27 82 48 8E 05 30 4D 9C 81 2D 83 92 B3
+9C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 8C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 9C 05 FD 27 1E 42
+8C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 9C 05 38 40 F0 FF 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 9C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 4E 8F DE 8B
-BE 88 32 8B 3A 8C 62 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 34 90 E8 88 78 8A 00 00 84 12 7E 8C
-80 95 E2 95 34 95 56 96 FA 94 00 00 2A 92 00 00
-F0 94 A0 95 52 95 90 95 3A 93 00 00 00 00 32 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 68 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-68 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 3E 8E 92 C3
-30 01 1E 42 08 18 0E 93 11 24 F2 B2 21 02 02 20
-3E E3 1E 53 F2 D0 0C 00 2B 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 84
-06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF A0 86
-B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00 92 B3
-8A 05 FD 23 B2 40 04 A5 20 01 3E 8E B2 40 88 5A
-CC 01 B2 43 06 02 B2 40 FE FF 02 02 D2 D3 05 02
-F2 D3 26 02 F2 43 22 02 F2 D3 47 02 F2 40 BF 00
-43 02 F2 40 A5 00 A1 01 F2 40 20 00 A0 01 D2 43
-A1 01 B2 40 00 A5 60 01 82 43 88 01 B2 40 FF 1E
-80 01 B2 40 BE 00 82 01 B2 40 DC 02 84 01 39 40
-80 01 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
-19 83 FA 23 39 40 00 10 29 83 89 43 00 20 FC 23
-39 40 32 00 29 83 B9 40 9C 8E CE FF FB 23 B2 40
-26 83 E2 FF B2 40 81 00 80 05 92 42 02 18 86 05
-92 42 04 18 88 05 92 C3 80 05 92 D3 9A 05 3F 40
-80 20 31 40 E0 20 30 12 06 8E 47 3F 88 8E 07 43
-4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B
-0E 5C 0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98
-FF FF F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 89
-86 5B 54 48 45 4E 5D 00 30 4D 80 8F 86 5B 45 4C
-53 45 5D 00 87 12 14 84 00 00 C6 80 42 87 80 84
-24 87 34 80 40 82 F6 8F 44 80 1E 84 06 5B 54 48
-45 4E 5D 00 56 8F 4A 82 C6 8F F8 83 D0 80 58 80
-4A 82 9C 8F 2A 80 44 80 1E 84 06 5B 45 4C 53 45
-5D 00 56 8F 4A 82 E4 8F F8 83 D0 80 58 80 4A 82
-9A 8F 2A 80 1E 84 04 5B 49 46 5D 00 56 8F 4A 82
-9C 8F 3C 82 9A 8F F8 83 1E 84 05 0D 0A 6B 6F 20
-D6 83 8C 83 32 87 3C 82 9C 8F 8C 8F 84 5B 49 46
-5D 00 0E 93 3E 4F BE 27 30 4D 0C 90 89 5B 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-2A 80 1C 90 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
-87 12 42 87 80 84 EE 84 6A 80 00 81 2A 80 50 90
-3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 8D
-48 8C 06 4D 41 52 4B 45 52 00 B0 12 B8 89 BA 40
-84 12 FC FF BA 40 4E 90 FE FF 9A 42 C8 21 00 00
-28 83 8A 48 02 00 A2 52 C6 21 30 40 00 8A 1C 15
-B0 12 2A 80 80 84 EE 84 4A 82 A4 90 AA 85 40 82
-CE 88 BE 90 A6 90 39 4E 39 80 86 12 08 24 19 53
-02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
-30 41 3E 40 28 00 B0 12 8E 90 19 42 C6 21 A2 53
-C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
-92 53 C4 21 B0 12 2A 80 80 84 AA 85 40 82 FC 90
-F2 90 21 53 3E 90 10 00 7D 2D E1 2B FE 90 B2 41
-C4 21 DD 3F 87 12 42 87 74 84 0C 91 0C 43 1B 42
-C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
-92 53 C4 21 B0 12 8E 90 3C 40 00 03 0E 93 1C 24
-3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
-3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
-3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
-A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
-26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 8E 90
-ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
-B0 12 DA 90 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-DA 90 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
-0C 5E DA 3F B0 12 DA 90 FA 23 3C 50 10 00 B0 12
-C2 90 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 87 12
-42 87 74 84 D6 91 FE 90 26 00 00 00 3E 40 20 00
-03 20 3C 50 82 00 C8 3F B0 12 DA 90 E1 23 3C 50
-80 00 B0 12 C2 90 DC 3F D6 82 04 52 45 54 49 00
-87 12 14 84 00 13 B0 86 2A 80 14 84 2C 00 04 91
-CE 91 14 92 09 4B 2E 4E 0E DC A4 3F FC 8A 03 4D
-4F 56 84 12 0A 92 00 40 1E 92 05 4D 4F 56 2E 42
-84 12 0A 92 40 40 00 00 03 41 44 44 84 12 0A 92
-00 50 38 92 05 41 44 44 2E 42 84 12 0A 92 40 50
-44 92 04 41 44 44 43 00 84 12 0A 92 00 60 52 92
-06 41 44 44 43 2E 42 00 84 12 0A 92 40 60 FA 91
-04 53 55 42 43 00 84 12 0A 92 00 70 70 92 06 53
-55 42 43 2E 42 00 84 12 0A 92 40 70 7E 92 03 53
-55 42 84 12 0A 92 00 80 8E 92 05 53 55 42 2E 42
-84 12 0A 92 40 80 DE 8A 03 43 4D 50 84 12 0A 92
-00 90 A8 92 05 43 4D 50 2E 42 84 12 0A 92 40 90
-CC 8A 04 44 41 44 44 00 84 12 0A 92 00 A0 C2 92
-06 44 41 44 44 2E 42 00 84 12 0A 92 40 A0 B4 92
-03 42 49 54 84 12 0A 92 00 B0 E0 92 05 42 49 54
-2E 42 84 12 0A 92 40 B0 EC 92 03 42 49 43 84 12
-0A 92 00 C0 FA 92 05 42 49 43 2E 42 84 12 0A 92
-40 C0 06 93 03 42 49 53 84 12 0A 92 00 D0 14 93
-05 42 49 53 2E 42 84 12 0A 92 40 D0 00 00 03 58
-4F 52 84 12 0A 92 00 E0 2E 93 05 58 4F 52 2E 42
-84 12 0A 92 40 E0 60 92 03 41 4E 44 84 12 0A 92
-00 F0 48 93 05 41 4E 44 2E 42 84 12 0A 92 40 F0
-42 87 04 91 66 93 0A 4C 3C F0 70 00 8A 10 3A F0
-0F 00 0C DA 4F 3F 9A 92 03 52 52 43 84 12 60 93
-00 10 78 93 05 52 52 43 2E 42 84 12 60 93 40 10
-84 93 04 53 57 50 42 00 84 12 60 93 80 10 92 93
-03 52 52 41 84 12 60 93 00 11 A0 93 05 52 52 41
-2E 42 84 12 60 93 40 11 AC 93 03 53 58 54 84 12
-60 93 80 11 00 00 04 50 55 53 48 00 84 12 60 93
-00 12 C6 93 06 50 55 53 48 2E 42 00 84 12 60 93
-40 12 20 93 04 43 41 4C 4C 00 84 12 60 93 80 12
-1A 53 0E 4A 87 12 34 82 1E 84 0D 6F 75 74 20 6F
-66 20 62 6F 75 6E 64 73 4C 88 42 87 74 84 10 94
-92 53 C4 21 3E 40 2C 00 B0 12 2A 80 80 84 AA 85
-40 82 CE 88 C4 91 28 94 0A 4E 3E 4F 1A 83 E0 33
-29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
-38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
-5A 06 8F 3F BA 93 04 52 52 43 4D 00 84 12 0A 94
-50 00 56 94 04 52 52 41 4D 00 84 12 0A 94 50 01
-64 94 04 52 4C 41 4D 00 84 12 0A 94 50 02 72 94
-04 52 52 55 4D 00 84 12 0A 94 50 03 D4 93 05 50
-55 53 48 4D 84 12 0A 94 00 15 8E 94 04 50 4F 50
-4D 00 84 12 0A 94 00 17 80 94 03 53 3E 3D 85 12
-00 38 AA 94 02 53 3C 00 85 12 00 34 9C 94 03 30
-3E 3D 85 12 00 30 BE 94 02 30 3C 00 85 12 00 30
-00 00 02 55 3C 00 85 12 00 2C D2 94 03 55 3E 3D
-85 12 00 28 C8 94 03 30 3C 3E 85 12 00 24 E6 94
-02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
-C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D DC 94
-04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
-29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
-30 4D D0 92 04 45 4C 53 45 00 1A 42 C6 21 BA 40
-00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
-10 95 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
-C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
-FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D 54 93
-05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
-05 57 48 49 4C 45 87 12 FE 94 76 80 2A 80 B4 94
-06 52 45 50 45 41 54 00 87 12 86 95 16 95 2A 80
-B2 95 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F
-98 42 C6 21 00 00 30 4D E4 93 03 42 57 31 84 12
-B0 95 00 00 CA 95 03 42 57 32 84 12 B0 95 00 00
-D6 95 03 42 57 33 84 12 B0 95 00 00 EE 95 3D 41
-1A 42 C6 21 28 4E B2 92 C4 21 90 2B BA 4F 00 00
-A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
-57 31 84 12 EC 95 00 00 0E 96 03 46 57 32 84 12
-EC 95 00 00 1A 96 03 46 57 33 84 12 EC 95 00 00
-00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0
-00 04 3E B0 00 10 02 24 3E E0 00 08 87 12 C0 88
-DA 86 2A 80 26 96 04 47 4F 54 4F 00 2F 83 8F 4E
-00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 9C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 9C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5A 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 EC 8D 1A 88
+AA 84 00 00 84 12 36 8A 1E 93 84 93 D2 92 D4 93
+98 92 00 00 C8 8F 00 00 8E 92 40 93 F0 92 2E 93
+D8 90 00 00 00 00 F0 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A 0C 94 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 0C 94
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 10 8C 92 C3 30 01
+1E 42 08 18 0E 93 13 24 F2 B2 21 02 02 20 3E E3
+1E 53 F2 D0 0C 00 2B 02 92 D3 9A 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83 2E 80
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80 40 FF
+2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73 20 66
+72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C 44 00
+92 B3 8A 05 FD 23 B2 40 04 A5 20 01 31 40 E0 20
+B2 40 88 5A CC 01 B2 43 06 02 B2 40 FE FF 02 02
+D2 D3 05 02 F2 D3 26 02 F2 43 22 02 F2 D3 47 02
+F2 40 BF 00 43 02 F2 40 A5 00 A1 01 F2 40 20 00
+A0 01 D2 43 A1 01 B2 40 00 A5 60 01 82 43 88 01
+F2 D0 C0 00 0D 02 B2 40 FF 1E 80 01 B2 40 BE 00
+82 01 B2 40 DC 02 84 01 39 40 80 01 92 D2 5E 01
+08 18 38 40 59 14 18 83 FE 23 19 83 FA 23 39 40
+00 10 29 83 89 43 00 20 FC 23 B0 12 0E 80 B2 40
+81 00 80 05 92 42 02 18 86 05 92 42 04 18 88 05
+92 C3 80 05 3F 40 80 20 30 12 D4 8B 4D 3F 24 89
+86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F
+39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83 04 30
+19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53
+9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 10 8D 86 5B
+45 4C 53 45 5D 00 0D 12 87 12 24 80 00 00 AA 82
+70 86 F2 83 62 86 68 82 4C 80 A8 8D 70 82 2E 80
+06 5B 54 48 45 4E 5D 00 1A 8D 82 8D 3E 8D 60 8D
+26 83 70 82 2E 80 06 5B 45 4C 53 45 5D 00 1A 8D
+98 8D 3E 8D 5E 8D 26 83 2E 80 04 5B 49 46 5D 00
+1A 8D 60 8D 48 80 5E 8D 22 82 2E 80 05 0D 0A 6B
+6F 20 00 82 D4 80 C4 80 48 80 60 8D 4E 8D 84 5B
+49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53 30 4D
+BE 8D 89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12
+70 86 F2 83 4A 84 CC 8D 26 83 D2 8D 8B 5B 55 4E
+44 45 46 49 4E 45 44 5D 0D 12 87 12 DC 8D 00 8E
+3D 41 30 40 B6 82 38 40 C0 21 0A 4E 39 48 2E 48
+09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27 1E 83
+0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12 F2 83
+4A 84 42 80 3E 8E 06 85 4C 80 00 88 58 8E 40 8E
+39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C
+2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00
+B0 12 2A 8E 19 42 C6 21 A2 53 C6 21 89 4E 00 00
+3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21 87 12
+F2 83 06 85 4C 80 94 8E 8A 8E 21 53 3E 90 10 00
+80 2D E2 2B 96 8E B2 41 C4 21 DE 3F 0D 12 87 12
+70 86 06 8E A6 8E 0C 43 1B 42 C6 21 A2 53 C6 21
+6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12
+2A 8E 3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93
+18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92
+10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93
+08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40
+10 02 92 53 C4 21 B0 12 2A 8E ED 3F 7A 90 40 00
+16 20 3C 40 20 00 92 53 C4 21 B0 12 74 8E 0C 20
+3C 50 10 00 3E 40 2B 00 B0 12 74 8E 92 92 C0 21
+C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12
+74 8E FA 23 3C 50 10 00 B0 12 5C 8E EF 3F 0C 43
+1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 86 06 8E
+72 8F FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
+82 00 C7 3F B0 12 74 8E E0 23 3C 50 80 00 B0 12
+5C 8E DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12
+24 80 00 13 F8 85 26 83 24 80 2C 00 9C 8E 68 8F
+B2 8F 09 4B 2E 4E 0E DC A2 3F F6 89 03 4D 4F 56
+84 12 A8 8F 00 40 BC 8F 05 4D 4F 56 2E 42 84 12
+A8 8F 40 40 00 00 03 41 44 44 84 12 A8 8F 00 50
+D6 8F 05 41 44 44 2E 42 84 12 A8 8F 40 50 E2 8F
+04 41 44 44 43 00 84 12 A8 8F 00 60 F0 8F 06 41
+44 44 43 2E 42 00 84 12 A8 8F 40 60 96 8F 04 53
+55 42 43 00 84 12 A8 8F 00 70 0E 90 06 53 55 42
+43 2E 42 00 84 12 A8 8F 40 70 1C 90 03 53 55 42
+84 12 A8 8F 00 80 2C 90 05 53 55 42 2E 42 84 12
+A8 8F 40 80 D2 89 03 43 4D 50 84 12 A8 8F 00 90
+46 90 05 43 4D 50 2E 42 84 12 A8 8F 40 90 BE 89
+04 44 41 44 44 00 84 12 A8 8F 00 A0 60 90 06 44
+41 44 44 2E 42 00 84 12 A8 8F 40 A0 52 90 03 42
+49 54 84 12 A8 8F 00 B0 7E 90 05 42 49 54 2E 42
+84 12 A8 8F 40 B0 8A 90 03 42 49 43 84 12 A8 8F
+00 C0 98 90 05 42 49 43 2E 42 84 12 A8 8F 40 C0
+A4 90 03 42 49 53 84 12 A8 8F 00 D0 B2 90 05 42
+49 53 2E 42 84 12 A8 8F 40 D0 00 00 03 58 4F 52
+84 12 A8 8F 00 E0 CC 90 05 58 4F 52 2E 42 84 12
+A8 8F 40 E0 FE 8F 03 41 4E 44 84 12 A8 8F 00 F0
+E6 90 05 41 4E 44 2E 42 84 12 A8 8F 40 F0 70 86
+9C 8E 04 91 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
+0C DA 4F 3F 38 90 03 52 52 43 84 12 FE 90 00 10
+16 91 05 52 52 43 2E 42 84 12 FE 90 40 10 22 91
+04 53 57 50 42 00 84 12 FE 90 80 10 30 91 03 52
+52 41 84 12 FE 90 00 11 3E 91 05 52 52 41 2E 42
+84 12 FE 90 40 11 4A 91 03 53 58 54 84 12 FE 90
+80 11 00 00 04 50 55 53 48 00 84 12 FE 90 00 12
+64 91 06 50 55 53 48 2E 42 00 84 12 FE 90 40 12
+BE 90 04 43 41 4C 4C 00 84 12 FE 90 80 12 1A 53
+0E 4A 0D 12 87 12 9C 83 2E 80 0D 6F 75 74 20 6F
+66 20 62 6F 75 6E 64 73 7A 87 70 86 06 8E B0 91
+92 53 C4 21 3E 40 2C 00 87 12 F2 83 06 85 4C 80
+00 88 5E 8F C6 91 0A 4E 3E 4F 1A 83 E0 33 29 4E
+59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
+10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
+8F 3F 58 91 04 52 52 43 4D 00 84 12 AA 91 50 00
+F4 91 04 52 52 41 4D 00 84 12 AA 91 50 01 02 92
+04 52 4C 41 4D 00 84 12 AA 91 50 02 10 92 04 52
+52 55 4D 00 84 12 AA 91 50 03 72 91 05 50 55 53
+48 4D 84 12 AA 91 00 15 2C 92 04 50 4F 50 4D 00
+84 12 AA 91 00 17 1E 92 03 53 3E 3D 85 12 00 38
+48 92 02 53 3C 00 85 12 00 34 3A 92 03 30 3E 3D
+85 12 00 30 5C 92 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 70 92 03 55 3E 3D 85 12
+00 28 66 92 03 30 3C 3E 85 12 00 24 84 92 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
+8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 7A 92 04 54
+48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
+6E 90 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
+00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F AE 92
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
+2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 21 30 4D F2 90 05 41
+47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
+48 49 4C 45 0D 12 87 12 9C 92 82 82 26 83 52 92
+06 52 45 50 45 41 54 00 0D 12 87 12 24 93 B4 92
+26 83 54 93 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21
+CB 2F 98 42 C6 21 00 00 30 4D 82 91 03 42 57 31
+84 12 52 93 00 00 6C 93 03 42 57 32 84 12 52 93
+00 00 78 93 03 42 57 33 84 12 52 93 00 00 90 93
+3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B BA 4F
+00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00
+03 46 57 31 84 12 8E 93 00 00 B0 93 03 46 57 32
+84 12 8E 93 00 00 BC 93 03 46 57 33 84 12 8E 93
+00 00 C8 93 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
+3E 40 00 3C 0D 12 87 12 F0 87 18 86 26 83 00 00
+05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0 00 04
+3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C 8E
+6C 8C
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 58 96 D0 8C
-2D 01 6B B0 B6 82 C8 82
+10 00 04 00 51 55 40 1F 05 00 18 00 FC 93 88 8A
+2E 01 6B B0 06 81 18 81 D4 8B
@8000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 80
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 80
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 80
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 80 02 3E 52 00 0E 12 3E 4F 30 4D 70 80 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 80 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 80 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 80
-01 21 BE 4F 00 00 3E 4F 30 4D CC 80 02 30 3D 00
-1E 83 0E 7E 30 4D FC 80 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 81 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 80 B0 12 06 81 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C 8C CE FF FB 23 B2 40 68 81
+E2 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 80 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 81 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 81 02 23 53 00 87 12 88 81 C0 81
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 81
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 80 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 81 34 80 86 80 D4 80 BA 81
-92 80 F8 81 D4 81 D6 83 42 87 82 83 2A 80 22 81
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 81 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 82 18 42 8C 05 2F 83 8F 4E
-00 00 B0 12 B6 82 92 B3 9C 05 FD 27 1E 42 8C 05
-B0 12 C8 82 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
-8E 05 D2 C3 03 02 30 41 B2 40 13 00 8E 05 D2 D3
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 82
-B0 12 B6 82 12 D2 0A 18 F9 3F F0 80 06 41 43 43
-45 50 54 00 3C 40 64 83 3B 40 2E 83 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 83
-92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 8C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 9C 05
-FD 27 82 48 8E 05 30 4D 5A 83 2D 83 92 B3 9C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 80 04 45 4D 49
-54 00 30 40 86 83 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C 83 04 45 43 48 4F 00 B2 40 82 48
-52 83 82 43 DE 21 30 4D 32 82 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 83 92 43 DE 21 30 4D 20 82
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 83
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 83 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 81
-02 43 52 00 30 40 08 84 87 12 1E 84 02 0D 0A 00
-D6 83 2A 80 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 81 82 53 22 00 82 43 B4 21 87 12 14 84
-1E 84 B0 86 14 84 22 00 80 84 4C 84 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA 83 82 2E 22 00 87 12 38 84 14 84 D6 83
-B0 86 2A 80 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 80 34 40 00 80 30 4D 82 80 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 85 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 85 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 81 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 82 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 80 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC 82 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 83 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 86 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 84 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 84 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 87 42 87 80 84 50 87
-3D 40 58 87 CC 22 82 3E 5A 87 0A 4E 3E 4F 3D 40
-70 87 23 27 3D 40 4A 87 1A E2 BE 21 A1 27 B5 23
-72 87 3E 4F 3D 40 4A 87 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 8A CB 3F D2 86
+12 D3 F5 3F 34 40 EC 80 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 9C 05 FD 27 B2 40 11 00
+8E 05 D2 C3 03 02 30 41 A2 B3 9C 05 FD 27 B2 40
+13 00 8E 05 D2 D3 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 81 3B 40 70 81 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 81
+92 B3 9C 05 05 24 18 42 8C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 80 21 52 3A 17 58 42 8C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+9C 05 FD 27 82 48 8E 05 30 4D 9C 81 2D 83 92 B3
+9C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 81 08 4E 3E 4F E0 3F BE 81
+04 45 43 48 4F 00 B2 40 82 48 94 81 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 81 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 82 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 82 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 82 0D 12 87 12 2E 80 02 0D 0A 00 00 82 26 83
+00 00 03 4B 45 59 30 40 4A 82 18 42 8C 05 2F 83
+8F 4E 00 00 B0 12 06 81 92 B3 9C 05 FD 27 1E 42
+8C 05 B0 12 18 81 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A 82
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 80 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 82
+02 23 53 00 0D 12 87 12 E2 82 1C 83 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 83 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 81 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 82 14 83 9C 82 54 83 30 83
+00 82 70 86 C4 81 26 83 E4 81 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 83 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 80 2E 80 F8 85 24 80 22 00 F2 83 C0 83
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A 83 82 2E 22 00 0D 12 87 12
+AA 83 24 80 00 82 F8 85 26 83 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 80 34 40 EC 80 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 85 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 85 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 80
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C 81 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 85
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 80 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 83 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 80 70 86 F2 83 80 86
+3D 40 88 86 E2 22 A4 26 8A 86 0A 4E 3E 4F 3D 40
+A0 86 39 27 3D 40 7A 86 1A E2 BE 21 BD 23 AC 27
+A2 86 3E 4F 3D 40 7A 86 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 89 D2 3F D0 81
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 80 46 87 AE 87 B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 81 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A 80
-04 84 8C 83 42 87 82 83 46 87 A4 80 0C 81 1E 84
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 88
-14 84 30 FF A0 86 26 81 1E 84 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 88 3C 82 E0 87 C2 86 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E 88 86 41 42 4F
-52 54 22 00 87 12 38 84 14 84 40 88 B0 86 2A 80
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 8D
-B0 12 B6 82 92 C3 9C 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 9C 05 F3 23 87 12
-42 8D 14 84 DE 21 EA 80 AC 83 1E 84 04 1B 5B 37
-6D 00 D6 83 58 80 40 82 9A 88 04 84 1E 84 05 6C
-69 6E 65 3A D6 83 D0 80 24 82 D6 83 1E 84 04 1B
-5B 30 6D 00 D6 83 24 88 00 00 83 5B 27 5D 87 12
-C0 88 14 84 14 84 B0 86 B0 86 2A 80 E8 84 01 27
-87 12 42 87 80 84 EE 84 40 82 CE 88 2A 80 7A 87
-32 81 81 5C 92 42 C0 21 C4 21 30 4D AA 88 81 5B
-82 43 BE 21 30 4D D2 88 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 86 82 49 53 00 87 12
-BE 87 EA 80 40 82 12 89 AE 88 14 84 F0 88 B0 86
-2A 80 C0 88 F0 88 2A 80 FA 88 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 87 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 87
-80 84 EE 84 58 80 40 82 CE 88 0C 81 40 82 5C 89
-14 84 14 84 B0 86 B0 86 14 84 B0 86 B0 86 2A 80
-DE 88 81 3B 82 93 BE 21 B5 27 87 12 14 84 2A 80
-B0 86 FA 89 E0 88 2A 80 62 89 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 89 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A 89 01 3A 30 12 A0 89 92 B3 C6 21 A2 63 C6 21
-87 12 42 87 80 84 C8 89 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 84 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 88 90 87 05 44 45 46 45 52
-B0 12 B8 89 BA 40 30 40 FC FF BA 40 AE 89 FE FF
-E3 3F 1E 87 06 43 52 45 41 54 45 00 B0 12 B8 89
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 8A 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 85 05 3E 42 4F 44 59 2E 52
-30 4D 44 8A 04 43 4F 44 45 00 B0 12 B8 89 A2 82
-C6 21 87 12 D2 8C AC 8C 2A 80 84 8A 07 43 4F 44
-45 4E 4E 4D B0 12 86 89 F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 8C FA 89 2A 80 2C 88 03 41
-53 4D B2 40 B0 8C DA 21 E0 3F AC 8A 06 45 4E 44
-41 53 4D 00 87 12 B4 8A F4 8C 2A 80 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 8C 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A 80
-02 00 A2 52 C6 21 ED 3F 1A 89 85 48 49 32 4C 4F
-87 12 A0 86 4A 8B B0 86 E0 88 D2 8C AC 8C 2A 80
-1A 8B 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 82 00 00 2E 53 30 4D 5E 8A
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C 82 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 83
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C 8A 85 42 45 47 49 4E 30 40 A0 86 70 8B 85 55
-4E 54 49 4C 39 40 40 82 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 8A 85 41
-47 41 49 4E 39 40 3C 82 EF 3F 7A 84 85 57 48 49
-4C 45 87 12 36 8B 76 80 2A 80 34 84 86 52 45 50
-45 41 54 00 87 12 B4 8B 76 8B 2A 80 50 8B 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 82 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 86 84 4C 4F 4F 50 00 39 40 76 82
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 82 85 2B 4C 4F 4F 50
-39 40 64 82 E5 3F 06 8C 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 84
-CA 21 F2 80 2A 80 84 12 7E 8C AE 8B 3E 8F DE 8B
-BE 88 32 8B 3A 8C 52 90 64 84 66 8D 80 8D 8E 8B
-00 8E 00 00 24 90 E8 88 78 8A 00 00 84 12 7E 8C
-70 95 D2 95 24 95 46 96 EA 94 00 00 1A 92 00 00
-E0 94 90 95 42 95 80 95 2A 93 00 00 00 00 22 96
-AA 8C 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 8C EE 8C
-F4 8C 04 8D 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 89 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 8C D0 8C 58 96 CC 8B 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 8D 92 42 0C 18
-48 8D EF 3F 38 8D 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 8D 92 42 C6 21 48 8D 30 4D 4C 8D
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC 8B 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 82
-DE 82 B2 40 0A 8E 08 8E B2 40 D0 8C 0E 18 B2 40
-58 96 0C 18 30 12 56 8D B2 40 86 83 84 83 B2 40
-08 84 06 84 B2 40 98 82 96 82 B2 40 18 00 0A 18
-37 40 1A 80 36 40 92 80 35 40 0E 80 34 40 00 80
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A 8D
-04 57 41 52 4D 00 30 40 0A 8E 3D 40 3E 8E 92 C3
-30 01 1E 42 08 18 0E 93 11 24 F2 B2 21 02 02 20
-3E E3 1E 53 F2 D0 0C 00 2B 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 84
-06 0D 1B 5B 37 6D 23 00 D6 83 34 82 1E 84 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 83 14 84 30 FF A0 86
-B8 80 24 82 1E 84 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 82 9A 88 82 8B 04 43 4F 4C 44 00 92 B3
-8A 05 FD 23 B2 40 04 A5 20 01 3E 8E B2 40 88 5A
-CC 01 B2 43 06 02 B2 40 FE FF 02 02 D2 D3 05 02
-F2 D3 26 02 F2 43 22 02 F2 D3 47 02 F2 40 BF 00
-43 02 B2 40 00 A5 60 01 82 43 88 01 B2 40 FF 1E
-80 01 B2 40 B6 00 82 01 B2 40 F4 00 84 01 39 40
-80 00 92 D2 5E 01 08 18 38 40 59 14 18 83 FE 23
-19 83 FA 23 39 40 00 10 29 83 89 43 00 20 FC 23
-39 40 32 00 29 83 B9 40 9C 8E CE FF FB 23 B2 40
-26 83 E2 FF B2 40 81 00 80 05 92 42 02 18 86 05
-92 42 04 18 88 05 92 C3 80 05 92 D3 9A 05 3F 40
-80 20 31 40 E0 20 30 12 06 8E 4F 3F 88 8E 07 43
-4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B
-0E 5C 0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98
-FF FF F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 89
-86 5B 54 48 45 4E 5D 00 30 4D 70 8F 86 5B 45 4C
-53 45 5D 00 87 12 14 84 00 00 C6 80 42 87 80 84
-24 87 34 80 40 82 E6 8F 44 80 1E 84 06 5B 54 48
-45 4E 5D 00 46 8F 4A 82 B6 8F F8 83 D0 80 58 80
-4A 82 8C 8F 2A 80 44 80 1E 84 06 5B 45 4C 53 45
-5D 00 46 8F 4A 82 D4 8F F8 83 D0 80 58 80 4A 82
-8A 8F 2A 80 1E 84 04 5B 49 46 5D 00 46 8F 4A 82
-8C 8F 3C 82 8A 8F F8 83 1E 84 05 0D 0A 6B 6F 20
-D6 83 8C 83 32 87 3C 82 8C 8F 7C 8F 84 5B 49 46
-5D 00 0E 93 3E 4F BE 27 30 4D FC 8F 89 5B 44 45
-46 49 4E 45 44 5D 87 12 42 87 80 84 EE 84 6A 80
-2A 80 0C 90 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
-87 12 42 87 80 84 EE 84 6A 80 00 81 2A 80 40 90
-3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 8D
-48 8C 06 4D 41 52 4B 45 52 00 B0 12 B8 89 BA 40
-84 12 FC FF BA 40 3E 90 FE FF 9A 42 C8 21 00 00
-28 83 8A 48 02 00 A2 52 C6 21 30 40 00 8A 1C 15
-B0 12 2A 80 80 84 EE 84 4A 82 94 90 AA 85 40 82
-CE 88 AE 90 96 90 39 4E 39 80 86 12 08 24 19 53
-02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
-30 41 3E 40 28 00 B0 12 7E 90 19 42 C6 21 A2 53
-C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 21
-92 53 C4 21 B0 12 2A 80 80 84 AA 85 40 82 EC 90
-E2 90 21 53 3E 90 10 00 7D 2D E1 2B EE 90 B2 41
-C4 21 DD 3F 87 12 42 87 74 84 FC 90 0C 43 1B 42
-C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00 27 20
-92 53 C4 21 B0 12 7E 90 3C 40 00 03 0E 93 1C 24
-3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
-3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
-3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 21
-A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
-26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12 7E 90
-ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 21
-B0 12 CA 90 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-CA 90 92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10
-0C 5E DA 3F B0 12 CA 90 FA 23 3C 50 10 00 B0 12
-B2 90 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21 87 12
-42 87 74 84 C6 91 FE 90 26 00 00 00 3E 40 20 00
-03 20 3C 50 82 00 C8 3F B0 12 CA 90 E1 23 3C 50
-80 00 B0 12 B2 90 DC 3F D6 82 04 52 45 54 49 00
-87 12 14 84 00 13 B0 86 2A 80 14 84 2C 00 F4 90
-BE 91 04 92 09 4B 2E 4E 0E DC A4 3F FC 8A 03 4D
-4F 56 84 12 FA 91 00 40 0E 92 05 4D 4F 56 2E 42
-84 12 FA 91 40 40 00 00 03 41 44 44 84 12 FA 91
-00 50 28 92 05 41 44 44 2E 42 84 12 FA 91 40 50
-34 92 04 41 44 44 43 00 84 12 FA 91 00 60 42 92
-06 41 44 44 43 2E 42 00 84 12 FA 91 40 60 EA 91
-04 53 55 42 43 00 84 12 FA 91 00 70 60 92 06 53
-55 42 43 2E 42 00 84 12 FA 91 40 70 6E 92 03 53
-55 42 84 12 FA 91 00 80 7E 92 05 53 55 42 2E 42
-84 12 FA 91 40 80 DE 8A 03 43 4D 50 84 12 FA 91
-00 90 98 92 05 43 4D 50 2E 42 84 12 FA 91 40 90
-CC 8A 04 44 41 44 44 00 84 12 FA 91 00 A0 B2 92
-06 44 41 44 44 2E 42 00 84 12 FA 91 40 A0 A4 92
-03 42 49 54 84 12 FA 91 00 B0 D0 92 05 42 49 54
-2E 42 84 12 FA 91 40 B0 DC 92 03 42 49 43 84 12
-FA 91 00 C0 EA 92 05 42 49 43 2E 42 84 12 FA 91
-40 C0 F6 92 03 42 49 53 84 12 FA 91 00 D0 04 93
-05 42 49 53 2E 42 84 12 FA 91 40 D0 00 00 03 58
-4F 52 84 12 FA 91 00 E0 1E 93 05 58 4F 52 2E 42
-84 12 FA 91 40 E0 50 92 03 41 4E 44 84 12 FA 91
-00 F0 38 93 05 41 4E 44 2E 42 84 12 FA 91 40 F0
-42 87 F4 90 56 93 0A 4C 3C F0 70 00 8A 10 3A F0
-0F 00 0C DA 4F 3F 8A 92 03 52 52 43 84 12 50 93
-00 10 68 93 05 52 52 43 2E 42 84 12 50 93 40 10
-74 93 04 53 57 50 42 00 84 12 50 93 80 10 82 93
-03 52 52 41 84 12 50 93 00 11 90 93 05 52 52 41
-2E 42 84 12 50 93 40 11 9C 93 03 53 58 54 84 12
-50 93 80 11 00 00 04 50 55 53 48 00 84 12 50 93
-00 12 B6 93 06 50 55 53 48 2E 42 00 84 12 50 93
-40 12 10 93 04 43 41 4C 4C 00 84 12 50 93 80 12
-1A 53 0E 4A 87 12 34 82 1E 84 0D 6F 75 74 20 6F
-66 20 62 6F 75 6E 64 73 4C 88 42 87 74 84 00 94
-92 53 C4 21 3E 40 2C 00 B0 12 2A 80 80 84 AA 85
-40 82 CE 88 B4 91 18 94 0A 4E 3E 4F 1A 83 E0 33
-29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
-38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
-5A 06 8F 3F AA 93 04 52 52 43 4D 00 84 12 FA 93
-50 00 46 94 04 52 52 41 4D 00 84 12 FA 93 50 01
-54 94 04 52 4C 41 4D 00 84 12 FA 93 50 02 62 94
-04 52 52 55 4D 00 84 12 FA 93 50 03 C4 93 05 50
-55 53 48 4D 84 12 FA 93 00 15 7E 94 04 50 4F 50
-4D 00 84 12 FA 93 00 17 70 94 03 53 3E 3D 85 12
-00 38 9A 94 02 53 3C 00 85 12 00 34 8C 94 03 30
-3E 3D 85 12 00 30 AE 94 02 30 3C 00 85 12 00 30
-00 00 02 55 3C 00 85 12 00 2C C2 94 03 55 3E 3D
-85 12 00 28 B8 94 03 30 3C 3E 85 12 00 24 D6 94
-02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
-C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D CC 94
-04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
-29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
-30 4D C0 92 04 45 4C 53 45 00 1A 42 C6 21 BA 40
-00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
-00 95 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
-C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
-FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D 44 93
-05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
-05 57 48 49 4C 45 87 12 EE 94 76 80 2A 80 A4 94
-06 52 45 50 45 41 54 00 87 12 76 95 06 95 2A 80
-A2 95 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21 CD 2F
-98 42 C6 21 00 00 30 4D D4 93 03 42 57 31 84 12
-A0 95 00 00 BA 95 03 42 57 32 84 12 A0 95 00 00
-C6 95 03 42 57 33 84 12 A0 95 00 00 DE 95 3D 41
-1A 42 C6 21 28 4E B2 92 C4 21 90 2B BA 4F 00 00
-A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
-57 31 84 12 DC 95 00 00 FE 95 03 46 57 32 84 12
-DC 95 00 00 0A 96 03 46 57 33 84 12 DC 95 00 00
-00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0
-00 04 3E B0 00 10 02 24 3E E0 00 08 87 12 C0 88
-DA 86 2A 80 16 96 04 47 4F 54 4F 00 2F 83 8F 4E
-00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 86 DC 86 B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E 82 D4 80
+70 86 C4 81 74 86 8C 82 BC 82 2E 80 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 87 24 80 40 FF
+2A 8A C4 82 2E 80 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 87 48 80 0C 87 0A 86 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A 87 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 83 24 80 6E 87 F8 85 26 83 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 8B B0 12
+06 81 92 C3 9C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 9C 05 F3 23 0D 12 87 12
+10 8B 24 80 DE 21 02 81 D6 81 2E 80 04 1B 5B 37
+6D 00 00 82 7C 82 4C 80 C8 87 2E 82 2E 80 05 6C
+69 6E 65 3A 00 82 66 83 00 82 2E 80 04 1B 5B 30
+6D 00 00 82 50 87 00 00 83 5B 27 5D 0D 12 87 12
+F0 87 24 80 24 80 F8 85 F8 85 26 83 44 84 01 27
+0D 12 87 12 70 86 F2 83 4A 84 4C 80 00 88 26 83
+AA 86 D2 82 81 5C 92 42 C0 21 C4 21 30 4D D8 87
+81 5B 82 43 BE 21 30 4D 04 88 01 5D B2 43 BE 21
+30 4D F2 86 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 86 F2 83 4A 84 7C 82 4C 80 00 88 BC 82
+4C 80 50 88 24 80 24 80 F8 85 F8 85 24 80 F8 85
+F8 85 26 83 40 83 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 88 01 3A
+30 12 B8 88 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 86 F2 83 86 88 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E 88 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 88 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 80
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 87 CC 88 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 80 26 83 F8 85 F2 88 12 88 26 83 5C 86 06 43
+52 45 41 54 45 00 B0 12 74 88 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 86 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 89 04 43 4F 44 45 00 B0 12 74 88 A2 82 C6 21
+0D 12 87 12 8A 8A 64 8A 26 83 72 89 07 43 4F 44
+45 4E 4E 4D 30 12 7C 89 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 88 A4 8A 26 83 58 87
+03 41 53 4D B2 40 68 8A DA 21 DE 3F 9C 89 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 89 C2 8A 26 83
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 8A 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 88 85 48 49 32 4C 4F 0D 12
+87 12 2A 8A 1E 8A F8 85 12 88 80 89 26 83 2E 53
+30 4D 8C 89 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 80 CA 21 AE 82 26 83 84 12
+36 8A B0 89 5A 8C 58 89 EE 87 08 8A 42 82 20 86
+D8 83 34 8B 4E 8B 62 83 CE 8B 00 00 DC 8D 1A 88
+AA 84 00 00 84 12 36 8A 0E 93 74 93 C2 92 C4 93
+88 92 00 00 B8 8F 00 00 7E 92 30 93 E0 92 1E 93
+C8 90 00 00 00 00 E0 93 62 8A 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E 8A BC 8A C2 8A
+D2 8A 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 88 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 8A 88 8A FC 93 A6 83 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 8B 92 42 0C 18 16 8B
+EF 3F 06 8B 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 8B 92 42 C6 21 16 8B 30 4D 1A 8B 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC 83 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 80 02 80
+B2 40 D8 8B D6 8B B2 40 88 8A 0E 18 B2 40 FC 93
+0C 18 30 12 24 8B B2 40 C8 81 C6 81 B2 40 32 82
+30 82 B2 40 4A 82 48 82 B2 40 18 00 0A 18 37 40
+26 83 36 40 9C 82 35 40 FA 80 34 40 EC 80 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 8B 04 57
+41 52 4D 00 30 40 D8 8B 3D 40 10 8C 92 C3 30 01
+1E 42 08 18 0E 93 13 24 F2 B2 21 02 02 20 3E E3
+1E 53 F2 D0 0C 00 2B 02 92 D3 9A 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 80 07 0D 0A 1B 5B 37 6D 23 00 82 9C 83 2E 80
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 82 24 80 40 FF
+2A 8A A6 82 66 83 2E 80 0A 62 79 74 65 73 20 66
+72 65 65 00 48 80 C8 87 24 8A 04 43 4F 4C 44 00
+92 B3 8A 05 FD 23 B2 40 04 A5 20 01 31 40 E0 20
+B2 40 88 5A CC 01 B2 43 06 02 B2 40 FE FF 02 02
+D2 D3 05 02 F2 D3 26 02 F2 43 22 02 F2 D3 47 02
+F2 40 BF 00 43 02 B2 40 00 A5 60 01 82 43 88 01
+F2 D0 C0 00 0D 02 B2 40 FF 1E 80 01 B2 40 B6 00
+82 01 B2 40 F3 00 84 01 39 40 80 00 92 D2 5E 01
+08 18 38 40 59 14 18 83 FE 23 19 83 FA 23 39 40
+00 10 29 83 89 43 00 20 FC 23 B0 12 0E 80 B2 40
+81 00 80 05 92 42 02 18 86 05 92 42 04 18 88 05
+92 C3 80 05 3F 40 80 20 30 12 D4 8B 55 3F 24 89
+86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F
+39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83 04 30
+19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53
+9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 00 8D 86 5B
+45 4C 53 45 5D 00 0D 12 87 12 24 80 00 00 AA 82
+70 86 F2 83 62 86 68 82 4C 80 98 8D 70 82 2E 80
+06 5B 54 48 45 4E 5D 00 0A 8D 72 8D 2E 8D 50 8D
+26 83 70 82 2E 80 06 5B 45 4C 53 45 5D 00 0A 8D
+88 8D 2E 8D 4E 8D 26 83 2E 80 04 5B 49 46 5D 00
+0A 8D 50 8D 48 80 4E 8D 22 82 2E 80 05 0D 0A 6B
+6F 20 00 82 D4 80 C4 80 48 80 50 8D 3E 8D 84 5B
+49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53 30 4D
+AE 8D 89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12
+70 86 F2 83 4A 84 BC 8D 26 83 C2 8D 8B 5B 55 4E
+44 45 46 49 4E 45 44 5D 0D 12 87 12 CC 8D F0 8D
+3D 41 30 40 B6 82 38 40 C0 21 0A 4E 39 48 2E 48
+09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27 1E 83
+0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12 F2 83
+4A 84 42 80 2E 8E 06 85 4C 80 00 88 48 8E 30 8E
+39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C
+2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00
+B0 12 1A 8E 19 42 C6 21 A2 53 C6 21 89 4E 00 00
+3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21 87 12
+F2 83 06 85 4C 80 84 8E 7A 8E 21 53 3E 90 10 00
+80 2D E2 2B 86 8E B2 41 C4 21 DE 3F 0D 12 87 12
+70 86 F6 8D 96 8E 0C 43 1B 42 C6 21 A2 53 C6 21
+6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12
+1A 8E 3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93
+18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92
+10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93
+08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40
+10 02 92 53 C4 21 B0 12 1A 8E ED 3F 7A 90 40 00
+16 20 3C 40 20 00 92 53 C4 21 B0 12 64 8E 0C 20
+3C 50 10 00 3E 40 2B 00 B0 12 64 8E 92 92 C0 21
+C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12
+64 8E FA 23 3C 50 10 00 B0 12 4C 8E EF 3F 0C 43
+1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 86 F6 8D
+62 8F FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
+82 00 C7 3F B0 12 64 8E E0 23 3C 50 80 00 B0 12
+4C 8E DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12
+24 80 00 13 F8 85 26 83 24 80 2C 00 8C 8E 58 8F
+A2 8F 09 4B 2E 4E 0E DC A2 3F F6 89 03 4D 4F 56
+84 12 98 8F 00 40 AC 8F 05 4D 4F 56 2E 42 84 12
+98 8F 40 40 00 00 03 41 44 44 84 12 98 8F 00 50
+C6 8F 05 41 44 44 2E 42 84 12 98 8F 40 50 D2 8F
+04 41 44 44 43 00 84 12 98 8F 00 60 E0 8F 06 41
+44 44 43 2E 42 00 84 12 98 8F 40 60 86 8F 04 53
+55 42 43 00 84 12 98 8F 00 70 FE 8F 06 53 55 42
+43 2E 42 00 84 12 98 8F 40 70 0C 90 03 53 55 42
+84 12 98 8F 00 80 1C 90 05 53 55 42 2E 42 84 12
+98 8F 40 80 D2 89 03 43 4D 50 84 12 98 8F 00 90
+36 90 05 43 4D 50 2E 42 84 12 98 8F 40 90 BE 89
+04 44 41 44 44 00 84 12 98 8F 00 A0 50 90 06 44
+41 44 44 2E 42 00 84 12 98 8F 40 A0 42 90 03 42
+49 54 84 12 98 8F 00 B0 6E 90 05 42 49 54 2E 42
+84 12 98 8F 40 B0 7A 90 03 42 49 43 84 12 98 8F
+00 C0 88 90 05 42 49 43 2E 42 84 12 98 8F 40 C0
+94 90 03 42 49 53 84 12 98 8F 00 D0 A2 90 05 42
+49 53 2E 42 84 12 98 8F 40 D0 00 00 03 58 4F 52
+84 12 98 8F 00 E0 BC 90 05 58 4F 52 2E 42 84 12
+98 8F 40 E0 EE 8F 03 41 4E 44 84 12 98 8F 00 F0
+D6 90 05 41 4E 44 2E 42 84 12 98 8F 40 F0 70 86
+8C 8E F4 90 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
+0C DA 4F 3F 28 90 03 52 52 43 84 12 EE 90 00 10
+06 91 05 52 52 43 2E 42 84 12 EE 90 40 10 12 91
+04 53 57 50 42 00 84 12 EE 90 80 10 20 91 03 52
+52 41 84 12 EE 90 00 11 2E 91 05 52 52 41 2E 42
+84 12 EE 90 40 11 3A 91 03 53 58 54 84 12 EE 90
+80 11 00 00 04 50 55 53 48 00 84 12 EE 90 00 12
+54 91 06 50 55 53 48 2E 42 00 84 12 EE 90 40 12
+AE 90 04 43 41 4C 4C 00 84 12 EE 90 80 12 1A 53
+0E 4A 0D 12 87 12 9C 83 2E 80 0D 6F 75 74 20 6F
+66 20 62 6F 75 6E 64 73 7A 87 70 86 F6 8D A0 91
+92 53 C4 21 3E 40 2C 00 87 12 F2 83 06 85 4C 80
+00 88 4E 8F B6 91 0A 4E 3E 4F 1A 83 E0 33 29 4E
+59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
+10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
+8F 3F 48 91 04 52 52 43 4D 00 84 12 9A 91 50 00
+E4 91 04 52 52 41 4D 00 84 12 9A 91 50 01 F2 91
+04 52 4C 41 4D 00 84 12 9A 91 50 02 00 92 04 52
+52 55 4D 00 84 12 9A 91 50 03 62 91 05 50 55 53
+48 4D 84 12 9A 91 00 15 1C 92 04 50 4F 50 4D 00
+84 12 9A 91 00 17 0E 92 03 53 3E 3D 85 12 00 38
+38 92 02 53 3C 00 85 12 00 34 2A 92 03 30 3E 3D
+85 12 00 30 4C 92 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 60 92 03 55 3E 3D 85 12
+00 28 56 92 03 30 3C 3E 85 12 00 24 74 92 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
+8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 6A 92 04 54
+48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
+5E 90 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
+00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F 9E 92
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
+2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 21 30 4D E2 90 05 41
+47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
+48 49 4C 45 0D 12 87 12 8C 92 82 82 26 83 42 92
+06 52 45 50 45 41 54 00 0D 12 87 12 14 93 A4 92
+26 83 44 93 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 21
+CB 2F 98 42 C6 21 00 00 30 4D 72 91 03 42 57 31
+84 12 42 93 00 00 5C 93 03 42 57 32 84 12 42 93
+00 00 68 93 03 42 57 33 84 12 42 93 00 00 80 93
+3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B BA 4F
+00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D 00 00
+03 46 57 31 84 12 7E 93 00 00 A0 93 03 46 57 32
+84 12 7E 93 00 00 AC 93 03 46 57 33 84 12 7E 93
+00 00 B8 93 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
+3E 40 00 3C 0D 12 87 12 F0 87 18 86 26 83 00 00
+05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0 00 04
+3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C 8E
+6C 8C
q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 60 DA D0 D0
-2D 01 6B B0 B6 C6 C8 C6
+10 00 08 00 A1 F7 80 3E 05 00 18 00 FE D7 88 CE
+2E 01 6B B0 06 C5 18 C5 D4 CF
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+26 00 29 83 B9 40 6E D0 DA FF FB 23 B2 40 68 C5
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 42 CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 D2 C3 02 02 30 41 B2 40 13 00 0E 05 D2 D3
-02 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 B0 CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-B0 CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D 82 C4 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 C9 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C9 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C5 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C6 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 C4 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC C6 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 C7 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE CA 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 C8 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C8 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 CB 42 CB 80 C8 50 CB
-3D 40 58 CB CC 22 82 3E 5A CB 0A 4E 3E 4F 3D 40
-70 CB 23 27 3D 40 4A CB 1A E2 BE 21 A1 27 B5 23
-72 CB 3E 4F 3D 40 4A CB B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CE CB 3F D2 CA
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 D2 C3 02 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 D2 D3 02 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 70 CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 F8 C9 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 F8 C9 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 C9 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C9 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C4
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C9
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 C4 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C7 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C4 70 CA F2 C7 80 CA
+3D 40 88 CA E2 22 A4 26 8A CA 0A 4E 3E 4F 3D 40
+A0 CA 39 27 3D 40 7A CA 1A E2 BE 21 BD 23 AC 27
+A2 CA 3E 4F 3D 40 7A CA BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CD D2 3F D0 C5
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C4 46 CB AE CB B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 C5 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A C4
-04 C8 8C C7 42 CB 82 C7 46 CB A4 C4 0C C5 1E C8
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CC
-14 C8 30 FF A0 CA 26 C5 1E C8 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CC 3C C6 E0 CB C2 CA 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E CC 86 41 42 4F
-52 54 22 00 87 12 38 C8 14 C8 40 CC B0 CA 2A C4
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 D1
-B0 12 B6 C6 92 C3 1C 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 D1 14 C8 DE 21 EA C4 AC C7 1E C8 04 1B 5B 37
-6D 00 D6 C7 58 C4 40 C6 9A CC 04 C8 1E C8 05 6C
-69 6E 65 3A D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B
-5B 30 6D 00 D6 C7 24 CC 00 00 83 5B 27 5D 87 12
-C0 CC 14 C8 14 C8 B0 CA B0 CA 2A C4 E8 C8 01 27
-87 12 42 CB 80 C8 EE C8 40 C6 CE CC 2A C4 7A CB
-32 C5 81 5C 92 42 C0 21 C4 21 30 4D AA CC 81 5B
-82 43 BE 21 30 4D D2 CC 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A CA 82 49 53 00 87 12
-BE CB EA C4 40 C6 12 CD AE CC 14 C8 F0 CC B0 CA
-2A C4 C0 CC F0 CC 2A C4 FA CC 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 CB 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 CB
-80 C8 EE C8 58 C4 40 C6 CE CC 0C C5 40 C6 5C CD
-14 C8 14 C8 B0 CA B0 CA 14 C8 B0 CA B0 CA 2A C4
-DE CC 81 3B 82 93 BE 21 B5 27 87 12 14 C8 2A C4
-B0 CA FA CD E0 CC 2A C4 62 CD 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CD 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A CD 01 3A 30 12 A0 CD 92 B3 C6 21 A2 63 C6 21
-87 12 42 CB 80 C8 C8 CD 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C8 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CC 90 CB 05 44 45 46 45 52
-B0 12 B8 CD BA 40 30 40 FC FF BA 40 AE CD FE FF
-E3 3F 1E CB 06 43 52 45 41 54 45 00 B0 12 B8 CD
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CE 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C9 05 3E 42 4F 44 59 2E 52
-30 4D 44 CE 04 43 4F 44 45 00 B0 12 B8 CD A2 82
-C6 21 87 12 D2 D0 AC D0 2A C4 84 CE 07 43 4F 44
-45 4E 4E 4D B0 12 86 CD F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 D0 FA CD 2A C4 2C CC 03 41
-53 4D B2 40 B0 D0 DA 21 E0 3F AC CE 06 45 4E 44
-41 53 4D 00 87 12 B4 CE F4 D0 2A C4 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 D0 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A C4
-02 00 A2 52 C6 21 ED 3F 1A CD 85 48 49 32 4C 4F
-87 12 A0 CA 4A CF B0 CA E0 CC D2 D0 AC D0 2A C4
-1A CF 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 C6 00 00 2E 53 30 4D 5E CE
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C C6 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C7
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C CE 85 42 45 47 49 4E 30 40 A0 CA 70 CF 85 55
-4E 54 49 4C 39 40 40 C6 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CE 85 41
-47 41 49 4E 39 40 3C C6 EF 3F 7A C8 85 57 48 49
-4C 45 87 12 36 CF 76 C4 2A C4 34 C8 86 52 45 50
-45 41 54 00 87 12 B4 CF 76 CF 2A C4 50 CF 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 C6 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 CA 84 4C 4F 4F 50 00 39 40 76 C6
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50
-39 40 64 C6 E5 3F 06 D0 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C8
-CA 21 F2 C4 2A C4 84 12 7E D0 AE CF 46 D3 DE CF
-BE CC 32 CF 3A D0 5A D4 64 C8 66 D1 80 D1 8E CF
-00 D2 00 00 2C D4 E8 CC 78 CE 00 00 84 12 7E D0
-78 D9 DA D9 2C D9 4E DA F2 D8 00 00 22 D6 00 00
-E8 D8 98 D9 4A D9 88 D9 32 D7 00 00 00 00 2A DA
-AA D0 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 D0 EE D0
-F4 D0 04 D1 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CD 09 50 57 52 5F 53 54 41
-54 45 84 12 FC D0 D0 D0 60 DA CC CF 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 D1 92 42 0C 18
-48 D1 EF 3F 38 D1 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 D1 92 42 C6 21 48 D1 30 4D 4C D1
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC CF 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C6
-DE C6 B2 40 0A D2 08 D2 B2 40 D0 D0 0E 18 B2 40
-60 DA 0C 18 30 12 56 D1 B2 40 86 C7 84 C7 B2 40
-08 C8 06 C8 B2 40 98 C6 96 C6 B2 40 18 00 0A 18
-37 40 1A C4 36 40 92 C4 35 40 0E C4 34 40 00 C4
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A D1
-04 57 41 52 4D 00 30 40 0A D2 3D 40 40 D2 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E C8 06 0D 1B 5B 37 6D 23 00 D6 C7 34 C6 1E C8
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 C7 14 C8 30 FF
-A0 CA B8 C4 24 C6 1E C8 0A 62 79 74 65 73 20 66
-72 65 65 00 3C C6 9A CC 82 CF 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 D2 B2 40
-88 5A CC 01 B2 43 06 02 B2 40 FC FF 02 02 D2 D3
-02 02 F2 D3 26 02 F2 43 22 02 F2 40 A5 00 A1 01
-F2 40 10 00 A0 01 D2 43 A1 01 B2 40 00 A5 60 01
-B2 40 FF 1E 80 01 B2 40 BA 00 82 01 B2 40 E8 01
-84 01 39 40 00 01 82 43 88 01 92 D2 5E 01 08 18
-38 40 59 14 18 83 FE 23 19 83 FA 23 39 40 00 10
-29 83 89 43 00 20 FC 23 39 40 26 00 29 83 B9 40
-9E D2 DA FF FB 23 B2 40 26 C7 E4 FF B2 40 81 00
-00 05 92 42 02 18 06 05 92 42 04 18 08 05 92 C3
-00 05 92 D3 1A 05 3F 40 80 20 31 40 E0 20 30 12
-06 D2 4B 3F 8A D2 07 43 4F 4D 50 41 52 45 0C 4E
-38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30
-1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43
-30 4D 1E 43 30 4D B2 CD 86 5B 54 48 45 4E 5D 00
-30 4D 78 D3 86 5B 45 4C 53 45 5D 00 87 12 14 C8
-00 00 C6 C4 42 CB 80 C8 24 CB 34 C4 40 C6 EE D3
-44 C4 1E C8 06 5B 54 48 45 4E 5D 00 4E D3 4A C6
-BE D3 F8 C7 D0 C4 58 C4 4A C6 94 D3 2A C4 44 C4
-1E C8 06 5B 45 4C 53 45 5D 00 4E D3 4A C6 DC D3
-F8 C7 D0 C4 58 C4 4A C6 92 D3 2A C4 1E C8 04 5B
-49 46 5D 00 4E D3 4A C6 94 D3 3C C6 92 D3 F8 C7
-1E C8 05 0D 0A 6B 6F 20 D6 C7 8C C7 32 CB 3C C6
-94 D3 84 D3 84 5B 49 46 5D 00 0E 93 3E 4F BE 27
-30 4D 04 D4 89 5B 44 45 46 49 4E 45 44 5D 87 12
-42 CB 80 C8 EE C8 6A C4 2A C4 14 D4 8B 5B 55 4E
-44 45 46 49 4E 45 44 5D 87 12 42 CB 80 C8 EE C8
-6A C4 00 C5 2A C4 48 D4 3D 41 B2 4E 0E 18 A2 4E
-0C 18 3E 4F 30 40 56 D1 48 D0 06 4D 41 52 4B 45
-52 00 B0 12 B8 CD BA 40 84 12 FC FF BA 40 46 D4
-FE FF 9A 42 C8 21 00 00 28 83 8A 48 02 00 A2 52
-C6 21 30 40 00 CE 1C 15 B0 12 2A C4 80 C8 EE C8
-4A C6 9C D4 AA C9 40 C6 CE CC B6 D4 9E D4 39 4E
-39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
-19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
-86 D4 19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 21 92 53 C4 21 B0 12 2A C4
-80 C8 AA C9 40 C6 F4 D4 EA D4 21 53 3E 90 10 00
-7D 2D E1 2B F6 D4 B2 41 C4 21 DD 3F 87 12 42 CB
-74 C8 04 D5 0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E
-3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12 86 D4
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
-92 53 C4 21 B0 12 86 D4 ED 3F 7A 90 40 00 16 20
-3C 40 20 00 92 53 C4 21 B0 12 D2 D4 0C 20 3C 50
-10 00 3E 40 2B 00 B0 12 D2 D4 92 92 C0 21 C4 21
-02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12 D2 D4
-FA 23 3C 50 10 00 B0 12 BA D4 EF 3F 0C 43 1B 42
-C6 21 A2 53 C6 21 87 12 42 CB 74 C8 CE D5 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F
-B0 12 D2 D4 E1 23 3C 50 80 00 B0 12 BA D4 DC 3F
-D6 C6 04 52 45 54 49 00 87 12 14 C8 00 13 B0 CA
-2A C4 14 C8 2C 00 FC D4 C6 D5 0C D6 09 4B 2E 4E
-0E DC A4 3F FC CE 03 4D 4F 56 84 12 02 D6 00 40
-16 D6 05 4D 4F 56 2E 42 84 12 02 D6 40 40 00 00
-03 41 44 44 84 12 02 D6 00 50 30 D6 05 41 44 44
-2E 42 84 12 02 D6 40 50 3C D6 04 41 44 44 43 00
-84 12 02 D6 00 60 4A D6 06 41 44 44 43 2E 42 00
-84 12 02 D6 40 60 F2 D5 04 53 55 42 43 00 84 12
-02 D6 00 70 68 D6 06 53 55 42 43 2E 42 00 84 12
-02 D6 40 70 76 D6 03 53 55 42 84 12 02 D6 00 80
-86 D6 05 53 55 42 2E 42 84 12 02 D6 40 80 DE CE
-03 43 4D 50 84 12 02 D6 00 90 A0 D6 05 43 4D 50
-2E 42 84 12 02 D6 40 90 CC CE 04 44 41 44 44 00
-84 12 02 D6 00 A0 BA D6 06 44 41 44 44 2E 42 00
-84 12 02 D6 40 A0 AC D6 03 42 49 54 84 12 02 D6
-00 B0 D8 D6 05 42 49 54 2E 42 84 12 02 D6 40 B0
-E4 D6 03 42 49 43 84 12 02 D6 00 C0 F2 D6 05 42
-49 43 2E 42 84 12 02 D6 40 C0 FE D6 03 42 49 53
-84 12 02 D6 00 D0 0C D7 05 42 49 53 2E 42 84 12
-02 D6 40 D0 00 00 03 58 4F 52 84 12 02 D6 00 E0
-26 D7 05 58 4F 52 2E 42 84 12 02 D6 40 E0 58 D6
-03 41 4E 44 84 12 02 D6 00 F0 40 D7 05 41 4E 44
-2E 42 84 12 02 D6 40 F0 42 CB FC D4 5E D7 0A 4C
-3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 92 D6
-03 52 52 43 84 12 58 D7 00 10 70 D7 05 52 52 43
-2E 42 84 12 58 D7 40 10 7C D7 04 53 57 50 42 00
-84 12 58 D7 80 10 8A D7 03 52 52 41 84 12 58 D7
-00 11 98 D7 05 52 52 41 2E 42 84 12 58 D7 40 11
-A4 D7 03 53 58 54 84 12 58 D7 80 11 00 00 04 50
-55 53 48 00 84 12 58 D7 00 12 BE D7 06 50 55 53
-48 2E 42 00 84 12 58 D7 40 12 18 D7 04 43 41 4C
-4C 00 84 12 58 D7 80 12 1A 53 0E 4A 87 12 34 C6
-1E C8 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
-4C CC 42 CB 74 C8 08 D8 92 53 C4 21 3E 40 2C 00
-B0 12 2A C4 80 C8 AA C9 40 C6 CE CC BC D5 20 D8
-0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C
-59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E
-94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F B2 D7 04 52
-52 43 4D 00 84 12 02 D8 50 00 4E D8 04 52 52 41
-4D 00 84 12 02 D8 50 01 5C D8 04 52 4C 41 4D 00
-84 12 02 D8 50 02 6A D8 04 52 52 55 4D 00 84 12
-02 D8 50 03 CC D7 05 50 55 53 48 4D 84 12 02 D8
-00 15 86 D8 04 50 4F 50 4D 00 84 12 02 D8 00 17
-78 D8 03 53 3E 3D 85 12 00 38 A2 D8 02 53 3C 00
-85 12 00 34 94 D8 03 30 3E 3D 85 12 00 30 B6 D8
-02 30 3C 00 85 12 00 30 00 00 02 55 3C 00 85 12
-00 2C CA D8 03 55 3E 3D 85 12 00 28 C0 D8 03 30
-3C 3E 85 12 00 24 DE D8 02 30 3D 00 85 12 00 20
-00 00 02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53
-C6 21 0E 4A 30 4D D4 D8 04 54 48 45 4E 00 1A 42
-C6 21 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 63 2F 88 DA 00 00 30 4D C8 D6 04 45 4C 53
-45 00 1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21
-2F 83 8F 4A 00 00 E3 3F 08 D9 05 55 4E 54 49 4C
-3A 4F 08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11
-3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00
-A2 53 C6 21 30 4D 4C D7 05 41 47 41 49 4E 0A 4E
-38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12
-F6 D8 76 C4 2A C4 AC D8 06 52 45 50 45 41 54 00
-87 12 7E D9 0E D9 2A C4 AA D9 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 21 CD 2F 98 42 C6 21 00 00 30 4D
-DC D7 03 42 57 31 84 12 A8 D9 00 00 C2 D9 03 42
-57 32 84 12 A8 D9 00 00 CE D9 03 42 57 33 84 12
-A8 D9 00 00 E6 D9 3D 41 1A 42 C6 21 28 4E B2 92
-C4 21 90 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 84 12 E4 D9 00 00
-06 DA 03 46 57 32 84 12 E4 D9 00 00 12 DA 03 46
-57 33 84 12 E4 D9 00 00 00 00 05 3F 47 4F 54 4F
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 87 12 C0 CC DA CA 2A C4 1E DA 04 47
-4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 CA DC CA B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E C6 D4 C4
+70 CA C4 C5 74 CA 8C C6 BC C6 2E C4 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E CB 24 C4 40 FF
+2A CE C4 C6 2E C4 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E CB 48 C4 0C CB 0A CA 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A CB 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C7 24 C4 6E CB F8 C9 26 C7 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CF B0 12
+06 C5 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 CF 24 C4 DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37
+6D 00 00 C6 7C C6 4C C4 C8 CB 2E C6 2E C4 05 6C
+69 6E 65 3A 00 C6 66 C7 00 C6 2E C4 04 1B 5B 30
+6D 00 00 C6 50 CB 00 00 83 5B 27 5D 0D 12 87 12
+F0 CB 24 C4 24 C4 F8 C9 F8 C9 26 C7 44 C8 01 27
+0D 12 87 12 70 CA F2 C7 4A C8 4C C4 00 CC 26 C7
+AA CA D2 C6 81 5C 92 42 C0 21 C4 21 30 4D D8 CB
+81 5B 82 43 BE 21 30 4D 04 CC 01 5D B2 43 BE 21
+30 4D F2 CA 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 CA F2 C7 4A C8 7C C6 4C C4 00 CC BC C6
+4C C4 50 CC 24 C4 24 C4 F8 C9 F8 C9 24 C4 F8 C9
+F8 C9 26 C7 40 C7 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 CC 01 3A
+30 12 B8 CC 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 CA F2 C7 86 CC 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E CC 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CC 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C4
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A CB CC CC 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 C4 26 C7 F8 C9 F2 CC 12 CC 26 C7 5C CA 06 43
+52 45 41 54 45 00 B0 12 74 CC BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 CA 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CD 04 43 4F 44 45 00 B0 12 74 CC A2 82 C6 21
+0D 12 87 12 8A CE 64 CE 26 C7 72 CD 07 43 4F 44
+45 4E 4E 4D 30 12 7C CD 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CC A4 CE 26 C7 58 CB
+03 41 53 4D B2 40 68 CE DA 21 DE 3F 9C CD 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CD C2 CE 26 C7
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 CE 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 CC 85 48 49 32 4C 4F 0D 12
+87 12 2A CE 1E CE F8 C9 12 CC 80 CD 26 C7 2E 53
+30 4D 8C CD 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 C4 CA 21 AE C6 26 C7 84 12
+36 CE B0 CD 5C D0 58 CD EE CB 08 CE 42 C6 20 CA
+D8 C7 34 CF 4E CF 62 C7 CE CF 00 00 DE D1 1A CC
+AA C8 00 00 84 12 36 CE 10 D7 76 D7 C4 D6 C6 D7
+8A D6 00 00 BA D3 00 00 80 D6 32 D7 E2 D6 20 D7
+CA D4 00 00 00 00 E2 D7 62 CE 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E CE BC CE C2 CE
+D2 CE 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CC 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CE 88 CE FE D7 A6 C7 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CF 92 42 0C 18 16 CF
+EF 3F 06 CF 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 CF 92 42 C6 21 16 CF 30 4D 1A CF 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC C7 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C4 02 C4
+B2 40 D8 CF D6 CF B2 40 88 CE 0E 18 B2 40 FE D7
+0C 18 30 12 24 CF B2 40 C8 C5 C6 C5 B2 40 32 C6
+30 C6 B2 40 4A C6 48 C6 B2 40 18 00 0A 18 37 40
+26 C7 36 40 9C C6 35 40 FA C4 34 40 EC C4 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 CF 04 57
+41 52 4D 00 30 40 D8 CF 3D 40 12 D0 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E C4 07 0D 0A 1B 5B 37 6D 23 00 C6 9C C7
+2E C4 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 C6 24 C4
+40 FF 2A CE A6 C6 66 C7 2E C4 0A 62 79 74 65 73
+20 66 72 65 65 00 48 C4 C8 CB 24 CE 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 43 06 02 B2 40 FC FF
+02 02 D2 D3 04 02 F2 D3 26 02 F2 43 22 02 F2 40
+A5 00 A1 01 F2 40 10 00 A0 01 D2 43 A1 01 B2 40
+00 A5 60 01 B2 40 FF 1E 80 01 B2 40 BA 00 82 01
+B2 40 E8 01 84 01 39 40 00 01 82 43 88 01 92 D2
+5E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
+39 40 00 10 29 83 89 43 00 20 FC 23 B0 12 0E C4
+B2 40 81 00 00 05 92 42 02 18 06 05 92 42 04 18
+08 05 92 C3 00 05 3F 40 80 20 30 12 D4 CF 54 3F
+24 CD 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 02 D1
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 C4 00 00
+AA C6 70 CA F2 C7 62 CA 68 C6 4C C4 9A D1 70 C6
+2E C4 06 5B 54 48 45 4E 5D 00 0C D1 74 D1 30 D1
+52 D1 26 C7 70 C6 2E C4 06 5B 45 4C 53 45 5D 00
+0C D1 8A D1 30 D1 50 D1 26 C7 2E C4 04 5B 49 46
+5D 00 0C D1 52 D1 48 C4 50 D1 22 C6 2E C4 05 0D
+0A 6B 6F 20 00 C6 D4 C4 C4 C4 48 C4 52 D1 40 D1
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D B0 D1 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 CA F2 C7 4A C8 BE D1 26 C7 C4 D1 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 CE D1
+F2 D1 3D 41 30 40 B6 C6 38 40 C0 21 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12
+F2 C7 4A C8 42 C4 30 D2 06 C9 4C C4 00 CC 4A D2
+32 D2 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 1C D2 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21
+87 12 F2 C7 06 C9 4C C4 86 D2 7C D2 21 53 3E 90
+10 00 80 2D E2 2B 88 D2 B2 41 C4 21 DE 3F 0D 12
+87 12 70 CA F8 D1 98 D2 0C 43 1B 42 C6 21 A2 53
+C6 21 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21
+B0 12 1C D2 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 21 B0 12 1C D2 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 21 B0 12 66 D2
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 66 D2 92 92
+C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F
+B0 12 66 D2 FA 23 3C 50 10 00 B0 12 4E D2 EF 3F
+0C 43 1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 CA
+F8 D1 64 D3 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 66 D2 E0 23 3C 50 80 00
+B0 12 4E D2 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 C4 00 13 F8 C9 26 C7 24 C4 2C 00 8E D2
+5A D3 A4 D3 09 4B 2E 4E 0E DC A2 3F F6 CD 03 4D
+4F 56 84 12 9A D3 00 40 AE D3 05 4D 4F 56 2E 42
+84 12 9A D3 40 40 00 00 03 41 44 44 84 12 9A D3
+00 50 C8 D3 05 41 44 44 2E 42 84 12 9A D3 40 50
+D4 D3 04 41 44 44 43 00 84 12 9A D3 00 60 E2 D3
+06 41 44 44 43 2E 42 00 84 12 9A D3 40 60 88 D3
+04 53 55 42 43 00 84 12 9A D3 00 70 00 D4 06 53
+55 42 43 2E 42 00 84 12 9A D3 40 70 0E D4 03 53
+55 42 84 12 9A D3 00 80 1E D4 05 53 55 42 2E 42
+84 12 9A D3 40 80 D2 CD 03 43 4D 50 84 12 9A D3
+00 90 38 D4 05 43 4D 50 2E 42 84 12 9A D3 40 90
+BE CD 04 44 41 44 44 00 84 12 9A D3 00 A0 52 D4
+06 44 41 44 44 2E 42 00 84 12 9A D3 40 A0 44 D4
+03 42 49 54 84 12 9A D3 00 B0 70 D4 05 42 49 54
+2E 42 84 12 9A D3 40 B0 7C D4 03 42 49 43 84 12
+9A D3 00 C0 8A D4 05 42 49 43 2E 42 84 12 9A D3
+40 C0 96 D4 03 42 49 53 84 12 9A D3 00 D0 A4 D4
+05 42 49 53 2E 42 84 12 9A D3 40 D0 00 00 03 58
+4F 52 84 12 9A D3 00 E0 BE D4 05 58 4F 52 2E 42
+84 12 9A D3 40 E0 F0 D3 03 41 4E 44 84 12 9A D3
+00 F0 D8 D4 05 41 4E 44 2E 42 84 12 9A D3 40 F0
+70 CA 8E D2 F6 D4 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 2A D4 03 52 52 43 84 12 F0 D4
+00 10 08 D5 05 52 52 43 2E 42 84 12 F0 D4 40 10
+14 D5 04 53 57 50 42 00 84 12 F0 D4 80 10 22 D5
+03 52 52 41 84 12 F0 D4 00 11 30 D5 05 52 52 41
+2E 42 84 12 F0 D4 40 11 3C D5 03 53 58 54 84 12
+F0 D4 80 11 00 00 04 50 55 53 48 00 84 12 F0 D4
+00 12 56 D5 06 50 55 53 48 2E 42 00 84 12 F0 D4
+40 12 B0 D4 04 43 41 4C 4C 00 84 12 F0 D4 80 12
+1A 53 0E 4A 0D 12 87 12 9C C7 2E C4 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A CB 70 CA F8 D1
+A2 D5 92 53 C4 21 3E 40 2C 00 87 12 F2 C7 06 C9
+4C C4 00 CC 50 D3 B8 D5 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 4A D5 04 52 52 43 4D 00 84 12 9C D5
+50 00 E6 D5 04 52 52 41 4D 00 84 12 9C D5 50 01
+F4 D5 04 52 4C 41 4D 00 84 12 9C D5 50 02 02 D6
+04 52 52 55 4D 00 84 12 9C D5 50 03 64 D5 05 50
+55 53 48 4D 84 12 9C D5 00 15 1E D6 04 50 4F 50
+4D 00 84 12 9C D5 00 17 10 D6 03 53 3E 3D 85 12
+00 38 3A D6 02 53 3C 00 85 12 00 34 2C D6 03 30
+3E 3D 85 12 00 30 4E D6 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 62 D6 03 55 3E 3D
+85 12 00 28 58 D6 03 30 3C 3E 85 12 00 24 76 D6
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 6C D6
+04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 60 D4 04 45 4C 53 45 00 1A 42 C6 21 BA 40
+00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
+A0 D6 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D E4 D4
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 8E D6 82 C6 26 C7
+44 D6 06 52 45 50 45 41 54 00 0D 12 87 12 16 D7
+A6 D6 26 C7 46 D7 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 21 CB 2F 98 42 C6 21 00 00 30 4D 74 D5 03 42
+57 31 84 12 44 D7 00 00 5E D7 03 42 57 32 84 12
+44 D7 00 00 6A D7 03 42 57 33 84 12 44 D7 00 00
+82 D7 3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B
+BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 80 D7 00 00 A2 D7 03 46
+57 32 84 12 80 D7 00 00 AE D7 03 46 57 33 84 12
+80 D7 00 00 BA D7 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 CB 18 CA 26 C7
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9E D2
+6E D0
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 50 DA D0 D0
-2D 01 6B B0 B6 C6 C8 C6
+10 00 08 00 00 D6 E8 03 05 00 18 00 EE D7 88 CE
+2E 01 6B B0 06 C5 18 C5 D4 CF
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+26 00 29 83 B9 40 6E D0 DA FF FB 23 B2 40 68 C5
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 42 CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 D2 C3 02 02 30 41 B2 40 13 00 0E 05 D2 D3
-02 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 B0 CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-B0 CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D 82 C4 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 C9 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C9 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C5 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C6 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 C4 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC C6 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 C7 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE CA 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 C8 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C8 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 CB 42 CB 80 C8 50 CB
-3D 40 58 CB CC 22 82 3E 5A CB 0A 4E 3E 4F 3D 40
-70 CB 23 27 3D 40 4A CB 1A E2 BE 21 A1 27 B5 23
-72 CB 3E 4F 3D 40 4A CB B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CE CB 3F D2 CA
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 D2 C3 02 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 D2 D3 02 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 70 CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 F8 C9 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 F8 C9 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 C9 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C9 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C4
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C9
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 C4 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C7 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C4 70 CA F2 C7 80 CA
+3D 40 88 CA E2 22 A4 26 8A CA 0A 4E 3E 4F 3D 40
+A0 CA 39 27 3D 40 7A CA 1A E2 BE 21 BD 23 AC 27
+A2 CA 3E 4F 3D 40 7A CA BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CD D2 3F D0 C5
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C4 46 CB AE CB B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 C5 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A C4
-04 C8 8C C7 42 CB 82 C7 46 CB A4 C4 0C C5 1E C8
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CC
-14 C8 30 FF A0 CA 26 C5 1E C8 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CC 3C C6 E0 CB C2 CA 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E CC 86 41 42 4F
-52 54 22 00 87 12 38 C8 14 C8 40 CC B0 CA 2A C4
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 D1
-B0 12 B6 C6 92 C3 1C 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 D1 14 C8 DE 21 EA C4 AC C7 1E C8 04 1B 5B 37
-6D 00 D6 C7 58 C4 40 C6 9A CC 04 C8 1E C8 05 6C
-69 6E 65 3A D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B
-5B 30 6D 00 D6 C7 24 CC 00 00 83 5B 27 5D 87 12
-C0 CC 14 C8 14 C8 B0 CA B0 CA 2A C4 E8 C8 01 27
-87 12 42 CB 80 C8 EE C8 40 C6 CE CC 2A C4 7A CB
-32 C5 81 5C 92 42 C0 21 C4 21 30 4D AA CC 81 5B
-82 43 BE 21 30 4D D2 CC 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A CA 82 49 53 00 87 12
-BE CB EA C4 40 C6 12 CD AE CC 14 C8 F0 CC B0 CA
-2A C4 C0 CC F0 CC 2A C4 FA CC 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 CB 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 CB
-80 C8 EE C8 58 C4 40 C6 CE CC 0C C5 40 C6 5C CD
-14 C8 14 C8 B0 CA B0 CA 14 C8 B0 CA B0 CA 2A C4
-DE CC 81 3B 82 93 BE 21 B5 27 87 12 14 C8 2A C4
-B0 CA FA CD E0 CC 2A C4 62 CD 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CD 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A CD 01 3A 30 12 A0 CD 92 B3 C6 21 A2 63 C6 21
-87 12 42 CB 80 C8 C8 CD 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C8 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CC 90 CB 05 44 45 46 45 52
-B0 12 B8 CD BA 40 30 40 FC FF BA 40 AE CD FE FF
-E3 3F 1E CB 06 43 52 45 41 54 45 00 B0 12 B8 CD
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CE 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C9 05 3E 42 4F 44 59 2E 52
-30 4D 44 CE 04 43 4F 44 45 00 B0 12 B8 CD A2 82
-C6 21 87 12 D2 D0 AC D0 2A C4 84 CE 07 43 4F 44
-45 4E 4E 4D B0 12 86 CD F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 D0 FA CD 2A C4 2C CC 03 41
-53 4D B2 40 B0 D0 DA 21 E0 3F AC CE 06 45 4E 44
-41 53 4D 00 87 12 B4 CE F4 D0 2A C4 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 D0 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A C4
-02 00 A2 52 C6 21 ED 3F 1A CD 85 48 49 32 4C 4F
-87 12 A0 CA 4A CF B0 CA E0 CC D2 D0 AC D0 2A C4
-1A CF 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 C6 00 00 2E 53 30 4D 5E CE
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C C6 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C7
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C CE 85 42 45 47 49 4E 30 40 A0 CA 70 CF 85 55
-4E 54 49 4C 39 40 40 C6 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CE 85 41
-47 41 49 4E 39 40 3C C6 EF 3F 7A C8 85 57 48 49
-4C 45 87 12 36 CF 76 C4 2A C4 34 C8 86 52 45 50
-45 41 54 00 87 12 B4 CF 76 CF 2A C4 50 CF 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 C6 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 CA 84 4C 4F 4F 50 00 39 40 76 C6
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50
-39 40 64 C6 E5 3F 06 D0 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C8
-CA 21 F2 C4 2A C4 84 12 7E D0 AE CF 36 D3 DE CF
-BE CC 32 CF 3A D0 4A D4 64 C8 66 D1 80 D1 8E CF
-00 D2 00 00 1C D4 E8 CC 78 CE 00 00 84 12 7E D0
-68 D9 CA D9 1C D9 3E DA E2 D8 00 00 12 D6 00 00
-D8 D8 88 D9 3A D9 78 D9 22 D7 00 00 00 00 1A DA
-AA D0 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 D0 EE D0
-F4 D0 04 D1 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CD 09 50 57 52 5F 53 54 41
-54 45 84 12 FC D0 D0 D0 50 DA CC CF 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 D1 92 42 0C 18
-48 D1 EF 3F 38 D1 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 D1 92 42 C6 21 48 D1 30 4D 4C D1
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC CF 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C6
-DE C6 B2 40 0A D2 08 D2 B2 40 D0 D0 0E 18 B2 40
-50 DA 0C 18 30 12 56 D1 B2 40 86 C7 84 C7 B2 40
-08 C8 06 C8 B2 40 98 C6 96 C6 B2 40 18 00 0A 18
-37 40 1A C4 36 40 92 C4 35 40 0E C4 34 40 00 C4
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A D1
-04 57 41 52 4D 00 30 40 0A D2 3D 40 40 D2 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E C8 06 0D 1B 5B 37 6D 23 00 D6 C7 34 C6 1E C8
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 C7 14 C8 30 FF
-A0 CA B8 C4 24 C6 1E C8 0A 62 79 74 65 73 20 66
-72 65 65 00 3C C6 9A CC 82 CF 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 D2 B2 40
-88 5A CC 01 B2 43 06 02 B2 40 FC FF 02 02 D2 D3
-02 02 F2 D3 26 02 F2 43 22 02 B2 40 00 A5 60 01
-B2 40 FF 1E 80 01 B2 40 B0 00 82 01 B2 40 1E 00
-84 01 39 40 10 00 82 43 88 01 92 D2 5E 01 08 18
-38 40 59 14 18 83 FE 23 19 83 FA 23 39 40 00 10
-29 83 89 43 00 20 FC 23 39 40 26 00 29 83 B9 40
-9E D2 DA FF FB 23 B2 40 26 C7 E4 FF B2 40 81 00
-00 05 92 42 02 18 06 05 92 42 04 18 08 05 92 C3
-00 05 92 D3 1A 05 3F 40 80 20 31 40 E0 20 30 12
-06 D2 53 3F 8A D2 07 43 4F 4D 50 41 52 45 0C 4E
-38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30
-1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43
-30 4D 1E 43 30 4D B2 CD 86 5B 54 48 45 4E 5D 00
-30 4D 68 D3 86 5B 45 4C 53 45 5D 00 87 12 14 C8
-00 00 C6 C4 42 CB 80 C8 24 CB 34 C4 40 C6 DE D3
-44 C4 1E C8 06 5B 54 48 45 4E 5D 00 3E D3 4A C6
-AE D3 F8 C7 D0 C4 58 C4 4A C6 84 D3 2A C4 44 C4
-1E C8 06 5B 45 4C 53 45 5D 00 3E D3 4A C6 CC D3
-F8 C7 D0 C4 58 C4 4A C6 82 D3 2A C4 1E C8 04 5B
-49 46 5D 00 3E D3 4A C6 84 D3 3C C6 82 D3 F8 C7
-1E C8 05 0D 0A 6B 6F 20 D6 C7 8C C7 32 CB 3C C6
-84 D3 74 D3 84 5B 49 46 5D 00 0E 93 3E 4F BE 27
-30 4D F4 D3 89 5B 44 45 46 49 4E 45 44 5D 87 12
-42 CB 80 C8 EE C8 6A C4 2A C4 04 D4 8B 5B 55 4E
-44 45 46 49 4E 45 44 5D 87 12 42 CB 80 C8 EE C8
-6A C4 00 C5 2A C4 38 D4 3D 41 B2 4E 0E 18 A2 4E
-0C 18 3E 4F 30 40 56 D1 48 D0 06 4D 41 52 4B 45
-52 00 B0 12 B8 CD BA 40 84 12 FC FF BA 40 36 D4
-FE FF 9A 42 C8 21 00 00 28 83 8A 48 02 00 A2 52
-C6 21 30 40 00 CE 1C 15 B0 12 2A C4 80 C8 EE C8
-4A C6 8C D4 AA C9 40 C6 CE CC A6 D4 8E D4 39 4E
-39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
-19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
-76 D4 19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 21 92 53 C4 21 B0 12 2A C4
-80 C8 AA C9 40 C6 E4 D4 DA D4 21 53 3E 90 10 00
-7D 2D E1 2B E6 D4 B2 41 C4 21 DD 3F 87 12 42 CB
-74 C8 F4 D4 0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E
-3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12 76 D4
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
-92 53 C4 21 B0 12 76 D4 ED 3F 7A 90 40 00 16 20
-3C 40 20 00 92 53 C4 21 B0 12 C2 D4 0C 20 3C 50
-10 00 3E 40 2B 00 B0 12 C2 D4 92 92 C0 21 C4 21
-02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12 C2 D4
-FA 23 3C 50 10 00 B0 12 AA D4 EF 3F 0C 43 1B 42
-C6 21 A2 53 C6 21 87 12 42 CB 74 C8 BE D5 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F
-B0 12 C2 D4 E1 23 3C 50 80 00 B0 12 AA D4 DC 3F
-D6 C6 04 52 45 54 49 00 87 12 14 C8 00 13 B0 CA
-2A C4 14 C8 2C 00 EC D4 B6 D5 FC D5 09 4B 2E 4E
-0E DC A4 3F FC CE 03 4D 4F 56 84 12 F2 D5 00 40
-06 D6 05 4D 4F 56 2E 42 84 12 F2 D5 40 40 00 00
-03 41 44 44 84 12 F2 D5 00 50 20 D6 05 41 44 44
-2E 42 84 12 F2 D5 40 50 2C D6 04 41 44 44 43 00
-84 12 F2 D5 00 60 3A D6 06 41 44 44 43 2E 42 00
-84 12 F2 D5 40 60 E2 D5 04 53 55 42 43 00 84 12
-F2 D5 00 70 58 D6 06 53 55 42 43 2E 42 00 84 12
-F2 D5 40 70 66 D6 03 53 55 42 84 12 F2 D5 00 80
-76 D6 05 53 55 42 2E 42 84 12 F2 D5 40 80 DE CE
-03 43 4D 50 84 12 F2 D5 00 90 90 D6 05 43 4D 50
-2E 42 84 12 F2 D5 40 90 CC CE 04 44 41 44 44 00
-84 12 F2 D5 00 A0 AA D6 06 44 41 44 44 2E 42 00
-84 12 F2 D5 40 A0 9C D6 03 42 49 54 84 12 F2 D5
-00 B0 C8 D6 05 42 49 54 2E 42 84 12 F2 D5 40 B0
-D4 D6 03 42 49 43 84 12 F2 D5 00 C0 E2 D6 05 42
-49 43 2E 42 84 12 F2 D5 40 C0 EE D6 03 42 49 53
-84 12 F2 D5 00 D0 FC D6 05 42 49 53 2E 42 84 12
-F2 D5 40 D0 00 00 03 58 4F 52 84 12 F2 D5 00 E0
-16 D7 05 58 4F 52 2E 42 84 12 F2 D5 40 E0 48 D6
-03 41 4E 44 84 12 F2 D5 00 F0 30 D7 05 41 4E 44
-2E 42 84 12 F2 D5 40 F0 42 CB EC D4 4E D7 0A 4C
-3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 82 D6
-03 52 52 43 84 12 48 D7 00 10 60 D7 05 52 52 43
-2E 42 84 12 48 D7 40 10 6C D7 04 53 57 50 42 00
-84 12 48 D7 80 10 7A D7 03 52 52 41 84 12 48 D7
-00 11 88 D7 05 52 52 41 2E 42 84 12 48 D7 40 11
-94 D7 03 53 58 54 84 12 48 D7 80 11 00 00 04 50
-55 53 48 00 84 12 48 D7 00 12 AE D7 06 50 55 53
-48 2E 42 00 84 12 48 D7 40 12 08 D7 04 43 41 4C
-4C 00 84 12 48 D7 80 12 1A 53 0E 4A 87 12 34 C6
-1E C8 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
-4C CC 42 CB 74 C8 F8 D7 92 53 C4 21 3E 40 2C 00
-B0 12 2A C4 80 C8 AA C9 40 C6 CE CC AC D5 10 D8
-0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C
-59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E
-94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F A2 D7 04 52
-52 43 4D 00 84 12 F2 D7 50 00 3E D8 04 52 52 41
-4D 00 84 12 F2 D7 50 01 4C D8 04 52 4C 41 4D 00
-84 12 F2 D7 50 02 5A D8 04 52 52 55 4D 00 84 12
-F2 D7 50 03 BC D7 05 50 55 53 48 4D 84 12 F2 D7
-00 15 76 D8 04 50 4F 50 4D 00 84 12 F2 D7 00 17
-68 D8 03 53 3E 3D 85 12 00 38 92 D8 02 53 3C 00
-85 12 00 34 84 D8 03 30 3E 3D 85 12 00 30 A6 D8
-02 30 3C 00 85 12 00 30 00 00 02 55 3C 00 85 12
-00 2C BA D8 03 55 3E 3D 85 12 00 28 B0 D8 03 30
-3C 3E 85 12 00 24 CE D8 02 30 3D 00 85 12 00 20
-00 00 02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53
-C6 21 0E 4A 30 4D C4 D8 04 54 48 45 4E 00 1A 42
-C6 21 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 63 2F 88 DA 00 00 30 4D B8 D6 04 45 4C 53
-45 00 1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21
-2F 83 8F 4A 00 00 E3 3F F8 D8 05 55 4E 54 49 4C
-3A 4F 08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11
-3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00
-A2 53 C6 21 30 4D 3C D7 05 41 47 41 49 4E 0A 4E
-38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12
-E6 D8 76 C4 2A C4 9C D8 06 52 45 50 45 41 54 00
-87 12 6E D9 FE D8 2A C4 9A D9 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 21 CD 2F 98 42 C6 21 00 00 30 4D
-CC D7 03 42 57 31 84 12 98 D9 00 00 B2 D9 03 42
-57 32 84 12 98 D9 00 00 BE D9 03 42 57 33 84 12
-98 D9 00 00 D6 D9 3D 41 1A 42 C6 21 28 4E B2 92
-C4 21 90 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 84 12 D4 D9 00 00
-F6 D9 03 46 57 32 84 12 D4 D9 00 00 02 DA 03 46
-57 33 84 12 D4 D9 00 00 00 00 05 3F 47 4F 54 4F
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 87 12 C0 CC DA CA 2A C4 0E DA 04 47
-4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 CA DC CA B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E C6 D4 C4
+70 CA C4 C5 74 CA 8C C6 BC C6 2E C4 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E CB 24 C4 40 FF
+2A CE C4 C6 2E C4 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E CB 48 C4 0C CB 0A CA 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A CB 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C7 24 C4 6E CB F8 C9 26 C7 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CF B0 12
+06 C5 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 CF 24 C4 DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37
+6D 00 00 C6 7C C6 4C C4 C8 CB 2E C6 2E C4 05 6C
+69 6E 65 3A 00 C6 66 C7 00 C6 2E C4 04 1B 5B 30
+6D 00 00 C6 50 CB 00 00 83 5B 27 5D 0D 12 87 12
+F0 CB 24 C4 24 C4 F8 C9 F8 C9 26 C7 44 C8 01 27
+0D 12 87 12 70 CA F2 C7 4A C8 4C C4 00 CC 26 C7
+AA CA D2 C6 81 5C 92 42 C0 21 C4 21 30 4D D8 CB
+81 5B 82 43 BE 21 30 4D 04 CC 01 5D B2 43 BE 21
+30 4D F2 CA 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 CA F2 C7 4A C8 7C C6 4C C4 00 CC BC C6
+4C C4 50 CC 24 C4 24 C4 F8 C9 F8 C9 24 C4 F8 C9
+F8 C9 26 C7 40 C7 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 CC 01 3A
+30 12 B8 CC 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 CA F2 C7 86 CC 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E CC 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CC 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C4
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A CB CC CC 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 C4 26 C7 F8 C9 F2 CC 12 CC 26 C7 5C CA 06 43
+52 45 41 54 45 00 B0 12 74 CC BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 CA 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CD 04 43 4F 44 45 00 B0 12 74 CC A2 82 C6 21
+0D 12 87 12 8A CE 64 CE 26 C7 72 CD 07 43 4F 44
+45 4E 4E 4D 30 12 7C CD 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CC A4 CE 26 C7 58 CB
+03 41 53 4D B2 40 68 CE DA 21 DE 3F 9C CD 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CD C2 CE 26 C7
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 CE 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 CC 85 48 49 32 4C 4F 0D 12
+87 12 2A CE 1E CE F8 C9 12 CC 80 CD 26 C7 2E 53
+30 4D 8C CD 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 C4 CA 21 AE C6 26 C7 84 12
+36 CE B0 CD 5C D0 58 CD EE CB 08 CE 42 C6 20 CA
+D8 C7 34 CF 4E CF 62 C7 CE CF 00 00 CE D1 1A CC
+AA C8 00 00 84 12 36 CE 00 D7 66 D7 B4 D6 B6 D7
+7A D6 00 00 AA D3 00 00 70 D6 22 D7 D2 D6 10 D7
+BA D4 00 00 00 00 D2 D7 62 CE 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E CE BC CE C2 CE
+D2 CE 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CC 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CE 88 CE EE D7 A6 C7 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CF 92 42 0C 18 16 CF
+EF 3F 06 CF 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 CF 92 42 C6 21 16 CF 30 4D 1A CF 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC C7 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C4 02 C4
+B2 40 D8 CF D6 CF B2 40 88 CE 0E 18 B2 40 EE D7
+0C 18 30 12 24 CF B2 40 C8 C5 C6 C5 B2 40 32 C6
+30 C6 B2 40 4A C6 48 C6 B2 40 18 00 0A 18 37 40
+26 C7 36 40 9C C6 35 40 FA C4 34 40 EC C4 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 CF 04 57
+41 52 4D 00 30 40 D8 CF 3D 40 12 D0 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E C4 07 0D 0A 1B 5B 37 6D 23 00 C6 9C C7
+2E C4 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 C6 24 C4
+40 FF 2A CE A6 C6 66 C7 2E C4 0A 62 79 74 65 73
+20 66 72 65 65 00 48 C4 C8 CB 24 CE 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 43 06 02 B2 40 FC FF
+02 02 D2 D3 04 02 F2 D3 26 02 F2 43 22 02 B2 40
+00 A5 60 01 B2 40 FF 1E 80 01 B2 40 B0 00 82 01
+B2 40 1E 00 84 01 39 40 10 00 82 43 88 01 92 D2
+5E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
+39 40 00 10 29 83 89 43 00 20 FC 23 B0 12 0E C4
+B2 40 81 00 00 05 92 42 02 18 06 05 92 42 04 18
+08 05 92 C3 00 05 3F 40 80 20 30 12 D4 CF 5C 3F
+24 CD 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F F2 D0
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 C4 00 00
+AA C6 70 CA F2 C7 62 CA 68 C6 4C C4 8A D1 70 C6
+2E C4 06 5B 54 48 45 4E 5D 00 FC D0 64 D1 20 D1
+42 D1 26 C7 70 C6 2E C4 06 5B 45 4C 53 45 5D 00
+FC D0 7A D1 20 D1 40 D1 26 C7 2E C4 04 5B 49 46
+5D 00 FC D0 42 D1 48 C4 40 D1 22 C6 2E C4 05 0D
+0A 6B 6F 20 00 C6 D4 C4 C4 C4 48 C4 42 D1 30 D1
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D A0 D1 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 CA F2 C7 4A C8 AE D1 26 C7 B4 D1 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 BE D1
+E2 D1 3D 41 30 40 B6 C6 38 40 C0 21 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12
+F2 C7 4A C8 42 C4 20 D2 06 C9 4C C4 00 CC 3A D2
+22 D2 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 0C D2 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21
+87 12 F2 C7 06 C9 4C C4 76 D2 6C D2 21 53 3E 90
+10 00 80 2D E2 2B 78 D2 B2 41 C4 21 DE 3F 0D 12
+87 12 70 CA E8 D1 88 D2 0C 43 1B 42 C6 21 A2 53
+C6 21 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21
+B0 12 0C D2 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 21 B0 12 0C D2 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 21 B0 12 56 D2
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 56 D2 92 92
+C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F
+B0 12 56 D2 FA 23 3C 50 10 00 B0 12 3E D2 EF 3F
+0C 43 1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 CA
+E8 D1 54 D3 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 56 D2 E0 23 3C 50 80 00
+B0 12 3E D2 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 C4 00 13 F8 C9 26 C7 24 C4 2C 00 7E D2
+4A D3 94 D3 09 4B 2E 4E 0E DC A2 3F F6 CD 03 4D
+4F 56 84 12 8A D3 00 40 9E D3 05 4D 4F 56 2E 42
+84 12 8A D3 40 40 00 00 03 41 44 44 84 12 8A D3
+00 50 B8 D3 05 41 44 44 2E 42 84 12 8A D3 40 50
+C4 D3 04 41 44 44 43 00 84 12 8A D3 00 60 D2 D3
+06 41 44 44 43 2E 42 00 84 12 8A D3 40 60 78 D3
+04 53 55 42 43 00 84 12 8A D3 00 70 F0 D3 06 53
+55 42 43 2E 42 00 84 12 8A D3 40 70 FE D3 03 53
+55 42 84 12 8A D3 00 80 0E D4 05 53 55 42 2E 42
+84 12 8A D3 40 80 D2 CD 03 43 4D 50 84 12 8A D3
+00 90 28 D4 05 43 4D 50 2E 42 84 12 8A D3 40 90
+BE CD 04 44 41 44 44 00 84 12 8A D3 00 A0 42 D4
+06 44 41 44 44 2E 42 00 84 12 8A D3 40 A0 34 D4
+03 42 49 54 84 12 8A D3 00 B0 60 D4 05 42 49 54
+2E 42 84 12 8A D3 40 B0 6C D4 03 42 49 43 84 12
+8A D3 00 C0 7A D4 05 42 49 43 2E 42 84 12 8A D3
+40 C0 86 D4 03 42 49 53 84 12 8A D3 00 D0 94 D4
+05 42 49 53 2E 42 84 12 8A D3 40 D0 00 00 03 58
+4F 52 84 12 8A D3 00 E0 AE D4 05 58 4F 52 2E 42
+84 12 8A D3 40 E0 E0 D3 03 41 4E 44 84 12 8A D3
+00 F0 C8 D4 05 41 4E 44 2E 42 84 12 8A D3 40 F0
+70 CA 7E D2 E6 D4 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 1A D4 03 52 52 43 84 12 E0 D4
+00 10 F8 D4 05 52 52 43 2E 42 84 12 E0 D4 40 10
+04 D5 04 53 57 50 42 00 84 12 E0 D4 80 10 12 D5
+03 52 52 41 84 12 E0 D4 00 11 20 D5 05 52 52 41
+2E 42 84 12 E0 D4 40 11 2C D5 03 53 58 54 84 12
+E0 D4 80 11 00 00 04 50 55 53 48 00 84 12 E0 D4
+00 12 46 D5 06 50 55 53 48 2E 42 00 84 12 E0 D4
+40 12 A0 D4 04 43 41 4C 4C 00 84 12 E0 D4 80 12
+1A 53 0E 4A 0D 12 87 12 9C C7 2E C4 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A CB 70 CA E8 D1
+92 D5 92 53 C4 21 3E 40 2C 00 87 12 F2 C7 06 C9
+4C C4 00 CC 40 D3 A8 D5 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 3A D5 04 52 52 43 4D 00 84 12 8C D5
+50 00 D6 D5 04 52 52 41 4D 00 84 12 8C D5 50 01
+E4 D5 04 52 4C 41 4D 00 84 12 8C D5 50 02 F2 D5
+04 52 52 55 4D 00 84 12 8C D5 50 03 54 D5 05 50
+55 53 48 4D 84 12 8C D5 00 15 0E D6 04 50 4F 50
+4D 00 84 12 8C D5 00 17 00 D6 03 53 3E 3D 85 12
+00 38 2A D6 02 53 3C 00 85 12 00 34 1C D6 03 30
+3E 3D 85 12 00 30 3E D6 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 52 D6 03 55 3E 3D
+85 12 00 28 48 D6 03 30 3C 3E 85 12 00 24 66 D6
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 5C D6
+04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 50 D4 04 45 4C 53 45 00 1A 42 C6 21 BA 40
+00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
+90 D6 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D D4 D4
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 7E D6 82 C6 26 C7
+34 D6 06 52 45 50 45 41 54 00 0D 12 87 12 06 D7
+96 D6 26 C7 36 D7 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 21 CB 2F 98 42 C6 21 00 00 30 4D 64 D5 03 42
+57 31 84 12 34 D7 00 00 4E D7 03 42 57 32 84 12
+34 D7 00 00 5A D7 03 42 57 33 84 12 34 D7 00 00
+72 D7 3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B
+BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 70 D7 00 00 92 D7 03 46
+57 32 84 12 70 D7 00 00 9E D7 03 46 57 33 84 12
+70 D7 00 00 AA D7 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 CB 18 CA 26 C7
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9E D2
+6E D0
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 50 DA D0 D0
-2D 01 6B B0 B6 C6 C8 C6
+10 00 04 00 51 55 40 1F 05 00 18 00 EE D7 88 CE
+2E 01 6B B0 06 C5 18 C5 D4 CF
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+26 00 29 83 B9 40 6E D0 DA FF FB 23 B2 40 68 C5
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 42 CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 D2 C3 02 02 30 41 B2 40 13 00 0E 05 D2 D3
-02 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 B0 CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-B0 CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D 82 C4 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 21 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 21 0C 43 2D 15 3D 40 F4 C9 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C9 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C5 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 21 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C6 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 21 30 4D B6 C4 01 2C
-1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D
-EC C6 05 41 4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D
-A6 C7 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE CA 87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24
-1A 42 C6 21 A2 52 C6 21 BA 40 14 C8 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C8 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 21 B2 4F C2 21 3E 4F 82 43 C4 21
-30 4D 85 12 20 00 87 12 32 CB 42 CB 80 C8 50 CB
-3D 40 58 CB CC 22 82 3E 5A CB 0A 4E 3E 4F 3D 40
-70 CB 23 27 3D 40 4A CB 1A E2 BE 21 A1 27 B5 23
-72 CB 3E 4F 3D 40 4A CB B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CE CB 3F D2 CA
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 D2 C3 02 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 D2 D3 02 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 70 CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 F8 C9 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 F8 C9 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 21 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 21 0C 43
+2D 15 3D 40 50 C9 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C9 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C4
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 21 8A 4E 00 00
+A2 53 C6 21 3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54
+82 5E C6 21 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C9
+87 4C 49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42
+C6 21 A2 52 C6 21 BA 40 24 C4 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C7 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C4 70 CA F2 C7 80 CA
+3D 40 88 CA E2 22 A4 26 8A CA 0A 4E 3E 4F 3D 40
+A0 CA 39 27 3D 40 7A CA 1A E2 BE 21 BD 23 AC 27
+A2 CA 3E 4F 3D 40 7A CA BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CD D2 3F D0 C5
08 45 56 41 4C 55 41 54 45 00 39 40 C0 21 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C4 46 CB AE CB B2 41
-C4 21 B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12
-BE 21 08 C5 04 51 55 49 54 00 82 43 08 18 31 40
-E0 20 B2 40 00 20 00 20 82 43 BE 21 B0 12 2A C4
-04 C8 8C C7 42 CB 82 C7 46 CB A4 C4 0C C5 1E C8
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CC
-14 C8 30 FF A0 CA 26 C5 1E C8 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CC 3C C6 E0 CB C2 CA 05 41
-42 4F 52 54 3F 40 80 20 D0 3F 1E CC 86 41 42 4F
-52 54 22 00 87 12 38 C8 14 C8 40 CC B0 CA 2A C4
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 D1
-B0 12 B6 C6 92 C3 1C 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 1C 05 F3 23 87 12
-42 D1 14 C8 DE 21 EA C4 AC C7 1E C8 04 1B 5B 37
-6D 00 D6 C7 58 C4 40 C6 9A CC 04 C8 1E C8 05 6C
-69 6E 65 3A D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B
-5B 30 6D 00 D6 C7 24 CC 00 00 83 5B 27 5D 87 12
-C0 CC 14 C8 14 C8 B0 CA B0 CA 2A C4 E8 C8 01 27
-87 12 42 CB 80 C8 EE C8 40 C6 CE CC 2A C4 7A CB
-32 C5 81 5C 92 42 C0 21 C4 21 30 4D AA CC 81 5B
-82 43 BE 21 30 4D D2 CC 01 5D B2 43 BE 21 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A CA 82 49 53 00 87 12
-BE CB EA C4 40 C6 12 CD AE CC 14 C8 F0 CC B0 CA
-2A C4 C0 CC F0 CC 2A C4 FA CC 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 21 FA D0 80 00 00 00 30 4D
-C4 CB 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 CB
-80 C8 EE C8 58 C4 40 C6 CE CC 0C C5 40 C6 5C CD
-14 C8 14 C8 B0 CA B0 CA 14 C8 B0 CA B0 CA 2A C4
-DE CC 81 3B 82 93 BE 21 B5 27 87 12 14 C8 2A C4
-B0 CA FA CD E0 CC 2A C4 62 CD 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CD 2F 83 8F 4E 00 00 1E 42 C6 21
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 21 B2 43 BE 21 30 4D
-7A CD 01 3A 30 12 A0 CD 92 B3 C6 21 A2 63 C6 21
-87 12 42 CB 80 C8 C8 CD 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F
-BC 21 2A 52 82 4A C6 21 30 41 82 9F BC 21 09 20
-18 42 B6 21 19 42 B8 21 A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C8 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CC 90 CB 05 44 45 46 45 52
-B0 12 B8 CD BA 40 30 40 FC FF BA 40 AE CD FE FF
-E3 3F 1E CB 06 43 52 45 41 54 45 00 B0 12 B8 CD
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CE 05 44
-4F 45 53 3E 1A 42 BA 21 BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C9 05 3E 42 4F 44 59 2E 52
-30 4D 44 CE 04 43 4F 44 45 00 B0 12 B8 CD A2 82
-C6 21 87 12 D2 D0 AC D0 2A C4 84 CE 07 43 4F 44
-45 4E 4E 4D B0 12 86 CD F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 D0 FA CD 2A C4 2C CC 03 41
-53 4D B2 40 B0 D0 DA 21 E0 3F AC CE 06 45 4E 44
-41 53 4D 00 87 12 B4 CE F4 D0 2A C4 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 21 BA 40 87 12 00 00 A2 53
-C6 21 B2 43 BE 21 30 40 E0 D0 00 00 05 4C 4F 32
-48 49 1A 42 C6 21 BA 40 B0 12 00 00 BA 40 2A C4
-02 00 A2 52 C6 21 ED 3F 1A CD 85 48 49 32 4C 4F
-87 12 A0 CA 4A CF B0 CA E0 CC D2 D0 AC D0 2A C4
-1A CF 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 21
-A2 52 C6 21 BE 40 40 C6 00 00 2E 53 30 4D 5E CE
-84 45 4C 53 45 00 A2 52 C6 21 1A 42 C6 21 BA 40
-3C C6 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C7
-84 54 48 45 4E 00 9E 42 C6 21 00 00 3E 4F 30 4D
-9C CE 85 42 45 47 49 4E 30 40 A0 CA 70 CF 85 55
-4E 54 49 4C 39 40 40 C6 A2 52 C6 21 1A 42 C6 21
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CE 85 41
-47 41 49 4E 39 40 3C C6 EF 3F 7A C8 85 57 48 49
-4C 45 87 12 36 CF 76 C4 2A C4 34 C8 86 52 45 50
-45 41 54 00 87 12 B4 CF 76 CF 2A C4 50 CF 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 21 1E 42 C6 21
-BE 40 54 C6 FE FF A2 53 00 20 1A 42 00 20 8A 43
-00 00 30 4D E2 CA 84 4C 4F 4F 50 00 39 40 76 C6
-A2 52 C6 21 1A 42 C6 21 8A 49 FC FF 8A 4E FE FF
-1E 42 00 20 A2 83 00 20 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50
-39 40 64 C6 E5 3F 06 D0 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C8
-CA 21 F2 C4 2A C4 84 12 7E D0 AE CF 36 D3 DE CF
-BE CC 32 CF 3A D0 4A D4 64 C8 66 D1 80 D1 8E CF
-00 D2 00 00 1C D4 E8 CC 78 CE 00 00 84 12 7E D0
-68 D9 CA D9 1C D9 3E DA E2 D8 00 00 12 D6 00 00
-D8 D8 88 D9 3A D9 78 D9 22 D7 00 00 00 00 1A DA
-AA D0 3A 40 0C 00 39 40 CA 21 38 40 CC 21 C6 3F
-3A 40 0E 00 39 40 CC 21 38 40 CA 21 B9 3F 82 43
-CC 21 30 4D 92 42 CA 21 DA 21 30 4D 86 D0 EE D0
-F4 D0 04 D1 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CD 09 50 57 52 5F 53 54 41
-54 45 84 12 FC D0 D0 D0 50 DA CC CF 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 D1 92 42 0C 18
-48 D1 EF 3F 38 D1 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 21 46 D1 92 42 C6 21 48 D1 30 4D 4C D1
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18
-92 42 C6 21 0C 18 EC 3F BC CF 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C6
-DE C6 B2 40 0A D2 08 D2 B2 40 D0 D0 0E 18 B2 40
-50 DA 0C 18 30 12 56 D1 B2 40 86 C7 84 C7 B2 40
-08 C8 06 C8 B2 40 98 C6 96 C6 B2 40 18 00 0A 18
-37 40 1A C4 36 40 92 C4 35 40 0E C4 34 40 00 C4
-B2 40 0A 00 DC 21 B2 40 20 00 B4 21 30 41 9A D1
-04 57 41 52 4D 00 30 40 0A D2 3D 40 40 D2 92 C3
-30 01 1E 42 08 18 0E 93 12 24 F2 B0 10 00 00 02
-02 20 3E E3 1E 53 F2 D0 30 00 0A 02 3E 90 0A 00
-B7 27 3E 90 16 00 B4 2F 2E 93 83 27 8C 2F 30 4D
-1E C8 06 0D 1B 5B 37 6D 23 00 D6 C7 34 C6 1E C8
-19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
-2E 54 68 6F 6F 72 65 6E 73 20 D6 C7 14 C8 30 FF
-A0 CA B8 C4 24 C6 1E C8 0A 62 79 74 65 73 20 66
-72 65 65 00 3C C6 9A CC 82 CF 04 43 4F 4C 44 00
-92 B3 0A 05 FD 23 B2 40 04 A5 20 01 40 D2 B2 40
-88 5A CC 01 B2 43 06 02 B2 40 FC FF 02 02 D2 D3
-02 02 F2 D3 26 02 F2 43 22 02 B2 40 00 A5 60 01
-B2 40 FF 1E 80 01 B2 40 B6 00 82 01 B2 40 F4 00
-84 01 39 40 80 00 82 43 88 01 92 D2 5E 01 08 18
-38 40 59 14 18 83 FE 23 19 83 FA 23 39 40 00 10
-29 83 89 43 00 20 FC 23 39 40 26 00 29 83 B9 40
-9E D2 DA FF FB 23 B2 40 26 C7 E4 FF B2 40 81 00
-00 05 92 42 02 18 06 05 92 42 04 18 08 05 92 C3
-00 05 92 D3 1A 05 3F 40 80 20 31 40 E0 20 30 12
-06 D2 53 3F 8A D2 07 43 4F 4D 50 41 52 45 0C 4E
-38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30
-1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43
-30 4D 1E 43 30 4D B2 CD 86 5B 54 48 45 4E 5D 00
-30 4D 68 D3 86 5B 45 4C 53 45 5D 00 87 12 14 C8
-00 00 C6 C4 42 CB 80 C8 24 CB 34 C4 40 C6 DE D3
-44 C4 1E C8 06 5B 54 48 45 4E 5D 00 3E D3 4A C6
-AE D3 F8 C7 D0 C4 58 C4 4A C6 84 D3 2A C4 44 C4
-1E C8 06 5B 45 4C 53 45 5D 00 3E D3 4A C6 CC D3
-F8 C7 D0 C4 58 C4 4A C6 82 D3 2A C4 1E C8 04 5B
-49 46 5D 00 3E D3 4A C6 84 D3 3C C6 82 D3 F8 C7
-1E C8 05 0D 0A 6B 6F 20 D6 C7 8C C7 32 CB 3C C6
-84 D3 74 D3 84 5B 49 46 5D 00 0E 93 3E 4F BE 27
-30 4D F4 D3 89 5B 44 45 46 49 4E 45 44 5D 87 12
-42 CB 80 C8 EE C8 6A C4 2A C4 04 D4 8B 5B 55 4E
-44 45 46 49 4E 45 44 5D 87 12 42 CB 80 C8 EE C8
-6A C4 00 C5 2A C4 38 D4 3D 41 B2 4E 0E 18 A2 4E
-0C 18 3E 4F 30 40 56 D1 48 D0 06 4D 41 52 4B 45
-52 00 B0 12 B8 CD BA 40 84 12 FC FF BA 40 36 D4
-FE FF 9A 42 C8 21 00 00 28 83 8A 48 02 00 A2 52
-C6 21 30 40 00 CE 1C 15 B0 12 2A C4 80 C8 EE C8
-4A C6 8C D4 AA C9 40 C6 CE CC A6 D4 8E D4 39 4E
-39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
-19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
-76 D4 19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 21 92 53 C4 21 B0 12 2A C4
-80 C8 AA C9 40 C6 E4 D4 DA D4 21 53 3E 90 10 00
-7D 2D E1 2B E6 D4 B2 41 C4 21 DD 3F 87 12 42 CB
-74 C8 F4 D4 0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E
-3E 4F 7A 90 23 00 27 20 92 53 C4 21 B0 12 76 D4
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
-92 53 C4 21 B0 12 76 D4 ED 3F 7A 90 40 00 16 20
-3C 40 20 00 92 53 C4 21 B0 12 C2 D4 0C 20 3C 50
-10 00 3E 40 2B 00 B0 12 C2 D4 92 92 C0 21 C4 21
-02 24 92 53 C4 21 8E 10 0C 5E DA 3F B0 12 C2 D4
-FA 23 3C 50 10 00 B0 12 AA D4 EF 3F 0C 43 1B 42
-C6 21 A2 53 C6 21 87 12 42 CB 74 C8 BE D5 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F
-B0 12 C2 D4 E1 23 3C 50 80 00 B0 12 AA D4 DC 3F
-D6 C6 04 52 45 54 49 00 87 12 14 C8 00 13 B0 CA
-2A C4 14 C8 2C 00 EC D4 B6 D5 FC D5 09 4B 2E 4E
-0E DC A4 3F FC CE 03 4D 4F 56 84 12 F2 D5 00 40
-06 D6 05 4D 4F 56 2E 42 84 12 F2 D5 40 40 00 00
-03 41 44 44 84 12 F2 D5 00 50 20 D6 05 41 44 44
-2E 42 84 12 F2 D5 40 50 2C D6 04 41 44 44 43 00
-84 12 F2 D5 00 60 3A D6 06 41 44 44 43 2E 42 00
-84 12 F2 D5 40 60 E2 D5 04 53 55 42 43 00 84 12
-F2 D5 00 70 58 D6 06 53 55 42 43 2E 42 00 84 12
-F2 D5 40 70 66 D6 03 53 55 42 84 12 F2 D5 00 80
-76 D6 05 53 55 42 2E 42 84 12 F2 D5 40 80 DE CE
-03 43 4D 50 84 12 F2 D5 00 90 90 D6 05 43 4D 50
-2E 42 84 12 F2 D5 40 90 CC CE 04 44 41 44 44 00
-84 12 F2 D5 00 A0 AA D6 06 44 41 44 44 2E 42 00
-84 12 F2 D5 40 A0 9C D6 03 42 49 54 84 12 F2 D5
-00 B0 C8 D6 05 42 49 54 2E 42 84 12 F2 D5 40 B0
-D4 D6 03 42 49 43 84 12 F2 D5 00 C0 E2 D6 05 42
-49 43 2E 42 84 12 F2 D5 40 C0 EE D6 03 42 49 53
-84 12 F2 D5 00 D0 FC D6 05 42 49 53 2E 42 84 12
-F2 D5 40 D0 00 00 03 58 4F 52 84 12 F2 D5 00 E0
-16 D7 05 58 4F 52 2E 42 84 12 F2 D5 40 E0 48 D6
-03 41 4E 44 84 12 F2 D5 00 F0 30 D7 05 41 4E 44
-2E 42 84 12 F2 D5 40 F0 42 CB EC D4 4E D7 0A 4C
-3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 82 D6
-03 52 52 43 84 12 48 D7 00 10 60 D7 05 52 52 43
-2E 42 84 12 48 D7 40 10 6C D7 04 53 57 50 42 00
-84 12 48 D7 80 10 7A D7 03 52 52 41 84 12 48 D7
-00 11 88 D7 05 52 52 41 2E 42 84 12 48 D7 40 11
-94 D7 03 53 58 54 84 12 48 D7 80 11 00 00 04 50
-55 53 48 00 84 12 48 D7 00 12 AE D7 06 50 55 53
-48 2E 42 00 84 12 48 D7 40 12 08 D7 04 43 41 4C
-4C 00 84 12 48 D7 80 12 1A 53 0E 4A 87 12 34 C6
-1E C8 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
-4C CC 42 CB 74 C8 F8 D7 92 53 C4 21 3E 40 2C 00
-B0 12 2A C4 80 C8 AA C9 40 C6 CE CC AC D5 10 D8
-0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C
-59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E
-94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F A2 D7 04 52
-52 43 4D 00 84 12 F2 D7 50 00 3E D8 04 52 52 41
-4D 00 84 12 F2 D7 50 01 4C D8 04 52 4C 41 4D 00
-84 12 F2 D7 50 02 5A D8 04 52 52 55 4D 00 84 12
-F2 D7 50 03 BC D7 05 50 55 53 48 4D 84 12 F2 D7
-00 15 76 D8 04 50 4F 50 4D 00 84 12 F2 D7 00 17
-68 D8 03 53 3E 3D 85 12 00 38 92 D8 02 53 3C 00
-85 12 00 34 84 D8 03 30 3E 3D 85 12 00 30 A6 D8
-02 30 3C 00 85 12 00 30 00 00 02 55 3C 00 85 12
-00 2C BA D8 03 55 3E 3D 85 12 00 28 B0 D8 03 30
-3C 3E 85 12 00 24 CE D8 02 30 3D 00 85 12 00 20
-00 00 02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53
-C6 21 0E 4A 30 4D C4 D8 04 54 48 45 4E 00 1A 42
-C6 21 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 63 2F 88 DA 00 00 30 4D B8 D6 04 45 4C 53
-45 00 1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21
-2F 83 8F 4A 00 00 E3 3F F8 D8 05 55 4E 54 49 4C
-3A 4F 08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11
-3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00
-A2 53 C6 21 30 4D 3C D7 05 41 47 41 49 4E 0A 4E
-38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12
-E6 D8 76 C4 2A C4 9C D8 06 52 45 50 45 41 54 00
-87 12 6E D9 FE D8 2A C4 9A D9 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 21 CD 2F 98 42 C6 21 00 00 30 4D
-CC D7 03 42 57 31 84 12 98 D9 00 00 B2 D9 03 42
-57 32 84 12 98 D9 00 00 BE D9 03 42 57 33 84 12
-98 D9 00 00 D6 D9 3D 41 1A 42 C6 21 28 4E B2 92
-C4 21 90 2B BA 4F 00 00 A2 53 C6 21 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 84 12 D4 D9 00 00
-F6 D9 03 46 57 32 84 12 D4 D9 00 00 02 DA 03 46
-57 33 84 12 D4 D9 00 00 00 00 05 3F 47 4F 54 4F
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 87 12 C0 CC DA CA 2A C4 0E DA 04 47
-4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 CA DC CA B2 41 C4 21
+B2 41 C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 20
+B2 40 00 20 00 20 82 43 BE 21 87 12 2E C6 D4 C4
+70 CA C4 C5 74 CA 8C C6 BC C6 2E C4 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E CB 24 C4 40 FF
+2A CE C4 C6 2E C4 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E CB 48 C4 0C CB 0A CA 05 41 42 4F 52 54
+3F 40 80 20 D1 3F 4A CB 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C7 24 C4 6E CB F8 C9 26 C7 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CF B0 12
+06 C5 92 C3 1C 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 1C 05 F3 23 0D 12 87 12
+10 CF 24 C4 DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37
+6D 00 00 C6 7C C6 4C C4 C8 CB 2E C6 2E C4 05 6C
+69 6E 65 3A 00 C6 66 C7 00 C6 2E C4 04 1B 5B 30
+6D 00 00 C6 50 CB 00 00 83 5B 27 5D 0D 12 87 12
+F0 CB 24 C4 24 C4 F8 C9 F8 C9 26 C7 44 C8 01 27
+0D 12 87 12 70 CA F2 C7 4A C8 4C C4 00 CC 26 C7
+AA CA D2 C6 81 5C 92 42 C0 21 C4 21 30 4D D8 CB
+81 5B 82 43 BE 21 30 4D 04 CC 01 5D B2 43 BE 21
+30 4D F2 CA 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 CA F2 C7 4A C8 7C C6 4C C4 00 CC BC C6
+4C C4 50 CC 24 C4 24 C4 F8 C9 F8 C9 24 C4 F8 C9
+F8 C9 26 C7 40 C7 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 21 FA D0 80 00 00 00 30 4D 10 CC 01 3A
+30 12 B8 CC 92 B3 C6 21 A2 63 C6 21 0D 12 87 12
+70 CA F2 C7 86 CC 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21
+2A 52 82 4A C6 21 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 21 30 4D 6E CC 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CC 2F 83 8F 4E 00 00 1E 42
+C6 21 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 21 09 20 18 42 B6 21 19 42 B8 21
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C4
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A CB CC CC 81 3B 82 93 BE 21 6D 27 0D 12 87 12
+24 C4 26 C7 F8 C9 F2 CC 12 CC 26 C7 5C CA 06 43
+52 45 41 54 45 00 B0 12 74 CC BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 CA 05 44 4F 45 53 3E 1A 42
+BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CD 04 43 4F 44 45 00 B0 12 74 CC A2 82 C6 21
+0D 12 87 12 8A CE 64 CE 26 C7 72 CD 07 43 4F 44
+45 4E 4E 4D 30 12 7C CD 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CC A4 CE 26 C7 58 CB
+03 41 53 4D B2 40 68 CE DA 21 DE 3F 9C CD 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CD C2 CE 26 C7
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21
+30 40 A4 CE 00 00 05 4C 4F 32 48 49 A2 83 C6 21
+1A 42 C6 21 EE 3F 56 CC 85 48 49 32 4C 4F 0D 12
+87 12 2A CE 1E CE F8 C9 12 CC 80 CD 26 C7 2E 53
+30 4D 8C CD 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 21 30 4D 24 C4 CA 21 AE C6 26 C7 84 12
+36 CE B0 CD 5C D0 58 CD EE CB 08 CE 42 C6 20 CA
+D8 C7 34 CF 4E CF 62 C7 CE CF 00 00 CE D1 1A CC
+AA C8 00 00 84 12 36 CE 00 D7 66 D7 B4 D6 B6 D7
+7A D6 00 00 AA D3 00 00 70 D6 22 D7 D2 D6 10 D7
+BA D4 00 00 00 00 D2 D7 62 CE 3A 40 0C 00 39 40
+D6 21 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 21 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 21
+30 4D 92 42 CA 21 DA 21 30 4D 3E CE BC CE C2 CE
+D2 CE 3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CC 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CE 88 CE EE D7 A6 C7 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CF 92 42 0C 18 16 CF
+EF 3F 06 CF 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 21 14 CF 92 42 C6 21 16 CF 30 4D 1A CF 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42
+C6 21 0C 18 EC 3F EC C7 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C4 02 C4
+B2 40 D8 CF D6 CF B2 40 88 CE 0E 18 B2 40 EE D7
+0C 18 30 12 24 CF B2 40 C8 C5 C6 C5 B2 40 32 C6
+30 C6 B2 40 4A C6 48 C6 B2 40 18 00 0A 18 37 40
+26 C7 36 40 9C C6 35 40 FA C4 34 40 EC C4 B2 40
+0A 00 DC 21 B2 40 20 00 B4 21 30 41 68 CF 04 57
+41 52 4D 00 30 40 D8 CF 3D 40 12 D0 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 00 02 02 20
+3E E3 1E 53 F2 D0 30 00 0A 02 92 D3 1A 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E C4 07 0D 0A 1B 5B 37 6D 23 00 C6 9C C7
+2E C4 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 C6 24 C4
+40 FF 2A CE A6 C6 66 C7 2E C4 0A 62 79 74 65 73
+20 66 72 65 65 00 48 C4 C8 CB 24 CE 04 43 4F 4C
+44 00 92 B3 0A 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 20 B2 40 88 5A CC 01 B2 43 06 02 B2 40 FC FF
+02 02 D2 D3 04 02 F2 D3 26 02 F2 43 22 02 B2 40
+00 A5 60 01 B2 40 FF 1E 80 01 B2 40 B6 00 82 01
+B2 40 F4 00 84 01 39 40 80 00 82 43 88 01 92 D2
+5E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
+39 40 00 10 29 83 89 43 00 20 FC 23 B0 12 0E C4
+B2 40 81 00 00 05 92 42 02 18 06 05 92 42 04 18
+08 05 92 C3 00 05 3F 40 80 20 30 12 D4 CF 5C 3F
+24 CD 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F F2 D0
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 C4 00 00
+AA C6 70 CA F2 C7 62 CA 68 C6 4C C4 8A D1 70 C6
+2E C4 06 5B 54 48 45 4E 5D 00 FC D0 64 D1 20 D1
+42 D1 26 C7 70 C6 2E C4 06 5B 45 4C 53 45 5D 00
+FC D0 7A D1 20 D1 40 D1 26 C7 2E C4 04 5B 49 46
+5D 00 FC D0 42 D1 48 C4 40 D1 22 C6 2E C4 05 0D
+0A 6B 6F 20 00 C6 D4 C4 C4 C4 48 C4 42 D1 30 D1
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D A0 D1 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 CA F2 C7 4A C8 AE D1 26 C7 B4 D1 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 BE D1
+E2 D1 3D 41 30 40 B6 C6 38 40 C0 21 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 21 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 21 30 4D 1C 15 87 12
+F2 C7 4A C8 42 C4 20 D2 06 C9 4C C4 00 CC 3A D2
+22 D2 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 0C D2 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21
+87 12 F2 C7 06 C9 4C C4 76 D2 6C D2 21 53 3E 90
+10 00 80 2D E2 2B 78 D2 B2 41 C4 21 DE 3F 0D 12
+87 12 70 CA E8 D1 88 D2 0C 43 1B 42 C6 21 A2 53
+C6 21 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 21
+B0 12 0C D2 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 21 A2 53 C6 21
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 21 B0 12 0C D2 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 21 B0 12 56 D2
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 56 D2 92 92
+C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E DA 3F
+B0 12 56 D2 FA 23 3C 50 10 00 B0 12 3E D2 EF 3F
+0C 43 1B 42 C6 21 A2 53 C6 21 0D 12 87 12 70 CA
+E8 D1 54 D3 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 56 D2 E0 23 3C 50 80 00
+B0 12 3E D2 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 C4 00 13 F8 C9 26 C7 24 C4 2C 00 7E D2
+4A D3 94 D3 09 4B 2E 4E 0E DC A2 3F F6 CD 03 4D
+4F 56 84 12 8A D3 00 40 9E D3 05 4D 4F 56 2E 42
+84 12 8A D3 40 40 00 00 03 41 44 44 84 12 8A D3
+00 50 B8 D3 05 41 44 44 2E 42 84 12 8A D3 40 50
+C4 D3 04 41 44 44 43 00 84 12 8A D3 00 60 D2 D3
+06 41 44 44 43 2E 42 00 84 12 8A D3 40 60 78 D3
+04 53 55 42 43 00 84 12 8A D3 00 70 F0 D3 06 53
+55 42 43 2E 42 00 84 12 8A D3 40 70 FE D3 03 53
+55 42 84 12 8A D3 00 80 0E D4 05 53 55 42 2E 42
+84 12 8A D3 40 80 D2 CD 03 43 4D 50 84 12 8A D3
+00 90 28 D4 05 43 4D 50 2E 42 84 12 8A D3 40 90
+BE CD 04 44 41 44 44 00 84 12 8A D3 00 A0 42 D4
+06 44 41 44 44 2E 42 00 84 12 8A D3 40 A0 34 D4
+03 42 49 54 84 12 8A D3 00 B0 60 D4 05 42 49 54
+2E 42 84 12 8A D3 40 B0 6C D4 03 42 49 43 84 12
+8A D3 00 C0 7A D4 05 42 49 43 2E 42 84 12 8A D3
+40 C0 86 D4 03 42 49 53 84 12 8A D3 00 D0 94 D4
+05 42 49 53 2E 42 84 12 8A D3 40 D0 00 00 03 58
+4F 52 84 12 8A D3 00 E0 AE D4 05 58 4F 52 2E 42
+84 12 8A D3 40 E0 E0 D3 03 41 4E 44 84 12 8A D3
+00 F0 C8 D4 05 41 4E 44 2E 42 84 12 8A D3 40 F0
+70 CA 7E D2 E6 D4 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 1A D4 03 52 52 43 84 12 E0 D4
+00 10 F8 D4 05 52 52 43 2E 42 84 12 E0 D4 40 10
+04 D5 04 53 57 50 42 00 84 12 E0 D4 80 10 12 D5
+03 52 52 41 84 12 E0 D4 00 11 20 D5 05 52 52 41
+2E 42 84 12 E0 D4 40 11 2C D5 03 53 58 54 84 12
+E0 D4 80 11 00 00 04 50 55 53 48 00 84 12 E0 D4
+00 12 46 D5 06 50 55 53 48 2E 42 00 84 12 E0 D4
+40 12 A0 D4 04 43 41 4C 4C 00 84 12 E0 D4 80 12
+1A 53 0E 4A 0D 12 87 12 9C C7 2E C4 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A CB 70 CA E8 D1
+92 D5 92 53 C4 21 3E 40 2C 00 87 12 F2 C7 06 C9
+4C C4 00 CC 40 D3 A8 D5 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 3A D5 04 52 52 43 4D 00 84 12 8C D5
+50 00 D6 D5 04 52 52 41 4D 00 84 12 8C D5 50 01
+E4 D5 04 52 4C 41 4D 00 84 12 8C D5 50 02 F2 D5
+04 52 52 55 4D 00 84 12 8C D5 50 03 54 D5 05 50
+55 53 48 4D 84 12 8C D5 00 15 0E D6 04 50 4F 50
+4D 00 84 12 8C D5 00 17 00 D6 03 53 3E 3D 85 12
+00 38 2A D6 02 53 3C 00 85 12 00 34 1C D6 03 30
+3E 3D 85 12 00 30 3E D6 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 52 D6 03 55 3E 3D
+85 12 00 28 48 D6 03 30 3C 3E 85 12 00 24 66 D6
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 5C D6
+04 54 48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 50 D4 04 45 4C 53 45 00 1A 42 C6 21 BA 40
+00 3C 00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F
+90 D6 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 21 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 21 30 4D D4 D4
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 7E D6 82 C6 26 C7
+34 D6 06 52 45 50 45 41 54 00 0D 12 87 12 06 D7
+96 D6 26 C7 36 D7 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 21 CB 2F 98 42 C6 21 00 00 30 4D 64 D5 03 42
+57 31 84 12 34 D7 00 00 4E D7 03 42 57 32 84 12
+34 D7 00 00 5A D7 03 42 57 33 84 12 34 D7 00 00
+72 D7 3D 41 1A 42 C6 21 28 4E B2 92 C4 21 8E 2B
+BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 70 D7 00 00 92 D7 03 46
+57 32 84 12 70 D7 00 00 9E D7 03 46 57 33 84 12
+70 D7 00 00 AA D7 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 CB 18 CA 26 C7
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9E D2
+6E D0
q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 AC DA 0C D1
-2D 01 6B B0 B6 C6 C8 C6
+10 00 08 00 A1 F7 80 3E 05 00 18 00 44 D8 C4 CE
+2E 01 6B B0 06 C5 18 C5 10 D0
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+1E 00 29 83 B9 40 A8 D0 E2 FF FB 23 B2 40 68 C5
+EC FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 7E CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 F2 C2 03 02 30 41 B2 40 13 00 0E 05 F2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 EC CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-EC CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D D0 C7 03 55
-4D 2A 2C 4F 0B 43 09 43 08 43 1A 43 0E BA 02 24
-09 5C 08 6B 0C 5C 0B 6B 0A 5A F8 2B 8F 49 00 00
-0E 48 30 4D 82 C4 07 3E 4E 55 4D 42 45 52 2C 4F
-0B 4E 1A 42 DC 21 68 4C 78 80 30 00 78 90 0A 00
-05 28 78 80 07 00 78 90 0A 00 1F 28 08 9A 22 C3
-1C 2C 5D 15 1C 4F 02 00 0E 4A 3D 40 B0 C9 D2 3F
-B2 C9 81 49 02 00 1C 4F 04 00 1E 41 04 00 3D 40
-C4 C9 C8 3F C6 C9 39 51 3E 61 8F 49 04 00 8F 4E
-02 00 3A 17 1C 53 1B 83 D6 23 8F 4C 00 00 0E 4B
-30 4D 32 C0 00 02 1B 42 DC 21 0C 43 2D 15 3D 40
-32 CA 0A 4B 3F 82 8F 4E 06 00 8F 43 04 00 8F 43
-02 00 0C 4E 7B 4C 68 4C 78 90 2D 00 04 28 BC 23
-B1 43 02 00 DF 3F 2A 43 78 80 25 00 07 24 3A 52
-68 53 04 24 3A 40 10 00 58 83 AD 23 1C 53 1B 83
-EA 3F 34 CA 2E 24 2D 83 78 90 28 00 CB 27 32 D0
-00 02 78 90 F7 00 C6 27 78 90 F5 00 22 20 09 43
-8F 49 02 00 5B 83 09 4B 09 5C 69 49 79 80 30 00
-79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
-09 9A 08 2C 8F 49 00 00 0E 4A 2C 15 B0 12 3E C5
-2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4B
-4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
-3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
-BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
-00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
-2F 53 30 4D 7E C6 04 48 45 52 45 00 2F 83 8F 4E
-00 00 1E 42 C6 21 30 4D B6 C4 01 2C 1A 42 C6 21
-8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D EC C6 05 41
-4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D A6 C7 07 45
-58 45 43 55 54 45 0A 4E 3E 4F 00 4A EA CA 87 4C
-49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42 C6 21
-A2 52 C6 21 BA 40 14 C8 00 00 8A 4E 02 00 3E 4F
-32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E
-02 00 0E 49 EB 3F 30 4D 00 C8 05 43 4F 55 4E 54
-2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 82 4E
-C0 21 B2 4F C2 21 3E 4F 82 43 C4 21 30 4D 85 12
-20 00 87 12 6E CB 7E CB 80 C8 8C CB 3D 40 94 CB
-AE 22 64 3E 96 CB 0A 4E 3E 4F 3D 40 AC CB 21 27
-3D 40 86 CB 1A E2 BE 21 A1 27 B5 23 AE CB 3E 4F
-3D 40 86 CB B8 23 DE 53 00 00 68 4E 08 5E F8 40
-3F 00 00 00 3D 40 62 CE CB 3F 0E CB 08 45 56 41
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 F2 C2 03 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 F2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 AC CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 34 CA 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 34 CA 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 62 C7 03 55 4D 2A 2C 4F
+0B 43 09 43 08 43 1A 43 0E BA 02 24 09 5C 08 6B
+0C 5C 0B 6B 0A 5A F8 2B 8F 49 00 00 0E 48 30 4D
+00 00 07 3E 4E 55 4D 42 45 52 2C 4F 0B 4E 1A 42
+DC 21 68 4C 78 80 30 00 78 90 0A 00 05 28 78 80
+07 00 78 90 0A 00 1F 28 08 9A 22 C3 1C 2C 5D 15
+1C 4F 02 00 0E 4A 3D 40 0C C9 D2 3F 0E C9 81 49
+02 00 1C 4F 04 00 1E 41 04 00 3D 40 20 C9 C8 3F
+22 C9 39 51 3E 61 8F 49 04 00 8F 4E 02 00 3A 17
+1C 53 1B 83 D6 23 8F 4C 00 00 0E 4B 30 4D 32 C0
+00 02 1B 42 DC 21 0C 43 2D 15 3D 40 8E C9 0A 4B
+3F 82 8F 4E 06 00 8F 43 04 00 8F 43 02 00 0C 4E
+7B 4C 68 4C 78 90 2D 00 04 28 BC 23 B1 43 02 00
+0B 3C 2A 43 78 80 25 00 07 24 3A 52 68 53 04 24
+3A 40 10 00 58 83 AD 23 1C 53 1B 83 EA 3F 90 C9
+2E 24 2D 83 78 90 28 00 CB 27 32 D0 00 02 78 90
+F7 00 C6 27 78 90 F5 00 22 20 09 43 8F 49 02 00
+5B 83 09 4B 09 5C 69 49 79 80 30 00 79 90 0A 00
+05 28 79 80 07 00 79 90 0A 00 0A 28 09 9A 08 2C
+8F 49 00 00 0E 4A 2C 15 B0 12 7E C4 2A 17 E6 3F
+9F 4F 04 00 02 00 AF 4F 04 00 0E 4B 4E 93 2B 17
+0E 4C 82 4B DC 21 06 24 32 C0 00 02 3F 50 06 00
+0E F3 30 4D 2F 53 9F 4F 02 00 04 00 BF 4F 00 00
+3E E3 09 20 3E E3 BF E3 02 00 BF E3 00 00 9F 53
+02 00 8F 63 00 00 32 B0 00 02 01 20 2F 53 30 4D
+00 00 01 2C 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54 82 5E C6 21
+3E 4F 30 4D 0A 4E 3E 4F 00 4A 32 CA 87 4C 49 54
+45 52 41 4C 82 93 BE 21 0C 24 1A 42 C6 21 A2 52
+C6 21 BA 40 24 C4 00 00 8A 4E 02 00 3E 4F 32 B0
+00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E 02 00
+0E 49 EB 3F 30 4D 2C C7 05 43 4F 55 4E 54 2F 83
+1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 85 12 20 00
+0D 12 87 12 C4 C4 AC CA F2 C7 BC CA 3D 40 C4 CA
+C4 22 86 26 C6 CA 0A 4E 3E 4F 3D 40 DC CA 37 27
+3D 40 B6 CA 1A E2 BE 21 BD 23 AC 27 DE CA 3E 4F
+3D 40 B6 CA BF 23 DE 53 00 00 68 4E 08 5E F8 40
+3F 00 00 00 3D 40 5C CD D2 3F D0 C5 08 45 56 41
4C 55 41 54 45 00 39 40 C0 21 3C 49 3B 49 3A 49
-3D 15 B0 12 2A C4 82 CB EA CB B2 41 C4 21 B2 41
-C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21 08 C5
-04 51 55 49 54 00 82 43 08 18 31 40 E0 20 B2 40
-00 20 00 20 82 43 BE 21 B0 12 2A C4 04 C8 8C C7
-7E CB 82 C7 82 CB A4 C4 0C C5 1E C8 0C 73 74 61
-63 6B 20 65 6D 70 74 79 21 00 7C CC 14 C8 30 FF
-DC CA 26 C5 1E C8 0A 46 52 41 4D 20 66 75 6C 6C
-21 00 7C CC 3C C6 1C CC FE CA 05 41 42 4F 52 54
-3F 40 80 20 D0 3F 5A CC 86 41 42 4F 52 54 22 00
-87 12 38 C8 14 C8 7C CC EC CA 2A C4 8F 93 02 00
-03 20 2F 52 3E 4F 30 4D B0 12 04 D2 B0 12 B6 C6
-92 C3 1C 05 38 40 A0 AA 39 42 03 43 19 83 FD 23
-18 83 FA 23 92 B3 1C 05 F3 23 87 12 7E D1 14 C8
-DE 21 EA C4 AC C7 1E C8 04 1B 5B 37 6D 00 D6 C7
-58 C4 40 C6 D6 CC 04 C8 1E C8 05 6C 69 6E 65 3A
-D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B 5B 30 6D 00
-D6 C7 60 CC 00 00 83 5B 27 5D 87 12 FC CC 14 C8
-14 C8 EC CA EC CA 2A C4 E8 C8 01 27 87 12 7E CB
-80 C8 EE C8 40 C6 0A CD 2A C4 B6 CB 32 C5 81 5C
-92 42 C0 21 C4 21 30 4D E6 CC 81 5B 82 43 BE 21
-30 4D 0E CD 01 5D B2 43 BE 21 30 4D BE 4F 02 00
-3E 4F 30 4D D6 CA 82 49 53 00 87 12 FA CB EA C4
-40 C6 4E CD EA CC 14 C8 2C CD EC CA 2A C4 FC CC
-2C CD 2A C4 36 CD 09 49 4D 4D 45 44 49 41 54 45
-1A 42 B6 21 FA D0 80 00 00 00 30 4D 00 CC 88 50
-4F 53 54 50 4F 4E 45 00 87 12 7E CB 80 C8 EE C8
-58 C4 40 C6 0A CD 0C C5 40 C6 98 CD 14 C8 14 C8
-EC CA EC CA 14 C8 EC CA EC CA 2A C4 1A CD 81 3B
-82 93 BE 21 B5 27 87 12 14 C8 2A C4 EC CA 36 CE
-1C CD 2A C4 9E CD 07 3A 4E 4F 4E 41 4D 45 30 12
-DC CD 2F 83 8F 4E 00 00 1E 42 C6 21 1E B3 0E 63
-0A 4E 39 40 00 02 38 40 02 02 21 3C BA 40 87 12
-FC FF A2 83 C6 21 B2 43 BE 21 30 4D B6 CD 01 3A
-30 12 DC CD 92 B3 C6 21 A2 63 C6 21 87 12 7E CB
-80 C8 04 CE 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58
-19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48
-B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21 2A 52
-82 4A C6 21 30 41 82 9F BC 21 09 20 18 42 B6 21
-19 42 B8 21 A8 49 FE FF 89 48 00 00 30 4D 87 12
-1E C8 0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63
-68 21 88 CC CC CB 05 44 45 46 45 52 B0 12 F4 CD
-BA 40 30 40 FC FF BA 40 EA CD FE FF E3 3F 5A CB
-06 43 52 45 41 54 45 00 B0 12 F4 CD BA 40 85 12
-FC FF 8A 4A FE FF D6 3F 66 CE 05 44 4F 45 53 3E
-1A 42 BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41
-30 4D 76 C9 05 3E 42 4F 44 59 2E 52 30 4D 80 CE
-04 43 4F 44 45 00 B0 12 F4 CD A2 82 C6 21 87 12
-0E D1 E8 D0 2A C4 C0 CE 07 43 4F 44 45 4E 4E 4D
-B0 12 C2 CD F2 3F 00 00 07 45 4E 44 43 4F 44 45
-87 12 1C D1 36 CE 2A C4 68 CC 03 41 53 4D B2 40
-EC D0 DA 21 E0 3F E8 CE 06 45 4E 44 41 53 4D 00
-87 12 F0 CE 30 D1 2A C4 00 00 05 43 4F 4C 4F 4E
-1A 42 C6 21 BA 40 87 12 00 00 A2 53 C6 21 B2 43
-BE 21 30 40 1C D1 00 00 05 4C 4F 32 48 49 1A 42
-C6 21 BA 40 B0 12 00 00 BA 40 2A C4 02 00 A2 52
-C6 21 ED 3F 56 CD 85 48 49 32 4C 4F 87 12 DC CA
-86 CF EC CA 1C CD 0E D1 E8 D0 2A C4 56 CF 82 49
-46 00 2F 83 8F 4E 00 00 1E 42 C6 21 A2 52 C6 21
-BE 40 40 C6 00 00 2E 53 30 4D 9A CE 84 45 4C 53
-45 00 A2 52 C6 21 1A 42 C6 21 BA 40 3C C6 FC FF
-8E 4A 00 00 2A 83 0E 4A 30 4D 4E C9 84 54 48 45
-4E 00 9E 42 C6 21 00 00 3E 4F 30 4D D8 CE 85 42
-45 47 49 4E 30 40 DC CA AC CF 85 55 4E 54 49 4C
-39 40 40 C6 A2 52 C6 21 1A 42 C6 21 8A 49 FC FF
-8A 4E FE FF 3E 4F 30 4D FA CE 85 41 47 41 49 4E
-39 40 3C C6 EF 3F 7A C8 85 57 48 49 4C 45 87 12
-72 CF 76 C4 2A C4 34 C8 86 52 45 50 45 41 54 00
-87 12 F0 CF B2 CF 2A C4 8C CF 82 44 4F 00 2F 83
-8F 4E 00 00 A2 53 C6 21 1E 42 C6 21 BE 40 54 C6
-FE FF A2 53 00 20 1A 42 00 20 8A 43 00 00 30 4D
-1E CB 84 4C 4F 4F 50 00 39 40 76 C6 A2 52 C6 21
-1A 42 C6 21 8A 49 FC FF 8A 4E FE FF 1E 42 00 20
-A2 83 00 20 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F
-3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50 39 40 64 C6
-E5 3F 42 D0 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F
-3E 4F 0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00
-18 53 1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83
-E8 49 00 00 1A 83 FA 23 30 4D 14 C8 CA 21 F2 C4
-2A C4 84 12 BA D0 EA CF 92 D3 1A D0 FA CC 6E CF
-76 D0 A6 D4 64 C8 A2 D1 BC D1 CA CF 3C D2 00 00
-78 D4 24 CD B4 CE 00 00 84 12 BA D0 C4 D9 26 DA
-78 D9 9A DA 3E D9 00 00 6E D6 00 00 34 D9 E4 D9
-96 D9 D4 D9 7E D7 00 00 00 00 76 DA E6 D0 3A 40
-0C 00 39 40 CA 21 38 40 CC 21 C6 3F 3A 40 0E 00
-39 40 CC 21 38 40 CA 21 B9 3F 82 43 CC 21 30 4D
-92 42 CA 21 DA 21 30 4D C2 D0 2A D1 30 D1 40 D1
-3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40 10 00
-09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48
-00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41
-30 4D 6E CD 09 50 57 52 5F 53 54 41 54 45 84 12
-38 D1 0C D1 AC DA 08 D0 09 52 53 54 5F 53 54 41
-54 45 92 42 0E 18 82 D1 92 42 0C 18 84 D1 EF 3F
-74 D1 08 50 57 52 5F 48 45 52 45 00 92 42 C8 21
-82 D1 92 42 C6 21 84 D1 30 4D 88 D1 08 52 53 54
-5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42 C6 21
-0C 18 EC 3F F8 CF 04 57 49 50 45 00 39 40 10 00
-29 83 B9 43 80 FF FC 23 B2 40 E0 C6 DE C6 B2 40
-46 D2 44 D2 B2 40 0C D1 0E 18 B2 40 AC DA 0C 18
-30 12 92 D1 B2 40 86 C7 84 C7 B2 40 08 C8 06 C8
-B2 40 98 C6 96 C6 B2 40 18 00 0A 18 37 40 1A C4
-36 40 92 C4 35 40 0E C4 34 40 00 C4 B2 40 0A 00
-DC 21 B2 40 20 00 B4 21 30 41 D6 D1 04 57 41 52
-4D 00 30 40 46 D2 3D 40 7A D2 92 C3 30 01 1E 42
-08 18 0E 93 11 24 D2 B3 00 02 02 20 3E E3 1E 53
-F2 D0 03 00 0A 02 3E 90 0A 00 B8 27 3E 90 16 00
-B5 2F 2E 93 84 27 8D 2F 30 4D 1E C8 06 0D 1B 5B
-37 6D 23 00 D6 C7 34 C6 1E C8 19 46 61 73 74 46
-6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72
-65 6E 73 20 D6 C7 14 C8 30 FF DC CA B8 C4 24 C6
-1E C8 0A 62 79 74 65 73 20 66 72 65 65 00 3C C6
-D6 CC BE CF 04 43 4F 4C 44 00 92 B3 0A 05 FD 23
-B2 40 04 A5 20 01 7A D2 B2 40 88 5A CC 01 B2 D0
-00 08 04 02 B2 D3 06 02 B2 43 02 02 B2 D0 FF FE
-26 02 B2 43 22 02 B2 43 42 02 B2 D3 46 02 B2 43
-62 02 B2 D3 66 02 F2 40 A5 00 A1 01 F2 40 10 00
-A0 01 D2 43 A1 01 B2 40 00 A5 60 01 B2 40 FF 1E
-80 01 B2 40 BA 00 82 01 B2 40 E8 01 84 01 39 40
-00 01 82 43 88 01 92 D2 5E 01 08 18 38 40 59 14
-18 83 FE 23 19 83 FA 23 39 40 00 08 29 83 89 43
-00 20 FC 23 39 40 1E 00 29 83 B9 40 D8 D2 E2 FF
-FB 23 B2 40 26 C7 EC FF B2 40 81 00 00 05 92 42
-02 18 06 05 92 42 04 18 08 05 92 C3 00 05 92 D3
-1A 05 3F 40 80 20 31 40 E0 20 30 12 42 D2 43 3F
-C4 D2 07 43 4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F
-39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83 07 30
-19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D 1E 43
-30 4D EE CD 86 5B 54 48 45 4E 5D 00 30 4D C4 D3
-86 5B 45 4C 53 45 5D 00 87 12 14 C8 00 00 C6 C4
-7E CB 80 C8 60 CB 34 C4 40 C6 3A D4 44 C4 1E C8
-06 5B 54 48 45 4E 5D 00 9A D3 4A C6 0A D4 F8 C7
-D0 C4 58 C4 4A C6 E0 D3 2A C4 44 C4 1E C8 06 5B
-45 4C 53 45 5D 00 9A D3 4A C6 28 D4 F8 C7 D0 C4
-58 C4 4A C6 DE D3 2A C4 1E C8 04 5B 49 46 5D 00
-9A D3 4A C6 E0 D3 3C C6 DE D3 F8 C7 1E C8 05 0D
-0A 6B 6F 20 D6 C7 8C C7 6E CB 3C C6 E0 D3 D0 D3
-84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D 50 D4
-89 5B 44 45 46 49 4E 45 44 5D 87 12 7E CB 80 C8
-EE C8 6A C4 2A C4 60 D4 8B 5B 55 4E 44 45 46 49
-4E 45 44 5D 87 12 7E CB 80 C8 EE C8 6A C4 00 C5
-2A C4 94 D4 3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F
-30 40 92 D1 84 D0 06 4D 41 52 4B 45 52 00 B0 12
-F4 CD BA 40 84 12 FC FF BA 40 92 D4 FE FF 9A 42
-C8 21 00 00 28 83 8A 48 02 00 A2 52 C6 21 30 40
-3C CE 1C 15 B0 12 2A C4 80 C8 EE C8 4A C6 E8 D4
-E2 C9 40 C6 0A CD 02 D5 EA D4 39 4E 39 80 86 12
-08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24
-2E 82 1B 17 30 41 3E 40 28 00 B0 12 D2 D4 19 42
-C6 21 A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 21 92 53 C4 21 B0 12 2A C4 80 C8 E2 C9
-40 C6 40 D5 36 D5 21 53 3E 90 10 00 7D 2D E1 2B
-42 D5 B2 41 C4 21 DD 3F 87 12 7E CB 74 C8 50 D5
-0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90
-23 00 27 20 92 53 C4 21 B0 12 D2 D4 3C 40 00 03
-0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03
-2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02
-3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00
-19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41
-30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21
-B0 12 D2 D4 ED 3F 7A 90 40 00 16 20 3C 40 20 00
-92 53 C4 21 B0 12 1E D5 0C 20 3C 50 10 00 3E 40
-2B 00 B0 12 1E D5 92 92 C0 21 C4 21 02 24 92 53
-C4 21 8E 10 0C 5E DA 3F B0 12 1E D5 FA 23 3C 50
-10 00 B0 12 06 D5 EF 3F 0C 43 1B 42 C6 21 A2 53
-C6 21 87 12 7E CB 74 C8 1A D6 FE 90 26 00 00 00
-3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12 1E D5
-E1 23 3C 50 80 00 B0 12 06 D5 DC 3F D6 C6 04 52
-45 54 49 00 87 12 14 C8 00 13 EC CA 2A C4 14 C8
-2C 00 48 D5 12 D6 58 D6 09 4B 2E 4E 0E DC A4 3F
-38 CF 03 4D 4F 56 84 12 4E D6 00 40 62 D6 05 4D
-4F 56 2E 42 84 12 4E D6 40 40 00 00 03 41 44 44
-84 12 4E D6 00 50 7C D6 05 41 44 44 2E 42 84 12
-4E D6 40 50 88 D6 04 41 44 44 43 00 84 12 4E D6
-00 60 96 D6 06 41 44 44 43 2E 42 00 84 12 4E D6
-40 60 3E D6 04 53 55 42 43 00 84 12 4E D6 00 70
-B4 D6 06 53 55 42 43 2E 42 00 84 12 4E D6 40 70
-C2 D6 03 53 55 42 84 12 4E D6 00 80 D2 D6 05 53
-55 42 2E 42 84 12 4E D6 40 80 1A CF 03 43 4D 50
-84 12 4E D6 00 90 EC D6 05 43 4D 50 2E 42 84 12
-4E D6 40 90 08 CF 04 44 41 44 44 00 84 12 4E D6
-00 A0 06 D7 06 44 41 44 44 2E 42 00 84 12 4E D6
-40 A0 F8 D6 03 42 49 54 84 12 4E D6 00 B0 24 D7
-05 42 49 54 2E 42 84 12 4E D6 40 B0 30 D7 03 42
-49 43 84 12 4E D6 00 C0 3E D7 05 42 49 43 2E 42
-84 12 4E D6 40 C0 4A D7 03 42 49 53 84 12 4E D6
-00 D0 58 D7 05 42 49 53 2E 42 84 12 4E D6 40 D0
-00 00 03 58 4F 52 84 12 4E D6 00 E0 72 D7 05 58
-4F 52 2E 42 84 12 4E D6 40 E0 A4 D6 03 41 4E 44
-84 12 4E D6 00 F0 8C D7 05 41 4E 44 2E 42 84 12
-4E D6 40 F0 7E CB 48 D5 AA D7 0A 4C 3C F0 70 00
-8A 10 3A F0 0F 00 0C DA 4F 3F DE D6 03 52 52 43
-84 12 A4 D7 00 10 BC D7 05 52 52 43 2E 42 84 12
-A4 D7 40 10 C8 D7 04 53 57 50 42 00 84 12 A4 D7
-80 10 D6 D7 03 52 52 41 84 12 A4 D7 00 11 E4 D7
-05 52 52 41 2E 42 84 12 A4 D7 40 11 F0 D7 03 53
-58 54 84 12 A4 D7 80 11 00 00 04 50 55 53 48 00
-84 12 A4 D7 00 12 0A D8 06 50 55 53 48 2E 42 00
-84 12 A4 D7 40 12 64 D7 04 43 41 4C 4C 00 84 12
-A4 D7 80 12 1A 53 0E 4A 87 12 34 C6 1E C8 0D 6F
-75 74 20 6F 66 20 62 6F 75 6E 64 73 88 CC 7E CB
-74 C8 54 D8 92 53 C4 21 3E 40 2C 00 B0 12 2A C4
-80 C8 E2 C9 40 C6 0A CD 08 D6 6C D8 0A 4E 3E 4F
-1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
-0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
-D1 2F 8A 10 5A 06 8F 3F FE D7 04 52 52 43 4D 00
-84 12 4E D8 50 00 9A D8 04 52 52 41 4D 00 84 12
-4E D8 50 01 A8 D8 04 52 4C 41 4D 00 84 12 4E D8
-50 02 B6 D8 04 52 52 55 4D 00 84 12 4E D8 50 03
-18 D8 05 50 55 53 48 4D 84 12 4E D8 00 15 D2 D8
-04 50 4F 50 4D 00 84 12 4E D8 00 17 C4 D8 03 53
-3E 3D 85 12 00 38 EE D8 02 53 3C 00 85 12 00 34
-E0 D8 03 30 3E 3D 85 12 00 30 02 D9 02 30 3C 00
-85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 16 D9
-03 55 3E 3D 85 12 00 28 0C D9 03 30 3C 3E 85 12
-00 24 2A D9 02 30 3D 00 85 12 00 20 00 00 02 49
-46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
-30 4D 20 D9 04 54 48 45 4E 00 1A 42 C6 21 08 4E
-3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
-88 DA 00 00 30 4D 14 D7 04 45 4C 53 45 00 1A 42
-C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
-00 00 E3 3F 54 D9 05 55 4E 54 49 4C 3A 4F 08 4E
-3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
-42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
-30 4D 98 D7 05 41 47 41 49 4E 0A 4E 38 40 00 3C
-E7 3F 00 00 05 57 48 49 4C 45 87 12 42 D9 76 C4
-2A C4 F8 D8 06 52 45 50 45 41 54 00 87 12 CA D9
-5A D9 2A C4 F6 D9 3D 41 08 4E 3E 4F 2A 48 B2 92
-C4 21 CD 2F 98 42 C6 21 00 00 30 4D 28 D8 03 42
-57 31 84 12 F4 D9 00 00 0E DA 03 42 57 32 84 12
-F4 D9 00 00 1A DA 03 42 57 33 84 12 F4 D9 00 00
-32 DA 3D 41 1A 42 C6 21 28 4E B2 92 C4 21 90 2B
-BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D
-00 00 03 46 57 31 84 12 30 DA 00 00 52 DA 03 46
-57 32 84 12 30 DA 00 00 5E DA 03 46 57 33 84 12
-30 DA 00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30
-07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08
-87 12 FC CC 16 CB 2A C4 6A DA 04 47 4F 54 4F 00
-2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3D 15 87 12 B0 CA 18 CB B2 41 C4 21 B2 41 C2 21
+B2 41 C0 21 3D 41 30 4D 85 12 BE 21 00 00 04 51
+55 49 54 00 82 43 08 18 31 40 E0 20 B2 40 00 20
+00 20 82 43 BE 21 87 12 2E C6 D4 C4 AC CA C4 C5
+B0 CA 8C C6 BC C6 2E C4 0C 73 74 61 63 6B 20 65
+6D 70 74 79 21 00 AA CB 24 C4 40 FF 66 CE C4 C6
+2E C4 0A 46 52 41 4D 20 66 75 6C 6C 21 00 AA CB
+48 C4 48 CB 46 CA 05 41 42 4F 52 54 3F 40 80 20
+D1 3F 86 CB 86 41 42 4F 52 54 22 00 0D 12 87 12
+AA C7 24 C4 AA CB 34 CA 26 C7 8F 93 02 00 03 20
+2F 52 3E 4F 30 4D B0 12 D2 CF B0 12 06 C5 92 C3
+1C 05 18 42 06 18 39 40 20 00 19 83 FE 23 18 83
+FA 23 92 B3 1C 05 F3 23 0D 12 87 12 4C CF 24 C4
+DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37 6D 00 00 C6
+7C C6 4C C4 04 CC 2E C6 2E C4 05 6C 69 6E 65 3A
+00 C6 66 C7 00 C6 2E C4 04 1B 5B 30 6D 00 00 C6
+8C CB 00 00 83 5B 27 5D 0D 12 87 12 2C CC 24 C4
+24 C4 34 CA 34 CA 26 C7 44 C8 01 27 0D 12 87 12
+AC CA F2 C7 4A C8 4C C4 3C CC 26 C7 E6 CA D2 C6
+81 5C 92 42 C0 21 C4 21 30 4D 14 CC 81 5B 82 43
+BE 21 30 4D 40 CC 01 5D B2 43 BE 21 30 4D 2E CB
+88 50 4F 53 54 50 4F 4E 45 00 0D 12 87 12 AC CA
+F2 C7 4A C8 7C C6 4C C4 3C CC BC C6 4C C4 8C CC
+24 C4 24 C4 34 CA 34 CA 24 C4 34 CA 34 CA 26 C7
+40 C7 09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 21
+FA D0 80 00 00 00 30 4D 4C CC 01 3A 30 12 F4 CC
+92 B3 C6 21 A2 63 C6 21 0D 12 87 12 AC CA F2 C7
+C2 CC 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58 19 42
+DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48 B6 21
+82 49 B8 21 82 4A BA 21 82 4F BC 21 2A 52 82 4A
+C6 21 30 41 BA 40 0D 12 FC FF BA 40 87 12 FE FF
+B2 43 BE 21 30 4D AA CC 07 3A 4E 4F 4E 41 4D 45
+30 12 F4 CC 2F 83 8F 4E 00 00 1E 42 C6 21 1E B3
+0E 63 0A 4E 39 40 10 02 38 40 12 02 D7 3F 82 9F
+BC 21 09 20 18 42 B6 21 19 42 B8 21 A8 49 FE FF
+89 48 00 00 30 4D 0D 12 87 12 2E C4 0F 73 74 61
+63 6B 20 6D 69 73 6D 61 74 63 68 21 B6 CB 08 CD
+81 3B 82 93 BE 21 6D 27 0D 12 87 12 24 C4 26 C7
+34 CA 2E CD 4E CC 26 C7 98 CA 06 43 52 45 41 54
+45 00 B0 12 B0 CC BA 40 85 12 FC FF 8A 4A FE FF
+D5 3F FC CA 05 44 4F 45 53 3E 1A 42 BA 21 BA 40
+84 12 00 00 8A 4D 02 00 3D 41 30 4D 7A CD 04 43
+4F 44 45 00 B0 12 B0 CC A2 82 C6 21 0D 12 87 12
+C6 CE A0 CE 26 C7 AE CD 07 43 4F 44 45 4E 4E 4D
+30 12 B8 CD 9F 3F 00 00 07 45 4E 44 43 4F 44 45
+0D 12 87 12 2E CD E0 CE 26 C7 94 CB 03 41 53 4D
+B2 40 A4 CE DA 21 DE 3F D8 CD 06 45 4E 44 41 53
+4D 00 0D 12 87 12 E0 CD FE CE 26 C7 00 00 05 43
+4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12 00 00 BA 40
+87 12 02 00 A2 52 C6 21 B2 43 BE 21 30 40 E0 CE
+00 00 05 4C 4F 32 48 49 A2 83 C6 21 1A 42 C6 21
+EE 3F 92 CC 85 48 49 32 4C 4F 0D 12 87 12 66 CE
+5A CE 34 CA 4E CC BC CD 26 C7 2E 53 30 4D C8 CD
+85 42 45 47 49 4E 2F 83 8F 4E 00 00 1E 42 C6 21
+30 4D 24 C4 CA 21 AE C6 26 C7 84 12 72 CE EC CD
+96 D0 94 CD 2A CC 44 CE 42 C6 5C CA D8 C7 70 CF
+8A CF AA C8 0A D0 00 00 24 D2 56 CC D2 C8 00 00
+84 12 72 CE 56 D7 BC D7 0A D7 0C D8 D0 D6 00 00
+00 D4 00 00 C6 D6 78 D7 28 D7 66 D7 10 D5 00 00
+00 00 28 D8 9E CE 3A 40 0C 00 39 40 D6 21 08 49
+28 53 19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D
+3A 40 0E 00 38 40 CA 21 09 48 29 53 F8 49 00 00
+18 53 1A 83 FB 23 30 4D 82 43 CC 21 30 4D 92 42
+CA 21 DA 21 30 4D 7A CE F8 CE FE CE 0E CF 3A 4E
+82 4A C8 21 2E 4E 82 4E C6 21 3D 40 10 00 09 4A
+08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00
+1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D
+60 CC 09 50 57 52 5F 53 54 41 54 45 84 12 06 CF
+C4 CE 44 D8 A6 C7 09 52 53 54 5F 53 54 41 54 45
+92 42 0E 18 50 CF 92 42 0C 18 52 CF EF 3F 42 CF
+08 50 57 52 5F 48 45 52 45 00 92 42 C8 21 50 CF
+92 42 C6 21 52 CF 30 4D 56 CF 08 52 53 54 5F 48
+45 52 45 00 92 42 C8 21 0E 18 92 42 C6 21 0C 18
+EC 3F EC C7 04 57 49 50 45 00 39 40 10 00 29 83
+B9 43 80 FF FC 23 B2 40 04 C4 02 C4 B2 40 14 D0
+12 D0 B2 40 C4 CE 0E 18 B2 40 44 D8 0C 18 30 12
+60 CF B2 40 C8 C5 C6 C5 B2 40 32 C6 30 C6 B2 40
+4A C6 48 C6 B2 40 18 00 0A 18 37 40 26 C7 36 40
+9C C6 35 40 FA C4 34 40 EC C4 B2 40 0A 00 DC 21
+B2 40 20 00 B4 21 30 41 A4 CF 04 57 41 52 4D 00
+30 40 14 D0 3D 40 4C D0 92 C3 30 01 1E 42 08 18
+0E 93 13 24 D2 B3 00 02 02 20 3E E3 1E 53 F2 D0
+03 00 0A 02 92 D3 1A 05 3E 90 0A 00 B6 27 3E 90
+16 00 B3 2F 2E 93 82 27 8B 2F 30 4D 2E C4 07 0D
+0A 1B 5B 37 6D 23 00 C6 9C C7 2E C4 19 46 61 73
+74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F
+6F 72 65 6E 73 20 00 C6 24 C4 40 FF 66 CE A6 C6
+66 C7 2E C4 0A 62 79 74 65 73 20 66 72 65 65 00
+48 C4 04 CC 60 CE 04 43 4F 4C 44 00 92 B3 0A 05
+FD 23 B2 40 04 A5 20 01 31 40 E0 20 B2 40 88 5A
+CC 01 B2 D3 06 02 B2 D3 02 02 F2 D2 05 02 B2 D0
+FF FE 26 02 B2 43 22 02 B2 43 42 02 B2 D3 46 02
+B2 43 62 02 B2 D3 66 02 F2 40 A5 00 A1 01 F2 40
+10 00 A0 01 D2 43 A1 01 B2 40 00 A5 60 01 B2 40
+FF 1E 80 01 B2 40 BA 00 82 01 B2 40 E8 01 84 01
+39 40 00 01 82 43 88 01 92 D2 5E 01 08 18 38 40
+59 14 18 83 FE 23 19 83 FA 23 39 40 00 08 29 83
+89 43 00 20 FC 23 B0 12 0E C4 B2 40 81 00 00 05
+92 42 02 18 06 05 92 42 04 18 08 05 92 C3 00 05
+3F 40 80 20 30 12 10 D0 4D 3F 60 CD 86 5B 54 48
+45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
+0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
+FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
+F9 23 2F 53 2D 53 F7 3F 4C D1 86 5B 45 4C 53 45
+5D 00 0D 12 87 12 24 C4 00 00 AA C6 AC CA F2 C7
+9E CA 68 C6 4C C4 E4 D1 70 C6 2E C4 06 5B 54 48
+45 4E 5D 00 56 D1 BE D1 7A D1 9C D1 26 C7 70 C6
+2E C4 06 5B 45 4C 53 45 5D 00 56 D1 D4 D1 7A D1
+9A D1 26 C7 2E C4 04 5B 49 46 5D 00 56 D1 9C D1
+48 C4 9A D1 22 C6 2E C4 05 0D 0A 6B 6F 20 00 C6
+D4 C4 C4 C4 48 C4 9C D1 8A D1 84 5B 49 46 5D 00
+0E 93 3E 4F C6 27 30 4D FA D1 89 5B 44 45 46 49
+4E 45 44 5D 0D 12 87 12 AC CA F2 C7 4A C8 2C CA
+26 C7 0A D2 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
+0D 12 87 12 14 D2 38 D2 3D 41 30 40 B6 C6 38 40
+C0 21 0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E
+03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21
+30 4D 1C 15 87 12 F2 C7 4A C8 42 C4 76 D2 3E C9
+4C C4 3C CC 90 D2 78 D2 39 4E 39 80 86 12 08 24
+19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
+1B 17 30 41 3E 40 28 00 B0 12 62 D2 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12
+C4 21 92 53 C4 21 87 12 F2 C7 3E C9 4C C4 CC D2
+C2 D2 21 53 3E 90 10 00 80 2D E2 2B CE D2 B2 41
+C4 21 DE 3F 0D 12 87 12 AC CA 3E D2 DE D2 0C 43
+1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00
+27 20 92 53 C4 21 B0 12 62 D2 3C 40 00 03 0E 93
+1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
+14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
+0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
+C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D
+7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12
+62 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
+C4 21 B0 12 AC D2 0C 20 3C 50 10 00 3E 40 2B 00
+B0 12 AC D2 92 92 C0 21 C4 21 02 24 92 53 C4 21
+8E 10 0C 5E DA 3F B0 12 AC D2 FA 23 3C 50 10 00
+B0 12 94 D2 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21
+0D 12 87 12 AC CA 3E D2 AA D3 FE 90 26 00 00 00
+3E 40 20 00 03 20 3C 50 82 00 C7 3F B0 12 AC D2
+E0 23 3C 50 80 00 B0 12 94 D2 DB 3F 00 00 04 52
+45 54 49 00 0D 12 87 12 24 C4 00 13 34 CA 26 C7
+24 C4 2C 00 D4 D2 A0 D3 EA D3 09 4B 2E 4E 0E DC
+A2 3F 32 CE 03 4D 4F 56 84 12 E0 D3 00 40 F4 D3
+05 4D 4F 56 2E 42 84 12 E0 D3 40 40 00 00 03 41
+44 44 84 12 E0 D3 00 50 0E D4 05 41 44 44 2E 42
+84 12 E0 D3 40 50 1A D4 04 41 44 44 43 00 84 12
+E0 D3 00 60 28 D4 06 41 44 44 43 2E 42 00 84 12
+E0 D3 40 60 CE D3 04 53 55 42 43 00 84 12 E0 D3
+00 70 46 D4 06 53 55 42 43 2E 42 00 84 12 E0 D3
+40 70 54 D4 03 53 55 42 84 12 E0 D3 00 80 64 D4
+05 53 55 42 2E 42 84 12 E0 D3 40 80 0E CE 03 43
+4D 50 84 12 E0 D3 00 90 7E D4 05 43 4D 50 2E 42
+84 12 E0 D3 40 90 FA CD 04 44 41 44 44 00 84 12
+E0 D3 00 A0 98 D4 06 44 41 44 44 2E 42 00 84 12
+E0 D3 40 A0 8A D4 03 42 49 54 84 12 E0 D3 00 B0
+B6 D4 05 42 49 54 2E 42 84 12 E0 D3 40 B0 C2 D4
+03 42 49 43 84 12 E0 D3 00 C0 D0 D4 05 42 49 43
+2E 42 84 12 E0 D3 40 C0 DC D4 03 42 49 53 84 12
+E0 D3 00 D0 EA D4 05 42 49 53 2E 42 84 12 E0 D3
+40 D0 00 00 03 58 4F 52 84 12 E0 D3 00 E0 04 D5
+05 58 4F 52 2E 42 84 12 E0 D3 40 E0 36 D4 03 41
+4E 44 84 12 E0 D3 00 F0 1E D5 05 41 4E 44 2E 42
+84 12 E0 D3 40 F0 AC CA D4 D2 3C D5 0A 4C 3C F0
+70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 70 D4 03 52
+52 43 84 12 36 D5 00 10 4E D5 05 52 52 43 2E 42
+84 12 36 D5 40 10 5A D5 04 53 57 50 42 00 84 12
+36 D5 80 10 68 D5 03 52 52 41 84 12 36 D5 00 11
+76 D5 05 52 52 41 2E 42 84 12 36 D5 40 11 82 D5
+03 53 58 54 84 12 36 D5 80 11 00 00 04 50 55 53
+48 00 84 12 36 D5 00 12 9C D5 06 50 55 53 48 2E
+42 00 84 12 36 D5 40 12 F6 D4 04 43 41 4C 4C 00
+84 12 36 D5 80 12 1A 53 0E 4A 0D 12 87 12 9C C7
+2E C4 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
+B6 CB AC CA 3E D2 E8 D5 92 53 C4 21 3E 40 2C 00
+87 12 F2 C7 3E C9 4C C4 3C CC 96 D3 FE D5 0A 4E
+3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
+01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
+2A 92 D1 2F 8A 10 5A 06 8F 3F 90 D5 04 52 52 43
+4D 00 84 12 E2 D5 50 00 2C D6 04 52 52 41 4D 00
+84 12 E2 D5 50 01 3A D6 04 52 4C 41 4D 00 84 12
+E2 D5 50 02 48 D6 04 52 52 55 4D 00 84 12 E2 D5
+50 03 AA D5 05 50 55 53 48 4D 84 12 E2 D5 00 15
+64 D6 04 50 4F 50 4D 00 84 12 E2 D5 00 17 56 D6
+03 53 3E 3D 85 12 00 38 80 D6 02 53 3C 00 85 12
+00 34 72 D6 03 30 3E 3D 85 12 00 30 94 D6 02 30
+3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
+A8 D6 03 55 3E 3D 85 12 00 28 9E D6 03 30 3C 3E
+85 12 00 24 BC D6 02 30 3D 00 85 12 00 20 00 00
+02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+0E 4A 30 4D B2 D6 04 54 48 45 4E 00 1A 42 C6 21
+08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
+63 2F 88 DA 00 00 30 4D A6 D4 04 45 4C 53 45 00
+1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
+8F 4A 00 00 E3 3F E6 D6 05 55 4E 54 49 4C 3A 4F
+08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
+00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
+C6 21 30 4D 2A D5 05 41 47 41 49 4E 0A 4E 38 40
+00 3C E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12
+D4 D6 82 C6 26 C7 8A D6 06 52 45 50 45 41 54 00
+0D 12 87 12 5C D7 EC D6 26 C7 8C D7 3D 41 08 4E
+3E 4F 2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00
+30 4D BA D5 03 42 57 31 84 12 8A D7 00 00 A4 D7
+03 42 57 32 84 12 8A D7 00 00 B0 D7 03 42 57 33
+84 12 8A D7 00 00 C8 D7 3D 41 1A 42 C6 21 28 4E
+B2 92 C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A
+00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 C6 D7
+00 00 E8 D7 03 46 57 32 84 12 C6 D7 00 00 F4 D7
+03 46 57 33 84 12 C6 D7 00 00 00 D8 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12
+2C CC 54 CA 26 C7 00 00 05 3F 47 4F 54 4F 3E 90
+00 30 F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0
+00 08 EC 3F
@FFFE
-D8 D2
+A8 D0
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 9C DA 0C D1
-2D 01 6B B0 B6 C6 C8 C6
+10 00 08 00 00 D6 E8 03 05 00 18 00 34 D8 C4 CE
+2E 01 6B B0 06 C5 18 C5 10 D0
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+1E 00 29 83 B9 40 A8 D0 E2 FF FB 23 B2 40 68 C5
+EC FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 7E CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 F2 C2 03 02 30 41 B2 40 13 00 0E 05 F2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 EC CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-EC CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D D0 C7 03 55
-4D 2A 2C 4F 0B 43 09 43 08 43 1A 43 0E BA 02 24
-09 5C 08 6B 0C 5C 0B 6B 0A 5A F8 2B 8F 49 00 00
-0E 48 30 4D 82 C4 07 3E 4E 55 4D 42 45 52 2C 4F
-0B 4E 1A 42 DC 21 68 4C 78 80 30 00 78 90 0A 00
-05 28 78 80 07 00 78 90 0A 00 1F 28 08 9A 22 C3
-1C 2C 5D 15 1C 4F 02 00 0E 4A 3D 40 B0 C9 D2 3F
-B2 C9 81 49 02 00 1C 4F 04 00 1E 41 04 00 3D 40
-C4 C9 C8 3F C6 C9 39 51 3E 61 8F 49 04 00 8F 4E
-02 00 3A 17 1C 53 1B 83 D6 23 8F 4C 00 00 0E 4B
-30 4D 32 C0 00 02 1B 42 DC 21 0C 43 2D 15 3D 40
-32 CA 0A 4B 3F 82 8F 4E 06 00 8F 43 04 00 8F 43
-02 00 0C 4E 7B 4C 68 4C 78 90 2D 00 04 28 BC 23
-B1 43 02 00 DF 3F 2A 43 78 80 25 00 07 24 3A 52
-68 53 04 24 3A 40 10 00 58 83 AD 23 1C 53 1B 83
-EA 3F 34 CA 2E 24 2D 83 78 90 28 00 CB 27 32 D0
-00 02 78 90 F7 00 C6 27 78 90 F5 00 22 20 09 43
-8F 49 02 00 5B 83 09 4B 09 5C 69 49 79 80 30 00
-79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
-09 9A 08 2C 8F 49 00 00 0E 4A 2C 15 B0 12 3E C5
-2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4B
-4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
-3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
-BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
-00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
-2F 53 30 4D 7E C6 04 48 45 52 45 00 2F 83 8F 4E
-00 00 1E 42 C6 21 30 4D B6 C4 01 2C 1A 42 C6 21
-8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D EC C6 05 41
-4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D A6 C7 07 45
-58 45 43 55 54 45 0A 4E 3E 4F 00 4A EA CA 87 4C
-49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42 C6 21
-A2 52 C6 21 BA 40 14 C8 00 00 8A 4E 02 00 3E 4F
-32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E
-02 00 0E 49 EB 3F 30 4D 00 C8 05 43 4F 55 4E 54
-2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 82 4E
-C0 21 B2 4F C2 21 3E 4F 82 43 C4 21 30 4D 85 12
-20 00 87 12 6E CB 7E CB 80 C8 8C CB 3D 40 94 CB
-AE 22 64 3E 96 CB 0A 4E 3E 4F 3D 40 AC CB 21 27
-3D 40 86 CB 1A E2 BE 21 A1 27 B5 23 AE CB 3E 4F
-3D 40 86 CB B8 23 DE 53 00 00 68 4E 08 5E F8 40
-3F 00 00 00 3D 40 62 CE CB 3F 0E CB 08 45 56 41
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 F2 C2 03 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 F2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 AC CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 34 CA 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 34 CA 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 62 C7 03 55 4D 2A 2C 4F
+0B 43 09 43 08 43 1A 43 0E BA 02 24 09 5C 08 6B
+0C 5C 0B 6B 0A 5A F8 2B 8F 49 00 00 0E 48 30 4D
+00 00 07 3E 4E 55 4D 42 45 52 2C 4F 0B 4E 1A 42
+DC 21 68 4C 78 80 30 00 78 90 0A 00 05 28 78 80
+07 00 78 90 0A 00 1F 28 08 9A 22 C3 1C 2C 5D 15
+1C 4F 02 00 0E 4A 3D 40 0C C9 D2 3F 0E C9 81 49
+02 00 1C 4F 04 00 1E 41 04 00 3D 40 20 C9 C8 3F
+22 C9 39 51 3E 61 8F 49 04 00 8F 4E 02 00 3A 17
+1C 53 1B 83 D6 23 8F 4C 00 00 0E 4B 30 4D 32 C0
+00 02 1B 42 DC 21 0C 43 2D 15 3D 40 8E C9 0A 4B
+3F 82 8F 4E 06 00 8F 43 04 00 8F 43 02 00 0C 4E
+7B 4C 68 4C 78 90 2D 00 04 28 BC 23 B1 43 02 00
+0B 3C 2A 43 78 80 25 00 07 24 3A 52 68 53 04 24
+3A 40 10 00 58 83 AD 23 1C 53 1B 83 EA 3F 90 C9
+2E 24 2D 83 78 90 28 00 CB 27 32 D0 00 02 78 90
+F7 00 C6 27 78 90 F5 00 22 20 09 43 8F 49 02 00
+5B 83 09 4B 09 5C 69 49 79 80 30 00 79 90 0A 00
+05 28 79 80 07 00 79 90 0A 00 0A 28 09 9A 08 2C
+8F 49 00 00 0E 4A 2C 15 B0 12 7E C4 2A 17 E6 3F
+9F 4F 04 00 02 00 AF 4F 04 00 0E 4B 4E 93 2B 17
+0E 4C 82 4B DC 21 06 24 32 C0 00 02 3F 50 06 00
+0E F3 30 4D 2F 53 9F 4F 02 00 04 00 BF 4F 00 00
+3E E3 09 20 3E E3 BF E3 02 00 BF E3 00 00 9F 53
+02 00 8F 63 00 00 32 B0 00 02 01 20 2F 53 30 4D
+00 00 01 2C 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54 82 5E C6 21
+3E 4F 30 4D 0A 4E 3E 4F 00 4A 32 CA 87 4C 49 54
+45 52 41 4C 82 93 BE 21 0C 24 1A 42 C6 21 A2 52
+C6 21 BA 40 24 C4 00 00 8A 4E 02 00 3E 4F 32 B0
+00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E 02 00
+0E 49 EB 3F 30 4D 2C C7 05 43 4F 55 4E 54 2F 83
+1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 85 12 20 00
+0D 12 87 12 C4 C4 AC CA F2 C7 BC CA 3D 40 C4 CA
+C4 22 86 26 C6 CA 0A 4E 3E 4F 3D 40 DC CA 37 27
+3D 40 B6 CA 1A E2 BE 21 BD 23 AC 27 DE CA 3E 4F
+3D 40 B6 CA BF 23 DE 53 00 00 68 4E 08 5E F8 40
+3F 00 00 00 3D 40 5C CD D2 3F D0 C5 08 45 56 41
4C 55 41 54 45 00 39 40 C0 21 3C 49 3B 49 3A 49
-3D 15 B0 12 2A C4 82 CB EA CB B2 41 C4 21 B2 41
-C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21 08 C5
-04 51 55 49 54 00 82 43 08 18 31 40 E0 20 B2 40
-00 20 00 20 82 43 BE 21 B0 12 2A C4 04 C8 8C C7
-7E CB 82 C7 82 CB A4 C4 0C C5 1E C8 0C 73 74 61
-63 6B 20 65 6D 70 74 79 21 00 7C CC 14 C8 30 FF
-DC CA 26 C5 1E C8 0A 46 52 41 4D 20 66 75 6C 6C
-21 00 7C CC 3C C6 1C CC FE CA 05 41 42 4F 52 54
-3F 40 80 20 D0 3F 5A CC 86 41 42 4F 52 54 22 00
-87 12 38 C8 14 C8 7C CC EC CA 2A C4 8F 93 02 00
-03 20 2F 52 3E 4F 30 4D B0 12 04 D2 B0 12 B6 C6
-92 C3 1C 05 38 40 AA 0A 39 42 03 43 19 83 FD 23
-18 83 FA 23 92 B3 1C 05 F3 23 87 12 7E D1 14 C8
-DE 21 EA C4 AC C7 1E C8 04 1B 5B 37 6D 00 D6 C7
-58 C4 40 C6 D6 CC 04 C8 1E C8 05 6C 69 6E 65 3A
-D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B 5B 30 6D 00
-D6 C7 60 CC 00 00 83 5B 27 5D 87 12 FC CC 14 C8
-14 C8 EC CA EC CA 2A C4 E8 C8 01 27 87 12 7E CB
-80 C8 EE C8 40 C6 0A CD 2A C4 B6 CB 32 C5 81 5C
-92 42 C0 21 C4 21 30 4D E6 CC 81 5B 82 43 BE 21
-30 4D 0E CD 01 5D B2 43 BE 21 30 4D BE 4F 02 00
-3E 4F 30 4D D6 CA 82 49 53 00 87 12 FA CB EA C4
-40 C6 4E CD EA CC 14 C8 2C CD EC CA 2A C4 FC CC
-2C CD 2A C4 36 CD 09 49 4D 4D 45 44 49 41 54 45
-1A 42 B6 21 FA D0 80 00 00 00 30 4D 00 CC 88 50
-4F 53 54 50 4F 4E 45 00 87 12 7E CB 80 C8 EE C8
-58 C4 40 C6 0A CD 0C C5 40 C6 98 CD 14 C8 14 C8
-EC CA EC CA 14 C8 EC CA EC CA 2A C4 1A CD 81 3B
-82 93 BE 21 B5 27 87 12 14 C8 2A C4 EC CA 36 CE
-1C CD 2A C4 9E CD 07 3A 4E 4F 4E 41 4D 45 30 12
-DC CD 2F 83 8F 4E 00 00 1E 42 C6 21 1E B3 0E 63
-0A 4E 39 40 00 02 38 40 02 02 21 3C BA 40 87 12
-FC FF A2 83 C6 21 B2 43 BE 21 30 4D B6 CD 01 3A
-30 12 DC CD 92 B3 C6 21 A2 63 C6 21 87 12 7E CB
-80 C8 04 CE 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58
-19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48
-B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21 2A 52
-82 4A C6 21 30 41 82 9F BC 21 09 20 18 42 B6 21
-19 42 B8 21 A8 49 FE FF 89 48 00 00 30 4D 87 12
-1E C8 0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63
-68 21 88 CC CC CB 05 44 45 46 45 52 B0 12 F4 CD
-BA 40 30 40 FC FF BA 40 EA CD FE FF E3 3F 5A CB
-06 43 52 45 41 54 45 00 B0 12 F4 CD BA 40 85 12
-FC FF 8A 4A FE FF D6 3F 66 CE 05 44 4F 45 53 3E
-1A 42 BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41
-30 4D 76 C9 05 3E 42 4F 44 59 2E 52 30 4D 80 CE
-04 43 4F 44 45 00 B0 12 F4 CD A2 82 C6 21 87 12
-0E D1 E8 D0 2A C4 C0 CE 07 43 4F 44 45 4E 4E 4D
-B0 12 C2 CD F2 3F 00 00 07 45 4E 44 43 4F 44 45
-87 12 1C D1 36 CE 2A C4 68 CC 03 41 53 4D B2 40
-EC D0 DA 21 E0 3F E8 CE 06 45 4E 44 41 53 4D 00
-87 12 F0 CE 30 D1 2A C4 00 00 05 43 4F 4C 4F 4E
-1A 42 C6 21 BA 40 87 12 00 00 A2 53 C6 21 B2 43
-BE 21 30 40 1C D1 00 00 05 4C 4F 32 48 49 1A 42
-C6 21 BA 40 B0 12 00 00 BA 40 2A C4 02 00 A2 52
-C6 21 ED 3F 56 CD 85 48 49 32 4C 4F 87 12 DC CA
-86 CF EC CA 1C CD 0E D1 E8 D0 2A C4 56 CF 82 49
-46 00 2F 83 8F 4E 00 00 1E 42 C6 21 A2 52 C6 21
-BE 40 40 C6 00 00 2E 53 30 4D 9A CE 84 45 4C 53
-45 00 A2 52 C6 21 1A 42 C6 21 BA 40 3C C6 FC FF
-8E 4A 00 00 2A 83 0E 4A 30 4D 4E C9 84 54 48 45
-4E 00 9E 42 C6 21 00 00 3E 4F 30 4D D8 CE 85 42
-45 47 49 4E 30 40 DC CA AC CF 85 55 4E 54 49 4C
-39 40 40 C6 A2 52 C6 21 1A 42 C6 21 8A 49 FC FF
-8A 4E FE FF 3E 4F 30 4D FA CE 85 41 47 41 49 4E
-39 40 3C C6 EF 3F 7A C8 85 57 48 49 4C 45 87 12
-72 CF 76 C4 2A C4 34 C8 86 52 45 50 45 41 54 00
-87 12 F0 CF B2 CF 2A C4 8C CF 82 44 4F 00 2F 83
-8F 4E 00 00 A2 53 C6 21 1E 42 C6 21 BE 40 54 C6
-FE FF A2 53 00 20 1A 42 00 20 8A 43 00 00 30 4D
-1E CB 84 4C 4F 4F 50 00 39 40 76 C6 A2 52 C6 21
-1A 42 C6 21 8A 49 FC FF 8A 4E FE FF 1E 42 00 20
-A2 83 00 20 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F
-3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50 39 40 64 C6
-E5 3F 42 D0 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F
-3E 4F 0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00
-18 53 1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83
-E8 49 00 00 1A 83 FA 23 30 4D 14 C8 CA 21 F2 C4
-2A C4 84 12 BA D0 EA CF 82 D3 1A D0 FA CC 6E CF
-76 D0 96 D4 64 C8 A2 D1 BC D1 CA CF 3C D2 00 00
-68 D4 24 CD B4 CE 00 00 84 12 BA D0 B4 D9 16 DA
-68 D9 8A DA 2E D9 00 00 5E D6 00 00 24 D9 D4 D9
-86 D9 C4 D9 6E D7 00 00 00 00 66 DA E6 D0 3A 40
-0C 00 39 40 CA 21 38 40 CC 21 C6 3F 3A 40 0E 00
-39 40 CC 21 38 40 CA 21 B9 3F 82 43 CC 21 30 4D
-92 42 CA 21 DA 21 30 4D C2 D0 2A D1 30 D1 40 D1
-3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40 10 00
-09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48
-00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41
-30 4D 6E CD 09 50 57 52 5F 53 54 41 54 45 84 12
-38 D1 0C D1 9C DA 08 D0 09 52 53 54 5F 53 54 41
-54 45 92 42 0E 18 82 D1 92 42 0C 18 84 D1 EF 3F
-74 D1 08 50 57 52 5F 48 45 52 45 00 92 42 C8 21
-82 D1 92 42 C6 21 84 D1 30 4D 88 D1 08 52 53 54
-5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42 C6 21
-0C 18 EC 3F F8 CF 04 57 49 50 45 00 39 40 10 00
-29 83 B9 43 80 FF FC 23 B2 40 E0 C6 DE C6 B2 40
-46 D2 44 D2 B2 40 0C D1 0E 18 B2 40 9C DA 0C 18
-30 12 92 D1 B2 40 86 C7 84 C7 B2 40 08 C8 06 C8
-B2 40 98 C6 96 C6 B2 40 18 00 0A 18 37 40 1A C4
-36 40 92 C4 35 40 0E C4 34 40 00 C4 B2 40 0A 00
-DC 21 B2 40 20 00 B4 21 30 41 D6 D1 04 57 41 52
-4D 00 30 40 46 D2 3D 40 7A D2 92 C3 30 01 1E 42
-08 18 0E 93 11 24 D2 B3 00 02 02 20 3E E3 1E 53
-F2 D0 03 00 0A 02 3E 90 0A 00 B8 27 3E 90 16 00
-B5 2F 2E 93 84 27 8D 2F 30 4D 1E C8 06 0D 1B 5B
-37 6D 23 00 D6 C7 34 C6 1E C8 19 46 61 73 74 46
-6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72
-65 6E 73 20 D6 C7 14 C8 30 FF DC CA B8 C4 24 C6
-1E C8 0A 62 79 74 65 73 20 66 72 65 65 00 3C C6
-D6 CC BE CF 04 43 4F 4C 44 00 92 B3 0A 05 FD 23
-B2 40 04 A5 20 01 7A D2 B2 40 88 5A CC 01 B2 D0
-00 08 04 02 B2 D3 06 02 B2 43 02 02 B2 D0 FF FE
-26 02 B2 43 22 02 B2 43 42 02 B2 D3 46 02 B2 43
-62 02 B2 D3 66 02 B2 40 00 A5 60 01 B2 40 FF 1E
-80 01 B2 40 B0 00 82 01 B2 40 1E 00 84 01 39 40
-10 00 82 43 88 01 92 D2 5E 01 08 18 38 40 59 14
-18 83 FE 23 19 83 FA 23 39 40 00 08 29 83 89 43
-00 20 FC 23 39 40 1E 00 29 83 B9 40 D8 D2 E2 FF
-FB 23 B2 40 26 C7 EC FF B2 40 81 00 00 05 92 42
-02 18 06 05 92 42 04 18 08 05 92 C3 00 05 92 D3
-1A 05 3F 40 80 20 31 40 E0 20 30 12 42 D2 4B 3F
-C4 D2 07 43 4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F
-39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83 07 30
-19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D 1E 43
-30 4D EE CD 86 5B 54 48 45 4E 5D 00 30 4D B4 D3
-86 5B 45 4C 53 45 5D 00 87 12 14 C8 00 00 C6 C4
-7E CB 80 C8 60 CB 34 C4 40 C6 2A D4 44 C4 1E C8
-06 5B 54 48 45 4E 5D 00 8A D3 4A C6 FA D3 F8 C7
-D0 C4 58 C4 4A C6 D0 D3 2A C4 44 C4 1E C8 06 5B
-45 4C 53 45 5D 00 8A D3 4A C6 18 D4 F8 C7 D0 C4
-58 C4 4A C6 CE D3 2A C4 1E C8 04 5B 49 46 5D 00
-8A D3 4A C6 D0 D3 3C C6 CE D3 F8 C7 1E C8 05 0D
-0A 6B 6F 20 D6 C7 8C C7 6E CB 3C C6 D0 D3 C0 D3
-84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D 40 D4
-89 5B 44 45 46 49 4E 45 44 5D 87 12 7E CB 80 C8
-EE C8 6A C4 2A C4 50 D4 8B 5B 55 4E 44 45 46 49
-4E 45 44 5D 87 12 7E CB 80 C8 EE C8 6A C4 00 C5
-2A C4 84 D4 3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F
-30 40 92 D1 84 D0 06 4D 41 52 4B 45 52 00 B0 12
-F4 CD BA 40 84 12 FC FF BA 40 82 D4 FE FF 9A 42
-C8 21 00 00 28 83 8A 48 02 00 A2 52 C6 21 30 40
-3C CE 1C 15 B0 12 2A C4 80 C8 EE C8 4A C6 D8 D4
-E2 C9 40 C6 0A CD F2 D4 DA D4 39 4E 39 80 86 12
-08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24
-2E 82 1B 17 30 41 3E 40 28 00 B0 12 C2 D4 19 42
-C6 21 A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 21 92 53 C4 21 B0 12 2A C4 80 C8 E2 C9
-40 C6 30 D5 26 D5 21 53 3E 90 10 00 7D 2D E1 2B
-32 D5 B2 41 C4 21 DD 3F 87 12 7E CB 74 C8 40 D5
-0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90
-23 00 27 20 92 53 C4 21 B0 12 C2 D4 3C 40 00 03
-0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03
-2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02
-3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00
-19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41
-30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21
-B0 12 C2 D4 ED 3F 7A 90 40 00 16 20 3C 40 20 00
-92 53 C4 21 B0 12 0E D5 0C 20 3C 50 10 00 3E 40
-2B 00 B0 12 0E D5 92 92 C0 21 C4 21 02 24 92 53
-C4 21 8E 10 0C 5E DA 3F B0 12 0E D5 FA 23 3C 50
-10 00 B0 12 F6 D4 EF 3F 0C 43 1B 42 C6 21 A2 53
-C6 21 87 12 7E CB 74 C8 0A D6 FE 90 26 00 00 00
-3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12 0E D5
-E1 23 3C 50 80 00 B0 12 F6 D4 DC 3F D6 C6 04 52
-45 54 49 00 87 12 14 C8 00 13 EC CA 2A C4 14 C8
-2C 00 38 D5 02 D6 48 D6 09 4B 2E 4E 0E DC A4 3F
-38 CF 03 4D 4F 56 84 12 3E D6 00 40 52 D6 05 4D
-4F 56 2E 42 84 12 3E D6 40 40 00 00 03 41 44 44
-84 12 3E D6 00 50 6C D6 05 41 44 44 2E 42 84 12
-3E D6 40 50 78 D6 04 41 44 44 43 00 84 12 3E D6
-00 60 86 D6 06 41 44 44 43 2E 42 00 84 12 3E D6
-40 60 2E D6 04 53 55 42 43 00 84 12 3E D6 00 70
-A4 D6 06 53 55 42 43 2E 42 00 84 12 3E D6 40 70
-B2 D6 03 53 55 42 84 12 3E D6 00 80 C2 D6 05 53
-55 42 2E 42 84 12 3E D6 40 80 1A CF 03 43 4D 50
-84 12 3E D6 00 90 DC D6 05 43 4D 50 2E 42 84 12
-3E D6 40 90 08 CF 04 44 41 44 44 00 84 12 3E D6
-00 A0 F6 D6 06 44 41 44 44 2E 42 00 84 12 3E D6
-40 A0 E8 D6 03 42 49 54 84 12 3E D6 00 B0 14 D7
-05 42 49 54 2E 42 84 12 3E D6 40 B0 20 D7 03 42
-49 43 84 12 3E D6 00 C0 2E D7 05 42 49 43 2E 42
-84 12 3E D6 40 C0 3A D7 03 42 49 53 84 12 3E D6
-00 D0 48 D7 05 42 49 53 2E 42 84 12 3E D6 40 D0
-00 00 03 58 4F 52 84 12 3E D6 00 E0 62 D7 05 58
-4F 52 2E 42 84 12 3E D6 40 E0 94 D6 03 41 4E 44
-84 12 3E D6 00 F0 7C D7 05 41 4E 44 2E 42 84 12
-3E D6 40 F0 7E CB 38 D5 9A D7 0A 4C 3C F0 70 00
-8A 10 3A F0 0F 00 0C DA 4F 3F CE D6 03 52 52 43
-84 12 94 D7 00 10 AC D7 05 52 52 43 2E 42 84 12
-94 D7 40 10 B8 D7 04 53 57 50 42 00 84 12 94 D7
-80 10 C6 D7 03 52 52 41 84 12 94 D7 00 11 D4 D7
-05 52 52 41 2E 42 84 12 94 D7 40 11 E0 D7 03 53
-58 54 84 12 94 D7 80 11 00 00 04 50 55 53 48 00
-84 12 94 D7 00 12 FA D7 06 50 55 53 48 2E 42 00
-84 12 94 D7 40 12 54 D7 04 43 41 4C 4C 00 84 12
-94 D7 80 12 1A 53 0E 4A 87 12 34 C6 1E C8 0D 6F
-75 74 20 6F 66 20 62 6F 75 6E 64 73 88 CC 7E CB
-74 C8 44 D8 92 53 C4 21 3E 40 2C 00 B0 12 2A C4
-80 C8 E2 C9 40 C6 0A CD F8 D5 5C D8 0A 4E 3E 4F
-1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
-0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
-D1 2F 8A 10 5A 06 8F 3F EE D7 04 52 52 43 4D 00
-84 12 3E D8 50 00 8A D8 04 52 52 41 4D 00 84 12
-3E D8 50 01 98 D8 04 52 4C 41 4D 00 84 12 3E D8
-50 02 A6 D8 04 52 52 55 4D 00 84 12 3E D8 50 03
-08 D8 05 50 55 53 48 4D 84 12 3E D8 00 15 C2 D8
-04 50 4F 50 4D 00 84 12 3E D8 00 17 B4 D8 03 53
-3E 3D 85 12 00 38 DE D8 02 53 3C 00 85 12 00 34
-D0 D8 03 30 3E 3D 85 12 00 30 F2 D8 02 30 3C 00
-85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 06 D9
-03 55 3E 3D 85 12 00 28 FC D8 03 30 3C 3E 85 12
-00 24 1A D9 02 30 3D 00 85 12 00 20 00 00 02 49
-46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
-30 4D 10 D9 04 54 48 45 4E 00 1A 42 C6 21 08 4E
-3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
-88 DA 00 00 30 4D 04 D7 04 45 4C 53 45 00 1A 42
-C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
-00 00 E3 3F 44 D9 05 55 4E 54 49 4C 3A 4F 08 4E
-3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
-42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
-30 4D 88 D7 05 41 47 41 49 4E 0A 4E 38 40 00 3C
-E7 3F 00 00 05 57 48 49 4C 45 87 12 32 D9 76 C4
-2A C4 E8 D8 06 52 45 50 45 41 54 00 87 12 BA D9
-4A D9 2A C4 E6 D9 3D 41 08 4E 3E 4F 2A 48 B2 92
-C4 21 CD 2F 98 42 C6 21 00 00 30 4D 18 D8 03 42
-57 31 84 12 E4 D9 00 00 FE D9 03 42 57 32 84 12
-E4 D9 00 00 0A DA 03 42 57 33 84 12 E4 D9 00 00
-22 DA 3D 41 1A 42 C6 21 28 4E B2 92 C4 21 90 2B
-BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D
-00 00 03 46 57 31 84 12 20 DA 00 00 42 DA 03 46
-57 32 84 12 20 DA 00 00 4E DA 03 46 57 33 84 12
-20 DA 00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30
-07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08
-87 12 FC CC 16 CB 2A C4 5A DA 04 47 4F 54 4F 00
-2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3D 15 87 12 B0 CA 18 CB B2 41 C4 21 B2 41 C2 21
+B2 41 C0 21 3D 41 30 4D 85 12 BE 21 00 00 04 51
+55 49 54 00 82 43 08 18 31 40 E0 20 B2 40 00 20
+00 20 82 43 BE 21 87 12 2E C6 D4 C4 AC CA C4 C5
+B0 CA 8C C6 BC C6 2E C4 0C 73 74 61 63 6B 20 65
+6D 70 74 79 21 00 AA CB 24 C4 40 FF 66 CE C4 C6
+2E C4 0A 46 52 41 4D 20 66 75 6C 6C 21 00 AA CB
+48 C4 48 CB 46 CA 05 41 42 4F 52 54 3F 40 80 20
+D1 3F 86 CB 86 41 42 4F 52 54 22 00 0D 12 87 12
+AA C7 24 C4 AA CB 34 CA 26 C7 8F 93 02 00 03 20
+2F 52 3E 4F 30 4D B0 12 D2 CF B0 12 06 C5 92 C3
+1C 05 18 42 06 18 39 40 20 00 19 83 FE 23 18 83
+FA 23 92 B3 1C 05 F3 23 0D 12 87 12 4C CF 24 C4
+DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37 6D 00 00 C6
+7C C6 4C C4 04 CC 2E C6 2E C4 05 6C 69 6E 65 3A
+00 C6 66 C7 00 C6 2E C4 04 1B 5B 30 6D 00 00 C6
+8C CB 00 00 83 5B 27 5D 0D 12 87 12 2C CC 24 C4
+24 C4 34 CA 34 CA 26 C7 44 C8 01 27 0D 12 87 12
+AC CA F2 C7 4A C8 4C C4 3C CC 26 C7 E6 CA D2 C6
+81 5C 92 42 C0 21 C4 21 30 4D 14 CC 81 5B 82 43
+BE 21 30 4D 40 CC 01 5D B2 43 BE 21 30 4D 2E CB
+88 50 4F 53 54 50 4F 4E 45 00 0D 12 87 12 AC CA
+F2 C7 4A C8 7C C6 4C C4 3C CC BC C6 4C C4 8C CC
+24 C4 24 C4 34 CA 34 CA 24 C4 34 CA 34 CA 26 C7
+40 C7 09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 21
+FA D0 80 00 00 00 30 4D 4C CC 01 3A 30 12 F4 CC
+92 B3 C6 21 A2 63 C6 21 0D 12 87 12 AC CA F2 C7
+C2 CC 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58 19 42
+DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48 B6 21
+82 49 B8 21 82 4A BA 21 82 4F BC 21 2A 52 82 4A
+C6 21 30 41 BA 40 0D 12 FC FF BA 40 87 12 FE FF
+B2 43 BE 21 30 4D AA CC 07 3A 4E 4F 4E 41 4D 45
+30 12 F4 CC 2F 83 8F 4E 00 00 1E 42 C6 21 1E B3
+0E 63 0A 4E 39 40 10 02 38 40 12 02 D7 3F 82 9F
+BC 21 09 20 18 42 B6 21 19 42 B8 21 A8 49 FE FF
+89 48 00 00 30 4D 0D 12 87 12 2E C4 0F 73 74 61
+63 6B 20 6D 69 73 6D 61 74 63 68 21 B6 CB 08 CD
+81 3B 82 93 BE 21 6D 27 0D 12 87 12 24 C4 26 C7
+34 CA 2E CD 4E CC 26 C7 98 CA 06 43 52 45 41 54
+45 00 B0 12 B0 CC BA 40 85 12 FC FF 8A 4A FE FF
+D5 3F FC CA 05 44 4F 45 53 3E 1A 42 BA 21 BA 40
+84 12 00 00 8A 4D 02 00 3D 41 30 4D 7A CD 04 43
+4F 44 45 00 B0 12 B0 CC A2 82 C6 21 0D 12 87 12
+C6 CE A0 CE 26 C7 AE CD 07 43 4F 44 45 4E 4E 4D
+30 12 B8 CD 9F 3F 00 00 07 45 4E 44 43 4F 44 45
+0D 12 87 12 2E CD E0 CE 26 C7 94 CB 03 41 53 4D
+B2 40 A4 CE DA 21 DE 3F D8 CD 06 45 4E 44 41 53
+4D 00 0D 12 87 12 E0 CD FE CE 26 C7 00 00 05 43
+4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12 00 00 BA 40
+87 12 02 00 A2 52 C6 21 B2 43 BE 21 30 40 E0 CE
+00 00 05 4C 4F 32 48 49 A2 83 C6 21 1A 42 C6 21
+EE 3F 92 CC 85 48 49 32 4C 4F 0D 12 87 12 66 CE
+5A CE 34 CA 4E CC BC CD 26 C7 2E 53 30 4D C8 CD
+85 42 45 47 49 4E 2F 83 8F 4E 00 00 1E 42 C6 21
+30 4D 24 C4 CA 21 AE C6 26 C7 84 12 72 CE EC CD
+96 D0 94 CD 2A CC 44 CE 42 C6 5C CA D8 C7 70 CF
+8A CF AA C8 0A D0 00 00 14 D2 56 CC D2 C8 00 00
+84 12 72 CE 46 D7 AC D7 FA D6 FC D7 C0 D6 00 00
+F0 D3 00 00 B6 D6 68 D7 18 D7 56 D7 00 D5 00 00
+00 00 18 D8 9E CE 3A 40 0C 00 39 40 D6 21 08 49
+28 53 19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D
+3A 40 0E 00 38 40 CA 21 09 48 29 53 F8 49 00 00
+18 53 1A 83 FB 23 30 4D 82 43 CC 21 30 4D 92 42
+CA 21 DA 21 30 4D 7A CE F8 CE FE CE 0E CF 3A 4E
+82 4A C8 21 2E 4E 82 4E C6 21 3D 40 10 00 09 4A
+08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00
+1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D
+60 CC 09 50 57 52 5F 53 54 41 54 45 84 12 06 CF
+C4 CE 34 D8 A6 C7 09 52 53 54 5F 53 54 41 54 45
+92 42 0E 18 50 CF 92 42 0C 18 52 CF EF 3F 42 CF
+08 50 57 52 5F 48 45 52 45 00 92 42 C8 21 50 CF
+92 42 C6 21 52 CF 30 4D 56 CF 08 52 53 54 5F 48
+45 52 45 00 92 42 C8 21 0E 18 92 42 C6 21 0C 18
+EC 3F EC C7 04 57 49 50 45 00 39 40 10 00 29 83
+B9 43 80 FF FC 23 B2 40 04 C4 02 C4 B2 40 14 D0
+12 D0 B2 40 C4 CE 0E 18 B2 40 34 D8 0C 18 30 12
+60 CF B2 40 C8 C5 C6 C5 B2 40 32 C6 30 C6 B2 40
+4A C6 48 C6 B2 40 18 00 0A 18 37 40 26 C7 36 40
+9C C6 35 40 FA C4 34 40 EC C4 B2 40 0A 00 DC 21
+B2 40 20 00 B4 21 30 41 A4 CF 04 57 41 52 4D 00
+30 40 14 D0 3D 40 4C D0 92 C3 30 01 1E 42 08 18
+0E 93 13 24 D2 B3 00 02 02 20 3E E3 1E 53 F2 D0
+03 00 0A 02 92 D3 1A 05 3E 90 0A 00 B6 27 3E 90
+16 00 B3 2F 2E 93 82 27 8B 2F 30 4D 2E C4 07 0D
+0A 1B 5B 37 6D 23 00 C6 9C C7 2E C4 19 46 61 73
+74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F
+6F 72 65 6E 73 20 00 C6 24 C4 40 FF 66 CE A6 C6
+66 C7 2E C4 0A 62 79 74 65 73 20 66 72 65 65 00
+48 C4 04 CC 60 CE 04 43 4F 4C 44 00 92 B3 0A 05
+FD 23 B2 40 04 A5 20 01 31 40 E0 20 B2 40 88 5A
+CC 01 B2 D3 06 02 B2 D3 02 02 F2 D2 05 02 B2 D0
+FF FE 26 02 B2 43 22 02 B2 43 42 02 B2 D3 46 02
+B2 43 62 02 B2 D3 66 02 B2 40 00 A5 60 01 B2 40
+FF 1E 80 01 B2 40 B0 00 82 01 B2 40 1E 00 84 01
+39 40 10 00 82 43 88 01 92 D2 5E 01 08 18 38 40
+59 14 18 83 FE 23 19 83 FA 23 39 40 00 08 29 83
+89 43 00 20 FC 23 B0 12 0E C4 B2 40 81 00 00 05
+92 42 02 18 06 05 92 42 04 18 08 05 92 C3 00 05
+3F 40 80 20 30 12 10 D0 55 3F 60 CD 86 5B 54 48
+45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
+0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
+FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
+F9 23 2F 53 2D 53 F7 3F 3C D1 86 5B 45 4C 53 45
+5D 00 0D 12 87 12 24 C4 00 00 AA C6 AC CA F2 C7
+9E CA 68 C6 4C C4 D4 D1 70 C6 2E C4 06 5B 54 48
+45 4E 5D 00 46 D1 AE D1 6A D1 8C D1 26 C7 70 C6
+2E C4 06 5B 45 4C 53 45 5D 00 46 D1 C4 D1 6A D1
+8A D1 26 C7 2E C4 04 5B 49 46 5D 00 46 D1 8C D1
+48 C4 8A D1 22 C6 2E C4 05 0D 0A 6B 6F 20 00 C6
+D4 C4 C4 C4 48 C4 8C D1 7A D1 84 5B 49 46 5D 00
+0E 93 3E 4F C6 27 30 4D EA D1 89 5B 44 45 46 49
+4E 45 44 5D 0D 12 87 12 AC CA F2 C7 4A C8 2C CA
+26 C7 FA D1 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
+0D 12 87 12 04 D2 28 D2 3D 41 30 40 B6 C6 38 40
+C0 21 0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E
+03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21
+30 4D 1C 15 87 12 F2 C7 4A C8 42 C4 66 D2 3E C9
+4C C4 3C CC 80 D2 68 D2 39 4E 39 80 86 12 08 24
+19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
+1B 17 30 41 3E 40 28 00 B0 12 52 D2 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12
+C4 21 92 53 C4 21 87 12 F2 C7 3E C9 4C C4 BC D2
+B2 D2 21 53 3E 90 10 00 80 2D E2 2B BE D2 B2 41
+C4 21 DE 3F 0D 12 87 12 AC CA 2E D2 CE D2 0C 43
+1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00
+27 20 92 53 C4 21 B0 12 52 D2 3C 40 00 03 0E 93
+1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
+14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
+0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
+C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D
+7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12
+52 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
+C4 21 B0 12 9C D2 0C 20 3C 50 10 00 3E 40 2B 00
+B0 12 9C D2 92 92 C0 21 C4 21 02 24 92 53 C4 21
+8E 10 0C 5E DA 3F B0 12 9C D2 FA 23 3C 50 10 00
+B0 12 84 D2 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21
+0D 12 87 12 AC CA 2E D2 9A D3 FE 90 26 00 00 00
+3E 40 20 00 03 20 3C 50 82 00 C7 3F B0 12 9C D2
+E0 23 3C 50 80 00 B0 12 84 D2 DB 3F 00 00 04 52
+45 54 49 00 0D 12 87 12 24 C4 00 13 34 CA 26 C7
+24 C4 2C 00 C4 D2 90 D3 DA D3 09 4B 2E 4E 0E DC
+A2 3F 32 CE 03 4D 4F 56 84 12 D0 D3 00 40 E4 D3
+05 4D 4F 56 2E 42 84 12 D0 D3 40 40 00 00 03 41
+44 44 84 12 D0 D3 00 50 FE D3 05 41 44 44 2E 42
+84 12 D0 D3 40 50 0A D4 04 41 44 44 43 00 84 12
+D0 D3 00 60 18 D4 06 41 44 44 43 2E 42 00 84 12
+D0 D3 40 60 BE D3 04 53 55 42 43 00 84 12 D0 D3
+00 70 36 D4 06 53 55 42 43 2E 42 00 84 12 D0 D3
+40 70 44 D4 03 53 55 42 84 12 D0 D3 00 80 54 D4
+05 53 55 42 2E 42 84 12 D0 D3 40 80 0E CE 03 43
+4D 50 84 12 D0 D3 00 90 6E D4 05 43 4D 50 2E 42
+84 12 D0 D3 40 90 FA CD 04 44 41 44 44 00 84 12
+D0 D3 00 A0 88 D4 06 44 41 44 44 2E 42 00 84 12
+D0 D3 40 A0 7A D4 03 42 49 54 84 12 D0 D3 00 B0
+A6 D4 05 42 49 54 2E 42 84 12 D0 D3 40 B0 B2 D4
+03 42 49 43 84 12 D0 D3 00 C0 C0 D4 05 42 49 43
+2E 42 84 12 D0 D3 40 C0 CC D4 03 42 49 53 84 12
+D0 D3 00 D0 DA D4 05 42 49 53 2E 42 84 12 D0 D3
+40 D0 00 00 03 58 4F 52 84 12 D0 D3 00 E0 F4 D4
+05 58 4F 52 2E 42 84 12 D0 D3 40 E0 26 D4 03 41
+4E 44 84 12 D0 D3 00 F0 0E D5 05 41 4E 44 2E 42
+84 12 D0 D3 40 F0 AC CA C4 D2 2C D5 0A 4C 3C F0
+70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 60 D4 03 52
+52 43 84 12 26 D5 00 10 3E D5 05 52 52 43 2E 42
+84 12 26 D5 40 10 4A D5 04 53 57 50 42 00 84 12
+26 D5 80 10 58 D5 03 52 52 41 84 12 26 D5 00 11
+66 D5 05 52 52 41 2E 42 84 12 26 D5 40 11 72 D5
+03 53 58 54 84 12 26 D5 80 11 00 00 04 50 55 53
+48 00 84 12 26 D5 00 12 8C D5 06 50 55 53 48 2E
+42 00 84 12 26 D5 40 12 E6 D4 04 43 41 4C 4C 00
+84 12 26 D5 80 12 1A 53 0E 4A 0D 12 87 12 9C C7
+2E C4 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
+B6 CB AC CA 2E D2 D8 D5 92 53 C4 21 3E 40 2C 00
+87 12 F2 C7 3E C9 4C C4 3C CC 86 D3 EE D5 0A 4E
+3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
+01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
+2A 92 D1 2F 8A 10 5A 06 8F 3F 80 D5 04 52 52 43
+4D 00 84 12 D2 D5 50 00 1C D6 04 52 52 41 4D 00
+84 12 D2 D5 50 01 2A D6 04 52 4C 41 4D 00 84 12
+D2 D5 50 02 38 D6 04 52 52 55 4D 00 84 12 D2 D5
+50 03 9A D5 05 50 55 53 48 4D 84 12 D2 D5 00 15
+54 D6 04 50 4F 50 4D 00 84 12 D2 D5 00 17 46 D6
+03 53 3E 3D 85 12 00 38 70 D6 02 53 3C 00 85 12
+00 34 62 D6 03 30 3E 3D 85 12 00 30 84 D6 02 30
+3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
+98 D6 03 55 3E 3D 85 12 00 28 8E D6 03 30 3C 3E
+85 12 00 24 AC D6 02 30 3D 00 85 12 00 20 00 00
+02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+0E 4A 30 4D A2 D6 04 54 48 45 4E 00 1A 42 C6 21
+08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
+63 2F 88 DA 00 00 30 4D 96 D4 04 45 4C 53 45 00
+1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
+8F 4A 00 00 E3 3F D6 D6 05 55 4E 54 49 4C 3A 4F
+08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
+00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
+C6 21 30 4D 1A D5 05 41 47 41 49 4E 0A 4E 38 40
+00 3C E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12
+C4 D6 82 C6 26 C7 7A D6 06 52 45 50 45 41 54 00
+0D 12 87 12 4C D7 DC D6 26 C7 7C D7 3D 41 08 4E
+3E 4F 2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00
+30 4D AA D5 03 42 57 31 84 12 7A D7 00 00 94 D7
+03 42 57 32 84 12 7A D7 00 00 A0 D7 03 42 57 33
+84 12 7A D7 00 00 B8 D7 3D 41 1A 42 C6 21 28 4E
+B2 92 C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A
+00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 B6 D7
+00 00 D8 D7 03 46 57 32 84 12 B6 D7 00 00 E4 D7
+03 46 57 33 84 12 B6 D7 00 00 F0 D7 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12
+2C CC 54 CA 26 C7 00 00 05 3F 47 4F 54 4F 3E 90
+00 30 F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0
+00 08 EC 3F
@FFFE
-D8 D2
+A8 D0
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 9C DA 0C D1
-2D 01 6B B0 B6 C6 C8 C6
+10 00 04 00 51 55 40 1F 05 00 18 00 34 D8 C4 CE
+2E 01 6B B0 06 C5 18 C5 10 D0
@C400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C4
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C4
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C4
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C4 02 3E 52 00 0E 12 3E 4F 30 4D 70 C4 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C4 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 20 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C4 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C4
-01 21 BE 4F 00 00 3E 4F 30 4D CC C4 02 30 3D 00
-1E 83 0E 7E 30 4D FC C4 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C5 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 0B 4E
+30 40 04 C4 B0 12 06 C5 12 D2 0A 18 F9 3F 39 40
+1E 00 29 83 B9 40 A8 D0 E2 FF FB 23 B2 40 68 C5
+EC FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C4 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 21 2C 4F 2F 83
-B0 12 46 C5 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 21 18 42 B2 21 C8 4A
-00 00 30 4D 86 C5 02 23 53 00 87 12 88 C5 C0 C5
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C5
-02 23 3E 00 9F 42 B2 21 00 00 3E 40 B2 21 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C4 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C5 34 C4 86 C4 D4 C4 BA C5
-92 C4 F8 C5 D4 C5 D6 C7 7E CB 82 C7 2A C4 22 C5
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C5 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C6 18 42 0C 05 2F 83 8F 4E
-00 00 B0 12 B6 C6 92 B3 1C 05 FD 27 1E 42 0C 05
-B0 12 C8 C6 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
-0E 05 F2 C2 03 02 30 41 B2 40 13 00 0E 05 F2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C6
-B0 12 B6 C6 12 D2 0A 18 F9 3F F0 C4 06 41 43 43
-45 50 54 00 3C 40 64 C7 3B 40 2E C7 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C7
-92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 5A C7 2D 83 92 B3 1C 05
-E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C4 04 45 4D 49
-54 00 30 40 86 C7 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 21 00 00 AF 4F
-02 00 A8 3F 7C C7 04 45 43 48 4F 00 B2 40 82 48
-52 C7 82 43 DE 21 30 4D 32 C6 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C7 92 43 DE 21 30 4D 20 C6
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C7
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C7 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C5
-02 43 52 00 30 40 08 C8 87 12 1E C8 02 0D 0A 00
-D6 C7 2A C4 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C5 82 53 22 00 82 43 B4 21 87 12 14 C8
-1E C8 EC CA 14 C8 22 00 80 C8 4C C8 B2 40 20 00
-B4 21 6E 4E 1E 53 1E B3 82 6E C6 21 3D 41 3E 4F
-30 4D BA C7 82 2E 22 00 87 12 38 C8 14 C8 D6 C7
-EC CA 2A C4 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 21 1A 42 C2 21 09 5A 1A 52 C4 21
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 21 82 4A C4 21 30 4D 18 42 C6 21 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21
-F0 3F 1A 82 C2 21 82 4A C4 21 1E 42 C6 21 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 21 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C4 34 40 00 C4 30 4D D0 C7 03 55
-4D 2A 2C 4F 0B 43 09 43 08 43 1A 43 0E BA 02 24
-09 5C 08 6B 0C 5C 0B 6B 0A 5A F8 2B 8F 49 00 00
-0E 48 30 4D 82 C4 07 3E 4E 55 4D 42 45 52 2C 4F
-0B 4E 1A 42 DC 21 68 4C 78 80 30 00 78 90 0A 00
-05 28 78 80 07 00 78 90 0A 00 1F 28 08 9A 22 C3
-1C 2C 5D 15 1C 4F 02 00 0E 4A 3D 40 B0 C9 D2 3F
-B2 C9 81 49 02 00 1C 4F 04 00 1E 41 04 00 3D 40
-C4 C9 C8 3F C6 C9 39 51 3E 61 8F 49 04 00 8F 4E
-02 00 3A 17 1C 53 1B 83 D6 23 8F 4C 00 00 0E 4B
-30 4D 32 C0 00 02 1B 42 DC 21 0C 43 2D 15 3D 40
-32 CA 0A 4B 3F 82 8F 4E 06 00 8F 43 04 00 8F 43
-02 00 0C 4E 7B 4C 68 4C 78 90 2D 00 04 28 BC 23
-B1 43 02 00 DF 3F 2A 43 78 80 25 00 07 24 3A 52
-68 53 04 24 3A 40 10 00 58 83 AD 23 1C 53 1B 83
-EA 3F 34 CA 2E 24 2D 83 78 90 28 00 CB 27 32 D0
-00 02 78 90 F7 00 C6 27 78 90 F5 00 22 20 09 43
-8F 49 02 00 5B 83 09 4B 09 5C 69 49 79 80 30 00
-79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
-09 9A 08 2C 8F 49 00 00 0E 4A 2C 15 B0 12 3E C5
-2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4B
-4E 93 2B 17 0E 4C 82 4B DC 21 06 24 32 C0 00 02
-3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
-BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
-00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
-2F 53 30 4D 7E C6 04 48 45 52 45 00 2F 83 8F 4E
-00 00 1E 42 C6 21 30 4D B6 C4 01 2C 1A 42 C6 21
-8A 4E 00 00 A2 53 C6 21 3E 4F 30 4D EC C6 05 41
-4C 4C 4F 54 82 5E C6 21 3E 4F 30 4D A6 C7 07 45
-58 45 43 55 54 45 0A 4E 3E 4F 00 4A EA CA 87 4C
-49 54 45 52 41 4C 82 93 BE 21 0C 24 1A 42 C6 21
-A2 52 C6 21 BA 40 14 C8 00 00 8A 4E 02 00 3E 4F
-32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E
-02 00 0E 49 EB 3F 30 4D 00 C8 05 43 4F 55 4E 54
-2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 82 4E
-C0 21 B2 4F C2 21 3E 4F 82 43 C4 21 30 4D 85 12
-20 00 87 12 6E CB 7E CB 80 C8 8C CB 3D 40 94 CB
-AE 22 64 3E 96 CB 0A 4E 3E 4F 3D 40 AC CB 21 27
-3D 40 86 CB 1A E2 BE 21 A1 27 B5 23 AE CB 3E 4F
-3D 40 86 CB B8 23 DE 53 00 00 68 4E 08 5E F8 40
-3F 00 00 00 3D 40 62 CE CB 3F 0E CB 08 45 56 41
+12 D3 F5 3F 34 40 EC C4 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 21 B2 4F C2 21 3E 4F 82 43
+C4 21 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 21 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 1C 05 FD 27 B2 40 11 00
+0E 05 F2 C2 03 02 30 41 A2 B3 1C 05 FD 27 B2 40
+13 00 0E 05 F2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C5 3B 40 70 C5 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C5
+92 B3 1C 05 05 24 18 42 0C 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C4 21 52 3A 17 58 42 0C 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+1C 05 FD 27 82 48 0E 05 30 4D 9C C5 2D 83 92 B3
+1C 05 E4 23 FC 27 82 93 DE 21 02 24 92 53 DE 21
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C5 08 4E 3E 4F E0 3F BE C5
+04 45 43 48 4F 00 B2 40 82 48 94 C5 82 43 DE 21
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C5 92 43 DE 21 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C6 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C6 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C6 0D 12 87 12 2E C4 02 0D 0A 00 00 C6 26 C7
+00 00 03 4B 45 59 30 40 4A C6 18 42 0C 05 2F 83
+8F 4E 00 00 B0 12 06 C5 92 B3 1C 05 FD 27 1E 42
+0C 05 B0 12 18 C5 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 20 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 21 B2 21 30 4D 2A C6
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 86 C4 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D E0 C6
+02 23 53 00 0D 12 87 12 E2 C6 1C C7 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C7 02 23 3E 00
+9F 42 B2 21 00 00 3E 40 B2 21 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C5 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C6 14 C7 9C C6 54 C7 30 C7
+00 C6 AC CA C4 C5 26 C7 E4 C5 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C7 82 53 22 00 82 43 B4 21 0D 12
+87 12 24 C4 2E C4 34 CA 24 C4 22 00 F2 C7 C0 C7
+B2 40 20 00 B4 21 6E 4E 1E 53 1E B3 82 6E C6 21
+3D 41 3E 4F 30 4D 9A C7 82 2E 22 00 0D 12 87 12
+AA C7 24 C4 00 C6 34 CA 26 C7 00 00 04 57 4F 52
+44 00 3C 40 C0 21 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 21 F0 3F 1A 82
+C2 21 82 4A C4 21 1E 42 C6 21 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 21 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C4 34 40 EC C4 30 4D 62 C7 03 55 4D 2A 2C 4F
+0B 43 09 43 08 43 1A 43 0E BA 02 24 09 5C 08 6B
+0C 5C 0B 6B 0A 5A F8 2B 8F 49 00 00 0E 48 30 4D
+00 00 07 3E 4E 55 4D 42 45 52 2C 4F 0B 4E 1A 42
+DC 21 68 4C 78 80 30 00 78 90 0A 00 05 28 78 80
+07 00 78 90 0A 00 1F 28 08 9A 22 C3 1C 2C 5D 15
+1C 4F 02 00 0E 4A 3D 40 0C C9 D2 3F 0E C9 81 49
+02 00 1C 4F 04 00 1E 41 04 00 3D 40 20 C9 C8 3F
+22 C9 39 51 3E 61 8F 49 04 00 8F 4E 02 00 3A 17
+1C 53 1B 83 D6 23 8F 4C 00 00 0E 4B 30 4D 32 C0
+00 02 1B 42 DC 21 0C 43 2D 15 3D 40 8E C9 0A 4B
+3F 82 8F 4E 06 00 8F 43 04 00 8F 43 02 00 0C 4E
+7B 4C 68 4C 78 90 2D 00 04 28 BC 23 B1 43 02 00
+0B 3C 2A 43 78 80 25 00 07 24 3A 52 68 53 04 24
+3A 40 10 00 58 83 AD 23 1C 53 1B 83 EA 3F 90 C9
+2E 24 2D 83 78 90 28 00 CB 27 32 D0 00 02 78 90
+F7 00 C6 27 78 90 F5 00 22 20 09 43 8F 49 02 00
+5B 83 09 4B 09 5C 69 49 79 80 30 00 79 90 0A 00
+05 28 79 80 07 00 79 90 0A 00 0A 28 09 9A 08 2C
+8F 49 00 00 0E 4A 2C 15 B0 12 7E C4 2A 17 E6 3F
+9F 4F 04 00 02 00 AF 4F 04 00 0E 4B 4E 93 2B 17
+0E 4C 82 4B DC 21 06 24 32 C0 00 02 3F 50 06 00
+0E F3 30 4D 2F 53 9F 4F 02 00 04 00 BF 4F 00 00
+3E E3 09 20 3E E3 BF E3 02 00 BF E3 00 00 9F 53
+02 00 8F 63 00 00 32 B0 00 02 01 20 2F 53 30 4D
+00 00 01 2C 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+3E 4F 30 4D 2C C5 05 41 4C 4C 4F 54 82 5E C6 21
+3E 4F 30 4D 0A 4E 3E 4F 00 4A 32 CA 87 4C 49 54
+45 52 41 4C 82 93 BE 21 0C 24 1A 42 C6 21 A2 52
+C6 21 BA 40 24 C4 00 00 8A 4E 02 00 3E 4F 32 B0
+00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E 02 00
+0E 49 EB 3F 30 4D 2C C7 05 43 4F 55 4E 54 2F 83
+1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 85 12 20 00
+0D 12 87 12 C4 C4 AC CA F2 C7 BC CA 3D 40 C4 CA
+C4 22 86 26 C6 CA 0A 4E 3E 4F 3D 40 DC CA 37 27
+3D 40 B6 CA 1A E2 BE 21 BD 23 AC 27 DE CA 3E 4F
+3D 40 B6 CA BF 23 DE 53 00 00 68 4E 08 5E F8 40
+3F 00 00 00 3D 40 5C CD D2 3F D0 C5 08 45 56 41
4C 55 41 54 45 00 39 40 C0 21 3C 49 3B 49 3A 49
-3D 15 B0 12 2A C4 82 CB EA CB B2 41 C4 21 B2 41
-C2 21 B2 41 C0 21 3D 41 30 4D 85 12 BE 21 08 C5
-04 51 55 49 54 00 82 43 08 18 31 40 E0 20 B2 40
-00 20 00 20 82 43 BE 21 B0 12 2A C4 04 C8 8C C7
-7E CB 82 C7 82 CB A4 C4 0C C5 1E C8 0C 73 74 61
-63 6B 20 65 6D 70 74 79 21 00 7C CC 14 C8 30 FF
-DC CA 26 C5 1E C8 0A 46 52 41 4D 20 66 75 6C 6C
-21 00 7C CC 3C C6 1C CC FE CA 05 41 42 4F 52 54
-3F 40 80 20 D0 3F 5A CC 86 41 42 4F 52 54 22 00
-87 12 38 C8 14 C8 7C CC EC CA 2A C4 8F 93 02 00
-03 20 2F 52 3E 4F 30 4D B0 12 04 D2 B0 12 B6 C6
-92 C3 1C 05 38 40 50 55 39 42 03 43 19 83 FD 23
-18 83 FA 23 92 B3 1C 05 F3 23 87 12 7E D1 14 C8
-DE 21 EA C4 AC C7 1E C8 04 1B 5B 37 6D 00 D6 C7
-58 C4 40 C6 D6 CC 04 C8 1E C8 05 6C 69 6E 65 3A
-D6 C7 D0 C4 24 C6 D6 C7 1E C8 04 1B 5B 30 6D 00
-D6 C7 60 CC 00 00 83 5B 27 5D 87 12 FC CC 14 C8
-14 C8 EC CA EC CA 2A C4 E8 C8 01 27 87 12 7E CB
-80 C8 EE C8 40 C6 0A CD 2A C4 B6 CB 32 C5 81 5C
-92 42 C0 21 C4 21 30 4D E6 CC 81 5B 82 43 BE 21
-30 4D 0E CD 01 5D B2 43 BE 21 30 4D BE 4F 02 00
-3E 4F 30 4D D6 CA 82 49 53 00 87 12 FA CB EA C4
-40 C6 4E CD EA CC 14 C8 2C CD EC CA 2A C4 FC CC
-2C CD 2A C4 36 CD 09 49 4D 4D 45 44 49 41 54 45
-1A 42 B6 21 FA D0 80 00 00 00 30 4D 00 CC 88 50
-4F 53 54 50 4F 4E 45 00 87 12 7E CB 80 C8 EE C8
-58 C4 40 C6 0A CD 0C C5 40 C6 98 CD 14 C8 14 C8
-EC CA EC CA 14 C8 EC CA EC CA 2A C4 1A CD 81 3B
-82 93 BE 21 B5 27 87 12 14 C8 2A C4 EC CA 36 CE
-1C CD 2A C4 9E CD 07 3A 4E 4F 4E 41 4D 45 30 12
-DC CD 2F 83 8F 4E 00 00 1E 42 C6 21 1E B3 0E 63
-0A 4E 39 40 00 02 38 40 02 02 21 3C BA 40 87 12
-FC FF A2 83 C6 21 B2 43 BE 21 30 4D B6 CD 01 3A
-30 12 DC CD 92 B3 C6 21 A2 63 C6 21 87 12 7E CB
-80 C8 04 CE 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58
-19 42 DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48
-B6 21 82 49 B8 21 82 4A BA 21 82 4F BC 21 2A 52
-82 4A C6 21 30 41 82 9F BC 21 09 20 18 42 B6 21
-19 42 B8 21 A8 49 FE FF 89 48 00 00 30 4D 87 12
-1E C8 0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63
-68 21 88 CC CC CB 05 44 45 46 45 52 B0 12 F4 CD
-BA 40 30 40 FC FF BA 40 EA CD FE FF E3 3F 5A CB
-06 43 52 45 41 54 45 00 B0 12 F4 CD BA 40 85 12
-FC FF 8A 4A FE FF D6 3F 66 CE 05 44 4F 45 53 3E
-1A 42 BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41
-30 4D 76 C9 05 3E 42 4F 44 59 2E 52 30 4D 80 CE
-04 43 4F 44 45 00 B0 12 F4 CD A2 82 C6 21 87 12
-0E D1 E8 D0 2A C4 C0 CE 07 43 4F 44 45 4E 4E 4D
-B0 12 C2 CD F2 3F 00 00 07 45 4E 44 43 4F 44 45
-87 12 1C D1 36 CE 2A C4 68 CC 03 41 53 4D B2 40
-EC D0 DA 21 E0 3F E8 CE 06 45 4E 44 41 53 4D 00
-87 12 F0 CE 30 D1 2A C4 00 00 05 43 4F 4C 4F 4E
-1A 42 C6 21 BA 40 87 12 00 00 A2 53 C6 21 B2 43
-BE 21 30 40 1C D1 00 00 05 4C 4F 32 48 49 1A 42
-C6 21 BA 40 B0 12 00 00 BA 40 2A C4 02 00 A2 52
-C6 21 ED 3F 56 CD 85 48 49 32 4C 4F 87 12 DC CA
-86 CF EC CA 1C CD 0E D1 E8 D0 2A C4 56 CF 82 49
-46 00 2F 83 8F 4E 00 00 1E 42 C6 21 A2 52 C6 21
-BE 40 40 C6 00 00 2E 53 30 4D 9A CE 84 45 4C 53
-45 00 A2 52 C6 21 1A 42 C6 21 BA 40 3C C6 FC FF
-8E 4A 00 00 2A 83 0E 4A 30 4D 4E C9 84 54 48 45
-4E 00 9E 42 C6 21 00 00 3E 4F 30 4D D8 CE 85 42
-45 47 49 4E 30 40 DC CA AC CF 85 55 4E 54 49 4C
-39 40 40 C6 A2 52 C6 21 1A 42 C6 21 8A 49 FC FF
-8A 4E FE FF 3E 4F 30 4D FA CE 85 41 47 41 49 4E
-39 40 3C C6 EF 3F 7A C8 85 57 48 49 4C 45 87 12
-72 CF 76 C4 2A C4 34 C8 86 52 45 50 45 41 54 00
-87 12 F0 CF B2 CF 2A C4 8C CF 82 44 4F 00 2F 83
-8F 4E 00 00 A2 53 C6 21 1E 42 C6 21 BE 40 54 C6
-FE FF A2 53 00 20 1A 42 00 20 8A 43 00 00 30 4D
-1E CB 84 4C 4F 4F 50 00 39 40 76 C6 A2 52 C6 21
-1A 42 C6 21 8A 49 FC FF 8A 4E FE FF 1E 42 00 20
-A2 83 00 20 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F
-3E 4F 30 4D 90 C6 85 2B 4C 4F 4F 50 39 40 64 C6
-E5 3F 42 D0 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F
-3E 4F 0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00
-18 53 1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83
-E8 49 00 00 1A 83 FA 23 30 4D 14 C8 CA 21 F2 C4
-2A C4 84 12 BA D0 EA CF 82 D3 1A D0 FA CC 6E CF
-76 D0 96 D4 64 C8 A2 D1 BC D1 CA CF 3C D2 00 00
-68 D4 24 CD B4 CE 00 00 84 12 BA D0 B4 D9 16 DA
-68 D9 8A DA 2E D9 00 00 5E D6 00 00 24 D9 D4 D9
-86 D9 C4 D9 6E D7 00 00 00 00 66 DA E6 D0 3A 40
-0C 00 39 40 CA 21 38 40 CC 21 C6 3F 3A 40 0E 00
-39 40 CC 21 38 40 CA 21 B9 3F 82 43 CC 21 30 4D
-92 42 CA 21 DA 21 30 4D C2 D0 2A D1 30 D1 40 D1
-3A 4E 82 4A C8 21 2E 4E 82 4E C6 21 3D 40 10 00
-09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48
-00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41
-30 4D 6E CD 09 50 57 52 5F 53 54 41 54 45 84 12
-38 D1 0C D1 9C DA 08 D0 09 52 53 54 5F 53 54 41
-54 45 92 42 0E 18 82 D1 92 42 0C 18 84 D1 EF 3F
-74 D1 08 50 57 52 5F 48 45 52 45 00 92 42 C8 21
-82 D1 92 42 C6 21 84 D1 30 4D 88 D1 08 52 53 54
-5F 48 45 52 45 00 92 42 C8 21 0E 18 92 42 C6 21
-0C 18 EC 3F F8 CF 04 57 49 50 45 00 39 40 10 00
-29 83 B9 43 80 FF FC 23 B2 40 E0 C6 DE C6 B2 40
-46 D2 44 D2 B2 40 0C D1 0E 18 B2 40 9C DA 0C 18
-30 12 92 D1 B2 40 86 C7 84 C7 B2 40 08 C8 06 C8
-B2 40 98 C6 96 C6 B2 40 18 00 0A 18 37 40 1A C4
-36 40 92 C4 35 40 0E C4 34 40 00 C4 B2 40 0A 00
-DC 21 B2 40 20 00 B4 21 30 41 D6 D1 04 57 41 52
-4D 00 30 40 46 D2 3D 40 7A D2 92 C3 30 01 1E 42
-08 18 0E 93 11 24 D2 B3 00 02 02 20 3E E3 1E 53
-F2 D0 03 00 0A 02 3E 90 0A 00 B8 27 3E 90 16 00
-B5 2F 2E 93 84 27 8D 2F 30 4D 1E C8 06 0D 1B 5B
-37 6D 23 00 D6 C7 34 C6 1E C8 19 46 61 73 74 46
-6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72
-65 6E 73 20 D6 C7 14 C8 30 FF DC CA B8 C4 24 C6
-1E C8 0A 62 79 74 65 73 20 66 72 65 65 00 3C C6
-D6 CC BE CF 04 43 4F 4C 44 00 92 B3 0A 05 FD 23
-B2 40 04 A5 20 01 7A D2 B2 40 88 5A CC 01 B2 D0
-00 08 04 02 B2 D3 06 02 B2 43 02 02 B2 D0 FF FE
-26 02 B2 43 22 02 B2 43 42 02 B2 D3 46 02 B2 43
-62 02 B2 D3 66 02 B2 40 00 A5 60 01 B2 40 FF 1E
-80 01 B2 40 B6 00 82 01 B2 40 F4 00 84 01 39 40
-80 00 82 43 88 01 92 D2 5E 01 08 18 38 40 59 14
-18 83 FE 23 19 83 FA 23 39 40 00 08 29 83 89 43
-00 20 FC 23 39 40 1E 00 29 83 B9 40 D8 D2 E2 FF
-FB 23 B2 40 26 C7 EC FF B2 40 81 00 00 05 92 42
-02 18 06 05 92 42 04 18 08 05 92 C3 00 05 92 D3
-1A 05 3F 40 80 20 31 40 E0 20 30 12 42 D2 4B 3F
-C4 D2 07 43 4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F
-39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83 07 30
-19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D 1E 43
-30 4D EE CD 86 5B 54 48 45 4E 5D 00 30 4D B4 D3
-86 5B 45 4C 53 45 5D 00 87 12 14 C8 00 00 C6 C4
-7E CB 80 C8 60 CB 34 C4 40 C6 2A D4 44 C4 1E C8
-06 5B 54 48 45 4E 5D 00 8A D3 4A C6 FA D3 F8 C7
-D0 C4 58 C4 4A C6 D0 D3 2A C4 44 C4 1E C8 06 5B
-45 4C 53 45 5D 00 8A D3 4A C6 18 D4 F8 C7 D0 C4
-58 C4 4A C6 CE D3 2A C4 1E C8 04 5B 49 46 5D 00
-8A D3 4A C6 D0 D3 3C C6 CE D3 F8 C7 1E C8 05 0D
-0A 6B 6F 20 D6 C7 8C C7 6E CB 3C C6 D0 D3 C0 D3
-84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D 40 D4
-89 5B 44 45 46 49 4E 45 44 5D 87 12 7E CB 80 C8
-EE C8 6A C4 2A C4 50 D4 8B 5B 55 4E 44 45 46 49
-4E 45 44 5D 87 12 7E CB 80 C8 EE C8 6A C4 00 C5
-2A C4 84 D4 3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F
-30 40 92 D1 84 D0 06 4D 41 52 4B 45 52 00 B0 12
-F4 CD BA 40 84 12 FC FF BA 40 82 D4 FE FF 9A 42
-C8 21 00 00 28 83 8A 48 02 00 A2 52 C6 21 30 40
-3C CE 1C 15 B0 12 2A C4 80 C8 EE C8 4A C6 D8 D4
-E2 C9 40 C6 0A CD F2 D4 DA D4 39 4E 39 80 86 12
-08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24
-2E 82 1B 17 30 41 3E 40 28 00 B0 12 C2 D4 19 42
-C6 21 A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 21 92 53 C4 21 B0 12 2A C4 80 C8 E2 C9
-40 C6 30 D5 26 D5 21 53 3E 90 10 00 7D 2D E1 2B
-32 D5 B2 41 C4 21 DD 3F 87 12 7E CB 74 C8 40 D5
-0C 43 1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90
-23 00 27 20 92 53 C4 21 B0 12 C2 D4 3C 40 00 03
-0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03
-2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02
-3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00
-19 42 C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41
-30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21
-B0 12 C2 D4 ED 3F 7A 90 40 00 16 20 3C 40 20 00
-92 53 C4 21 B0 12 0E D5 0C 20 3C 50 10 00 3E 40
-2B 00 B0 12 0E D5 92 92 C0 21 C4 21 02 24 92 53
-C4 21 8E 10 0C 5E DA 3F B0 12 0E D5 FA 23 3C 50
-10 00 B0 12 F6 D4 EF 3F 0C 43 1B 42 C6 21 A2 53
-C6 21 87 12 7E CB 74 C8 0A D6 FE 90 26 00 00 00
-3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12 0E D5
-E1 23 3C 50 80 00 B0 12 F6 D4 DC 3F D6 C6 04 52
-45 54 49 00 87 12 14 C8 00 13 EC CA 2A C4 14 C8
-2C 00 38 D5 02 D6 48 D6 09 4B 2E 4E 0E DC A4 3F
-38 CF 03 4D 4F 56 84 12 3E D6 00 40 52 D6 05 4D
-4F 56 2E 42 84 12 3E D6 40 40 00 00 03 41 44 44
-84 12 3E D6 00 50 6C D6 05 41 44 44 2E 42 84 12
-3E D6 40 50 78 D6 04 41 44 44 43 00 84 12 3E D6
-00 60 86 D6 06 41 44 44 43 2E 42 00 84 12 3E D6
-40 60 2E D6 04 53 55 42 43 00 84 12 3E D6 00 70
-A4 D6 06 53 55 42 43 2E 42 00 84 12 3E D6 40 70
-B2 D6 03 53 55 42 84 12 3E D6 00 80 C2 D6 05 53
-55 42 2E 42 84 12 3E D6 40 80 1A CF 03 43 4D 50
-84 12 3E D6 00 90 DC D6 05 43 4D 50 2E 42 84 12
-3E D6 40 90 08 CF 04 44 41 44 44 00 84 12 3E D6
-00 A0 F6 D6 06 44 41 44 44 2E 42 00 84 12 3E D6
-40 A0 E8 D6 03 42 49 54 84 12 3E D6 00 B0 14 D7
-05 42 49 54 2E 42 84 12 3E D6 40 B0 20 D7 03 42
-49 43 84 12 3E D6 00 C0 2E D7 05 42 49 43 2E 42
-84 12 3E D6 40 C0 3A D7 03 42 49 53 84 12 3E D6
-00 D0 48 D7 05 42 49 53 2E 42 84 12 3E D6 40 D0
-00 00 03 58 4F 52 84 12 3E D6 00 E0 62 D7 05 58
-4F 52 2E 42 84 12 3E D6 40 E0 94 D6 03 41 4E 44
-84 12 3E D6 00 F0 7C D7 05 41 4E 44 2E 42 84 12
-3E D6 40 F0 7E CB 38 D5 9A D7 0A 4C 3C F0 70 00
-8A 10 3A F0 0F 00 0C DA 4F 3F CE D6 03 52 52 43
-84 12 94 D7 00 10 AC D7 05 52 52 43 2E 42 84 12
-94 D7 40 10 B8 D7 04 53 57 50 42 00 84 12 94 D7
-80 10 C6 D7 03 52 52 41 84 12 94 D7 00 11 D4 D7
-05 52 52 41 2E 42 84 12 94 D7 40 11 E0 D7 03 53
-58 54 84 12 94 D7 80 11 00 00 04 50 55 53 48 00
-84 12 94 D7 00 12 FA D7 06 50 55 53 48 2E 42 00
-84 12 94 D7 40 12 54 D7 04 43 41 4C 4C 00 84 12
-94 D7 80 12 1A 53 0E 4A 87 12 34 C6 1E C8 0D 6F
-75 74 20 6F 66 20 62 6F 75 6E 64 73 88 CC 7E CB
-74 C8 44 D8 92 53 C4 21 3E 40 2C 00 B0 12 2A C4
-80 C8 E2 C9 40 C6 0A CD F8 D5 5C D8 0A 4E 3E 4F
-1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
-0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
-D1 2F 8A 10 5A 06 8F 3F EE D7 04 52 52 43 4D 00
-84 12 3E D8 50 00 8A D8 04 52 52 41 4D 00 84 12
-3E D8 50 01 98 D8 04 52 4C 41 4D 00 84 12 3E D8
-50 02 A6 D8 04 52 52 55 4D 00 84 12 3E D8 50 03
-08 D8 05 50 55 53 48 4D 84 12 3E D8 00 15 C2 D8
-04 50 4F 50 4D 00 84 12 3E D8 00 17 B4 D8 03 53
-3E 3D 85 12 00 38 DE D8 02 53 3C 00 85 12 00 34
-D0 D8 03 30 3E 3D 85 12 00 30 F2 D8 02 30 3C 00
-85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 06 D9
-03 55 3E 3D 85 12 00 28 FC D8 03 30 3C 3E 85 12
-00 24 1A D9 02 30 3D 00 85 12 00 20 00 00 02 49
-46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21 0E 4A
-30 4D 10 D9 04 54 48 45 4E 00 1A 42 C6 21 08 4E
-3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
-88 DA 00 00 30 4D 04 D7 04 45 4C 53 45 00 1A 42
-C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83 8F 4A
-00 00 E3 3F 44 D9 05 55 4E 54 49 4C 3A 4F 08 4E
-3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90 00 FE
-42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 21
-30 4D 88 D7 05 41 47 41 49 4E 0A 4E 38 40 00 3C
-E7 3F 00 00 05 57 48 49 4C 45 87 12 32 D9 76 C4
-2A C4 E8 D8 06 52 45 50 45 41 54 00 87 12 BA D9
-4A D9 2A C4 E6 D9 3D 41 08 4E 3E 4F 2A 48 B2 92
-C4 21 CD 2F 98 42 C6 21 00 00 30 4D 18 D8 03 42
-57 31 84 12 E4 D9 00 00 FE D9 03 42 57 32 84 12
-E4 D9 00 00 0A DA 03 42 57 33 84 12 E4 D9 00 00
-22 DA 3D 41 1A 42 C6 21 28 4E B2 92 C4 21 90 2B
-BA 4F 00 00 A2 53 C6 21 8E 4A 00 00 3E 4F 30 4D
-00 00 03 46 57 31 84 12 20 DA 00 00 42 DA 03 46
-57 32 84 12 20 DA 00 00 4E DA 03 46 57 33 84 12
-20 DA 00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30
-07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08
-87 12 FC CC 16 CB 2A C4 5A DA 04 47 4F 54 4F 00
-2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3D 15 87 12 B0 CA 18 CB B2 41 C4 21 B2 41 C2 21
+B2 41 C0 21 3D 41 30 4D 85 12 BE 21 00 00 04 51
+55 49 54 00 82 43 08 18 31 40 E0 20 B2 40 00 20
+00 20 82 43 BE 21 87 12 2E C6 D4 C4 AC CA C4 C5
+B0 CA 8C C6 BC C6 2E C4 0C 73 74 61 63 6B 20 65
+6D 70 74 79 21 00 AA CB 24 C4 40 FF 66 CE C4 C6
+2E C4 0A 46 52 41 4D 20 66 75 6C 6C 21 00 AA CB
+48 C4 48 CB 46 CA 05 41 42 4F 52 54 3F 40 80 20
+D1 3F 86 CB 86 41 42 4F 52 54 22 00 0D 12 87 12
+AA C7 24 C4 AA CB 34 CA 26 C7 8F 93 02 00 03 20
+2F 52 3E 4F 30 4D B0 12 D2 CF B0 12 06 C5 92 C3
+1C 05 18 42 06 18 39 40 20 00 19 83 FE 23 18 83
+FA 23 92 B3 1C 05 F3 23 0D 12 87 12 4C CF 24 C4
+DE 21 02 C5 D6 C5 2E C4 04 1B 5B 37 6D 00 00 C6
+7C C6 4C C4 04 CC 2E C6 2E C4 05 6C 69 6E 65 3A
+00 C6 66 C7 00 C6 2E C4 04 1B 5B 30 6D 00 00 C6
+8C CB 00 00 83 5B 27 5D 0D 12 87 12 2C CC 24 C4
+24 C4 34 CA 34 CA 26 C7 44 C8 01 27 0D 12 87 12
+AC CA F2 C7 4A C8 4C C4 3C CC 26 C7 E6 CA D2 C6
+81 5C 92 42 C0 21 C4 21 30 4D 14 CC 81 5B 82 43
+BE 21 30 4D 40 CC 01 5D B2 43 BE 21 30 4D 2E CB
+88 50 4F 53 54 50 4F 4E 45 00 0D 12 87 12 AC CA
+F2 C7 4A C8 7C C6 4C C4 3C CC BC C6 4C C4 8C CC
+24 C4 24 C4 34 CA 34 CA 24 C4 34 CA 34 CA 26 C7
+40 C7 09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 21
+FA D0 80 00 00 00 30 4D 4C CC 01 3A 30 12 F4 CC
+92 B3 C6 21 A2 63 C6 21 0D 12 87 12 AC CA F2 C7
+C2 CC 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58 19 42
+DA 21 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48 B6 21
+82 49 B8 21 82 4A BA 21 82 4F BC 21 2A 52 82 4A
+C6 21 30 41 BA 40 0D 12 FC FF BA 40 87 12 FE FF
+B2 43 BE 21 30 4D AA CC 07 3A 4E 4F 4E 41 4D 45
+30 12 F4 CC 2F 83 8F 4E 00 00 1E 42 C6 21 1E B3
+0E 63 0A 4E 39 40 10 02 38 40 12 02 D7 3F 82 9F
+BC 21 09 20 18 42 B6 21 19 42 B8 21 A8 49 FE FF
+89 48 00 00 30 4D 0D 12 87 12 2E C4 0F 73 74 61
+63 6B 20 6D 69 73 6D 61 74 63 68 21 B6 CB 08 CD
+81 3B 82 93 BE 21 6D 27 0D 12 87 12 24 C4 26 C7
+34 CA 2E CD 4E CC 26 C7 98 CA 06 43 52 45 41 54
+45 00 B0 12 B0 CC BA 40 85 12 FC FF 8A 4A FE FF
+D5 3F FC CA 05 44 4F 45 53 3E 1A 42 BA 21 BA 40
+84 12 00 00 8A 4D 02 00 3D 41 30 4D 7A CD 04 43
+4F 44 45 00 B0 12 B0 CC A2 82 C6 21 0D 12 87 12
+C6 CE A0 CE 26 C7 AE CD 07 43 4F 44 45 4E 4E 4D
+30 12 B8 CD 9F 3F 00 00 07 45 4E 44 43 4F 44 45
+0D 12 87 12 2E CD E0 CE 26 C7 94 CB 03 41 53 4D
+B2 40 A4 CE DA 21 DE 3F D8 CD 06 45 4E 44 41 53
+4D 00 0D 12 87 12 E0 CD FE CE 26 C7 00 00 05 43
+4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12 00 00 BA 40
+87 12 02 00 A2 52 C6 21 B2 43 BE 21 30 40 E0 CE
+00 00 05 4C 4F 32 48 49 A2 83 C6 21 1A 42 C6 21
+EE 3F 92 CC 85 48 49 32 4C 4F 0D 12 87 12 66 CE
+5A CE 34 CA 4E CC BC CD 26 C7 2E 53 30 4D C8 CD
+85 42 45 47 49 4E 2F 83 8F 4E 00 00 1E 42 C6 21
+30 4D 24 C4 CA 21 AE C6 26 C7 84 12 72 CE EC CD
+96 D0 94 CD 2A CC 44 CE 42 C6 5C CA D8 C7 70 CF
+8A CF AA C8 0A D0 00 00 14 D2 56 CC D2 C8 00 00
+84 12 72 CE 46 D7 AC D7 FA D6 FC D7 C0 D6 00 00
+F0 D3 00 00 B6 D6 68 D7 18 D7 56 D7 00 D5 00 00
+00 00 18 D8 9E CE 3A 40 0C 00 39 40 D6 21 08 49
+28 53 19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D
+3A 40 0E 00 38 40 CA 21 09 48 29 53 F8 49 00 00
+18 53 1A 83 FB 23 30 4D 82 43 CC 21 30 4D 92 42
+CA 21 DA 21 30 4D 7A CE F8 CE FE CE 0E CF 3A 4E
+82 4A C8 21 2E 4E 82 4E C6 21 3D 40 10 00 09 4A
+08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00
+1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D
+60 CC 09 50 57 52 5F 53 54 41 54 45 84 12 06 CF
+C4 CE 34 D8 A6 C7 09 52 53 54 5F 53 54 41 54 45
+92 42 0E 18 50 CF 92 42 0C 18 52 CF EF 3F 42 CF
+08 50 57 52 5F 48 45 52 45 00 92 42 C8 21 50 CF
+92 42 C6 21 52 CF 30 4D 56 CF 08 52 53 54 5F 48
+45 52 45 00 92 42 C8 21 0E 18 92 42 C6 21 0C 18
+EC 3F EC C7 04 57 49 50 45 00 39 40 10 00 29 83
+B9 43 80 FF FC 23 B2 40 04 C4 02 C4 B2 40 14 D0
+12 D0 B2 40 C4 CE 0E 18 B2 40 34 D8 0C 18 30 12
+60 CF B2 40 C8 C5 C6 C5 B2 40 32 C6 30 C6 B2 40
+4A C6 48 C6 B2 40 18 00 0A 18 37 40 26 C7 36 40
+9C C6 35 40 FA C4 34 40 EC C4 B2 40 0A 00 DC 21
+B2 40 20 00 B4 21 30 41 A4 CF 04 57 41 52 4D 00
+30 40 14 D0 3D 40 4C D0 92 C3 30 01 1E 42 08 18
+0E 93 13 24 D2 B3 00 02 02 20 3E E3 1E 53 F2 D0
+03 00 0A 02 92 D3 1A 05 3E 90 0A 00 B6 27 3E 90
+16 00 B3 2F 2E 93 82 27 8B 2F 30 4D 2E C4 07 0D
+0A 1B 5B 37 6D 23 00 C6 9C C7 2E C4 19 46 61 73
+74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F
+6F 72 65 6E 73 20 00 C6 24 C4 40 FF 66 CE A6 C6
+66 C7 2E C4 0A 62 79 74 65 73 20 66 72 65 65 00
+48 C4 04 CC 60 CE 04 43 4F 4C 44 00 92 B3 0A 05
+FD 23 B2 40 04 A5 20 01 31 40 E0 20 B2 40 88 5A
+CC 01 B2 D3 06 02 B2 D3 02 02 F2 D2 05 02 B2 D0
+FF FE 26 02 B2 43 22 02 B2 43 42 02 B2 D3 46 02
+B2 43 62 02 B2 D3 66 02 B2 40 00 A5 60 01 B2 40
+FF 1E 80 01 B2 40 B6 00 82 01 B2 40 F4 00 84 01
+39 40 80 00 82 43 88 01 92 D2 5E 01 08 18 38 40
+59 14 18 83 FE 23 19 83 FA 23 39 40 00 08 29 83
+89 43 00 20 FC 23 B0 12 0E C4 B2 40 81 00 00 05
+92 42 02 18 06 05 92 42 04 18 08 05 92 C3 00 05
+3F 40 80 20 30 12 10 D0 55 3F 60 CD 86 5B 54 48
+45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
+0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
+FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
+F9 23 2F 53 2D 53 F7 3F 3C D1 86 5B 45 4C 53 45
+5D 00 0D 12 87 12 24 C4 00 00 AA C6 AC CA F2 C7
+9E CA 68 C6 4C C4 D4 D1 70 C6 2E C4 06 5B 54 48
+45 4E 5D 00 46 D1 AE D1 6A D1 8C D1 26 C7 70 C6
+2E C4 06 5B 45 4C 53 45 5D 00 46 D1 C4 D1 6A D1
+8A D1 26 C7 2E C4 04 5B 49 46 5D 00 46 D1 8C D1
+48 C4 8A D1 22 C6 2E C4 05 0D 0A 6B 6F 20 00 C6
+D4 C4 C4 C4 48 C4 8C D1 7A D1 84 5B 49 46 5D 00
+0E 93 3E 4F C6 27 30 4D EA D1 89 5B 44 45 46 49
+4E 45 44 5D 0D 12 87 12 AC CA F2 C7 4A C8 2C CA
+26 C7 FA D1 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
+0D 12 87 12 04 D2 28 D2 3D 41 30 40 B6 C6 38 40
+C0 21 0A 4E 39 48 2E 48 09 5E 1E 52 C4 21 09 9E
+03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 21
+30 4D 1C 15 87 12 F2 C7 4A C8 42 C4 66 D2 3E C9
+4C C4 3C CC 80 D2 68 D2 39 4E 39 80 86 12 08 24
+19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
+1B 17 30 41 3E 40 28 00 B0 12 52 D2 19 42 C6 21
+A2 53 C6 21 89 4E 00 00 3E 40 29 00 1C 15 12 12
+C4 21 92 53 C4 21 87 12 F2 C7 3E C9 4C C4 BC D2
+B2 D2 21 53 3E 90 10 00 80 2D E2 2B BE D2 B2 41
+C4 21 DE 3F 0D 12 87 12 AC CA 2E D2 CE D2 0C 43
+1B 42 C6 21 A2 53 C6 21 6A 4E 3E 4F 7A 90 23 00
+27 20 92 53 C4 21 B0 12 52 D2 3C 40 00 03 0E 93
+1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
+14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
+0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
+C6 21 A2 53 C6 21 89 4E 00 00 3E 4F 3D 41 30 4D
+7A 90 26 00 07 20 3C 40 10 02 92 53 C4 21 B0 12
+52 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
+C4 21 B0 12 9C D2 0C 20 3C 50 10 00 3E 40 2B 00
+B0 12 9C D2 92 92 C0 21 C4 21 02 24 92 53 C4 21
+8E 10 0C 5E DA 3F B0 12 9C D2 FA 23 3C 50 10 00
+B0 12 84 D2 EF 3F 0C 43 1B 42 C6 21 A2 53 C6 21
+0D 12 87 12 AC CA 2E D2 9A D3 FE 90 26 00 00 00
+3E 40 20 00 03 20 3C 50 82 00 C7 3F B0 12 9C D2
+E0 23 3C 50 80 00 B0 12 84 D2 DB 3F 00 00 04 52
+45 54 49 00 0D 12 87 12 24 C4 00 13 34 CA 26 C7
+24 C4 2C 00 C4 D2 90 D3 DA D3 09 4B 2E 4E 0E DC
+A2 3F 32 CE 03 4D 4F 56 84 12 D0 D3 00 40 E4 D3
+05 4D 4F 56 2E 42 84 12 D0 D3 40 40 00 00 03 41
+44 44 84 12 D0 D3 00 50 FE D3 05 41 44 44 2E 42
+84 12 D0 D3 40 50 0A D4 04 41 44 44 43 00 84 12
+D0 D3 00 60 18 D4 06 41 44 44 43 2E 42 00 84 12
+D0 D3 40 60 BE D3 04 53 55 42 43 00 84 12 D0 D3
+00 70 36 D4 06 53 55 42 43 2E 42 00 84 12 D0 D3
+40 70 44 D4 03 53 55 42 84 12 D0 D3 00 80 54 D4
+05 53 55 42 2E 42 84 12 D0 D3 40 80 0E CE 03 43
+4D 50 84 12 D0 D3 00 90 6E D4 05 43 4D 50 2E 42
+84 12 D0 D3 40 90 FA CD 04 44 41 44 44 00 84 12
+D0 D3 00 A0 88 D4 06 44 41 44 44 2E 42 00 84 12
+D0 D3 40 A0 7A D4 03 42 49 54 84 12 D0 D3 00 B0
+A6 D4 05 42 49 54 2E 42 84 12 D0 D3 40 B0 B2 D4
+03 42 49 43 84 12 D0 D3 00 C0 C0 D4 05 42 49 43
+2E 42 84 12 D0 D3 40 C0 CC D4 03 42 49 53 84 12
+D0 D3 00 D0 DA D4 05 42 49 53 2E 42 84 12 D0 D3
+40 D0 00 00 03 58 4F 52 84 12 D0 D3 00 E0 F4 D4
+05 58 4F 52 2E 42 84 12 D0 D3 40 E0 26 D4 03 41
+4E 44 84 12 D0 D3 00 F0 0E D5 05 41 4E 44 2E 42
+84 12 D0 D3 40 F0 AC CA C4 D2 2C D5 0A 4C 3C F0
+70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 60 D4 03 52
+52 43 84 12 26 D5 00 10 3E D5 05 52 52 43 2E 42
+84 12 26 D5 40 10 4A D5 04 53 57 50 42 00 84 12
+26 D5 80 10 58 D5 03 52 52 41 84 12 26 D5 00 11
+66 D5 05 52 52 41 2E 42 84 12 26 D5 40 11 72 D5
+03 53 58 54 84 12 26 D5 80 11 00 00 04 50 55 53
+48 00 84 12 26 D5 00 12 8C D5 06 50 55 53 48 2E
+42 00 84 12 26 D5 40 12 E6 D4 04 43 41 4C 4C 00
+84 12 26 D5 80 12 1A 53 0E 4A 0D 12 87 12 9C C7
+2E C4 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
+B6 CB AC CA 2E D2 D8 D5 92 53 C4 21 3E 40 2C 00
+87 12 F2 C7 3E C9 4C C4 3C CC 86 D3 EE D5 0A 4E
+3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
+01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
+2A 92 D1 2F 8A 10 5A 06 8F 3F 80 D5 04 52 52 43
+4D 00 84 12 D2 D5 50 00 1C D6 04 52 52 41 4D 00
+84 12 D2 D5 50 01 2A D6 04 52 4C 41 4D 00 84 12
+D2 D5 50 02 38 D6 04 52 52 55 4D 00 84 12 D2 D5
+50 03 9A D5 05 50 55 53 48 4D 84 12 D2 D5 00 15
+54 D6 04 50 4F 50 4D 00 84 12 D2 D5 00 17 46 D6
+03 53 3E 3D 85 12 00 38 70 D6 02 53 3C 00 85 12
+00 34 62 D6 03 30 3E 3D 85 12 00 30 84 D6 02 30
+3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
+98 D6 03 55 3E 3D 85 12 00 28 8E D6 03 30 3C 3E
+85 12 00 24 AC D6 02 30 3D 00 85 12 00 20 00 00
+02 49 46 00 1A 42 C6 21 8A 4E 00 00 A2 53 C6 21
+0E 4A 30 4D A2 D6 04 54 48 45 4E 00 1A 42 C6 21
+08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
+63 2F 88 DA 00 00 30 4D 96 D4 04 45 4C 53 45 00
+1A 42 C6 21 BA 40 00 3C 00 00 A2 53 C6 21 2F 83
+8F 4A 00 00 E3 3F D6 D6 05 55 4E 54 49 4C 3A 4F
+08 4E 3E 4F 19 42 C6 21 2A 83 0A 89 0A 11 3A 90
+00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
+C6 21 30 4D 1A D5 05 41 47 41 49 4E 0A 4E 38 40
+00 3C E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12
+C4 D6 82 C6 26 C7 7A D6 06 52 45 50 45 41 54 00
+0D 12 87 12 4C D7 DC D6 26 C7 7C D7 3D 41 08 4E
+3E 4F 2A 48 B2 92 C4 21 CB 2F 98 42 C6 21 00 00
+30 4D AA D5 03 42 57 31 84 12 7A D7 00 00 94 D7
+03 42 57 32 84 12 7A D7 00 00 A0 D7 03 42 57 33
+84 12 7A D7 00 00 B8 D7 3D 41 1A 42 C6 21 28 4E
+B2 92 C4 21 8E 2B BA 4F 00 00 A2 53 C6 21 8E 4A
+00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 B6 D7
+00 00 D8 D7 03 46 57 32 84 12 B6 D7 00 00 E4 D7
+03 46 57 33 84 12 B6 D7 00 00 F0 D7 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12
+2C CC 54 CA 26 C7 00 00 05 3F 47 4F 54 4F 3E 90
+00 30 F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0
+00 08 EC 3F
@FFFE
-D8 D2
+A8 D0
q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 70 D8 D0 CE
-2D 01 6B B0 B6 C4 C8 C4
+10 00 08 00 A1 F7 80 3E 05 00 18 00 0E D6 88 CC
+2E 01 6B B0 06 C3 18 C3 D4 CD
@C200
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C2
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C2
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C2
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C2 02 3E 52 00 0E 12 3E 4F 30 4D 70 C2 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C2 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C2 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C2
-01 21 BE 4F 00 00 3E 4F 30 4D CC C2 02 30 3D 00
-1E 83 0E 7E 30 4D FC C2 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C3 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 C2 B0 12 06 C3 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C CE CE FF FB 23 B2 40 68 C3
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C2 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 C3 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 C3 02 23 53 00 87 12 88 C3 C0 C3
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C3
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C2 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C3 34 C2 86 C2 D4 C2 BA C3
-92 C2 F8 C3 D4 C3 D6 C5 42 C9 82 C5 2A C2 22 C3
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C3 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C4 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 C4 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 C4 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 03 02 30 41 B2 40 13 00 CE 05 E2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C4
-B0 12 B6 C4 12 D2 0A 18 F9 3F F0 C2 06 41 43 43
-45 50 54 00 3C 40 64 C5 3B 40 2E C5 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C5
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A C5 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C2 04 45 4D 49
-54 00 30 40 86 C5 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C C5 04 45 43 48 4F 00 B2 40 82 48
-52 C5 82 43 DE 1D 30 4D 32 C4 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C5 92 43 DE 1D 30 4D 20 C4
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C5
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C5 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C3
-02 43 52 00 30 40 08 C6 87 12 1E C6 02 0D 0A 00
-D6 C5 2A C2 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C3 82 53 22 00 82 43 B4 1D 87 12 14 C6
-1E C6 B0 C8 14 C6 22 00 80 C6 4C C6 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA C5 82 2E 22 00 87 12 38 C6 14 C6 D6 C5
-B0 C8 2A C2 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C2 34 40 00 C2 30 4D 82 C2 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 C7 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C7 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C3 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C4 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 C2 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC C4 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 C5 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE C8 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 C6 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C6 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 C9 42 C9 80 C6 50 C9
-3D 40 58 C9 CC 22 82 3E 5A C9 0A 4E 3E 4F 3D 40
-70 C9 23 27 3D 40 4A C9 1A E2 BE 1D A1 27 B5 23
-72 C9 3E 4F 3D 40 4A C9 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CC CB 3F D2 C8
+12 D3 F5 3F 34 40 EC C2 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 03 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C3 3B 40 70 C3 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C3
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C2 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C C3 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C3 08 4E 3E 4F E0 3F BE C3
+04 45 43 48 4F 00 B2 40 82 48 94 C3 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C3 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C4 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C4 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C4 0D 12 87 12 2E C2 02 0D 0A 00 00 C4 26 C5
+00 00 03 4B 45 59 30 40 4A C4 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 C3 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 C3 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A C4
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 C2 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 C4
+02 23 53 00 0D 12 87 12 E2 C4 1C C5 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C5 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C3 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C4 14 C5 9C C4 54 C5 30 C5
+00 C4 70 C8 C4 C3 26 C5 E4 C3 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C5 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 C2 2E C2 F8 C7 24 C2 22 00 F2 C5 C0 C5
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A C5 82 2E 22 00 0D 12 87 12
+AA C5 24 C2 00 C4 F8 C7 26 C5 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C2 34 40 EC C2 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 C7 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C7 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C2
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C C3 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C7
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 C2 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C5 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C2 70 C8 F2 C5 80 C8
+3D 40 88 C8 E2 22 A4 26 8A C8 0A 4E 3E 4F 3D 40
+A0 C8 39 27 3D 40 7A C8 1A E2 BE 1D BD 23 AC 27
+A2 C8 3E 4F 3D 40 7A C8 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CB D2 3F D0 C3
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C2 46 C9 AE C9 B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 C3 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A C2
-04 C6 8C C5 42 C9 82 C5 46 C9 A4 C2 0C C3 1E C6
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CA
-14 C6 30 FF A0 C8 26 C3 1E C6 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CA 3C C4 E0 C9 C2 C8 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E CA 86 41 42 4F
-52 54 22 00 87 12 38 C6 14 C6 40 CA B0 C8 2A C2
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 CF
-B0 12 B6 C4 92 C3 DC 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 CF 14 C6 DE 1D EA C2 AC C5 1E C6 04 1B 5B 37
-6D 00 D6 C5 58 C2 40 C4 9A CA 04 C6 1E C6 05 6C
-69 6E 65 3A D6 C5 D0 C2 24 C4 D6 C5 1E C6 04 1B
-5B 30 6D 00 D6 C5 24 CA 00 00 83 5B 27 5D 87 12
-C0 CA 14 C6 14 C6 B0 C8 B0 C8 2A C2 E8 C6 01 27
-87 12 42 C9 80 C6 EE C6 40 C4 CE CA 2A C2 7A C9
-32 C3 81 5C 92 42 C0 1D C4 1D 30 4D AA CA 81 5B
-82 43 BE 1D 30 4D D2 CA 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A C8 82 49 53 00 87 12
-BE C9 EA C2 40 C4 12 CB AE CA 14 C6 F0 CA B0 C8
-2A C2 C0 CA F0 CA 2A C2 FA CA 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 C9 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 C9
-80 C6 EE C6 58 C2 40 C4 CE CA 0C C3 40 C4 5C CB
-14 C6 14 C6 B0 C8 B0 C8 14 C6 B0 C8 B0 C8 2A C2
-DE CA 81 3B 82 93 BE 1D B5 27 87 12 14 C6 2A C2
-B0 C8 FA CB E0 CA 2A C2 62 CB 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CB 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A CB 01 3A 30 12 A0 CB 92 B3 C6 1D A2 63 C6 1D
-87 12 42 C9 80 C6 C8 CB 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C6 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CA 90 C9 05 44 45 46 45 52
-B0 12 B8 CB BA 40 30 40 FC FF BA 40 AE CB FE FF
-E3 3F 1E C9 06 43 52 45 41 54 45 00 B0 12 B8 CB
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CC 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C7 05 3E 42 4F 44 59 2E 52
-30 4D 44 CC 04 43 4F 44 45 00 B0 12 B8 CB A2 82
-C6 1D 87 12 D2 CE AC CE 2A C2 84 CC 07 43 4F 44
-45 4E 4E 4D B0 12 86 CB F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 CE FA CB 2A C2 2C CA 03 41
-53 4D B2 40 B0 CE DA 1D E0 3F AC CC 06 45 4E 44
-41 53 4D 00 87 12 B4 CC F4 CE 2A C2 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 CE 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A C2
-02 00 A2 52 C6 1D ED 3F 1A CB 85 48 49 32 4C 4F
-87 12 A0 C8 4A CD B0 C8 E0 CA D2 CE AC CE 2A C2
-1A CD 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 C4 00 00 2E 53 30 4D 5E CC
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C C4 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C5
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C CC 85 42 45 47 49 4E 30 40 A0 C8 70 CD 85 55
-4E 54 49 4C 39 40 40 C4 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CC 85 41
-47 41 49 4E 39 40 3C C4 EF 3F 7A C6 85 57 48 49
-4C 45 87 12 36 CD 76 C2 2A C2 34 C6 86 52 45 50
-45 41 54 00 87 12 B4 CD 76 CD 2A C2 50 CD 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 C4 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 C8 84 4C 4F 4F 50 00 39 40 76 C4
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C4 85 2B 4C 4F 4F 50
-39 40 64 C4 E5 3F 06 CE 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C6
-CA 1D F2 C2 2A C2 84 12 7E CE AE CD 56 D1 DE CD
-BE CA 32 CD 3A CE 6A D2 64 C6 66 CF 80 CF 8E CD
-00 D0 00 00 3C D2 E8 CA 78 CC 00 00 84 12 7E CE
-88 D7 EA D7 3C D7 5E D8 02 D7 00 00 32 D4 00 00
-F8 D6 A8 D7 5A D7 98 D7 42 D5 00 00 00 00 3A D8
-AA CE 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 CE EE CE
-F4 CE 04 CF 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CB 09 50 57 52 5F 53 54 41
-54 45 84 12 FC CE D0 CE 70 D8 CC CD 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 CF 92 42 0C 18
-48 CF EF 3F 38 CF 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 CF 92 42 C6 1D 48 CF 30 4D 4C CF
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC CD 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C4
-DE C4 B2 40 0A D0 08 D0 B2 40 D0 CE 0E 18 B2 40
-70 D8 0C 18 30 12 56 CF B2 40 86 C5 84 C5 B2 40
-08 C6 06 C6 B2 40 98 C4 96 C4 B2 40 18 00 0A 18
-37 40 1A C2 36 40 92 C2 35 40 0E C2 34 40 00 C2
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A CF
-04 57 41 52 4D 00 30 40 0A D0 3D 40 3E D0 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E C6
-06 0D 1B 5B 37 6D 23 00 D6 C5 34 C4 1E C6 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 C5 14 C6 30 FF A0 C8
-B8 C2 24 C4 1E C6 0A 62 79 74 65 73 20 66 72 65
-65 00 3C C4 9A CA 82 CD 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E D0 92 D3 30 01
-B2 40 88 5A 5C 01 B2 43 06 02 B2 40 EF 7F 02 02
-E2 D2 05 02 B2 43 26 02 B2 D0 08 FF 22 02 F2 D3
-26 03 F2 40 F0 00 22 03 F2 40 A5 00 61 01 B2 40
-80 00 62 01 82 43 66 01 39 40 00 01 B2 40 33 00
-64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40 59 14
-18 83 FE 23 19 83 FA 23 B2 D2 B0 01 92 C3 B0 01
-F2 D0 10 00 2A 03 F2 C0 40 00 A1 04 39 40 00 04
-29 83 89 43 00 1C FC 23 39 40 32 00 29 83 B9 40
-9C D0 CE FF FB 23 B2 40 26 C5 F0 FF B2 40 81 00
-C0 05 92 42 02 18 C6 05 92 42 04 18 C8 05 92 C3
-C0 05 92 D3 DA 05 3F 40 80 1C 31 40 E0 1C 30 12
-06 D0 43 3F 88 D0 07 43 4F 4D 50 41 52 45 0C 4E
-38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30
-1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43
-30 4D 1E 43 30 4D B2 CB 86 5B 54 48 45 4E 5D 00
-30 4D 88 D1 86 5B 45 4C 53 45 5D 00 87 12 14 C6
-00 00 C6 C2 42 C9 80 C6 24 C9 34 C2 40 C4 FE D1
-44 C2 1E C6 06 5B 54 48 45 4E 5D 00 5E D1 4A C4
-CE D1 F8 C5 D0 C2 58 C2 4A C4 A4 D1 2A C2 44 C2
-1E C6 06 5B 45 4C 53 45 5D 00 5E D1 4A C4 EC D1
-F8 C5 D0 C2 58 C2 4A C4 A2 D1 2A C2 1E C6 04 5B
-49 46 5D 00 5E D1 4A C4 A4 D1 3C C4 A2 D1 F8 C5
-1E C6 05 0D 0A 6B 6F 20 D6 C5 8C C5 32 C9 3C C4
-A4 D1 94 D1 84 5B 49 46 5D 00 0E 93 3E 4F BE 27
-30 4D 14 D2 89 5B 44 45 46 49 4E 45 44 5D 87 12
-42 C9 80 C6 EE C6 6A C2 2A C2 24 D2 8B 5B 55 4E
-44 45 46 49 4E 45 44 5D 87 12 42 C9 80 C6 EE C6
-6A C2 00 C3 2A C2 58 D2 3D 41 B2 4E 0E 18 A2 4E
-0C 18 3E 4F 30 40 56 CF 48 CE 06 4D 41 52 4B 45
-52 00 B0 12 B8 CB BA 40 84 12 FC FF BA 40 56 D2
-FE FF 9A 42 C8 1D 00 00 28 83 8A 48 02 00 A2 52
-C6 1D 30 40 00 CC 1C 15 B0 12 2A C2 80 C6 EE C6
-4A C4 AC D2 AA C7 40 C4 CE CA C6 D2 AE D2 39 4E
-39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
-19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
-96 D2 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 1D 92 53 C4 1D B0 12 2A C2
-80 C6 AA C7 40 C4 04 D3 FA D2 21 53 3E 90 10 00
-7D 2D E1 2B 06 D3 B2 41 C4 1D DD 3F 87 12 42 C9
-74 C6 14 D3 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E
-3E 4F 7A 90 23 00 27 20 92 53 C4 1D B0 12 96 D2
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
-92 53 C4 1D B0 12 96 D2 ED 3F 7A 90 40 00 16 20
-3C 40 20 00 92 53 C4 1D B0 12 E2 D2 0C 20 3C 50
-10 00 3E 40 2B 00 B0 12 E2 D2 92 92 C0 1D C4 1D
-02 24 92 53 C4 1D 8E 10 0C 5E DA 3F B0 12 E2 D2
-FA 23 3C 50 10 00 B0 12 CA D2 EF 3F 0C 43 1B 42
-C6 1D A2 53 C6 1D 87 12 42 C9 74 C6 DE D3 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F
-B0 12 E2 D2 E1 23 3C 50 80 00 B0 12 CA D2 DC 3F
-D6 C4 04 52 45 54 49 00 87 12 14 C6 00 13 B0 C8
-2A C2 14 C6 2C 00 0C D3 D6 D3 1C D4 09 4B 2E 4E
-0E DC A4 3F FC CC 03 4D 4F 56 84 12 12 D4 00 40
-26 D4 05 4D 4F 56 2E 42 84 12 12 D4 40 40 00 00
-03 41 44 44 84 12 12 D4 00 50 40 D4 05 41 44 44
-2E 42 84 12 12 D4 40 50 4C D4 04 41 44 44 43 00
-84 12 12 D4 00 60 5A D4 06 41 44 44 43 2E 42 00
-84 12 12 D4 40 60 02 D4 04 53 55 42 43 00 84 12
-12 D4 00 70 78 D4 06 53 55 42 43 2E 42 00 84 12
-12 D4 40 70 86 D4 03 53 55 42 84 12 12 D4 00 80
-96 D4 05 53 55 42 2E 42 84 12 12 D4 40 80 DE CC
-03 43 4D 50 84 12 12 D4 00 90 B0 D4 05 43 4D 50
-2E 42 84 12 12 D4 40 90 CC CC 04 44 41 44 44 00
-84 12 12 D4 00 A0 CA D4 06 44 41 44 44 2E 42 00
-84 12 12 D4 40 A0 BC D4 03 42 49 54 84 12 12 D4
-00 B0 E8 D4 05 42 49 54 2E 42 84 12 12 D4 40 B0
-F4 D4 03 42 49 43 84 12 12 D4 00 C0 02 D5 05 42
-49 43 2E 42 84 12 12 D4 40 C0 0E D5 03 42 49 53
-84 12 12 D4 00 D0 1C D5 05 42 49 53 2E 42 84 12
-12 D4 40 D0 00 00 03 58 4F 52 84 12 12 D4 00 E0
-36 D5 05 58 4F 52 2E 42 84 12 12 D4 40 E0 68 D4
-03 41 4E 44 84 12 12 D4 00 F0 50 D5 05 41 4E 44
-2E 42 84 12 12 D4 40 F0 42 C9 0C D3 6E D5 0A 4C
-3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F A2 D4
-03 52 52 43 84 12 68 D5 00 10 80 D5 05 52 52 43
-2E 42 84 12 68 D5 40 10 8C D5 04 53 57 50 42 00
-84 12 68 D5 80 10 9A D5 03 52 52 41 84 12 68 D5
-00 11 A8 D5 05 52 52 41 2E 42 84 12 68 D5 40 11
-B4 D5 03 53 58 54 84 12 68 D5 80 11 00 00 04 50
-55 53 48 00 84 12 68 D5 00 12 CE D5 06 50 55 53
-48 2E 42 00 84 12 68 D5 40 12 28 D5 04 43 41 4C
-4C 00 84 12 68 D5 80 12 1A 53 0E 4A 87 12 34 C4
-1E C6 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
-4C CA 42 C9 74 C6 18 D6 92 53 C4 1D 3E 40 2C 00
-B0 12 2A C2 80 C6 AA C7 40 C4 CE CA CC D3 30 D6
-0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C
-59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E
-94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F C2 D5 04 52
-52 43 4D 00 84 12 12 D6 50 00 5E D6 04 52 52 41
-4D 00 84 12 12 D6 50 01 6C D6 04 52 4C 41 4D 00
-84 12 12 D6 50 02 7A D6 04 52 52 55 4D 00 84 12
-12 D6 50 03 DC D5 05 50 55 53 48 4D 84 12 12 D6
-00 15 96 D6 04 50 4F 50 4D 00 84 12 12 D6 00 17
-88 D6 03 53 3E 3D 85 12 00 38 B2 D6 02 53 3C 00
-85 12 00 34 A4 D6 03 30 3E 3D 85 12 00 30 C6 D6
-02 30 3C 00 85 12 00 30 00 00 02 55 3C 00 85 12
-00 2C DA D6 03 55 3E 3D 85 12 00 28 D0 D6 03 30
-3C 3E 85 12 00 24 EE D6 02 30 3D 00 85 12 00 20
-00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00 A2 53
-C6 1D 0E 4A 30 4D E4 D6 04 54 48 45 4E 00 1A 42
-C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 63 2F 88 DA 00 00 30 4D D8 D4 04 45 4C 53
-45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53 C6 1D
-2F 83 8F 4A 00 00 E3 3F 18 D7 05 55 4E 54 49 4C
-3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11
-3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00
-A2 53 C6 1D 30 4D 5C D5 05 41 47 41 49 4E 0A 4E
-38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12
-06 D7 76 C2 2A C2 BC D6 06 52 45 50 45 41 54 00
-87 12 8E D7 1E D7 2A C2 BA D7 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D 00 00 30 4D
-EC D5 03 42 57 31 84 12 B8 D7 00 00 D2 D7 03 42
-57 32 84 12 B8 D7 00 00 DE D7 03 42 57 33 84 12
-B8 D7 00 00 F6 D7 3D 41 1A 42 C6 1D 28 4E B2 92
-C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 84 12 F4 D7 00 00
-16 D8 03 46 57 32 84 12 F4 D7 00 00 22 D8 03 46
-57 33 84 12 F4 D7 00 00 00 00 05 3F 47 4F 54 4F
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 87 12 C0 CA DA C8 2A C2 2E D8 04 47
-4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 C8 DC C8 B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E C4 D4 C2
+70 C8 C4 C3 74 C8 8C C4 BC C4 2E C2 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E C9 24 C2 40 FF
+2A CC C4 C4 2E C2 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E C9 48 C2 0C C9 0A C8 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A C9 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C5 24 C2 6E C9 F8 C7 26 C5 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CD B0 12
+06 C3 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 CD 24 C2 DE 1D 02 C3 D6 C3 2E C2 04 1B 5B 37
+6D 00 00 C4 7C C4 4C C2 C8 C9 2E C4 2E C2 05 6C
+69 6E 65 3A 00 C4 66 C5 00 C4 2E C2 04 1B 5B 30
+6D 00 00 C4 50 C9 00 00 83 5B 27 5D 0D 12 87 12
+F0 C9 24 C2 24 C2 F8 C7 F8 C7 26 C5 44 C6 01 27
+0D 12 87 12 70 C8 F2 C5 4A C6 4C C2 00 CA 26 C5
+AA C8 D2 C4 81 5C 92 42 C0 1D C4 1D 30 4D D8 C9
+81 5B 82 43 BE 1D 30 4D 04 CA 01 5D B2 43 BE 1D
+30 4D F2 C8 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 C8 F2 C5 4A C6 7C C4 4C C2 00 CA BC C4
+4C C2 50 CA 24 C2 24 C2 F8 C7 F8 C7 24 C2 F8 C7
+F8 C7 26 C5 40 C5 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 CA 01 3A
+30 12 B8 CA 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 C8 F2 C5 86 CA 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E CA 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CA 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C2
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A C9 CC CA 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 C2 26 C5 F8 C7 F2 CA 12 CA 26 C5 5C C8 06 43
+52 45 41 54 45 00 B0 12 74 CA BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 C8 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CB 04 43 4F 44 45 00 B0 12 74 CA A2 82 C6 1D
+0D 12 87 12 8A CC 64 CC 26 C5 72 CB 07 43 4F 44
+45 4E 4E 4D 30 12 7C CB 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CA A4 CC 26 C5 58 C9
+03 41 53 4D B2 40 68 CC DA 1D DE 3F 9C CB 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CB C2 CC 26 C5
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 CC 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 CA 85 48 49 32 4C 4F 0D 12
+87 12 2A CC 1E CC F8 C7 12 CA 80 CB 26 C5 2E 53
+30 4D 8C CB 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 C2 CA 1D AE C4 26 C5 84 12
+36 CC B0 CB 5A CE 58 CB EE C9 08 CC 42 C4 20 C8
+D8 C5 34 CD 4E CD 62 C5 CE CD 00 00 EE CF 1A CA
+AA C6 00 00 84 12 36 CC 20 D5 86 D5 D4 D4 D6 D5
+9A D4 00 00 CA D1 00 00 90 D4 42 D5 F2 D4 30 D5
+DA D2 00 00 00 00 F2 D5 62 CC 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E CC BC CC C2 CC
+D2 CC 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CA 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CC 88 CC 0E D6 A6 C5 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CD 92 42 0C 18 16 CD
+EF 3F 06 CD 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 CD 92 42 C6 1D 16 CD 30 4D 1A CD 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC C5 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C2 02 C2
+B2 40 D8 CD D6 CD B2 40 88 CC 0E 18 B2 40 0E D6
+0C 18 30 12 24 CD B2 40 C8 C3 C6 C3 B2 40 32 C4
+30 C4 B2 40 4A C4 48 C4 B2 40 18 00 0A 18 37 40
+26 C5 36 40 9C C4 35 40 FA C2 34 40 EC C2 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 CD 04 57
+41 52 4D 00 30 40 D8 CD 3D 40 10 CE 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E C2 07 0D 0A 1B 5B 37 6D 23 00 C4 9C C5 2E C2
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 C4 24 C2 40 FF
+2A CC A6 C4 66 C5 2E C2 0A 62 79 74 65 73 20 66
+72 65 65 00 48 C2 C8 C9 24 CC 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+92 D3 30 01 B2 40 88 5A 5C 01 B2 43 06 02 B2 40
+EF 7F 02 02 E2 D2 05 02 B2 43 26 02 B2 D0 08 FF
+22 02 F2 D3 26 03 F2 40 F0 00 22 03 F2 40 A5 00
+61 01 B2 40 80 00 62 01 82 43 66 01 39 40 00 01
+B2 40 33 00 64 01 D2 43 61 01 92 D2 9E 01 08 18
+38 40 59 14 18 83 FE 23 19 83 FA 23 B2 D2 B0 01
+92 C3 B0 01 F2 D0 10 00 2A 03 F2 C0 40 00 A1 04
+39 40 00 04 29 83 89 43 00 1C FC 23 B0 12 0E C2
+B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42 04 18
+C8 05 92 C3 C0 05 3F 40 80 1C 30 12 D4 CD 4C 3F
+24 CB 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 12 CF
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 C2 00 00
+AA C4 70 C8 F2 C5 62 C8 68 C4 4C C2 AA CF 70 C4
+2E C2 06 5B 54 48 45 4E 5D 00 1C CF 84 CF 40 CF
+62 CF 26 C5 70 C4 2E C2 06 5B 45 4C 53 45 5D 00
+1C CF 9A CF 40 CF 60 CF 26 C5 2E C2 04 5B 49 46
+5D 00 1C CF 62 CF 48 C2 60 CF 22 C4 2E C2 05 0D
+0A 6B 6F 20 00 C4 D4 C2 C4 C2 48 C2 62 CF 50 CF
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D C0 CF 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 C8 F2 C5 4A C6 CE CF 26 C5 D4 CF 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 DE CF
+02 D0 3D 41 30 40 B6 C4 38 40 C0 1D 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 1D 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 1D 30 4D 1C 15 87 12
+F2 C5 4A C6 42 C2 40 D0 06 C7 4C C2 00 CA 5A D0
+42 D0 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 2C D0 19 42 C6 1D A2 53 C6 1D 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D
+87 12 F2 C5 06 C7 4C C2 96 D0 8C D0 21 53 3E 90
+10 00 80 2D E2 2B 98 D0 B2 41 C4 1D DE 3F 0D 12
+87 12 70 C8 08 D0 A8 D0 0C 43 1B 42 C6 1D A2 53
+C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 1D
+B0 12 2C D0 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 1D B0 12 2C D0 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 76 D0
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 76 D0 92 92
+C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E DA 3F
+B0 12 76 D0 FA 23 3C 50 10 00 B0 12 5E D0 EF 3F
+0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 70 C8
+08 D0 74 D1 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 76 D0 E0 23 3C 50 80 00
+B0 12 5E D0 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 C2 00 13 F8 C7 26 C5 24 C2 2C 00 9E D0
+6A D1 B4 D1 09 4B 2E 4E 0E DC A2 3F F6 CB 03 4D
+4F 56 84 12 AA D1 00 40 BE D1 05 4D 4F 56 2E 42
+84 12 AA D1 40 40 00 00 03 41 44 44 84 12 AA D1
+00 50 D8 D1 05 41 44 44 2E 42 84 12 AA D1 40 50
+E4 D1 04 41 44 44 43 00 84 12 AA D1 00 60 F2 D1
+06 41 44 44 43 2E 42 00 84 12 AA D1 40 60 98 D1
+04 53 55 42 43 00 84 12 AA D1 00 70 10 D2 06 53
+55 42 43 2E 42 00 84 12 AA D1 40 70 1E D2 03 53
+55 42 84 12 AA D1 00 80 2E D2 05 53 55 42 2E 42
+84 12 AA D1 40 80 D2 CB 03 43 4D 50 84 12 AA D1
+00 90 48 D2 05 43 4D 50 2E 42 84 12 AA D1 40 90
+BE CB 04 44 41 44 44 00 84 12 AA D1 00 A0 62 D2
+06 44 41 44 44 2E 42 00 84 12 AA D1 40 A0 54 D2
+03 42 49 54 84 12 AA D1 00 B0 80 D2 05 42 49 54
+2E 42 84 12 AA D1 40 B0 8C D2 03 42 49 43 84 12
+AA D1 00 C0 9A D2 05 42 49 43 2E 42 84 12 AA D1
+40 C0 A6 D2 03 42 49 53 84 12 AA D1 00 D0 B4 D2
+05 42 49 53 2E 42 84 12 AA D1 40 D0 00 00 03 58
+4F 52 84 12 AA D1 00 E0 CE D2 05 58 4F 52 2E 42
+84 12 AA D1 40 E0 00 D2 03 41 4E 44 84 12 AA D1
+00 F0 E8 D2 05 41 4E 44 2E 42 84 12 AA D1 40 F0
+70 C8 9E D0 06 D3 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 3A D2 03 52 52 43 84 12 00 D3
+00 10 18 D3 05 52 52 43 2E 42 84 12 00 D3 40 10
+24 D3 04 53 57 50 42 00 84 12 00 D3 80 10 32 D3
+03 52 52 41 84 12 00 D3 00 11 40 D3 05 52 52 41
+2E 42 84 12 00 D3 40 11 4C D3 03 53 58 54 84 12
+00 D3 80 11 00 00 04 50 55 53 48 00 84 12 00 D3
+00 12 66 D3 06 50 55 53 48 2E 42 00 84 12 00 D3
+40 12 C0 D2 04 43 41 4C 4C 00 84 12 00 D3 80 12
+1A 53 0E 4A 0D 12 87 12 9C C5 2E C2 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A C9 70 C8 08 D0
+B2 D3 92 53 C4 1D 3E 40 2C 00 87 12 F2 C5 06 C7
+4C C2 00 CA 60 D1 C8 D3 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 5A D3 04 52 52 43 4D 00 84 12 AC D3
+50 00 F6 D3 04 52 52 41 4D 00 84 12 AC D3 50 01
+04 D4 04 52 4C 41 4D 00 84 12 AC D3 50 02 12 D4
+04 52 52 55 4D 00 84 12 AC D3 50 03 74 D3 05 50
+55 53 48 4D 84 12 AC D3 00 15 2E D4 04 50 4F 50
+4D 00 84 12 AC D3 00 17 20 D4 03 53 3E 3D 85 12
+00 38 4A D4 02 53 3C 00 85 12 00 34 3C D4 03 30
+3E 3D 85 12 00 30 5E D4 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 72 D4 03 55 3E 3D
+85 12 00 28 68 D4 03 30 3C 3E 85 12 00 24 86 D4
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 7C D4
+04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 70 D2 04 45 4C 53 45 00 1A 42 C6 1D BA 40
+00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
+B0 D4 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D F4 D2
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 9E D4 82 C4 26 C5
+54 D4 06 52 45 50 45 41 54 00 0D 12 87 12 26 D5
+B6 D4 26 C5 56 D5 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 1D CB 2F 98 42 C6 1D 00 00 30 4D 84 D3 03 42
+57 31 84 12 54 D5 00 00 6E D5 03 42 57 32 84 12
+54 D5 00 00 7A D5 03 42 57 33 84 12 54 D5 00 00
+92 D5 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B
+BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 90 D5 00 00 B2 D5 03 46
+57 32 84 12 90 D5 00 00 BE D5 03 46 57 33 84 12
+90 D5 00 00 CA D5 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 C9 18 C8 26 C5
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C D0
+6C CE
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 6C D8 D0 CE
-2D 01 6B B0 B6 C4 C8 C4
+10 00 08 00 00 D6 E8 03 05 00 18 00 0A D6 88 CC
+2E 01 6B B0 06 C3 18 C3 D4 CD
@C200
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C2
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C2
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C2
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C2 02 3E 52 00 0E 12 3E 4F 30 4D 70 C2 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C2 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C2 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C2
-01 21 BE 4F 00 00 3E 4F 30 4D CC C2 02 30 3D 00
-1E 83 0E 7E 30 4D FC C2 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C3 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 C2 B0 12 06 C3 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C CE CE FF FB 23 B2 40 68 C3
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C2 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 C3 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 C3 02 23 53 00 87 12 88 C3 C0 C3
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C3
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C2 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C3 34 C2 86 C2 D4 C2 BA C3
-92 C2 F8 C3 D4 C3 D6 C5 42 C9 82 C5 2A C2 22 C3
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C3 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C4 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 C4 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 C4 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 03 02 30 41 B2 40 13 00 CE 05 E2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C4
-B0 12 B6 C4 12 D2 0A 18 F9 3F F0 C2 06 41 43 43
-45 50 54 00 3C 40 64 C5 3B 40 2E C5 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C5
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A C5 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C2 04 45 4D 49
-54 00 30 40 86 C5 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C C5 04 45 43 48 4F 00 B2 40 82 48
-52 C5 82 43 DE 1D 30 4D 32 C4 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C5 92 43 DE 1D 30 4D 20 C4
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C5
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C5 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C3
-02 43 52 00 30 40 08 C6 87 12 1E C6 02 0D 0A 00
-D6 C5 2A C2 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C3 82 53 22 00 82 43 B4 1D 87 12 14 C6
-1E C6 B0 C8 14 C6 22 00 80 C6 4C C6 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA C5 82 2E 22 00 87 12 38 C6 14 C6 D6 C5
-B0 C8 2A C2 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C2 34 40 00 C2 30 4D 82 C2 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 C7 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C7 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C3 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C4 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 C2 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC C4 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 C5 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE C8 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 C6 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C6 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 C9 42 C9 80 C6 50 C9
-3D 40 58 C9 CC 22 82 3E 5A C9 0A 4E 3E 4F 3D 40
-70 C9 23 27 3D 40 4A C9 1A E2 BE 1D A1 27 B5 23
-72 C9 3E 4F 3D 40 4A C9 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CC CB 3F D2 C8
+12 D3 F5 3F 34 40 EC C2 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 03 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C3 3B 40 70 C3 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C3
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C2 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C C3 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C3 08 4E 3E 4F E0 3F BE C3
+04 45 43 48 4F 00 B2 40 82 48 94 C3 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C3 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C4 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C4 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C4 0D 12 87 12 2E C2 02 0D 0A 00 00 C4 26 C5
+00 00 03 4B 45 59 30 40 4A C4 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 C3 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 C3 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A C4
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 C2 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 C4
+02 23 53 00 0D 12 87 12 E2 C4 1C C5 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C5 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C3 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C4 14 C5 9C C4 54 C5 30 C5
+00 C4 70 C8 C4 C3 26 C5 E4 C3 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C5 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 C2 2E C2 F8 C7 24 C2 22 00 F2 C5 C0 C5
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A C5 82 2E 22 00 0D 12 87 12
+AA C5 24 C2 00 C4 F8 C7 26 C5 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C2 34 40 EC C2 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 C7 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C7 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C2
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C C3 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C7
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 C2 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C5 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C2 70 C8 F2 C5 80 C8
+3D 40 88 C8 E2 22 A4 26 8A C8 0A 4E 3E 4F 3D 40
+A0 C8 39 27 3D 40 7A C8 1A E2 BE 1D BD 23 AC 27
+A2 C8 3E 4F 3D 40 7A C8 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CB D2 3F D0 C3
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C2 46 C9 AE C9 B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 C3 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A C2
-04 C6 8C C5 42 C9 82 C5 46 C9 A4 C2 0C C3 1E C6
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CA
-14 C6 30 FF A0 C8 26 C3 1E C6 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CA 3C C4 E0 C9 C2 C8 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E CA 86 41 42 4F
-52 54 22 00 87 12 38 C6 14 C6 40 CA B0 C8 2A C2
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 CF
-B0 12 B6 C4 92 C3 DC 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 CF 14 C6 DE 1D EA C2 AC C5 1E C6 04 1B 5B 37
-6D 00 D6 C5 58 C2 40 C4 9A CA 04 C6 1E C6 05 6C
-69 6E 65 3A D6 C5 D0 C2 24 C4 D6 C5 1E C6 04 1B
-5B 30 6D 00 D6 C5 24 CA 00 00 83 5B 27 5D 87 12
-C0 CA 14 C6 14 C6 B0 C8 B0 C8 2A C2 E8 C6 01 27
-87 12 42 C9 80 C6 EE C6 40 C4 CE CA 2A C2 7A C9
-32 C3 81 5C 92 42 C0 1D C4 1D 30 4D AA CA 81 5B
-82 43 BE 1D 30 4D D2 CA 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A C8 82 49 53 00 87 12
-BE C9 EA C2 40 C4 12 CB AE CA 14 C6 F0 CA B0 C8
-2A C2 C0 CA F0 CA 2A C2 FA CA 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 C9 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 C9
-80 C6 EE C6 58 C2 40 C4 CE CA 0C C3 40 C4 5C CB
-14 C6 14 C6 B0 C8 B0 C8 14 C6 B0 C8 B0 C8 2A C2
-DE CA 81 3B 82 93 BE 1D B5 27 87 12 14 C6 2A C2
-B0 C8 FA CB E0 CA 2A C2 62 CB 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CB 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A CB 01 3A 30 12 A0 CB 92 B3 C6 1D A2 63 C6 1D
-87 12 42 C9 80 C6 C8 CB 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C6 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CA 90 C9 05 44 45 46 45 52
-B0 12 B8 CB BA 40 30 40 FC FF BA 40 AE CB FE FF
-E3 3F 1E C9 06 43 52 45 41 54 45 00 B0 12 B8 CB
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CC 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C7 05 3E 42 4F 44 59 2E 52
-30 4D 44 CC 04 43 4F 44 45 00 B0 12 B8 CB A2 82
-C6 1D 87 12 D2 CE AC CE 2A C2 84 CC 07 43 4F 44
-45 4E 4E 4D B0 12 86 CB F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 CE FA CB 2A C2 2C CA 03 41
-53 4D B2 40 B0 CE DA 1D E0 3F AC CC 06 45 4E 44
-41 53 4D 00 87 12 B4 CC F4 CE 2A C2 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 CE 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A C2
-02 00 A2 52 C6 1D ED 3F 1A CB 85 48 49 32 4C 4F
-87 12 A0 C8 4A CD B0 C8 E0 CA D2 CE AC CE 2A C2
-1A CD 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 C4 00 00 2E 53 30 4D 5E CC
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C C4 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C5
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C CC 85 42 45 47 49 4E 30 40 A0 C8 70 CD 85 55
-4E 54 49 4C 39 40 40 C4 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CC 85 41
-47 41 49 4E 39 40 3C C4 EF 3F 7A C6 85 57 48 49
-4C 45 87 12 36 CD 76 C2 2A C2 34 C6 86 52 45 50
-45 41 54 00 87 12 B4 CD 76 CD 2A C2 50 CD 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 C4 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 C8 84 4C 4F 4F 50 00 39 40 76 C4
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C4 85 2B 4C 4F 4F 50
-39 40 64 C4 E5 3F 06 CE 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C6
-CA 1D F2 C2 2A C2 84 12 7E CE AE CD 52 D1 DE CD
-BE CA 32 CD 3A CE 66 D2 64 C6 66 CF 80 CF 8E CD
-00 D0 00 00 38 D2 E8 CA 78 CC 00 00 84 12 7E CE
-84 D7 E6 D7 38 D7 5A D8 FE D6 00 00 2E D4 00 00
-F4 D6 A4 D7 56 D7 94 D7 3E D5 00 00 00 00 36 D8
-AA CE 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 CE EE CE
-F4 CE 04 CF 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CB 09 50 57 52 5F 53 54 41
-54 45 84 12 FC CE D0 CE 6C D8 CC CD 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 CF 92 42 0C 18
-48 CF EF 3F 38 CF 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 CF 92 42 C6 1D 48 CF 30 4D 4C CF
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC CD 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C4
-DE C4 B2 40 0A D0 08 D0 B2 40 D0 CE 0E 18 B2 40
-6C D8 0C 18 30 12 56 CF B2 40 86 C5 84 C5 B2 40
-08 C6 06 C6 B2 40 98 C4 96 C4 B2 40 18 00 0A 18
-37 40 1A C2 36 40 92 C2 35 40 0E C2 34 40 00 C2
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A CF
-04 57 41 52 4D 00 30 40 0A D0 3D 40 3E D0 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E C6
-06 0D 1B 5B 37 6D 23 00 D6 C5 34 C4 1E C6 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 C5 14 C6 30 FF A0 C8
-B8 C2 24 C4 1E C6 0A 62 79 74 65 73 20 66 72 65
-65 00 3C C4 9A CA 82 CD 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E D0 92 D3 30 01
-B2 40 88 5A 5C 01 B2 43 06 02 B2 40 EF 7F 02 02
-E2 D2 05 02 B2 43 26 02 B2 D0 08 FF 22 02 F2 D3
-26 03 F2 40 F0 00 22 03 F2 40 A5 00 61 01 B2 40
-33 00 66 01 39 40 10 00 B2 40 33 00 64 01 D2 43
-61 01 92 D2 9E 01 08 18 38 40 59 14 18 83 FE 23
-19 83 FA 23 B2 D2 B0 01 92 C3 B0 01 F2 D0 10 00
-2A 03 F2 C0 40 00 A1 04 39 40 00 04 29 83 89 43
-00 1C FC 23 39 40 32 00 29 83 B9 40 9C D0 CE FF
-FB 23 B2 40 26 C5 F0 FF B2 40 81 00 C0 05 92 42
-02 18 C6 05 92 42 04 18 C8 05 92 C3 C0 05 92 D3
-DA 05 3F 40 80 1C 31 40 E0 1C 30 12 06 D0 45 3F
-88 D0 07 43 4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F
-39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83 07 30
-19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D 1E 43
-30 4D B2 CB 86 5B 54 48 45 4E 5D 00 30 4D 84 D1
-86 5B 45 4C 53 45 5D 00 87 12 14 C6 00 00 C6 C2
-42 C9 80 C6 24 C9 34 C2 40 C4 FA D1 44 C2 1E C6
-06 5B 54 48 45 4E 5D 00 5A D1 4A C4 CA D1 F8 C5
-D0 C2 58 C2 4A C4 A0 D1 2A C2 44 C2 1E C6 06 5B
-45 4C 53 45 5D 00 5A D1 4A C4 E8 D1 F8 C5 D0 C2
-58 C2 4A C4 9E D1 2A C2 1E C6 04 5B 49 46 5D 00
-5A D1 4A C4 A0 D1 3C C4 9E D1 F8 C5 1E C6 05 0D
-0A 6B 6F 20 D6 C5 8C C5 32 C9 3C C4 A0 D1 90 D1
-84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D 10 D2
-89 5B 44 45 46 49 4E 45 44 5D 87 12 42 C9 80 C6
-EE C6 6A C2 2A C2 20 D2 8B 5B 55 4E 44 45 46 49
-4E 45 44 5D 87 12 42 C9 80 C6 EE C6 6A C2 00 C3
-2A C2 54 D2 3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F
-30 40 56 CF 48 CE 06 4D 41 52 4B 45 52 00 B0 12
-B8 CB BA 40 84 12 FC FF BA 40 52 D2 FE FF 9A 42
-C8 1D 00 00 28 83 8A 48 02 00 A2 52 C6 1D 30 40
-00 CC 1C 15 B0 12 2A C2 80 C6 EE C6 4A C4 A8 D2
-AA C7 40 C4 CE CA C2 D2 AA D2 39 4E 39 80 86 12
-08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24
-2E 82 1B 17 30 41 3E 40 28 00 B0 12 92 D2 19 42
-C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 1D 92 53 C4 1D B0 12 2A C2 80 C6 AA C7
-40 C4 00 D3 F6 D2 21 53 3E 90 10 00 7D 2D E1 2B
-02 D3 B2 41 C4 1D DD 3F 87 12 42 C9 74 C6 10 D3
-0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90
-23 00 27 20 92 53 C4 1D B0 12 92 D2 3C 40 00 03
-0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03
-2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02
-3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00
-19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F 3D 41
-30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53 C4 1D
-B0 12 92 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00
-92 53 C4 1D B0 12 DE D2 0C 20 3C 50 10 00 3E 40
-2B 00 B0 12 DE D2 92 92 C0 1D C4 1D 02 24 92 53
-C4 1D 8E 10 0C 5E DA 3F B0 12 DE D2 FA 23 3C 50
-10 00 B0 12 C6 D2 EF 3F 0C 43 1B 42 C6 1D A2 53
-C6 1D 87 12 42 C9 74 C6 DA D3 FE 90 26 00 00 00
-3E 40 20 00 03 20 3C 50 82 00 C8 3F B0 12 DE D2
-E1 23 3C 50 80 00 B0 12 C6 D2 DC 3F D6 C4 04 52
-45 54 49 00 87 12 14 C6 00 13 B0 C8 2A C2 14 C6
-2C 00 08 D3 D2 D3 18 D4 09 4B 2E 4E 0E DC A4 3F
-FC CC 03 4D 4F 56 84 12 0E D4 00 40 22 D4 05 4D
-4F 56 2E 42 84 12 0E D4 40 40 00 00 03 41 44 44
-84 12 0E D4 00 50 3C D4 05 41 44 44 2E 42 84 12
-0E D4 40 50 48 D4 04 41 44 44 43 00 84 12 0E D4
-00 60 56 D4 06 41 44 44 43 2E 42 00 84 12 0E D4
-40 60 FE D3 04 53 55 42 43 00 84 12 0E D4 00 70
-74 D4 06 53 55 42 43 2E 42 00 84 12 0E D4 40 70
-82 D4 03 53 55 42 84 12 0E D4 00 80 92 D4 05 53
-55 42 2E 42 84 12 0E D4 40 80 DE CC 03 43 4D 50
-84 12 0E D4 00 90 AC D4 05 43 4D 50 2E 42 84 12
-0E D4 40 90 CC CC 04 44 41 44 44 00 84 12 0E D4
-00 A0 C6 D4 06 44 41 44 44 2E 42 00 84 12 0E D4
-40 A0 B8 D4 03 42 49 54 84 12 0E D4 00 B0 E4 D4
-05 42 49 54 2E 42 84 12 0E D4 40 B0 F0 D4 03 42
-49 43 84 12 0E D4 00 C0 FE D4 05 42 49 43 2E 42
-84 12 0E D4 40 C0 0A D5 03 42 49 53 84 12 0E D4
-00 D0 18 D5 05 42 49 53 2E 42 84 12 0E D4 40 D0
-00 00 03 58 4F 52 84 12 0E D4 00 E0 32 D5 05 58
-4F 52 2E 42 84 12 0E D4 40 E0 64 D4 03 41 4E 44
-84 12 0E D4 00 F0 4C D5 05 41 4E 44 2E 42 84 12
-0E D4 40 F0 42 C9 08 D3 6A D5 0A 4C 3C F0 70 00
-8A 10 3A F0 0F 00 0C DA 4F 3F 9E D4 03 52 52 43
-84 12 64 D5 00 10 7C D5 05 52 52 43 2E 42 84 12
-64 D5 40 10 88 D5 04 53 57 50 42 00 84 12 64 D5
-80 10 96 D5 03 52 52 41 84 12 64 D5 00 11 A4 D5
-05 52 52 41 2E 42 84 12 64 D5 40 11 B0 D5 03 53
-58 54 84 12 64 D5 80 11 00 00 04 50 55 53 48 00
-84 12 64 D5 00 12 CA D5 06 50 55 53 48 2E 42 00
-84 12 64 D5 40 12 24 D5 04 43 41 4C 4C 00 84 12
-64 D5 80 12 1A 53 0E 4A 87 12 34 C4 1E C6 0D 6F
-75 74 20 6F 66 20 62 6F 75 6E 64 73 4C CA 42 C9
-74 C6 14 D6 92 53 C4 1D 3E 40 2C 00 B0 12 2A C2
-80 C6 AA C7 40 C4 CE CA C8 D3 2C D6 0A 4E 3E 4F
-1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
-0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
-D1 2F 8A 10 5A 06 8F 3F BE D5 04 52 52 43 4D 00
-84 12 0E D6 50 00 5A D6 04 52 52 41 4D 00 84 12
-0E D6 50 01 68 D6 04 52 4C 41 4D 00 84 12 0E D6
-50 02 76 D6 04 52 52 55 4D 00 84 12 0E D6 50 03
-D8 D5 05 50 55 53 48 4D 84 12 0E D6 00 15 92 D6
-04 50 4F 50 4D 00 84 12 0E D6 00 17 84 D6 03 53
-3E 3D 85 12 00 38 AE D6 02 53 3C 00 85 12 00 34
-A0 D6 03 30 3E 3D 85 12 00 30 C2 D6 02 30 3C 00
-85 12 00 30 00 00 02 55 3C 00 85 12 00 2C D6 D6
-03 55 3E 3D 85 12 00 28 CC D6 03 30 3C 3E 85 12
-00 24 EA D6 02 30 3D 00 85 12 00 20 00 00 02 49
-46 00 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A
-30 4D E0 D6 04 54 48 45 4E 00 1A 42 C6 1D 08 4E
-3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
-88 DA 00 00 30 4D D4 D4 04 45 4C 53 45 00 1A 42
-C6 1D BA 40 00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A
-00 00 E3 3F 14 D7 05 55 4E 54 49 4C 3A 4F 08 4E
-3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE
-42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 1D
-30 4D 58 D5 05 41 47 41 49 4E 0A 4E 38 40 00 3C
-E7 3F 00 00 05 57 48 49 4C 45 87 12 02 D7 76 C2
-2A C2 B8 D6 06 52 45 50 45 41 54 00 87 12 8A D7
-1A D7 2A C2 B6 D7 3D 41 08 4E 3E 4F 2A 48 B2 92
-C4 1D CD 2F 98 42 C6 1D 00 00 30 4D E8 D5 03 42
-57 31 84 12 B4 D7 00 00 CE D7 03 42 57 32 84 12
-B4 D7 00 00 DA D7 03 42 57 33 84 12 B4 D7 00 00
-F2 D7 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 90 2B
-BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D
-00 00 03 46 57 31 84 12 F0 D7 00 00 12 D8 03 46
-57 32 84 12 F0 D7 00 00 1E D8 03 46 57 33 84 12
-F0 D7 00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30
-07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08
-87 12 C0 CA DA C8 2A C2 2A D8 04 47 4F 54 4F 00
-2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 C8 DC C8 B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E C4 D4 C2
+70 C8 C4 C3 74 C8 8C C4 BC C4 2E C2 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E C9 24 C2 40 FF
+2A CC C4 C4 2E C2 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E C9 48 C2 0C C9 0A C8 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A C9 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C5 24 C2 6E C9 F8 C7 26 C5 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CD B0 12
+06 C3 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 CD 24 C2 DE 1D 02 C3 D6 C3 2E C2 04 1B 5B 37
+6D 00 00 C4 7C C4 4C C2 C8 C9 2E C4 2E C2 05 6C
+69 6E 65 3A 00 C4 66 C5 00 C4 2E C2 04 1B 5B 30
+6D 00 00 C4 50 C9 00 00 83 5B 27 5D 0D 12 87 12
+F0 C9 24 C2 24 C2 F8 C7 F8 C7 26 C5 44 C6 01 27
+0D 12 87 12 70 C8 F2 C5 4A C6 4C C2 00 CA 26 C5
+AA C8 D2 C4 81 5C 92 42 C0 1D C4 1D 30 4D D8 C9
+81 5B 82 43 BE 1D 30 4D 04 CA 01 5D B2 43 BE 1D
+30 4D F2 C8 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 C8 F2 C5 4A C6 7C C4 4C C2 00 CA BC C4
+4C C2 50 CA 24 C2 24 C2 F8 C7 F8 C7 24 C2 F8 C7
+F8 C7 26 C5 40 C5 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 CA 01 3A
+30 12 B8 CA 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 C8 F2 C5 86 CA 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E CA 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CA 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C2
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A C9 CC CA 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 C2 26 C5 F8 C7 F2 CA 12 CA 26 C5 5C C8 06 43
+52 45 41 54 45 00 B0 12 74 CA BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 C8 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CB 04 43 4F 44 45 00 B0 12 74 CA A2 82 C6 1D
+0D 12 87 12 8A CC 64 CC 26 C5 72 CB 07 43 4F 44
+45 4E 4E 4D 30 12 7C CB 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CA A4 CC 26 C5 58 C9
+03 41 53 4D B2 40 68 CC DA 1D DE 3F 9C CB 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CB C2 CC 26 C5
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 CC 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 CA 85 48 49 32 4C 4F 0D 12
+87 12 2A CC 1E CC F8 C7 12 CA 80 CB 26 C5 2E 53
+30 4D 8C CB 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 C2 CA 1D AE C4 26 C5 84 12
+36 CC B0 CB 5A CE 58 CB EE C9 08 CC 42 C4 20 C8
+D8 C5 34 CD 4E CD 62 C5 CE CD 00 00 EA CF 1A CA
+AA C6 00 00 84 12 36 CC 1C D5 82 D5 D0 D4 D2 D5
+96 D4 00 00 C6 D1 00 00 8C D4 3E D5 EE D4 2C D5
+D6 D2 00 00 00 00 EE D5 62 CC 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E CC BC CC C2 CC
+D2 CC 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CA 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CC 88 CC 0A D6 A6 C5 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CD 92 42 0C 18 16 CD
+EF 3F 06 CD 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 CD 92 42 C6 1D 16 CD 30 4D 1A CD 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC C5 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C2 02 C2
+B2 40 D8 CD D6 CD B2 40 88 CC 0E 18 B2 40 0A D6
+0C 18 30 12 24 CD B2 40 C8 C3 C6 C3 B2 40 32 C4
+30 C4 B2 40 4A C4 48 C4 B2 40 18 00 0A 18 37 40
+26 C5 36 40 9C C4 35 40 FA C2 34 40 EC C2 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 CD 04 57
+41 52 4D 00 30 40 D8 CD 3D 40 10 CE 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E C2 07 0D 0A 1B 5B 37 6D 23 00 C4 9C C5 2E C2
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 C4 24 C2 40 FF
+2A CC A6 C4 66 C5 2E C2 0A 62 79 74 65 73 20 66
+72 65 65 00 48 C2 C8 C9 24 CC 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+92 D3 30 01 B2 40 88 5A 5C 01 B2 43 06 02 B2 40
+EF 7F 02 02 E2 D2 05 02 B2 43 26 02 B2 D0 08 FF
+22 02 F2 D3 26 03 F2 40 F0 00 22 03 F2 40 A5 00
+61 01 B2 40 33 00 66 01 39 40 10 00 B2 40 33 00
+64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40 59 14
+18 83 FE 23 19 83 FA 23 B2 D2 B0 01 92 C3 B0 01
+F2 D0 10 00 2A 03 F2 C0 40 00 A1 04 39 40 00 04
+29 83 89 43 00 1C FC 23 B0 12 0E C2 B2 40 81 00
+C0 05 92 42 02 18 C6 05 92 42 04 18 C8 05 92 C3
+C0 05 3F 40 80 1C 30 12 D4 CD 4E 3F 24 CB 86 5B
+54 48 45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F
+0E 4B 0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53
+F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83
+00 00 F9 23 2F 53 2D 53 F7 3F 0E CF 86 5B 45 4C
+53 45 5D 00 0D 12 87 12 24 C2 00 00 AA C4 70 C8
+F2 C5 62 C8 68 C4 4C C2 A6 CF 70 C4 2E C2 06 5B
+54 48 45 4E 5D 00 18 CF 80 CF 3C CF 5E CF 26 C5
+70 C4 2E C2 06 5B 45 4C 53 45 5D 00 18 CF 96 CF
+3C CF 5C CF 26 C5 2E C2 04 5B 49 46 5D 00 18 CF
+5E CF 48 C2 5C CF 22 C4 2E C2 05 0D 0A 6B 6F 20
+00 C4 D4 C2 C4 C2 48 C2 5E CF 4C CF 84 5B 49 46
+5D 00 0E 93 3E 4F C6 27 30 4D 2F 53 30 4D BC CF
+89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12 70 C8
+F2 C5 4A C6 CA CF 26 C5 D0 CF 8B 5B 55 4E 44 45
+46 49 4E 45 44 5D 0D 12 87 12 DA CF FE CF 3D 41
+30 40 B6 C4 38 40 C0 1D 0A 4E 39 48 2E 48 09 5E
+1E 52 C4 1D 09 9E 03 24 7A 9E FC 27 1E 83 0A 4E
+2A 88 82 4A C4 1D 30 4D 1C 15 87 12 F2 C5 4A C6
+42 C2 3C D0 06 C7 4C C2 00 CA 56 D0 3E D0 39 4E
+39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
+19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
+28 D0 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40
+29 00 1C 15 12 12 C4 1D 92 53 C4 1D 87 12 F2 C5
+06 C7 4C C2 92 D0 88 D0 21 53 3E 90 10 00 80 2D
+E2 2B 94 D0 B2 41 C4 1D DE 3F 0D 12 87 12 70 C8
+04 D0 A4 D0 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E
+3E 4F 7A 90 23 00 27 20 92 53 C4 1D B0 12 28 D0
+3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
+3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
+3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
+3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
+3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
+92 53 C4 1D B0 12 28 D0 ED 3F 7A 90 40 00 16 20
+3C 40 20 00 92 53 C4 1D B0 12 72 D0 0C 20 3C 50
+10 00 3E 40 2B 00 B0 12 72 D0 92 92 C0 1D C4 1D
+02 24 92 53 C4 1D 8E 10 0C 5E DA 3F B0 12 72 D0
+FA 23 3C 50 10 00 B0 12 5A D0 EF 3F 0C 43 1B 42
+C6 1D A2 53 C6 1D 0D 12 87 12 70 C8 04 D0 70 D1
+FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50 82 00
+C7 3F B0 12 72 D0 E0 23 3C 50 80 00 B0 12 5A D0
+DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12 24 C2
+00 13 F8 C7 26 C5 24 C2 2C 00 9A D0 66 D1 B0 D1
+09 4B 2E 4E 0E DC A2 3F F6 CB 03 4D 4F 56 84 12
+A6 D1 00 40 BA D1 05 4D 4F 56 2E 42 84 12 A6 D1
+40 40 00 00 03 41 44 44 84 12 A6 D1 00 50 D4 D1
+05 41 44 44 2E 42 84 12 A6 D1 40 50 E0 D1 04 41
+44 44 43 00 84 12 A6 D1 00 60 EE D1 06 41 44 44
+43 2E 42 00 84 12 A6 D1 40 60 94 D1 04 53 55 42
+43 00 84 12 A6 D1 00 70 0C D2 06 53 55 42 43 2E
+42 00 84 12 A6 D1 40 70 1A D2 03 53 55 42 84 12
+A6 D1 00 80 2A D2 05 53 55 42 2E 42 84 12 A6 D1
+40 80 D2 CB 03 43 4D 50 84 12 A6 D1 00 90 44 D2
+05 43 4D 50 2E 42 84 12 A6 D1 40 90 BE CB 04 44
+41 44 44 00 84 12 A6 D1 00 A0 5E D2 06 44 41 44
+44 2E 42 00 84 12 A6 D1 40 A0 50 D2 03 42 49 54
+84 12 A6 D1 00 B0 7C D2 05 42 49 54 2E 42 84 12
+A6 D1 40 B0 88 D2 03 42 49 43 84 12 A6 D1 00 C0
+96 D2 05 42 49 43 2E 42 84 12 A6 D1 40 C0 A2 D2
+03 42 49 53 84 12 A6 D1 00 D0 B0 D2 05 42 49 53
+2E 42 84 12 A6 D1 40 D0 00 00 03 58 4F 52 84 12
+A6 D1 00 E0 CA D2 05 58 4F 52 2E 42 84 12 A6 D1
+40 E0 FC D1 03 41 4E 44 84 12 A6 D1 00 F0 E4 D2
+05 41 4E 44 2E 42 84 12 A6 D1 40 F0 70 C8 9A D0
+02 D3 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA
+4F 3F 36 D2 03 52 52 43 84 12 FC D2 00 10 14 D3
+05 52 52 43 2E 42 84 12 FC D2 40 10 20 D3 04 53
+57 50 42 00 84 12 FC D2 80 10 2E D3 03 52 52 41
+84 12 FC D2 00 11 3C D3 05 52 52 41 2E 42 84 12
+FC D2 40 11 48 D3 03 53 58 54 84 12 FC D2 80 11
+00 00 04 50 55 53 48 00 84 12 FC D2 00 12 62 D3
+06 50 55 53 48 2E 42 00 84 12 FC D2 40 12 BC D2
+04 43 41 4C 4C 00 84 12 FC D2 80 12 1A 53 0E 4A
+0D 12 87 12 9C C5 2E C2 0D 6F 75 74 20 6F 66 20
+62 6F 75 6E 64 73 7A C9 70 C8 04 D0 AE D3 92 53
+C4 1D 3E 40 2C 00 87 12 F2 C5 06 C7 4C C2 00 CA
+5C D1 C4 D3 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E
+0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
+D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F
+56 D3 04 52 52 43 4D 00 84 12 A8 D3 50 00 F2 D3
+04 52 52 41 4D 00 84 12 A8 D3 50 01 00 D4 04 52
+4C 41 4D 00 84 12 A8 D3 50 02 0E D4 04 52 52 55
+4D 00 84 12 A8 D3 50 03 70 D3 05 50 55 53 48 4D
+84 12 A8 D3 00 15 2A D4 04 50 4F 50 4D 00 84 12
+A8 D3 00 17 1C D4 03 53 3E 3D 85 12 00 38 46 D4
+02 53 3C 00 85 12 00 34 38 D4 03 30 3E 3D 85 12
+00 30 5A D4 02 30 3C 00 85 12 00 30 00 00 02 55
+3C 00 85 12 00 2C 6E D4 03 55 3E 3D 85 12 00 28
+64 D4 03 30 3C 3E 85 12 00 24 82 D4 02 30 3D 00
+85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E
+00 00 A2 53 C6 1D 0E 4A 30 4D 78 D4 04 54 48 45
+4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89
+0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D 6C D2
+04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00
+A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F AC D4 05 55
+4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83
+0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03 08 DA
+89 48 00 00 A2 53 C6 1D 30 4D F0 D2 05 41 47 41
+49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49
+4C 45 0D 12 87 12 9A D4 82 C4 26 C5 50 D4 06 52
+45 50 45 41 54 00 0D 12 87 12 22 D5 B2 D4 26 C5
+52 D5 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D CB 2F
+98 42 C6 1D 00 00 30 4D 80 D3 03 42 57 31 84 12
+50 D5 00 00 6A D5 03 42 57 32 84 12 50 D5 00 00
+76 D5 03 42 57 33 84 12 50 D5 00 00 8E D5 3D 41
+1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B BA 4F 00 00
+A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
+57 31 84 12 8C D5 00 00 AE D5 03 46 57 32 84 12
+8C D5 00 00 BA D5 03 46 57 33 84 12 8C D5 00 00
+C6 D5 04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40
+00 3C 0D 12 87 12 F0 C9 18 C8 26 C5 00 00 05 3F
+47 4F 54 4F 3E 90 00 30 F4 27 3E E0 00 04 3E B0
+00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C D0
+6C CE
q
@1800
-10 00 0D 00 01 49 C0 5D 05 00 18 00 70 D8 D0 CE
-2D 01 6B B0 B6 C4 C8 C4
+10 00 0D 00 01 49 C0 5D 05 00 18 00 0E D6 88 CC
+2E 01 6B B0 06 C3 18 C3 D4 CD
@C200
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C2
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C2
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C2
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C2 02 3E 52 00 0E 12 3E 4F 30 4D 70 C2 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C2 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C2 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C2
-01 21 BE 4F 00 00 3E 4F 30 4D CC C2 02 30 3D 00
-1E 83 0E 7E 30 4D FC C2 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C3 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 C2 B0 12 06 C3 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C CE CE FF FB 23 B2 40 68 C3
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C2 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 C3 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 C3 02 23 53 00 87 12 88 C3 C0 C3
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C3
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C2 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C3 34 C2 86 C2 D4 C2 BA C3
-92 C2 F8 C3 D4 C3 D6 C5 42 C9 82 C5 2A C2 22 C3
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C3 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C4 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 C4 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 C4 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 03 02 30 41 B2 40 13 00 CE 05 E2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C4
-B0 12 B6 C4 12 D2 0A 18 F9 3F F0 C2 06 41 43 43
-45 50 54 00 3C 40 64 C5 3B 40 2E C5 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C5
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A C5 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C2 04 45 4D 49
-54 00 30 40 86 C5 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C C5 04 45 43 48 4F 00 B2 40 82 48
-52 C5 82 43 DE 1D 30 4D 32 C4 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C5 92 43 DE 1D 30 4D 20 C4
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C5
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C5 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C3
-02 43 52 00 30 40 08 C6 87 12 1E C6 02 0D 0A 00
-D6 C5 2A C2 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C3 82 53 22 00 82 43 B4 1D 87 12 14 C6
-1E C6 B0 C8 14 C6 22 00 80 C6 4C C6 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA C5 82 2E 22 00 87 12 38 C6 14 C6 D6 C5
-B0 C8 2A C2 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C2 34 40 00 C2 30 4D 82 C2 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 C7 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C7 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C3 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C4 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 C2 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC C4 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 C5 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE C8 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 C6 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C6 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 C9 42 C9 80 C6 50 C9
-3D 40 58 C9 CC 22 82 3E 5A C9 0A 4E 3E 4F 3D 40
-70 C9 23 27 3D 40 4A C9 1A E2 BE 1D A1 27 B5 23
-72 C9 3E 4F 3D 40 4A C9 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CC CB 3F D2 C8
+12 D3 F5 3F 34 40 EC C2 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 03 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C3 3B 40 70 C3 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C3
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C2 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C C3 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C3 08 4E 3E 4F E0 3F BE C3
+04 45 43 48 4F 00 B2 40 82 48 94 C3 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C3 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C4 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C4 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C4 0D 12 87 12 2E C2 02 0D 0A 00 00 C4 26 C5
+00 00 03 4B 45 59 30 40 4A C4 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 C3 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 C3 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A C4
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 C2 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 C4
+02 23 53 00 0D 12 87 12 E2 C4 1C C5 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C5 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C3 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C4 14 C5 9C C4 54 C5 30 C5
+00 C4 70 C8 C4 C3 26 C5 E4 C3 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C5 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 C2 2E C2 F8 C7 24 C2 22 00 F2 C5 C0 C5
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A C5 82 2E 22 00 0D 12 87 12
+AA C5 24 C2 00 C4 F8 C7 26 C5 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C2 34 40 EC C2 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 C7 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C7 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C2
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C C3 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C7
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 C2 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C5 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C2 70 C8 F2 C5 80 C8
+3D 40 88 C8 E2 22 A4 26 8A C8 0A 4E 3E 4F 3D 40
+A0 C8 39 27 3D 40 7A C8 1A E2 BE 1D BD 23 AC 27
+A2 C8 3E 4F 3D 40 7A C8 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CB D2 3F D0 C3
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C2 46 C9 AE C9 B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 C3 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A C2
-04 C6 8C C5 42 C9 82 C5 46 C9 A4 C2 0C C3 1E C6
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CA
-14 C6 30 FF A0 C8 26 C3 1E C6 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CA 3C C4 E0 C9 C2 C8 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E CA 86 41 42 4F
-52 54 22 00 87 12 38 C6 14 C6 40 CA B0 C8 2A C2
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 CF
-B0 12 B6 C4 92 C3 DC 05 38 40 F0 FF 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 CF 14 C6 DE 1D EA C2 AC C5 1E C6 04 1B 5B 37
-6D 00 D6 C5 58 C2 40 C4 9A CA 04 C6 1E C6 05 6C
-69 6E 65 3A D6 C5 D0 C2 24 C4 D6 C5 1E C6 04 1B
-5B 30 6D 00 D6 C5 24 CA 00 00 83 5B 27 5D 87 12
-C0 CA 14 C6 14 C6 B0 C8 B0 C8 2A C2 E8 C6 01 27
-87 12 42 C9 80 C6 EE C6 40 C4 CE CA 2A C2 7A C9
-32 C3 81 5C 92 42 C0 1D C4 1D 30 4D AA CA 81 5B
-82 43 BE 1D 30 4D D2 CA 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A C8 82 49 53 00 87 12
-BE C9 EA C2 40 C4 12 CB AE CA 14 C6 F0 CA B0 C8
-2A C2 C0 CA F0 CA 2A C2 FA CA 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 C9 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 C9
-80 C6 EE C6 58 C2 40 C4 CE CA 0C C3 40 C4 5C CB
-14 C6 14 C6 B0 C8 B0 C8 14 C6 B0 C8 B0 C8 2A C2
-DE CA 81 3B 82 93 BE 1D B5 27 87 12 14 C6 2A C2
-B0 C8 FA CB E0 CA 2A C2 62 CB 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CB 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A CB 01 3A 30 12 A0 CB 92 B3 C6 1D A2 63 C6 1D
-87 12 42 C9 80 C6 C8 CB 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C6 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CA 90 C9 05 44 45 46 45 52
-B0 12 B8 CB BA 40 30 40 FC FF BA 40 AE CB FE FF
-E3 3F 1E C9 06 43 52 45 41 54 45 00 B0 12 B8 CB
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CC 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C7 05 3E 42 4F 44 59 2E 52
-30 4D 44 CC 04 43 4F 44 45 00 B0 12 B8 CB A2 82
-C6 1D 87 12 D2 CE AC CE 2A C2 84 CC 07 43 4F 44
-45 4E 4E 4D B0 12 86 CB F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 CE FA CB 2A C2 2C CA 03 41
-53 4D B2 40 B0 CE DA 1D E0 3F AC CC 06 45 4E 44
-41 53 4D 00 87 12 B4 CC F4 CE 2A C2 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 CE 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A C2
-02 00 A2 52 C6 1D ED 3F 1A CB 85 48 49 32 4C 4F
-87 12 A0 C8 4A CD B0 C8 E0 CA D2 CE AC CE 2A C2
-1A CD 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 C4 00 00 2E 53 30 4D 5E CC
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C C4 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C5
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C CC 85 42 45 47 49 4E 30 40 A0 C8 70 CD 85 55
-4E 54 49 4C 39 40 40 C4 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CC 85 41
-47 41 49 4E 39 40 3C C4 EF 3F 7A C6 85 57 48 49
-4C 45 87 12 36 CD 76 C2 2A C2 34 C6 86 52 45 50
-45 41 54 00 87 12 B4 CD 76 CD 2A C2 50 CD 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 C4 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 C8 84 4C 4F 4F 50 00 39 40 76 C4
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C4 85 2B 4C 4F 4F 50
-39 40 64 C4 E5 3F 06 CE 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C6
-CA 1D F2 C2 2A C2 84 12 7E CE AE CD 56 D1 DE CD
-BE CA 32 CD 3A CE 6A D2 64 C6 66 CF 80 CF 8E CD
-00 D0 00 00 3C D2 E8 CA 78 CC 00 00 84 12 7E CE
-88 D7 EA D7 3C D7 5E D8 02 D7 00 00 32 D4 00 00
-F8 D6 A8 D7 5A D7 98 D7 42 D5 00 00 00 00 3A D8
-AA CE 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 CE EE CE
-F4 CE 04 CF 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CB 09 50 57 52 5F 53 54 41
-54 45 84 12 FC CE D0 CE 70 D8 CC CD 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 CF 92 42 0C 18
-48 CF EF 3F 38 CF 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 CF 92 42 C6 1D 48 CF 30 4D 4C CF
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC CD 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C4
-DE C4 B2 40 0A D0 08 D0 B2 40 D0 CE 0E 18 B2 40
-70 D8 0C 18 30 12 56 CF B2 40 86 C5 84 C5 B2 40
-08 C6 06 C6 B2 40 98 C4 96 C4 B2 40 18 00 0A 18
-37 40 1A C2 36 40 92 C2 35 40 0E C2 34 40 00 C2
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A CF
-04 57 41 52 4D 00 30 40 0A D0 3D 40 3E D0 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E C6
-06 0D 1B 5B 37 6D 23 00 D6 C5 34 C4 1E C6 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 C5 14 C6 30 FF A0 C8
-B8 C2 24 C4 1E C6 0A 62 79 74 65 73 20 66 72 65
-65 00 3C C4 9A CA 82 CD 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E D0 92 D3 30 01
-B2 40 88 5A 5C 01 B2 43 06 02 B2 40 EF 7F 02 02
-E2 D2 05 02 B2 43 26 02 B2 D0 08 FF 22 02 F2 D3
-26 03 F2 40 F0 00 22 03 F2 40 A5 00 61 01 B2 40
-86 00 62 01 82 43 66 01 39 40 80 01 B2 40 33 00
-64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40 59 14
-18 83 FE 23 19 83 FA 23 B2 D2 B0 01 92 C3 B0 01
-F2 D0 10 00 2A 03 F2 C0 40 00 A1 04 39 40 00 04
-29 83 89 43 00 1C FC 23 39 40 32 00 29 83 B9 40
-9C D0 CE FF FB 23 B2 40 26 C5 F0 FF B2 40 81 00
-C0 05 92 42 02 18 C6 05 92 42 04 18 C8 05 92 C3
-C0 05 92 D3 DA 05 3F 40 80 1C 31 40 E0 1C 30 12
-06 D0 43 3F 88 D0 07 43 4F 4D 50 41 52 45 0C 4E
-38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30
-1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43
-30 4D 1E 43 30 4D B2 CB 86 5B 54 48 45 4E 5D 00
-30 4D 88 D1 86 5B 45 4C 53 45 5D 00 87 12 14 C6
-00 00 C6 C2 42 C9 80 C6 24 C9 34 C2 40 C4 FE D1
-44 C2 1E C6 06 5B 54 48 45 4E 5D 00 5E D1 4A C4
-CE D1 F8 C5 D0 C2 58 C2 4A C4 A4 D1 2A C2 44 C2
-1E C6 06 5B 45 4C 53 45 5D 00 5E D1 4A C4 EC D1
-F8 C5 D0 C2 58 C2 4A C4 A2 D1 2A C2 1E C6 04 5B
-49 46 5D 00 5E D1 4A C4 A4 D1 3C C4 A2 D1 F8 C5
-1E C6 05 0D 0A 6B 6F 20 D6 C5 8C C5 32 C9 3C C4
-A4 D1 94 D1 84 5B 49 46 5D 00 0E 93 3E 4F BE 27
-30 4D 14 D2 89 5B 44 45 46 49 4E 45 44 5D 87 12
-42 C9 80 C6 EE C6 6A C2 2A C2 24 D2 8B 5B 55 4E
-44 45 46 49 4E 45 44 5D 87 12 42 C9 80 C6 EE C6
-6A C2 00 C3 2A C2 58 D2 3D 41 B2 4E 0E 18 A2 4E
-0C 18 3E 4F 30 40 56 CF 48 CE 06 4D 41 52 4B 45
-52 00 B0 12 B8 CB BA 40 84 12 FC FF BA 40 56 D2
-FE FF 9A 42 C8 1D 00 00 28 83 8A 48 02 00 A2 52
-C6 1D 30 40 00 CC 1C 15 B0 12 2A C2 80 C6 EE C6
-4A C4 AC D2 AA C7 40 C4 CE CA C6 D2 AE D2 39 4E
-39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
-19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
-96 D2 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 1D 92 53 C4 1D B0 12 2A C2
-80 C6 AA C7 40 C4 04 D3 FA D2 21 53 3E 90 10 00
-7D 2D E1 2B 06 D3 B2 41 C4 1D DD 3F 87 12 42 C9
-74 C6 14 D3 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E
-3E 4F 7A 90 23 00 27 20 92 53 C4 1D B0 12 96 D2
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
-92 53 C4 1D B0 12 96 D2 ED 3F 7A 90 40 00 16 20
-3C 40 20 00 92 53 C4 1D B0 12 E2 D2 0C 20 3C 50
-10 00 3E 40 2B 00 B0 12 E2 D2 92 92 C0 1D C4 1D
-02 24 92 53 C4 1D 8E 10 0C 5E DA 3F B0 12 E2 D2
-FA 23 3C 50 10 00 B0 12 CA D2 EF 3F 0C 43 1B 42
-C6 1D A2 53 C6 1D 87 12 42 C9 74 C6 DE D3 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F
-B0 12 E2 D2 E1 23 3C 50 80 00 B0 12 CA D2 DC 3F
-D6 C4 04 52 45 54 49 00 87 12 14 C6 00 13 B0 C8
-2A C2 14 C6 2C 00 0C D3 D6 D3 1C D4 09 4B 2E 4E
-0E DC A4 3F FC CC 03 4D 4F 56 84 12 12 D4 00 40
-26 D4 05 4D 4F 56 2E 42 84 12 12 D4 40 40 00 00
-03 41 44 44 84 12 12 D4 00 50 40 D4 05 41 44 44
-2E 42 84 12 12 D4 40 50 4C D4 04 41 44 44 43 00
-84 12 12 D4 00 60 5A D4 06 41 44 44 43 2E 42 00
-84 12 12 D4 40 60 02 D4 04 53 55 42 43 00 84 12
-12 D4 00 70 78 D4 06 53 55 42 43 2E 42 00 84 12
-12 D4 40 70 86 D4 03 53 55 42 84 12 12 D4 00 80
-96 D4 05 53 55 42 2E 42 84 12 12 D4 40 80 DE CC
-03 43 4D 50 84 12 12 D4 00 90 B0 D4 05 43 4D 50
-2E 42 84 12 12 D4 40 90 CC CC 04 44 41 44 44 00
-84 12 12 D4 00 A0 CA D4 06 44 41 44 44 2E 42 00
-84 12 12 D4 40 A0 BC D4 03 42 49 54 84 12 12 D4
-00 B0 E8 D4 05 42 49 54 2E 42 84 12 12 D4 40 B0
-F4 D4 03 42 49 43 84 12 12 D4 00 C0 02 D5 05 42
-49 43 2E 42 84 12 12 D4 40 C0 0E D5 03 42 49 53
-84 12 12 D4 00 D0 1C D5 05 42 49 53 2E 42 84 12
-12 D4 40 D0 00 00 03 58 4F 52 84 12 12 D4 00 E0
-36 D5 05 58 4F 52 2E 42 84 12 12 D4 40 E0 68 D4
-03 41 4E 44 84 12 12 D4 00 F0 50 D5 05 41 4E 44
-2E 42 84 12 12 D4 40 F0 42 C9 0C D3 6E D5 0A 4C
-3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F A2 D4
-03 52 52 43 84 12 68 D5 00 10 80 D5 05 52 52 43
-2E 42 84 12 68 D5 40 10 8C D5 04 53 57 50 42 00
-84 12 68 D5 80 10 9A D5 03 52 52 41 84 12 68 D5
-00 11 A8 D5 05 52 52 41 2E 42 84 12 68 D5 40 11
-B4 D5 03 53 58 54 84 12 68 D5 80 11 00 00 04 50
-55 53 48 00 84 12 68 D5 00 12 CE D5 06 50 55 53
-48 2E 42 00 84 12 68 D5 40 12 28 D5 04 43 41 4C
-4C 00 84 12 68 D5 80 12 1A 53 0E 4A 87 12 34 C4
-1E C6 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
-4C CA 42 C9 74 C6 18 D6 92 53 C4 1D 3E 40 2C 00
-B0 12 2A C2 80 C6 AA C7 40 C4 CE CA CC D3 30 D6
-0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C
-59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E
-94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F C2 D5 04 52
-52 43 4D 00 84 12 12 D6 50 00 5E D6 04 52 52 41
-4D 00 84 12 12 D6 50 01 6C D6 04 52 4C 41 4D 00
-84 12 12 D6 50 02 7A D6 04 52 52 55 4D 00 84 12
-12 D6 50 03 DC D5 05 50 55 53 48 4D 84 12 12 D6
-00 15 96 D6 04 50 4F 50 4D 00 84 12 12 D6 00 17
-88 D6 03 53 3E 3D 85 12 00 38 B2 D6 02 53 3C 00
-85 12 00 34 A4 D6 03 30 3E 3D 85 12 00 30 C6 D6
-02 30 3C 00 85 12 00 30 00 00 02 55 3C 00 85 12
-00 2C DA D6 03 55 3E 3D 85 12 00 28 D0 D6 03 30
-3C 3E 85 12 00 24 EE D6 02 30 3D 00 85 12 00 20
-00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00 A2 53
-C6 1D 0E 4A 30 4D E4 D6 04 54 48 45 4E 00 1A 42
-C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 63 2F 88 DA 00 00 30 4D D8 D4 04 45 4C 53
-45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53 C6 1D
-2F 83 8F 4A 00 00 E3 3F 18 D7 05 55 4E 54 49 4C
-3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11
-3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00
-A2 53 C6 1D 30 4D 5C D5 05 41 47 41 49 4E 0A 4E
-38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12
-06 D7 76 C2 2A C2 BC D6 06 52 45 50 45 41 54 00
-87 12 8E D7 1E D7 2A C2 BA D7 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D 00 00 30 4D
-EC D5 03 42 57 31 84 12 B8 D7 00 00 D2 D7 03 42
-57 32 84 12 B8 D7 00 00 DE D7 03 42 57 33 84 12
-B8 D7 00 00 F6 D7 3D 41 1A 42 C6 1D 28 4E B2 92
-C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 84 12 F4 D7 00 00
-16 D8 03 46 57 32 84 12 F4 D7 00 00 22 D8 03 46
-57 33 84 12 F4 D7 00 00 00 00 05 3F 47 4F 54 4F
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 87 12 C0 CA DA C8 2A C2 2E D8 04 47
-4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 C8 DC C8 B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E C4 D4 C2
+70 C8 C4 C3 74 C8 8C C4 BC C4 2E C2 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E C9 24 C2 40 FF
+2A CC C4 C4 2E C2 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E C9 48 C2 0C C9 0A C8 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A C9 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C5 24 C2 6E C9 F8 C7 26 C5 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CD B0 12
+06 C3 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 CD 24 C2 DE 1D 02 C3 D6 C3 2E C2 04 1B 5B 37
+6D 00 00 C4 7C C4 4C C2 C8 C9 2E C4 2E C2 05 6C
+69 6E 65 3A 00 C4 66 C5 00 C4 2E C2 04 1B 5B 30
+6D 00 00 C4 50 C9 00 00 83 5B 27 5D 0D 12 87 12
+F0 C9 24 C2 24 C2 F8 C7 F8 C7 26 C5 44 C6 01 27
+0D 12 87 12 70 C8 F2 C5 4A C6 4C C2 00 CA 26 C5
+AA C8 D2 C4 81 5C 92 42 C0 1D C4 1D 30 4D D8 C9
+81 5B 82 43 BE 1D 30 4D 04 CA 01 5D B2 43 BE 1D
+30 4D F2 C8 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 C8 F2 C5 4A C6 7C C4 4C C2 00 CA BC C4
+4C C2 50 CA 24 C2 24 C2 F8 C7 F8 C7 24 C2 F8 C7
+F8 C7 26 C5 40 C5 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 CA 01 3A
+30 12 B8 CA 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 C8 F2 C5 86 CA 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E CA 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CA 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C2
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A C9 CC CA 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 C2 26 C5 F8 C7 F2 CA 12 CA 26 C5 5C C8 06 43
+52 45 41 54 45 00 B0 12 74 CA BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 C8 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CB 04 43 4F 44 45 00 B0 12 74 CA A2 82 C6 1D
+0D 12 87 12 8A CC 64 CC 26 C5 72 CB 07 43 4F 44
+45 4E 4E 4D 30 12 7C CB 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CA A4 CC 26 C5 58 C9
+03 41 53 4D B2 40 68 CC DA 1D DE 3F 9C CB 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CB C2 CC 26 C5
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 CC 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 CA 85 48 49 32 4C 4F 0D 12
+87 12 2A CC 1E CC F8 C7 12 CA 80 CB 26 C5 2E 53
+30 4D 8C CB 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 C2 CA 1D AE C4 26 C5 84 12
+36 CC B0 CB 5A CE 58 CB EE C9 08 CC 42 C4 20 C8
+D8 C5 34 CD 4E CD 62 C5 CE CD 00 00 EE CF 1A CA
+AA C6 00 00 84 12 36 CC 20 D5 86 D5 D4 D4 D6 D5
+9A D4 00 00 CA D1 00 00 90 D4 42 D5 F2 D4 30 D5
+DA D2 00 00 00 00 F2 D5 62 CC 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E CC BC CC C2 CC
+D2 CC 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CA 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CC 88 CC 0E D6 A6 C5 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CD 92 42 0C 18 16 CD
+EF 3F 06 CD 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 CD 92 42 C6 1D 16 CD 30 4D 1A CD 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC C5 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C2 02 C2
+B2 40 D8 CD D6 CD B2 40 88 CC 0E 18 B2 40 0E D6
+0C 18 30 12 24 CD B2 40 C8 C3 C6 C3 B2 40 32 C4
+30 C4 B2 40 4A C4 48 C4 B2 40 18 00 0A 18 37 40
+26 C5 36 40 9C C4 35 40 FA C2 34 40 EC C2 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 CD 04 57
+41 52 4D 00 30 40 D8 CD 3D 40 10 CE 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E C2 07 0D 0A 1B 5B 37 6D 23 00 C4 9C C5 2E C2
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 C4 24 C2 40 FF
+2A CC A6 C4 66 C5 2E C2 0A 62 79 74 65 73 20 66
+72 65 65 00 48 C2 C8 C9 24 CC 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+92 D3 30 01 B2 40 88 5A 5C 01 B2 43 06 02 B2 40
+EF 7F 02 02 E2 D2 05 02 B2 43 26 02 B2 D0 08 FF
+22 02 F2 D3 26 03 F2 40 F0 00 22 03 F2 40 A5 00
+61 01 B2 40 86 00 62 01 82 43 66 01 39 40 80 01
+B2 40 33 00 64 01 D2 43 61 01 92 D2 9E 01 08 18
+38 40 59 14 18 83 FE 23 19 83 FA 23 B2 D2 B0 01
+92 C3 B0 01 F2 D0 10 00 2A 03 F2 C0 40 00 A1 04
+39 40 00 04 29 83 89 43 00 1C FC 23 B0 12 0E C2
+B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42 04 18
+C8 05 92 C3 C0 05 3F 40 80 1C 30 12 D4 CD 4C 3F
+24 CB 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 12 CF
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 C2 00 00
+AA C4 70 C8 F2 C5 62 C8 68 C4 4C C2 AA CF 70 C4
+2E C2 06 5B 54 48 45 4E 5D 00 1C CF 84 CF 40 CF
+62 CF 26 C5 70 C4 2E C2 06 5B 45 4C 53 45 5D 00
+1C CF 9A CF 40 CF 60 CF 26 C5 2E C2 04 5B 49 46
+5D 00 1C CF 62 CF 48 C2 60 CF 22 C4 2E C2 05 0D
+0A 6B 6F 20 00 C4 D4 C2 C4 C2 48 C2 62 CF 50 CF
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D C0 CF 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 C8 F2 C5 4A C6 CE CF 26 C5 D4 CF 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 DE CF
+02 D0 3D 41 30 40 B6 C4 38 40 C0 1D 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 1D 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 1D 30 4D 1C 15 87 12
+F2 C5 4A C6 42 C2 40 D0 06 C7 4C C2 00 CA 5A D0
+42 D0 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 2C D0 19 42 C6 1D A2 53 C6 1D 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D
+87 12 F2 C5 06 C7 4C C2 96 D0 8C D0 21 53 3E 90
+10 00 80 2D E2 2B 98 D0 B2 41 C4 1D DE 3F 0D 12
+87 12 70 C8 08 D0 A8 D0 0C 43 1B 42 C6 1D A2 53
+C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 1D
+B0 12 2C D0 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 1D B0 12 2C D0 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 76 D0
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 76 D0 92 92
+C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E DA 3F
+B0 12 76 D0 FA 23 3C 50 10 00 B0 12 5E D0 EF 3F
+0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 70 C8
+08 D0 74 D1 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 76 D0 E0 23 3C 50 80 00
+B0 12 5E D0 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 C2 00 13 F8 C7 26 C5 24 C2 2C 00 9E D0
+6A D1 B4 D1 09 4B 2E 4E 0E DC A2 3F F6 CB 03 4D
+4F 56 84 12 AA D1 00 40 BE D1 05 4D 4F 56 2E 42
+84 12 AA D1 40 40 00 00 03 41 44 44 84 12 AA D1
+00 50 D8 D1 05 41 44 44 2E 42 84 12 AA D1 40 50
+E4 D1 04 41 44 44 43 00 84 12 AA D1 00 60 F2 D1
+06 41 44 44 43 2E 42 00 84 12 AA D1 40 60 98 D1
+04 53 55 42 43 00 84 12 AA D1 00 70 10 D2 06 53
+55 42 43 2E 42 00 84 12 AA D1 40 70 1E D2 03 53
+55 42 84 12 AA D1 00 80 2E D2 05 53 55 42 2E 42
+84 12 AA D1 40 80 D2 CB 03 43 4D 50 84 12 AA D1
+00 90 48 D2 05 43 4D 50 2E 42 84 12 AA D1 40 90
+BE CB 04 44 41 44 44 00 84 12 AA D1 00 A0 62 D2
+06 44 41 44 44 2E 42 00 84 12 AA D1 40 A0 54 D2
+03 42 49 54 84 12 AA D1 00 B0 80 D2 05 42 49 54
+2E 42 84 12 AA D1 40 B0 8C D2 03 42 49 43 84 12
+AA D1 00 C0 9A D2 05 42 49 43 2E 42 84 12 AA D1
+40 C0 A6 D2 03 42 49 53 84 12 AA D1 00 D0 B4 D2
+05 42 49 53 2E 42 84 12 AA D1 40 D0 00 00 03 58
+4F 52 84 12 AA D1 00 E0 CE D2 05 58 4F 52 2E 42
+84 12 AA D1 40 E0 00 D2 03 41 4E 44 84 12 AA D1
+00 F0 E8 D2 05 41 4E 44 2E 42 84 12 AA D1 40 F0
+70 C8 9E D0 06 D3 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 3A D2 03 52 52 43 84 12 00 D3
+00 10 18 D3 05 52 52 43 2E 42 84 12 00 D3 40 10
+24 D3 04 53 57 50 42 00 84 12 00 D3 80 10 32 D3
+03 52 52 41 84 12 00 D3 00 11 40 D3 05 52 52 41
+2E 42 84 12 00 D3 40 11 4C D3 03 53 58 54 84 12
+00 D3 80 11 00 00 04 50 55 53 48 00 84 12 00 D3
+00 12 66 D3 06 50 55 53 48 2E 42 00 84 12 00 D3
+40 12 C0 D2 04 43 41 4C 4C 00 84 12 00 D3 80 12
+1A 53 0E 4A 0D 12 87 12 9C C5 2E C2 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A C9 70 C8 08 D0
+B2 D3 92 53 C4 1D 3E 40 2C 00 87 12 F2 C5 06 C7
+4C C2 00 CA 60 D1 C8 D3 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 5A D3 04 52 52 43 4D 00 84 12 AC D3
+50 00 F6 D3 04 52 52 41 4D 00 84 12 AC D3 50 01
+04 D4 04 52 4C 41 4D 00 84 12 AC D3 50 02 12 D4
+04 52 52 55 4D 00 84 12 AC D3 50 03 74 D3 05 50
+55 53 48 4D 84 12 AC D3 00 15 2E D4 04 50 4F 50
+4D 00 84 12 AC D3 00 17 20 D4 03 53 3E 3D 85 12
+00 38 4A D4 02 53 3C 00 85 12 00 34 3C D4 03 30
+3E 3D 85 12 00 30 5E D4 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 72 D4 03 55 3E 3D
+85 12 00 28 68 D4 03 30 3C 3E 85 12 00 24 86 D4
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 7C D4
+04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 70 D2 04 45 4C 53 45 00 1A 42 C6 1D BA 40
+00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
+B0 D4 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D F4 D2
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 9E D4 82 C4 26 C5
+54 D4 06 52 45 50 45 41 54 00 0D 12 87 12 26 D5
+B6 D4 26 C5 56 D5 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 1D CB 2F 98 42 C6 1D 00 00 30 4D 84 D3 03 42
+57 31 84 12 54 D5 00 00 6E D5 03 42 57 32 84 12
+54 D5 00 00 7A D5 03 42 57 33 84 12 54 D5 00 00
+92 D5 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B
+BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 90 D5 00 00 B2 D5 03 46
+57 32 84 12 90 D5 00 00 BE D5 03 46 57 33 84 12
+90 D5 00 00 CA D5 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 C9 18 C8 26 C5
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C D0
+6C CE
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 6A D8 D0 CE
-2D 01 6B B0 B6 C4 C8 C4
+10 00 04 00 51 55 40 1F 05 00 18 00 08 D6 88 CC
+2E 01 6B B0 06 C3 18 C3 D4 CD
@C200
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 C2
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 C2
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E C2
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 C2 02 3E 52 00 0E 12 3E 4F 30 4D 70 C2 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 C2 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 C2 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 C2
-01 21 BE 4F 00 00 3E 4F 30 4D CC C2 02 30 3D 00
-1E 83 0E 7E 30 4D FC C2 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 C3 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 C2 B0 12 06 C3 12 D2 0A 18 F9 3F 39 40
+32 00 29 83 B9 40 6C CE CE FF FB 23 B2 40 68 C3
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 C2 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 C3 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 C3 02 23 53 00 87 12 88 C3 C0 C3
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 C3
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E C2 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 C3 34 C2 86 C2 D4 C2 BA C3
-92 C2 F8 C3 D4 C3 D6 C5 42 C9 82 C5 2A C2 22 C3
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 C3 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 C4 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 C4 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 C4 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 03 02 30 41 B2 40 13 00 CE 05 E2 D2
-03 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 C4
-B0 12 B6 C4 12 D2 0A 18 F9 3F F0 C2 06 41 43 43
-45 50 54 00 3C 40 64 C5 3B 40 2E C5 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 C5
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A C5 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E C2 04 45 4D 49
-54 00 30 40 86 C5 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C C5 04 45 43 48 4F 00 B2 40 82 48
-52 C5 82 43 DE 1D 30 4D 32 C4 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 C5 92 43 DE 1D 30 4D 20 C4
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC C5
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE C5 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 C3
-02 43 52 00 30 40 08 C6 87 12 1E C6 02 0D 0A 00
-D6 C5 2A C2 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 C3 82 53 22 00 82 43 B4 1D 87 12 14 C6
-1E C6 B0 C8 14 C6 22 00 80 C6 4C C6 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA C5 82 2E 22 00 87 12 38 C6 14 C6 D6 C5
-B0 C8 2A C2 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E C2 34 40 00 C2 30 4D 82 C2 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 C7 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 C7 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E C3 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E C4 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 C2 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC C4 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 C5 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE C8 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 C6 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 C6 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 C9 42 C9 80 C6 50 C9
-3D 40 58 C9 CC 22 82 3E 5A C9 0A 4E 3E 4F 3D 40
-70 C9 23 27 3D 40 4A C9 1A E2 BE 1D A1 27 B5 23
-72 C9 3E 4F 3D 40 4A C9 B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 CC CB 3F D2 C8
+12 D3 F5 3F 34 40 EC C2 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 03 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 03 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 C3 3B 40 70 C3 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A C3
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 C2 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C C3 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 C3 08 4E 3E 4F E0 3F BE C3
+04 45 43 48 4F 00 B2 40 82 48 94 C3 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 C3 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 C4 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 C4 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 C4 0D 12 87 12 2E C2 02 0D 0A 00 00 C4 26 C5
+00 00 03 4B 45 59 30 40 4A C4 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 C3 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 C3 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A C4
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 C2 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 C4
+02 23 53 00 0D 12 87 12 E2 C4 1C C5 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 C5 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA C3 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 C4 14 C5 9C C4 54 C5 30 C5
+00 C4 70 C8 C4 C3 26 C5 E4 C3 01 2E 0E 93 E3 37
+38 43 E2 3F 4E C5 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 C2 2E C2 F8 C7 24 C2 22 00 F2 C5 C0 C5
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A C5 82 2E 22 00 0D 12 87 12
+AA C5 24 C2 00 C4 F8 C7 26 C5 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA C2 34 40 EC C2 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 C7 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 C7 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E C2
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C C3 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 C7
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 C2 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C C5 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 C2 70 C8 F2 C5 80 C8
+3D 40 88 C8 E2 22 A4 26 8A C8 0A 4E 3E 4F 3D 40
+A0 C8 39 27 3D 40 7A C8 1A E2 BE 1D BD 23 AC 27
+A2 C8 3E 4F 3D 40 7A C8 BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 CB D2 3F D0 C3
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A C2 46 C9 AE C9 B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 C3 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A C2
-04 C6 8C C5 42 C9 82 C5 46 C9 A4 C2 0C C3 1E C6
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 CA
-14 C6 30 FF A0 C8 26 C3 1E C6 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 CA 3C C4 E0 C9 C2 C8 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E CA 86 41 42 4F
-52 54 22 00 87 12 38 C6 14 C6 40 CA B0 C8 2A C2
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 CF
-B0 12 B6 C4 92 C3 DC 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 CF 14 C6 DE 1D EA C2 AC C5 1E C6 04 1B 5B 37
-6D 00 D6 C5 58 C2 40 C4 9A CA 04 C6 1E C6 05 6C
-69 6E 65 3A D6 C5 D0 C2 24 C4 D6 C5 1E C6 04 1B
-5B 30 6D 00 D6 C5 24 CA 00 00 83 5B 27 5D 87 12
-C0 CA 14 C6 14 C6 B0 C8 B0 C8 2A C2 E8 C6 01 27
-87 12 42 C9 80 C6 EE C6 40 C4 CE CA 2A C2 7A C9
-32 C3 81 5C 92 42 C0 1D C4 1D 30 4D AA CA 81 5B
-82 43 BE 1D 30 4D D2 CA 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A C8 82 49 53 00 87 12
-BE C9 EA C2 40 C4 12 CB AE CA 14 C6 F0 CA B0 C8
-2A C2 C0 CA F0 CA 2A C2 FA CA 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 C9 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 C9
-80 C6 EE C6 58 C2 40 C4 CE CA 0C C3 40 C4 5C CB
-14 C6 14 C6 B0 C8 B0 C8 14 C6 B0 C8 B0 C8 2A C2
-DE CA 81 3B 82 93 BE 1D B5 27 87 12 14 C6 2A C2
-B0 C8 FA CB E0 CA 2A C2 62 CB 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 CB 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A CB 01 3A 30 12 A0 CB 92 B3 C6 1D A2 63 C6 1D
-87 12 42 C9 80 C6 C8 CB 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E C6 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C CA 90 C9 05 44 45 46 45 52
-B0 12 B8 CB BA 40 30 40 FC FF BA 40 AE CB FE FF
-E3 3F 1E C9 06 43 52 45 41 54 45 00 B0 12 B8 CB
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A CC 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E C7 05 3E 42 4F 44 59 2E 52
-30 4D 44 CC 04 43 4F 44 45 00 B0 12 B8 CB A2 82
-C6 1D 87 12 D2 CE AC CE 2A C2 84 CC 07 43 4F 44
-45 4E 4E 4D B0 12 86 CB F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 CE FA CB 2A C2 2C CA 03 41
-53 4D B2 40 B0 CE DA 1D E0 3F AC CC 06 45 4E 44
-41 53 4D 00 87 12 B4 CC F4 CE 2A C2 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 CE 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A C2
-02 00 A2 52 C6 1D ED 3F 1A CB 85 48 49 32 4C 4F
-87 12 A0 C8 4A CD B0 C8 E0 CA D2 CE AC CE 2A C2
-1A CD 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 C4 00 00 2E 53 30 4D 5E CC
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C C4 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 C5
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C CC 85 42 45 47 49 4E 30 40 A0 C8 70 CD 85 55
-4E 54 49 4C 39 40 40 C4 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE CC 85 41
-47 41 49 4E 39 40 3C C4 EF 3F 7A C6 85 57 48 49
-4C 45 87 12 36 CD 76 C2 2A C2 34 C6 86 52 45 50
-45 41 54 00 87 12 B4 CD 76 CD 2A C2 50 CD 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 C4 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 C8 84 4C 4F 4F 50 00 39 40 76 C4
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 C4 85 2B 4C 4F 4F 50
-39 40 64 C4 E5 3F 06 CE 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 C6
-CA 1D F2 C2 2A C2 84 12 7E CE AE CD 50 D1 DE CD
-BE CA 32 CD 3A CE 64 D2 64 C6 66 CF 80 CF 8E CD
-00 D0 00 00 36 D2 E8 CA 78 CC 00 00 84 12 7E CE
-82 D7 E4 D7 36 D7 58 D8 FC D6 00 00 2C D4 00 00
-F2 D6 A2 D7 54 D7 92 D7 3C D5 00 00 00 00 34 D8
-AA CE 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 CE EE CE
-F4 CE 04 CF 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 CB 09 50 57 52 5F 53 54 41
-54 45 84 12 FC CE D0 CE 6A D8 CC CD 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 CF 92 42 0C 18
-48 CF EF 3F 38 CF 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 CF 92 42 C6 1D 48 CF 30 4D 4C CF
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC CD 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 C4
-DE C4 B2 40 0A D0 08 D0 B2 40 D0 CE 0E 18 B2 40
-6A D8 0C 18 30 12 56 CF B2 40 86 C5 84 C5 B2 40
-08 C6 06 C6 B2 40 98 C4 96 C4 B2 40 18 00 0A 18
-37 40 1A C2 36 40 92 C2 35 40 0E C2 34 40 00 C2
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A CF
-04 57 41 52 4D 00 30 40 0A D0 3D 40 3E D0 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E C6
-06 0D 1B 5B 37 6D 23 00 D6 C5 34 C4 1E C6 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 C5 14 C6 30 FF A0 C8
-B8 C2 24 C4 1E C6 0A 62 79 74 65 73 20 66 72 65
-65 00 3C C4 9A CA 82 CD 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E D0 92 D3 30 01
-B2 40 88 5A 5C 01 B2 43 06 02 B2 40 EF 7F 02 02
-E2 D2 05 02 B2 43 26 02 B2 D0 08 FF 22 02 F2 D3
-26 03 F2 40 F0 00 22 03 F2 40 A5 00 61 01 82 43
-66 01 39 40 80 00 B2 40 33 00 64 01 D2 43 61 01
-92 D2 9E 01 08 18 38 40 59 14 18 83 FE 23 19 83
-FA 23 B2 D2 B0 01 92 C3 B0 01 F2 D0 10 00 2A 03
-F2 C0 40 00 A1 04 39 40 00 04 29 83 89 43 00 1C
-FC 23 39 40 32 00 29 83 B9 40 9C D0 CE FF FB 23
-B2 40 26 C5 F0 FF B2 40 81 00 C0 05 92 42 02 18
-C6 05 92 42 04 18 C8 05 92 C3 C0 05 92 D3 DA 05
-3F 40 80 1C 31 40 E0 1C 30 12 06 D0 46 3F 88 D0
-07 43 4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F 39 4F
-0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83 07 30 19 53
-F9 98 FF FF F5 27 02 2C 3E 43 30 4D 1E 43 30 4D
-B2 CB 86 5B 54 48 45 4E 5D 00 30 4D 82 D1 86 5B
-45 4C 53 45 5D 00 87 12 14 C6 00 00 C6 C2 42 C9
-80 C6 24 C9 34 C2 40 C4 F8 D1 44 C2 1E C6 06 5B
-54 48 45 4E 5D 00 58 D1 4A C4 C8 D1 F8 C5 D0 C2
-58 C2 4A C4 9E D1 2A C2 44 C2 1E C6 06 5B 45 4C
-53 45 5D 00 58 D1 4A C4 E6 D1 F8 C5 D0 C2 58 C2
-4A C4 9C D1 2A C2 1E C6 04 5B 49 46 5D 00 58 D1
-4A C4 9E D1 3C C4 9C D1 F8 C5 1E C6 05 0D 0A 6B
-6F 20 D6 C5 8C C5 32 C9 3C C4 9E D1 8E D1 84 5B
-49 46 5D 00 0E 93 3E 4F BE 27 30 4D 0E D2 89 5B
-44 45 46 49 4E 45 44 5D 87 12 42 C9 80 C6 EE C6
-6A C2 2A C2 1E D2 8B 5B 55 4E 44 45 46 49 4E 45
-44 5D 87 12 42 C9 80 C6 EE C6 6A C2 00 C3 2A C2
-52 D2 3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40
-56 CF 48 CE 06 4D 41 52 4B 45 52 00 B0 12 B8 CB
-BA 40 84 12 FC FF BA 40 50 D2 FE FF 9A 42 C8 1D
-00 00 28 83 8A 48 02 00 A2 52 C6 1D 30 40 00 CC
-1C 15 B0 12 2A C2 80 C6 EE C6 4A C4 A6 D2 AA C7
-40 C4 CE CA C0 D2 A8 D2 39 4E 39 80 86 12 08 24
-19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
-1B 17 30 41 3E 40 28 00 B0 12 90 D2 19 42 C6 1D
-A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15 12 12
-C4 1D 92 53 C4 1D B0 12 2A C2 80 C6 AA C7 40 C4
-FE D2 F4 D2 21 53 3E 90 10 00 7D 2D E1 2B 00 D3
-B2 41 C4 1D DD 3F 87 12 42 C9 74 C6 0E D3 0C 43
-1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00
-27 20 92 53 C4 1D B0 12 90 D2 3C 40 00 03 0E 93
-1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
-14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
-0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
-C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D
-7A 90 26 00 07 20 3C 40 10 02 92 53 C4 1D B0 12
-90 D2 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
-C4 1D B0 12 DC D2 0C 20 3C 50 10 00 3E 40 2B 00
-B0 12 DC D2 92 92 C0 1D C4 1D 02 24 92 53 C4 1D
-8E 10 0C 5E DA 3F B0 12 DC D2 FA 23 3C 50 10 00
-B0 12 C4 D2 EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D
-87 12 42 C9 74 C6 D8 D3 FE 90 26 00 00 00 3E 40
-20 00 03 20 3C 50 82 00 C8 3F B0 12 DC D2 E1 23
-3C 50 80 00 B0 12 C4 D2 DC 3F D6 C4 04 52 45 54
-49 00 87 12 14 C6 00 13 B0 C8 2A C2 14 C6 2C 00
-06 D3 D0 D3 16 D4 09 4B 2E 4E 0E DC A4 3F FC CC
-03 4D 4F 56 84 12 0C D4 00 40 20 D4 05 4D 4F 56
-2E 42 84 12 0C D4 40 40 00 00 03 41 44 44 84 12
-0C D4 00 50 3A D4 05 41 44 44 2E 42 84 12 0C D4
-40 50 46 D4 04 41 44 44 43 00 84 12 0C D4 00 60
-54 D4 06 41 44 44 43 2E 42 00 84 12 0C D4 40 60
-FC D3 04 53 55 42 43 00 84 12 0C D4 00 70 72 D4
-06 53 55 42 43 2E 42 00 84 12 0C D4 40 70 80 D4
-03 53 55 42 84 12 0C D4 00 80 90 D4 05 53 55 42
-2E 42 84 12 0C D4 40 80 DE CC 03 43 4D 50 84 12
-0C D4 00 90 AA D4 05 43 4D 50 2E 42 84 12 0C D4
-40 90 CC CC 04 44 41 44 44 00 84 12 0C D4 00 A0
-C4 D4 06 44 41 44 44 2E 42 00 84 12 0C D4 40 A0
-B6 D4 03 42 49 54 84 12 0C D4 00 B0 E2 D4 05 42
-49 54 2E 42 84 12 0C D4 40 B0 EE D4 03 42 49 43
-84 12 0C D4 00 C0 FC D4 05 42 49 43 2E 42 84 12
-0C D4 40 C0 08 D5 03 42 49 53 84 12 0C D4 00 D0
-16 D5 05 42 49 53 2E 42 84 12 0C D4 40 D0 00 00
-03 58 4F 52 84 12 0C D4 00 E0 30 D5 05 58 4F 52
-2E 42 84 12 0C D4 40 E0 62 D4 03 41 4E 44 84 12
-0C D4 00 F0 4A D5 05 41 4E 44 2E 42 84 12 0C D4
-40 F0 42 C9 06 D3 68 D5 0A 4C 3C F0 70 00 8A 10
-3A F0 0F 00 0C DA 4F 3F 9C D4 03 52 52 43 84 12
-62 D5 00 10 7A D5 05 52 52 43 2E 42 84 12 62 D5
-40 10 86 D5 04 53 57 50 42 00 84 12 62 D5 80 10
-94 D5 03 52 52 41 84 12 62 D5 00 11 A2 D5 05 52
-52 41 2E 42 84 12 62 D5 40 11 AE D5 03 53 58 54
-84 12 62 D5 80 11 00 00 04 50 55 53 48 00 84 12
-62 D5 00 12 C8 D5 06 50 55 53 48 2E 42 00 84 12
-62 D5 40 12 22 D5 04 43 41 4C 4C 00 84 12 62 D5
-80 12 1A 53 0E 4A 87 12 34 C4 1E C6 0D 6F 75 74
-20 6F 66 20 62 6F 75 6E 64 73 4C CA 42 C9 74 C6
-12 D6 92 53 C4 1D 3E 40 2C 00 B0 12 2A C2 80 C6
-AA C7 40 C4 CE CA C6 D3 2A D6 0A 4E 3E 4F 1A 83
-E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A
-08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F
-8A 10 5A 06 8F 3F BC D5 04 52 52 43 4D 00 84 12
-0C D6 50 00 58 D6 04 52 52 41 4D 00 84 12 0C D6
-50 01 66 D6 04 52 4C 41 4D 00 84 12 0C D6 50 02
-74 D6 04 52 52 55 4D 00 84 12 0C D6 50 03 D6 D5
-05 50 55 53 48 4D 84 12 0C D6 00 15 90 D6 04 50
-4F 50 4D 00 84 12 0C D6 00 17 82 D6 03 53 3E 3D
-85 12 00 38 AC D6 02 53 3C 00 85 12 00 34 9E D6
-03 30 3E 3D 85 12 00 30 C0 D6 02 30 3C 00 85 12
-00 30 00 00 02 55 3C 00 85 12 00 2C D4 D6 03 55
-3E 3D 85 12 00 28 CA D6 03 30 3C 3E 85 12 00 24
-E8 D6 02 30 3D 00 85 12 00 20 00 00 02 49 46 00
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D
-DE D6 04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F
-09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA
-00 00 30 4D D2 D4 04 45 4C 53 45 00 1A 42 C6 1D
-BA 40 00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00
-E3 3F 12 D7 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F
-19 42 C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B
-3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D
-56 D5 05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F
-00 00 05 57 48 49 4C 45 87 12 00 D7 76 C2 2A C2
-B6 D6 06 52 45 50 45 41 54 00 87 12 88 D7 18 D7
-2A C2 B4 D7 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D
-CD 2F 98 42 C6 1D 00 00 30 4D E6 D5 03 42 57 31
-84 12 B2 D7 00 00 CC D7 03 42 57 32 84 12 B2 D7
-00 00 D8 D7 03 42 57 33 84 12 B2 D7 00 00 F0 D7
-3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 90 2B BA 4F
-00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00
-03 46 57 31 84 12 EE D7 00 00 10 D8 03 46 57 32
-84 12 EE D7 00 00 1C D8 03 46 57 33 84 12 EE D7
-00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24
-3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08 87 12
-C0 CA DA C8 2A C2 28 D8 04 47 4F 54 4F 00 2F 83
-8F 4E 00 00 3E 40 00 3C F2 3F
+3B 49 3A 49 3D 15 87 12 74 C8 DC C8 B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E C4 D4 C2
+70 C8 C4 C3 74 C8 8C C4 BC C4 2E C2 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E C9 24 C2 40 FF
+2A CC C4 C4 2E C2 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E C9 48 C2 0C C9 0A C8 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A C9 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA C5 24 C2 6E C9 F8 C7 26 C5 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 CD B0 12
+06 C3 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 CD 24 C2 DE 1D 02 C3 D6 C3 2E C2 04 1B 5B 37
+6D 00 00 C4 7C C4 4C C2 C8 C9 2E C4 2E C2 05 6C
+69 6E 65 3A 00 C4 66 C5 00 C4 2E C2 04 1B 5B 30
+6D 00 00 C4 50 C9 00 00 83 5B 27 5D 0D 12 87 12
+F0 C9 24 C2 24 C2 F8 C7 F8 C7 26 C5 44 C6 01 27
+0D 12 87 12 70 C8 F2 C5 4A C6 4C C2 00 CA 26 C5
+AA C8 D2 C4 81 5C 92 42 C0 1D C4 1D 30 4D D8 C9
+81 5B 82 43 BE 1D 30 4D 04 CA 01 5D B2 43 BE 1D
+30 4D F2 C8 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 C8 F2 C5 4A C6 7C C4 4C C2 00 CA BC C4
+4C C2 50 CA 24 C2 24 C2 F8 C7 F8 C7 24 C2 F8 C7
+F8 C7 26 C5 40 C5 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 CA 01 3A
+30 12 B8 CA 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 C8 F2 C5 86 CA 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E CA 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 CA 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E C2
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A C9 CC CA 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 C2 26 C5 F8 C7 F2 CA 12 CA 26 C5 5C C8 06 43
+52 45 41 54 45 00 B0 12 74 CA BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 C8 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E CB 04 43 4F 44 45 00 B0 12 74 CA A2 82 C6 1D
+0D 12 87 12 8A CC 64 CC 26 C5 72 CB 07 43 4F 44
+45 4E 4E 4D 30 12 7C CB 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 CA A4 CC 26 C5 58 C9
+03 41 53 4D B2 40 68 CC DA 1D DE 3F 9C CB 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 CB C2 CC 26 C5
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 CC 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 CA 85 48 49 32 4C 4F 0D 12
+87 12 2A CC 1E CC F8 C7 12 CA 80 CB 26 C5 2E 53
+30 4D 8C CB 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 C2 CA 1D AE C4 26 C5 84 12
+36 CC B0 CB 5A CE 58 CB EE C9 08 CC 42 C4 20 C8
+D8 C5 34 CD 4E CD 62 C5 CE CD 00 00 E8 CF 1A CA
+AA C6 00 00 84 12 36 CC 1A D5 80 D5 CE D4 D0 D5
+94 D4 00 00 C4 D1 00 00 8A D4 3C D5 EC D4 2A D5
+D4 D2 00 00 00 00 EC D5 62 CC 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E CC BC CC C2 CC
+D2 CC 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 CA 09 50 57 52 5F 53 54 41 54 45
+84 12 CA CC 88 CC 08 D6 A6 C5 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 CD 92 42 0C 18 16 CD
+EF 3F 06 CD 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 CD 92 42 C6 1D 16 CD 30 4D 1A CD 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC C5 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 C2 02 C2
+B2 40 D8 CD D6 CD B2 40 88 CC 0E 18 B2 40 08 D6
+0C 18 30 12 24 CD B2 40 C8 C3 C6 C3 B2 40 32 C4
+30 C4 B2 40 4A C4 48 C4 B2 40 18 00 0A 18 37 40
+26 C5 36 40 9C C4 35 40 FA C2 34 40 EC C2 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 CD 04 57
+41 52 4D 00 30 40 D8 CD 3D 40 10 CE 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E C2 07 0D 0A 1B 5B 37 6D 23 00 C4 9C C5 2E C2
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 C4 24 C2 40 FF
+2A CC A6 C4 66 C5 2E C2 0A 62 79 74 65 73 20 66
+72 65 65 00 48 C2 C8 C9 24 CC 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+92 D3 30 01 B2 40 88 5A 5C 01 B2 43 06 02 B2 40
+EF 7F 02 02 E2 D2 05 02 B2 43 26 02 B2 D0 08 FF
+22 02 F2 D3 26 03 F2 40 F0 00 22 03 F2 40 A5 00
+61 01 82 43 66 01 39 40 80 00 B2 40 33 00 64 01
+D2 43 61 01 92 D2 9E 01 08 18 38 40 59 14 18 83
+FE 23 19 83 FA 23 B2 D2 B0 01 92 C3 B0 01 F2 D0
+10 00 2A 03 F2 C0 40 00 A1 04 39 40 00 04 29 83
+89 43 00 1C FC 23 B0 12 0E C2 B2 40 81 00 C0 05
+92 42 02 18 C6 05 92 42 04 18 C8 05 92 C3 C0 05
+3F 40 80 1C 30 12 D4 CD 4F 3F 24 CB 86 5B 54 48
+45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
+0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
+FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
+F9 23 2F 53 2D 53 F7 3F 0C CF 86 5B 45 4C 53 45
+5D 00 0D 12 87 12 24 C2 00 00 AA C4 70 C8 F2 C5
+62 C8 68 C4 4C C2 A4 CF 70 C4 2E C2 06 5B 54 48
+45 4E 5D 00 16 CF 7E CF 3A CF 5C CF 26 C5 70 C4
+2E C2 06 5B 45 4C 53 45 5D 00 16 CF 94 CF 3A CF
+5A CF 26 C5 2E C2 04 5B 49 46 5D 00 16 CF 5C CF
+48 C2 5A CF 22 C4 2E C2 05 0D 0A 6B 6F 20 00 C4
+D4 C2 C4 C2 48 C2 5C CF 4A CF 84 5B 49 46 5D 00
+0E 93 3E 4F C6 27 30 4D 2F 53 30 4D BA CF 89 5B
+44 45 46 49 4E 45 44 5D 0D 12 87 12 70 C8 F2 C5
+4A C6 C8 CF 26 C5 CE CF 8B 5B 55 4E 44 45 46 49
+4E 45 44 5D 0D 12 87 12 D8 CF FC CF 3D 41 30 40
+B6 C4 38 40 C0 1D 0A 4E 39 48 2E 48 09 5E 1E 52
+C4 1D 09 9E 03 24 7A 9E FC 27 1E 83 0A 4E 2A 88
+82 4A C4 1D 30 4D 1C 15 87 12 F2 C5 4A C6 42 C2
+3A D0 06 C7 4C C2 00 CA 54 D0 3C D0 39 4E 39 80
+86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
+01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12 26 D0
+19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00
+1C 15 12 12 C4 1D 92 53 C4 1D 87 12 F2 C5 06 C7
+4C C2 90 D0 86 D0 21 53 3E 90 10 00 80 2D E2 2B
+92 D0 B2 41 C4 1D DE 3F 0D 12 87 12 70 C8 02 D0
+A2 D0 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F
+7A 90 23 00 27 20 92 53 C4 1D B0 12 26 D0 3C 40
+00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40
+20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40
+30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40
+30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F
+3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53
+C4 1D B0 12 26 D0 ED 3F 7A 90 40 00 16 20 3C 40
+20 00 92 53 C4 1D B0 12 70 D0 0C 20 3C 50 10 00
+3E 40 2B 00 B0 12 70 D0 92 92 C0 1D C4 1D 02 24
+92 53 C4 1D 8E 10 0C 5E DA 3F B0 12 70 D0 FA 23
+3C 50 10 00 B0 12 58 D0 EF 3F 0C 43 1B 42 C6 1D
+A2 53 C6 1D 0D 12 87 12 70 C8 02 D0 6E D1 FE 90
+26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C7 3F
+B0 12 70 D0 E0 23 3C 50 80 00 B0 12 58 D0 DB 3F
+00 00 04 52 45 54 49 00 0D 12 87 12 24 C2 00 13
+F8 C7 26 C5 24 C2 2C 00 98 D0 64 D1 AE D1 09 4B
+2E 4E 0E DC A2 3F F6 CB 03 4D 4F 56 84 12 A4 D1
+00 40 B8 D1 05 4D 4F 56 2E 42 84 12 A4 D1 40 40
+00 00 03 41 44 44 84 12 A4 D1 00 50 D2 D1 05 41
+44 44 2E 42 84 12 A4 D1 40 50 DE D1 04 41 44 44
+43 00 84 12 A4 D1 00 60 EC D1 06 41 44 44 43 2E
+42 00 84 12 A4 D1 40 60 92 D1 04 53 55 42 43 00
+84 12 A4 D1 00 70 0A D2 06 53 55 42 43 2E 42 00
+84 12 A4 D1 40 70 18 D2 03 53 55 42 84 12 A4 D1
+00 80 28 D2 05 53 55 42 2E 42 84 12 A4 D1 40 80
+D2 CB 03 43 4D 50 84 12 A4 D1 00 90 42 D2 05 43
+4D 50 2E 42 84 12 A4 D1 40 90 BE CB 04 44 41 44
+44 00 84 12 A4 D1 00 A0 5C D2 06 44 41 44 44 2E
+42 00 84 12 A4 D1 40 A0 4E D2 03 42 49 54 84 12
+A4 D1 00 B0 7A D2 05 42 49 54 2E 42 84 12 A4 D1
+40 B0 86 D2 03 42 49 43 84 12 A4 D1 00 C0 94 D2
+05 42 49 43 2E 42 84 12 A4 D1 40 C0 A0 D2 03 42
+49 53 84 12 A4 D1 00 D0 AE D2 05 42 49 53 2E 42
+84 12 A4 D1 40 D0 00 00 03 58 4F 52 84 12 A4 D1
+00 E0 C8 D2 05 58 4F 52 2E 42 84 12 A4 D1 40 E0
+FA D1 03 41 4E 44 84 12 A4 D1 00 F0 E2 D2 05 41
+4E 44 2E 42 84 12 A4 D1 40 F0 70 C8 98 D0 00 D3
+0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F
+34 D2 03 52 52 43 84 12 FA D2 00 10 12 D3 05 52
+52 43 2E 42 84 12 FA D2 40 10 1E D3 04 53 57 50
+42 00 84 12 FA D2 80 10 2C D3 03 52 52 41 84 12
+FA D2 00 11 3A D3 05 52 52 41 2E 42 84 12 FA D2
+40 11 46 D3 03 53 58 54 84 12 FA D2 80 11 00 00
+04 50 55 53 48 00 84 12 FA D2 00 12 60 D3 06 50
+55 53 48 2E 42 00 84 12 FA D2 40 12 BA D2 04 43
+41 4C 4C 00 84 12 FA D2 80 12 1A 53 0E 4A 0D 12
+87 12 9C C5 2E C2 0D 6F 75 74 20 6F 66 20 62 6F
+75 6E 64 73 7A C9 70 C8 02 D0 AC D3 92 53 C4 1D
+3E 40 2C 00 87 12 F2 C5 06 C7 4C C2 00 CA 5A D1
+C2 D3 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28
+08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F
+5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F 54 D3
+04 52 52 43 4D 00 84 12 A6 D3 50 00 F0 D3 04 52
+52 41 4D 00 84 12 A6 D3 50 01 FE D3 04 52 4C 41
+4D 00 84 12 A6 D3 50 02 0C D4 04 52 52 55 4D 00
+84 12 A6 D3 50 03 6E D3 05 50 55 53 48 4D 84 12
+A6 D3 00 15 28 D4 04 50 4F 50 4D 00 84 12 A6 D3
+00 17 1A D4 03 53 3E 3D 85 12 00 38 44 D4 02 53
+3C 00 85 12 00 34 36 D4 03 30 3E 3D 85 12 00 30
+58 D4 02 30 3C 00 85 12 00 30 00 00 02 55 3C 00
+85 12 00 2C 6C D4 03 55 3E 3D 85 12 00 28 62 D4
+03 30 3C 3E 85 12 00 24 80 D4 02 30 3D 00 85 12
+00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 0E 4A 30 4D 76 D4 04 54 48 45 4E 00
+1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11
+3A 90 00 02 63 2F 88 DA 00 00 30 4D 6A D2 04 45
+4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53
+C6 1D 2F 83 8F 4A 00 00 E3 3F AA D4 05 55 4E 54
+49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89
+0A 11 3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48
+00 00 A2 53 C6 1D 30 4D EE D2 05 41 47 41 49 4E
+0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45
+0D 12 87 12 98 D4 82 C4 26 C5 4E D4 06 52 45 50
+45 41 54 00 0D 12 87 12 20 D5 B0 D4 26 C5 50 D5
+3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D CB 2F 98 42
+C6 1D 00 00 30 4D 7E D3 03 42 57 31 84 12 4E D5
+00 00 68 D5 03 42 57 32 84 12 4E D5 00 00 74 D5
+03 42 57 33 84 12 4E D5 00 00 8C D5 3D 41 1A 42
+C6 1D 28 4E B2 92 C4 1D 8E 2B BA 4F 00 00 A2 53
+C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
+84 12 8A D5 00 00 AC D5 03 46 57 32 84 12 8A D5
+00 00 B8 D5 03 46 57 33 84 12 8A D5 00 00 C4 D5
+04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C
+0D 12 87 12 F0 C9 18 C8 26 C5 00 00 05 3F 47 4F
+54 4F 3E 90 00 30 F4 27 3E E0 00 04 3E B0 00 10
+EF 27 3E E0 00 08 EC 3F
@FFFE
-9C D0
+6C CE
q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 B4 5B D0 50
-2D 01 6B B4 B6 46 C8 46
+10 00 08 00 A1 F7 80 3E 05 00 18 00 14 58 88 4E
+2E 01 6B B0 06 45 18 45 D4 4F
@4400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 44
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 44
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 44
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 44 02 3E 52 00 0E 12 3E 4F 30 4D 70 44 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 44 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 44 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 44
-01 21 BE 4F 00 00 3E 4F 30 4D CC 44 02 30 3D 00
-1E 83 0E 7E 30 4D FC 44 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 45 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 44 B0 12 06 45 12 D2 0A 18 F9 3F 39 40
+34 00 29 83 B9 40 6C 50 CC FF FB 23 B2 40 68 45
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 44 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 45 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 45 02 23 53 00 87 12 88 45 C0 45
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 45
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 44 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 45 34 44 86 44 D4 44 BA 45
-92 44 F8 45 D4 45 D6 47 42 4B 82 47 2A 44 22 45
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 45 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 46 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 46 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 46 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C3 23 02 30 41 B2 40 13 00 CE 05 E2 D3
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 46
-B0 12 B6 46 12 D2 0A 18 F9 3F F0 44 06 41 43 43
-45 50 54 00 3C 40 64 47 3B 40 2E 47 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 47
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A 47 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 44 04 45 4D 49
-54 00 30 40 86 47 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C 47 04 45 43 48 4F 00 B2 40 82 48
-52 47 82 43 DE 1D 30 4D 32 46 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 47 92 43 DE 1D 30 4D 20 46
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 47
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 47 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 45
-02 43 52 00 30 40 08 48 87 12 1E 48 02 0D 0A 00
-D6 47 2A 44 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 45 82 53 22 00 82 43 B4 1D 87 12 14 48
-1E 48 B0 4A 14 48 22 00 80 48 4C 48 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA 47 82 2E 22 00 87 12 38 48 14 48 D6 47
-B0 4A 2A 44 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 44 34 40 00 44 30 4D 82 44 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 49 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 49 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 45 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 46 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 44 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC 46 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 47 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 4A 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 48 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 48 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 4B 42 4B 80 48 50 4B
-3D 40 58 4B CC 22 82 3E 5A 4B 0A 4E 3E 4F 3D 40
-70 4B 23 27 3D 40 4A 4B 1A E2 BE 1D A1 27 B5 23
-72 4B 3E 4F 3D 40 4A 4B B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 4E CB 3F D2 4A
+12 D3 F5 3F 34 40 EC 44 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C3 23 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D3 23 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 45 3B 40 70 45 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 45
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 44 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C 45 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 45 08 4E 3E 4F E0 3F BE 45
+04 45 43 48 4F 00 B2 40 82 48 94 45 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 45 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 46 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 46 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 46 0D 12 87 12 2E 44 02 0D 0A 00 00 46 26 47
+00 00 03 4B 45 59 30 40 4A 46 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 45 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 45 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A 46
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 44 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 46
+02 23 53 00 0D 12 87 12 E2 46 1C 47 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 47 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 45 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 46 14 47 9C 46 54 47 30 47
+00 46 70 4A C4 45 26 47 E4 45 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 47 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 44 2E 44 F8 49 24 44 22 00 F2 47 C0 47
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A 47 82 2E 22 00 0D 12 87 12
+AA 47 24 44 00 46 F8 49 26 47 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 44 34 40 EC 44 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 49 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 49 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 44
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C 45 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 49
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 44 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 47 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 44 70 4A F2 47 80 4A
+3D 40 88 4A E2 22 A4 26 8A 4A 0A 4E 3E 4F 3D 40
+A0 4A 39 27 3D 40 7A 4A 1A E2 BE 1D BD 23 AC 27
+A2 4A 3E 4F 3D 40 7A 4A BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 4D D2 3F D0 45
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 44 46 4B AE 4B B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 45 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A 44
-04 48 8C 47 42 4B 82 47 46 4B A4 44 0C 45 1E 48
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 4C
-14 48 30 FF A0 4A 26 45 1E 48 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 4C 3C 46 E0 4B C2 4A 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E 4C 86 41 42 4F
-52 54 22 00 87 12 38 48 14 48 40 4C B0 4A 2A 44
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 51
-B0 12 B6 46 92 C3 DC 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 51 14 48 DE 1D EA 44 AC 47 1E 48 04 1B 5B 37
-6D 00 D6 47 58 44 40 46 9A 4C 04 48 1E 48 05 6C
-69 6E 65 3A D6 47 D0 44 24 46 D6 47 1E 48 04 1B
-5B 30 6D 00 D6 47 24 4C 00 00 83 5B 27 5D 87 12
-C0 4C 14 48 14 48 B0 4A B0 4A 2A 44 E8 48 01 27
-87 12 42 4B 80 48 EE 48 40 46 CE 4C 2A 44 7A 4B
-32 45 81 5C 92 42 C0 1D C4 1D 30 4D AA 4C 81 5B
-82 43 BE 1D 30 4D D2 4C 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 4A 82 49 53 00 87 12
-BE 4B EA 44 40 46 12 4D AE 4C 14 48 F0 4C B0 4A
-2A 44 C0 4C F0 4C 2A 44 FA 4C 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 4B 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 4B
-80 48 EE 48 58 44 40 46 CE 4C 0C 45 40 46 5C 4D
-14 48 14 48 B0 4A B0 4A 14 48 B0 4A B0 4A 2A 44
-DE 4C 81 3B 82 93 BE 1D B5 27 87 12 14 48 2A 44
-B0 4A FA 4D E0 4C 2A 44 62 4D 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 4D 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A 4D 01 3A 30 12 A0 4D 92 B3 C6 1D A2 63 C6 1D
-87 12 42 4B 80 48 C8 4D 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 48 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 4C 90 4B 05 44 45 46 45 52
-B0 12 B8 4D BA 40 30 40 FC FF BA 40 AE 4D FE FF
-E3 3F 1E 4B 06 43 52 45 41 54 45 00 B0 12 B8 4D
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 4E 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 49 05 3E 42 4F 44 59 2E 52
-30 4D 44 4E 04 43 4F 44 45 00 B0 12 B8 4D A2 82
-C6 1D 87 12 D2 50 AC 50 2A 44 84 4E 07 43 4F 44
-45 4E 4E 4D B0 12 86 4D F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 50 FA 4D 2A 44 2C 4C 03 41
-53 4D B2 40 B0 50 DA 1D E0 3F AC 4E 06 45 4E 44
-41 53 4D 00 87 12 B4 4E F4 50 2A 44 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 50 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A 44
-02 00 A2 52 C6 1D ED 3F 1A 4D 85 48 49 32 4C 4F
-87 12 A0 4A 4A 4F B0 4A E0 4C D2 50 AC 50 2A 44
-1A 4F 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 46 00 00 2E 53 30 4D 5E 4E
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C 46 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 47
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C 4E 85 42 45 47 49 4E 30 40 A0 4A 70 4F 85 55
-4E 54 49 4C 39 40 40 46 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 4E 85 41
-47 41 49 4E 39 40 3C 46 EF 3F 7A 48 85 57 48 49
-4C 45 87 12 36 4F 76 44 2A 44 34 48 86 52 45 50
-45 41 54 00 87 12 B4 4F 76 4F 2A 44 50 4F 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 46 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 4A 84 4C 4F 4F 50 00 39 40 76 46
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 46 85 2B 4C 4F 4F 50
-39 40 64 46 E5 3F 06 50 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 48
-CA 1D F2 44 2A 44 84 12 7E 50 AE 4F 5C 53 DE 4F
-BE 4C 32 4F 3A 50 70 54 64 48 66 51 80 51 8E 4F
-00 52 00 00 42 54 E8 4C 78 4E 00 00 84 12 7E 50
-9A 5B 8C 5B 42 59 64 5A 08 59 00 00 7E 5B 00 00
-FE 58 A8 5B 60 59 9E 59 48 57 00 00 00 00 40 5A
-AA 50 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 50 EE 50
-F4 50 04 51 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 4D 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 50 D0 50 B4 5B CC 4F 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 51 92 42 0C 18
-48 51 EF 3F 38 51 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 51 92 42 C6 1D 48 51 30 4D 4C 51
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC 4F 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 46
-DE 46 B2 40 0A 52 08 52 B2 40 D0 50 0E 18 B2 40
-B4 5B 0C 18 30 12 56 51 B2 40 86 47 84 47 B2 40
-08 48 06 48 B2 40 98 46 96 46 B2 40 18 00 0A 18
-37 40 1A 44 36 40 92 44 35 40 0E 44 34 40 00 44
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A 51
-04 57 41 52 4D 00 30 40 0A 52 3D 40 3E 52 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 48
-06 0D 1B 5B 37 6D 23 00 D6 47 34 46 1E 48 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 47 14 48 30 FF A0 4A
-B8 44 24 46 1E 48 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 46 9A 4C 82 4F 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E 52 B2 40 88 5A
-5C 01 B2 40 FE FF 02 02 B2 D3 06 02 B2 D3 26 02
-B2 40 FF BF 22 02 E2 D3 25 02 F2 43 22 03 F2 D3
-26 03 F2 40 A5 00 41 01 F2 40 10 00 40 01 D2 43
-41 01 F2 40 A5 00 61 01 B2 40 48 00 62 01 82 43
-66 01 39 40 00 01 B2 40 33 00 64 01 D2 43 61 01
-92 D2 9E 01 08 18 38 40 59 14 18 83 FE 23 19 83
-FA 23 B2 D2 B0 01 F2 D0 10 00 2A 03 F2 C0 40 00
-A1 04 39 40 00 08 29 83 89 43 00 1C FC 23 39 40
-34 00 29 83 B9 40 9C 52 CC FF FB 23 B2 40 26 47
-F0 FF B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42
-04 18 C8 05 92 C3 C0 05 92 D3 DA 05 3F 40 80 1C
-31 40 E0 1C 30 12 06 52 40 3F 88 52 07 43 4F 4D
-50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C
-0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF
-F5 27 02 2C 3E 43 30 4D 1E 43 30 4D B2 4D 86 5B
-54 48 45 4E 5D 00 30 4D 8E 53 86 5B 45 4C 53 45
-5D 00 87 12 14 48 00 00 C6 44 42 4B 80 48 24 4B
-34 44 40 46 04 54 44 44 1E 48 06 5B 54 48 45 4E
-5D 00 64 53 4A 46 D4 53 F8 47 D0 44 58 44 4A 46
-AA 53 2A 44 44 44 1E 48 06 5B 45 4C 53 45 5D 00
-64 53 4A 46 F2 53 F8 47 D0 44 58 44 4A 46 A8 53
-2A 44 1E 48 04 5B 49 46 5D 00 64 53 4A 46 AA 53
-3C 46 A8 53 F8 47 1E 48 05 0D 0A 6B 6F 20 D6 47
-8C 47 32 4B 3C 46 AA 53 9A 53 84 5B 49 46 5D 00
-0E 93 3E 4F BE 27 30 4D 1A 54 89 5B 44 45 46 49
-4E 45 44 5D 87 12 42 4B 80 48 EE 48 6A 44 2A 44
-2A 54 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 87 12
-42 4B 80 48 EE 48 6A 44 00 45 2A 44 5E 54 3D 41
-B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 56 51 48 50
-06 4D 41 52 4B 45 52 00 B0 12 B8 4D BA 40 84 12
-FC FF BA 40 5C 54 FE FF 9A 42 C8 1D 00 00 28 83
-8A 48 02 00 A2 52 C6 1D 30 40 00 4E 1C 15 B0 12
-2A 44 80 48 EE 48 4A 46 B2 54 AA 49 40 46 CE 4C
-CC 54 B4 54 39 4E 39 80 86 12 08 24 19 53 02 20
-2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41
-3E 40 28 00 B0 12 9C 54 19 42 C6 1D A2 53 C6 1D
-89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53
-C4 1D B0 12 2A 44 80 48 AA 49 40 46 0A 55 00 55
-21 53 3E 90 10 00 7D 2D E1 2B 0C 55 B2 41 C4 1D
-DD 3F 87 12 42 4B 74 48 1A 55 0C 43 1B 42 C6 1D
-A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20 92 53
-C4 1D B0 12 9C 54 3C 40 00 03 0E 93 1C 24 3C 40
-10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40
-20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40
-30 03 3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53
-C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00
-07 20 3C 40 10 02 92 53 C4 1D B0 12 9C 54 ED 3F
-7A 90 40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12
-E8 54 0C 20 3C 50 10 00 3E 40 2B 00 B0 12 E8 54
-92 92 C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E
-DA 3F B0 12 E8 54 FA 23 3C 50 10 00 B0 12 D0 54
-EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D 87 12 42 4B
-74 48 E4 55 FE 90 26 00 00 00 3E 40 20 00 03 20
-3C 50 82 00 C8 3F B0 12 E8 54 E1 23 3C 50 80 00
-B0 12 D0 54 DC 3F D6 46 04 52 45 54 49 00 87 12
-14 48 00 13 B0 4A 2A 44 14 48 2C 00 12 55 DC 55
-22 56 09 4B 2E 4E 0E DC A4 3F FC 4E 03 4D 4F 56
-84 12 18 56 00 40 2C 56 05 4D 4F 56 2E 42 84 12
-18 56 40 40 00 00 03 41 44 44 84 12 18 56 00 50
-46 56 05 41 44 44 2E 42 84 12 18 56 40 50 52 56
-04 41 44 44 43 00 84 12 18 56 00 60 60 56 06 41
-44 44 43 2E 42 00 84 12 18 56 40 60 08 56 04 53
-55 42 43 00 84 12 18 56 00 70 7E 56 06 53 55 42
-43 2E 42 00 84 12 18 56 40 70 8C 56 03 53 55 42
-84 12 18 56 00 80 9C 56 05 53 55 42 2E 42 84 12
-18 56 40 80 DE 4E 03 43 4D 50 84 12 18 56 00 90
-B6 56 05 43 4D 50 2E 42 84 12 18 56 40 90 CC 4E
-04 44 41 44 44 00 84 12 18 56 00 A0 D0 56 06 44
-41 44 44 2E 42 00 84 12 18 56 40 A0 C2 56 03 42
-49 54 84 12 18 56 00 B0 EE 56 05 42 49 54 2E 42
-84 12 18 56 40 B0 FA 56 03 42 49 43 84 12 18 56
-00 C0 08 57 05 42 49 43 2E 42 84 12 18 56 40 C0
-14 57 03 42 49 53 84 12 18 56 00 D0 22 57 05 42
-49 53 2E 42 84 12 18 56 40 D0 00 00 03 58 4F 52
-84 12 18 56 00 E0 3C 57 05 58 4F 52 2E 42 84 12
-18 56 40 E0 6E 56 03 41 4E 44 84 12 18 56 00 F0
-56 57 05 41 4E 44 2E 42 84 12 18 56 40 F0 42 4B
-12 55 74 57 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
-0C DA 4F 3F A8 56 03 52 52 43 84 12 6E 57 00 10
-86 57 05 52 52 43 2E 42 84 12 6E 57 40 10 92 57
-04 53 57 50 42 00 84 12 6E 57 80 10 A0 57 03 52
-52 41 84 12 6E 57 00 11 AE 57 05 52 52 41 2E 42
-84 12 6E 57 40 11 BA 57 03 53 58 54 84 12 6E 57
-80 11 00 00 04 50 55 53 48 00 84 12 6E 57 00 12
-D4 57 06 50 55 53 48 2E 42 00 84 12 6E 57 40 12
-2E 57 04 43 41 4C 4C 00 84 12 6E 57 80 12 1A 53
-0E 4A 87 12 34 46 1E 48 0D 6F 75 74 20 6F 66 20
-62 6F 75 6E 64 73 4C 4C 42 4B 74 48 1E 58 92 53
-C4 1D 3E 40 2C 00 B0 12 2A 44 80 48 AA 49 40 46
-CE 4C D2 55 36 58 0A 4E 3E 4F 1A 83 E0 33 29 4E
-59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
-10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
-8F 3F C8 57 04 52 52 43 4D 00 84 12 18 58 50 00
-64 58 04 52 52 41 4D 00 84 12 18 58 50 01 72 58
-04 52 4C 41 4D 00 84 12 18 58 50 02 80 58 04 52
-52 55 4D 00 84 12 18 58 50 03 E2 57 05 50 55 53
-48 4D 84 12 18 58 00 15 9C 58 04 50 4F 50 4D 00
-84 12 18 58 00 17 8E 58 03 53 3E 3D 85 12 00 38
-B8 58 02 53 3C 00 85 12 00 34 AA 58 03 30 3E 3D
-85 12 00 30 CC 58 02 30 3C 00 85 12 00 30 00 00
-02 55 3C 00 85 12 00 2C E0 58 03 55 3E 3D 85 12
-00 28 D6 58 03 30 3C 3E 85 12 00 24 F4 58 02 30
-3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D
-8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D EA 58 04 54
-48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53
-0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
-DE 56 04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C
-00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F 1E 59
-05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D
-2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
-08 DA 89 48 00 00 A2 53 C6 1D 30 4D 62 57 05 41
-47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
-48 49 4C 45 87 12 0C 59 76 44 2A 44 C2 58 06 52
-45 50 45 41 54 00 87 12 94 59 24 59 2A 44 C0 59
-3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D CD 2F 98 42
-C6 1D 00 00 30 4D F2 57 03 42 57 31 84 12 BE 59
-00 00 D8 59 03 42 57 32 84 12 BE 59 00 00 E4 59
-03 42 57 33 84 12 BE 59 00 00 FC 59 3D 41 1A 42
-C6 1D 28 4E B2 92 C4 1D 90 2B BA 4F 00 00 A2 53
-C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
-84 12 FA 59 00 00 1C 5A 03 46 57 32 84 12 FA 59
-00 00 28 5A 03 46 57 33 84 12 FA 59 00 00 00 00
-05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04
-3E B0 00 10 02 24 3E E0 00 08 87 12 C0 4C DA 4A
-2A 44 34 5A 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
-3E 40 00 3C F2 3F 87 12 42 4B 74 48 7E 5A 69 4E
-3E 4F 3C 4F 2C 4C 1B 42 C6 1D A2 53 C6 1D 79 90
-52 00 0A 20 B0 12 E8 54 5E 0E 5E 0E 0E DC 8B 4E
-00 00 0E 4B 3D 41 30 4D 79 90 23 00 0D 20 3C C0
-40 00 92 53 C4 1D A2 53 C6 1D B0 12 9C 54 BB 4F
-02 00 3E F0 0F 00 E8 3F 79 90 26 00 03 20 3C E0
-E0 00 EF 3F 3C C0 F0 00 79 90 40 00 12 20 92 53
-C4 1D B0 12 E8 54 D8 23 3C D0 10 00 3E 40 2B 00
-B0 12 E8 54 92 92 C0 1D C4 1D CE 27 92 53 C4 1D
-CB 3F 3C D0 30 00 A2 53 C6 1D 3E 40 28 00 B0 12
-9C 54 BB 4F 02 00 3E 40 29 00 EA 3F 87 12 42 4B
-74 48 24 5B 3B 4F 2C 4B 69 4E 7E 40 20 00 79 90
-52 00 03 20 B0 12 E8 54 B1 3F 3C C0 F0 00 A2 53
-C6 1D 79 90 26 00 09 20 3C D0 60 00 92 53 C4 1D
-B0 12 9C 54 BB 4F 02 00 A1 3F 3C D0 70 00 3E 40
-28 00 B0 12 9C 54 BB 4F 02 00 3E 40 29 00 E2 3F
-14 48 2C 00 76 5A 1C 5B 66 44 2A 44 38 56 04 4D
-4F 56 41 00 84 12 70 5B C0 00 F0 59 04 43 4D 50
-41 00 84 12 70 5B D0 00 8E 59 04 41 44 44 41 00
-84 12 70 5B E0 00 AE 59 04 53 55 42 41 00 84 12
-70 5B F0 00
+3B 49 3A 49 3D 15 87 12 74 4A DC 4A B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E 46 D4 44
+70 4A C4 45 74 4A 8C 46 BC 46 2E 44 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 4B 24 44 40 FF
+2A 4E C4 46 2E 44 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 4B 48 44 0C 4B 0A 4A 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A 4B 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 47 24 44 6E 4B F8 49 26 47 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 4F B0 12
+06 45 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 4F 24 44 DE 1D 02 45 D6 45 2E 44 04 1B 5B 37
+6D 00 00 46 7C 46 4C 44 C8 4B 2E 46 2E 44 05 6C
+69 6E 65 3A 00 46 66 47 00 46 2E 44 04 1B 5B 30
+6D 00 00 46 50 4B 00 00 83 5B 27 5D 0D 12 87 12
+F0 4B 24 44 24 44 F8 49 F8 49 26 47 44 48 01 27
+0D 12 87 12 70 4A F2 47 4A 48 4C 44 00 4C 26 47
+AA 4A D2 46 81 5C 92 42 C0 1D C4 1D 30 4D D8 4B
+81 5B 82 43 BE 1D 30 4D 04 4C 01 5D B2 43 BE 1D
+30 4D F2 4A 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 4A F2 47 4A 48 7C 46 4C 44 00 4C BC 46
+4C 44 50 4C 24 44 24 44 F8 49 F8 49 24 44 F8 49
+F8 49 26 47 40 47 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 4C 01 3A
+30 12 B8 4C 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 4A F2 47 86 4C 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E 4C 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 4C 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 44
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 4B CC 4C 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 44 26 47 F8 49 F2 4C 12 4C 26 47 5C 4A 06 43
+52 45 41 54 45 00 B0 12 74 4C BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 4A 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 4D 04 43 4F 44 45 00 B0 12 74 4C A2 82 C6 1D
+0D 12 87 12 8A 4E 64 4E 26 47 72 4D 07 43 4F 44
+45 4E 4E 4D 30 12 7C 4D 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 4C A4 4E 26 47 58 4B
+03 41 53 4D B2 40 68 4E DA 1D DE 3F 9C 4D 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 4D C2 4E 26 47
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 4E 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 4C 85 48 49 32 4C 4F 0D 12
+87 12 2A 4E 1E 4E F8 49 12 4C 80 4D 26 47 2E 53
+30 4D 8C 4D 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 44 CA 1D AE 46 26 47 84 12
+36 4E B0 4D 5A 50 58 4D EE 4B 08 4E 42 46 20 4A
+D8 47 34 4F 4E 4F 62 47 CE 4F 00 00 F4 51 1A 4C
+AA 48 00 00 84 12 36 4E 26 57 8C 57 DA 56 DC 57
+A0 56 00 00 D0 53 00 00 96 56 48 57 F8 56 36 57
+E0 54 00 00 00 00 F8 57 62 4E 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E 4E BC 4E C2 4E
+D2 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 4C 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 4E 88 4E 14 58 A6 47 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 4F 92 42 0C 18 16 4F
+EF 3F 06 4F 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 4F 92 42 C6 1D 16 4F 30 4D 1A 4F 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC 47 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 44 02 44
+B2 40 D8 4F D6 4F B2 40 88 4E 0E 18 B2 40 14 58
+0C 18 30 12 24 4F B2 40 C8 45 C6 45 B2 40 32 46
+30 46 B2 40 4A 46 48 46 B2 40 18 00 0A 18 37 40
+26 47 36 40 9C 46 35 40 FA 44 34 40 EC 44 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 4F 04 57
+41 52 4D 00 30 40 D8 4F 3D 40 10 50 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 44 07 0D 0A 1B 5B 37 6D 23 00 46 9C 47 2E 44
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 46 24 44 40 FF
+2A 4E A6 46 66 47 2E 44 0A 62 79 74 65 73 20 66
+72 65 65 00 48 44 C8 4B 24 4E 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3 06 02
+B2 D3 26 02 B2 40 FF BF 22 02 E2 D3 25 02 F2 43
+22 03 F2 D3 26 03 F2 40 A5 00 41 01 F2 40 10 00
+40 01 D2 43 41 01 F2 40 A5 00 61 01 B2 40 48 00
+62 01 82 43 66 01 39 40 00 01 B2 40 33 00 64 01
+D2 43 61 01 92 D2 9E 01 08 18 38 40 59 14 18 83
+FE 23 19 83 FA 23 B2 D2 B0 01 F2 D0 10 00 2A 03
+F2 C0 40 00 A1 04 39 40 00 08 29 83 89 43 00 1C
+FC 23 B0 12 0E 44 B2 40 81 00 C0 05 92 42 02 18
+C6 05 92 42 04 18 C8 05 92 C3 C0 05 3F 40 80 1C
+30 12 D4 4F 49 3F 24 4D 86 5B 54 48 45 4E 5D 00
+30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24
+1B 83 06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27
+2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53
+2D 53 F7 3F 18 51 86 5B 45 4C 53 45 5D 00 0D 12
+87 12 24 44 00 00 AA 46 70 4A F2 47 62 4A 68 46
+4C 44 B0 51 70 46 2E 44 06 5B 54 48 45 4E 5D 00
+22 51 8A 51 46 51 68 51 26 47 70 46 2E 44 06 5B
+45 4C 53 45 5D 00 22 51 A0 51 46 51 66 51 26 47
+2E 44 04 5B 49 46 5D 00 22 51 68 51 48 44 66 51
+22 46 2E 44 05 0D 0A 6B 6F 20 00 46 D4 44 C4 44
+48 44 68 51 56 51 84 5B 49 46 5D 00 0E 93 3E 4F
+C6 27 30 4D 2F 53 30 4D C6 51 89 5B 44 45 46 49
+4E 45 44 5D 0D 12 87 12 70 4A F2 47 4A 48 D4 51
+26 47 DA 51 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
+0D 12 87 12 E4 51 08 52 3D 41 30 40 B6 46 38 40
+C0 1D 0A 4E 39 48 2E 48 09 5E 1E 52 C4 1D 09 9E
+03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 1D
+30 4D 1C 15 87 12 F2 47 4A 48 42 44 46 52 06 49
+4C 44 00 4C 60 52 48 52 39 4E 39 80 86 12 08 24
+19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82
+1B 17 30 41 3E 40 28 00 B0 12 32 52 19 42 C6 1D
+A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15 12 12
+C4 1D 92 53 C4 1D 87 12 F2 47 06 49 4C 44 9C 52
+92 52 21 53 3E 90 10 00 80 2D E2 2B 9E 52 B2 41
+C4 1D DE 3F 0D 12 87 12 70 4A 0E 52 AE 52 0C 43
+1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00
+27 20 92 53 C4 1D B0 12 32 52 3C 40 00 03 0E 93
+1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
+14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
+0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
+C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D
+7A 90 26 00 07 20 3C 40 10 02 92 53 C4 1D B0 12
+32 52 ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
+C4 1D B0 12 7C 52 0C 20 3C 50 10 00 3E 40 2B 00
+B0 12 7C 52 92 92 C0 1D C4 1D 02 24 92 53 C4 1D
+8E 10 0C 5E DA 3F B0 12 7C 52 FA 23 3C 50 10 00
+B0 12 64 52 EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D
+0D 12 87 12 70 4A 0E 52 7A 53 FE 90 26 00 00 00
+3E 40 20 00 03 20 3C 50 82 00 C7 3F B0 12 7C 52
+E0 23 3C 50 80 00 B0 12 64 52 DB 3F 00 00 04 52
+45 54 49 00 0D 12 87 12 24 44 00 13 F8 49 26 47
+24 44 2C 00 A4 52 70 53 BA 53 09 4B 2E 4E 0E DC
+A2 3F F6 4D 03 4D 4F 56 84 12 B0 53 00 40 C4 53
+05 4D 4F 56 2E 42 84 12 B0 53 40 40 00 00 03 41
+44 44 84 12 B0 53 00 50 DE 53 05 41 44 44 2E 42
+84 12 B0 53 40 50 EA 53 04 41 44 44 43 00 84 12
+B0 53 00 60 F8 53 06 41 44 44 43 2E 42 00 84 12
+B0 53 40 60 9E 53 04 53 55 42 43 00 84 12 B0 53
+00 70 16 54 06 53 55 42 43 2E 42 00 84 12 B0 53
+40 70 24 54 03 53 55 42 84 12 B0 53 00 80 34 54
+05 53 55 42 2E 42 84 12 B0 53 40 80 D2 4D 03 43
+4D 50 84 12 B0 53 00 90 4E 54 05 43 4D 50 2E 42
+84 12 B0 53 40 90 BE 4D 04 44 41 44 44 00 84 12
+B0 53 00 A0 68 54 06 44 41 44 44 2E 42 00 84 12
+B0 53 40 A0 5A 54 03 42 49 54 84 12 B0 53 00 B0
+86 54 05 42 49 54 2E 42 84 12 B0 53 40 B0 92 54
+03 42 49 43 84 12 B0 53 00 C0 A0 54 05 42 49 43
+2E 42 84 12 B0 53 40 C0 AC 54 03 42 49 53 84 12
+B0 53 00 D0 BA 54 05 42 49 53 2E 42 84 12 B0 53
+40 D0 00 00 03 58 4F 52 84 12 B0 53 00 E0 D4 54
+05 58 4F 52 2E 42 84 12 B0 53 40 E0 06 54 03 41
+4E 44 84 12 B0 53 00 F0 EE 54 05 41 4E 44 2E 42
+84 12 B0 53 40 F0 70 4A A4 52 0C 55 0A 4C 3C F0
+70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 40 54 03 52
+52 43 84 12 06 55 00 10 1E 55 05 52 52 43 2E 42
+84 12 06 55 40 10 2A 55 04 53 57 50 42 00 84 12
+06 55 80 10 38 55 03 52 52 41 84 12 06 55 00 11
+46 55 05 52 52 41 2E 42 84 12 06 55 40 11 52 55
+03 53 58 54 84 12 06 55 80 11 00 00 04 50 55 53
+48 00 84 12 06 55 00 12 6C 55 06 50 55 53 48 2E
+42 00 84 12 06 55 40 12 C6 54 04 43 41 4C 4C 00
+84 12 06 55 80 12 1A 53 0E 4A 0D 12 87 12 9C 47
+2E 44 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
+7A 4B 70 4A 0E 52 B8 55 92 53 C4 1D 3E 40 2C 00
+87 12 F2 47 06 49 4C 44 00 4C 66 53 CE 55 0A 4E
+3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
+01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
+2A 92 D1 2F 8A 10 5A 06 8F 3F 60 55 04 52 52 43
+4D 00 84 12 B2 55 50 00 FC 55 04 52 52 41 4D 00
+84 12 B2 55 50 01 0A 56 04 52 4C 41 4D 00 84 12
+B2 55 50 02 18 56 04 52 52 55 4D 00 84 12 B2 55
+50 03 7A 55 05 50 55 53 48 4D 84 12 B2 55 00 15
+34 56 04 50 4F 50 4D 00 84 12 B2 55 00 17 26 56
+03 53 3E 3D 85 12 00 38 50 56 02 53 3C 00 85 12
+00 34 42 56 03 30 3E 3D 85 12 00 30 64 56 02 30
+3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
+78 56 03 55 3E 3D 85 12 00 28 6E 56 03 30 3C 3E
+85 12 00 24 8C 56 02 30 3D 00 85 12 00 20 00 00
+02 49 46 00 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D
+0E 4A 30 4D 82 56 04 54 48 45 4E 00 1A 42 C6 1D
+08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
+63 2F 88 DA 00 00 30 4D 76 54 04 45 4C 53 45 00
+1A 42 C6 1D BA 40 00 3C 00 00 A2 53 C6 1D 2F 83
+8F 4A 00 00 E3 3F B6 56 05 55 4E 54 49 4C 3A 4F
+08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11 3A 90
+00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
+C6 1D 30 4D FA 54 05 41 47 41 49 4E 0A 4E 38 40
+00 3C E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12
+A4 56 82 46 26 47 5A 56 06 52 45 50 45 41 54 00
+0D 12 87 12 2C 57 BC 56 26 47 5C 57 3D 41 08 4E
+3E 4F 2A 48 B2 92 C4 1D CB 2F 98 42 C6 1D 00 00
+30 4D 8A 55 03 42 57 31 84 12 5A 57 00 00 74 57
+03 42 57 32 84 12 5A 57 00 00 80 57 03 42 57 33
+84 12 5A 57 00 00 98 57 3D 41 1A 42 C6 1D 28 4E
+B2 92 C4 1D 8E 2B BA 4F 00 00 A2 53 C6 1D 8E 4A
+00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 96 57
+00 00 B8 57 03 46 57 32 84 12 96 57 00 00 C4 57
+03 46 57 33 84 12 96 57 00 00 D0 57 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12
+F0 4B 18 4A 26 47 00 00 05 3F 47 4F 54 4F 3E 90
+00 30 F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0
+00 08 EC 3F
@FFFE
-9C 52
+6C 50
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 A2 5B D0 50
-2D 01 6B B4 B6 46 C8 46
+10 00 08 00 00 D6 E8 03 05 00 18 00 02 58 88 4E
+2E 01 6B B0 06 45 18 45 D4 4F
@4400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 44
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 44
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 44
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 44 02 3E 52 00 0E 12 3E 4F 30 4D 70 44 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 44 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 44 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 44
-01 21 BE 4F 00 00 3E 4F 30 4D CC 44 02 30 3D 00
-1E 83 0E 7E 30 4D FC 44 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 45 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 44 B0 12 06 45 12 D2 0A 18 F9 3F 39 40
+34 00 29 83 B9 40 6C 50 CC FF FB 23 B2 40 68 45
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 44 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 45 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 45 02 23 53 00 87 12 88 45 C0 45
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 45
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 44 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 45 34 44 86 44 D4 44 BA 45
-92 44 F8 45 D4 45 D6 47 42 4B 82 47 2A 44 22 45
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 45 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 46 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 46 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 46 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C3 23 02 30 41 B2 40 13 00 CE 05 E2 D3
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 46
-B0 12 B6 46 12 D2 0A 18 F9 3F F0 44 06 41 43 43
-45 50 54 00 3C 40 64 47 3B 40 2E 47 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 47
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A 47 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 44 04 45 4D 49
-54 00 30 40 86 47 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C 47 04 45 43 48 4F 00 B2 40 82 48
-52 47 82 43 DE 1D 30 4D 32 46 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 47 92 43 DE 1D 30 4D 20 46
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 47
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 47 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 45
-02 43 52 00 30 40 08 48 87 12 1E 48 02 0D 0A 00
-D6 47 2A 44 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 45 82 53 22 00 82 43 B4 1D 87 12 14 48
-1E 48 B0 4A 14 48 22 00 80 48 4C 48 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA 47 82 2E 22 00 87 12 38 48 14 48 D6 47
-B0 4A 2A 44 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 44 34 40 00 44 30 4D 82 44 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 49 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 49 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 45 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 46 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 44 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC 46 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 47 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 4A 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 48 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 48 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 4B 42 4B 80 48 50 4B
-3D 40 58 4B CC 22 82 3E 5A 4B 0A 4E 3E 4F 3D 40
-70 4B 23 27 3D 40 4A 4B 1A E2 BE 1D A1 27 B5 23
-72 4B 3E 4F 3D 40 4A 4B B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 4E CB 3F D2 4A
+12 D3 F5 3F 34 40 EC 44 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C3 23 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D3 23 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 45 3B 40 70 45 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 45
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 44 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C 45 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 45 08 4E 3E 4F E0 3F BE 45
+04 45 43 48 4F 00 B2 40 82 48 94 45 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 45 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 46 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 46 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 46 0D 12 87 12 2E 44 02 0D 0A 00 00 46 26 47
+00 00 03 4B 45 59 30 40 4A 46 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 45 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 45 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A 46
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 44 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 46
+02 23 53 00 0D 12 87 12 E2 46 1C 47 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 47 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 45 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 46 14 47 9C 46 54 47 30 47
+00 46 70 4A C4 45 26 47 E4 45 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 47 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 44 2E 44 F8 49 24 44 22 00 F2 47 C0 47
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A 47 82 2E 22 00 0D 12 87 12
+AA 47 24 44 00 46 F8 49 26 47 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 44 34 40 EC 44 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 49 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 49 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 44
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C 45 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 49
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 44 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 47 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 44 70 4A F2 47 80 4A
+3D 40 88 4A E2 22 A4 26 8A 4A 0A 4E 3E 4F 3D 40
+A0 4A 39 27 3D 40 7A 4A 1A E2 BE 1D BD 23 AC 27
+A2 4A 3E 4F 3D 40 7A 4A BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 4D D2 3F D0 45
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 44 46 4B AE 4B B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 45 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A 44
-04 48 8C 47 42 4B 82 47 46 4B A4 44 0C 45 1E 48
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 4C
-14 48 30 FF A0 4A 26 45 1E 48 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 4C 3C 46 E0 4B C2 4A 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E 4C 86 41 42 4F
-52 54 22 00 87 12 38 48 14 48 40 4C B0 4A 2A 44
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 51
-B0 12 B6 46 92 C3 DC 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 51 14 48 DE 1D EA 44 AC 47 1E 48 04 1B 5B 37
-6D 00 D6 47 58 44 40 46 9A 4C 04 48 1E 48 05 6C
-69 6E 65 3A D6 47 D0 44 24 46 D6 47 1E 48 04 1B
-5B 30 6D 00 D6 47 24 4C 00 00 83 5B 27 5D 87 12
-C0 4C 14 48 14 48 B0 4A B0 4A 2A 44 E8 48 01 27
-87 12 42 4B 80 48 EE 48 40 46 CE 4C 2A 44 7A 4B
-32 45 81 5C 92 42 C0 1D C4 1D 30 4D AA 4C 81 5B
-82 43 BE 1D 30 4D D2 4C 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 4A 82 49 53 00 87 12
-BE 4B EA 44 40 46 12 4D AE 4C 14 48 F0 4C B0 4A
-2A 44 C0 4C F0 4C 2A 44 FA 4C 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 4B 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 4B
-80 48 EE 48 58 44 40 46 CE 4C 0C 45 40 46 5C 4D
-14 48 14 48 B0 4A B0 4A 14 48 B0 4A B0 4A 2A 44
-DE 4C 81 3B 82 93 BE 1D B5 27 87 12 14 48 2A 44
-B0 4A FA 4D E0 4C 2A 44 62 4D 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 4D 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A 4D 01 3A 30 12 A0 4D 92 B3 C6 1D A2 63 C6 1D
-87 12 42 4B 80 48 C8 4D 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 48 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 4C 90 4B 05 44 45 46 45 52
-B0 12 B8 4D BA 40 30 40 FC FF BA 40 AE 4D FE FF
-E3 3F 1E 4B 06 43 52 45 41 54 45 00 B0 12 B8 4D
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 4E 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 49 05 3E 42 4F 44 59 2E 52
-30 4D 44 4E 04 43 4F 44 45 00 B0 12 B8 4D A2 82
-C6 1D 87 12 D2 50 AC 50 2A 44 84 4E 07 43 4F 44
-45 4E 4E 4D B0 12 86 4D F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 50 FA 4D 2A 44 2C 4C 03 41
-53 4D B2 40 B0 50 DA 1D E0 3F AC 4E 06 45 4E 44
-41 53 4D 00 87 12 B4 4E F4 50 2A 44 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 50 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A 44
-02 00 A2 52 C6 1D ED 3F 1A 4D 85 48 49 32 4C 4F
-87 12 A0 4A 4A 4F B0 4A E0 4C D2 50 AC 50 2A 44
-1A 4F 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 46 00 00 2E 53 30 4D 5E 4E
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C 46 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 47
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C 4E 85 42 45 47 49 4E 30 40 A0 4A 70 4F 85 55
-4E 54 49 4C 39 40 40 46 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 4E 85 41
-47 41 49 4E 39 40 3C 46 EF 3F 7A 48 85 57 48 49
-4C 45 87 12 36 4F 76 44 2A 44 34 48 86 52 45 50
-45 41 54 00 87 12 B4 4F 76 4F 2A 44 50 4F 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 46 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 4A 84 4C 4F 4F 50 00 39 40 76 46
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 46 85 2B 4C 4F 4F 50
-39 40 64 46 E5 3F 06 50 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 48
-CA 1D F2 44 2A 44 84 12 7E 50 AE 4F 4A 53 DE 4F
-BE 4C 32 4F 3A 50 5E 54 64 48 66 51 80 51 8E 4F
-00 52 00 00 30 54 E8 4C 78 4E 00 00 84 12 7E 50
-88 5B 7A 5B 30 59 52 5A F6 58 00 00 6C 5B 00 00
-EC 58 96 5B 4E 59 8C 59 36 57 00 00 00 00 2E 5A
-AA 50 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 50 EE 50
-F4 50 04 51 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 4D 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 50 D0 50 A2 5B CC 4F 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 51 92 42 0C 18
-48 51 EF 3F 38 51 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 51 92 42 C6 1D 48 51 30 4D 4C 51
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC 4F 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 46
-DE 46 B2 40 0A 52 08 52 B2 40 D0 50 0E 18 B2 40
-A2 5B 0C 18 30 12 56 51 B2 40 86 47 84 47 B2 40
-08 48 06 48 B2 40 98 46 96 46 B2 40 18 00 0A 18
-37 40 1A 44 36 40 92 44 35 40 0E 44 34 40 00 44
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A 51
-04 57 41 52 4D 00 30 40 0A 52 3D 40 3E 52 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 48
-06 0D 1B 5B 37 6D 23 00 D6 47 34 46 1E 48 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 47 14 48 30 FF A0 4A
-B8 44 24 46 1E 48 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 46 9A 4C 82 4F 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E 52 B2 40 88 5A
-5C 01 B2 40 FE FF 02 02 B2 D3 06 02 B2 D3 26 02
-B2 40 FF BF 22 02 E2 D3 25 02 F2 43 22 03 F2 D3
-26 03 F2 40 A5 00 61 01 82 43 62 01 82 43 66 01
-39 40 10 00 B2 40 33 00 64 01 D2 43 61 01 92 D2
-9E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
-B2 D2 B0 01 F2 D0 10 00 2A 03 F2 C0 40 00 A1 04
-39 40 00 08 29 83 89 43 00 1C FC 23 39 40 34 00
-29 83 B9 40 9C 52 CC FF FB 23 B2 40 26 47 F0 FF
-B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42 04 18
-C8 05 92 C3 C0 05 92 D3 DA 05 3F 40 80 1C 31 40
-E0 1C 30 12 06 52 49 3F 88 52 07 43 4F 4D 50 41
-52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24
-1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF F5 27
-02 2C 3E 43 30 4D 1E 43 30 4D B2 4D 86 5B 54 48
-45 4E 5D 00 30 4D 7C 53 86 5B 45 4C 53 45 5D 00
-87 12 14 48 00 00 C6 44 42 4B 80 48 24 4B 34 44
-40 46 F2 53 44 44 1E 48 06 5B 54 48 45 4E 5D 00
-52 53 4A 46 C2 53 F8 47 D0 44 58 44 4A 46 98 53
-2A 44 44 44 1E 48 06 5B 45 4C 53 45 5D 00 52 53
-4A 46 E0 53 F8 47 D0 44 58 44 4A 46 96 53 2A 44
-1E 48 04 5B 49 46 5D 00 52 53 4A 46 98 53 3C 46
-96 53 F8 47 1E 48 05 0D 0A 6B 6F 20 D6 47 8C 47
-32 4B 3C 46 98 53 88 53 84 5B 49 46 5D 00 0E 93
-3E 4F BE 27 30 4D 08 54 89 5B 44 45 46 49 4E 45
-44 5D 87 12 42 4B 80 48 EE 48 6A 44 2A 44 18 54
-8B 5B 55 4E 44 45 46 49 4E 45 44 5D 87 12 42 4B
-80 48 EE 48 6A 44 00 45 2A 44 4C 54 3D 41 B2 4E
-0E 18 A2 4E 0C 18 3E 4F 30 40 56 51 48 50 06 4D
-41 52 4B 45 52 00 B0 12 B8 4D BA 40 84 12 FC FF
-BA 40 4A 54 FE FF 9A 42 C8 1D 00 00 28 83 8A 48
-02 00 A2 52 C6 1D 30 40 00 4E 1C 15 B0 12 2A 44
-80 48 EE 48 4A 46 A0 54 AA 49 40 46 CE 4C BA 54
-A2 54 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
-04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
-28 00 B0 12 8A 54 19 42 C6 1D A2 53 C6 1D 89 4E
-00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D
-B0 12 2A 44 80 48 AA 49 40 46 F8 54 EE 54 21 53
-3E 90 10 00 7D 2D E1 2B FA 54 B2 41 C4 1D DD 3F
-87 12 42 4B 74 48 08 55 0C 43 1B 42 C6 1D A2 53
-C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 1D
-B0 12 8A 54 3C 40 00 03 0E 93 1C 24 3C 40 10 03
-1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
-2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
-3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
-89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
-3C 40 10 02 92 53 C4 1D B0 12 8A 54 ED 3F 7A 90
-40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 D6 54
-0C 20 3C 50 10 00 3E 40 2B 00 B0 12 D6 54 92 92
-C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E DA 3F
-B0 12 D6 54 FA 23 3C 50 10 00 B0 12 BE 54 EF 3F
-0C 43 1B 42 C6 1D A2 53 C6 1D 87 12 42 4B 74 48
-D2 55 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
-82 00 C8 3F B0 12 D6 54 E1 23 3C 50 80 00 B0 12
-BE 54 DC 3F D6 46 04 52 45 54 49 00 87 12 14 48
-00 13 B0 4A 2A 44 14 48 2C 00 00 55 CA 55 10 56
-09 4B 2E 4E 0E DC A4 3F FC 4E 03 4D 4F 56 84 12
-06 56 00 40 1A 56 05 4D 4F 56 2E 42 84 12 06 56
-40 40 00 00 03 41 44 44 84 12 06 56 00 50 34 56
-05 41 44 44 2E 42 84 12 06 56 40 50 40 56 04 41
-44 44 43 00 84 12 06 56 00 60 4E 56 06 41 44 44
-43 2E 42 00 84 12 06 56 40 60 F6 55 04 53 55 42
-43 00 84 12 06 56 00 70 6C 56 06 53 55 42 43 2E
-42 00 84 12 06 56 40 70 7A 56 03 53 55 42 84 12
-06 56 00 80 8A 56 05 53 55 42 2E 42 84 12 06 56
-40 80 DE 4E 03 43 4D 50 84 12 06 56 00 90 A4 56
-05 43 4D 50 2E 42 84 12 06 56 40 90 CC 4E 04 44
-41 44 44 00 84 12 06 56 00 A0 BE 56 06 44 41 44
-44 2E 42 00 84 12 06 56 40 A0 B0 56 03 42 49 54
-84 12 06 56 00 B0 DC 56 05 42 49 54 2E 42 84 12
-06 56 40 B0 E8 56 03 42 49 43 84 12 06 56 00 C0
-F6 56 05 42 49 43 2E 42 84 12 06 56 40 C0 02 57
-03 42 49 53 84 12 06 56 00 D0 10 57 05 42 49 53
-2E 42 84 12 06 56 40 D0 00 00 03 58 4F 52 84 12
-06 56 00 E0 2A 57 05 58 4F 52 2E 42 84 12 06 56
-40 E0 5C 56 03 41 4E 44 84 12 06 56 00 F0 44 57
-05 41 4E 44 2E 42 84 12 06 56 40 F0 42 4B 00 55
-62 57 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA
-4F 3F 96 56 03 52 52 43 84 12 5C 57 00 10 74 57
-05 52 52 43 2E 42 84 12 5C 57 40 10 80 57 04 53
-57 50 42 00 84 12 5C 57 80 10 8E 57 03 52 52 41
-84 12 5C 57 00 11 9C 57 05 52 52 41 2E 42 84 12
-5C 57 40 11 A8 57 03 53 58 54 84 12 5C 57 80 11
-00 00 04 50 55 53 48 00 84 12 5C 57 00 12 C2 57
-06 50 55 53 48 2E 42 00 84 12 5C 57 40 12 1C 57
-04 43 41 4C 4C 00 84 12 5C 57 80 12 1A 53 0E 4A
-87 12 34 46 1E 48 0D 6F 75 74 20 6F 66 20 62 6F
-75 6E 64 73 4C 4C 42 4B 74 48 0C 58 92 53 C4 1D
-3E 40 2C 00 B0 12 2A 44 80 48 AA 49 40 46 CE 4C
-C0 55 24 58 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E
-0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
-D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F
-B6 57 04 52 52 43 4D 00 84 12 06 58 50 00 52 58
-04 52 52 41 4D 00 84 12 06 58 50 01 60 58 04 52
-4C 41 4D 00 84 12 06 58 50 02 6E 58 04 52 52 55
-4D 00 84 12 06 58 50 03 D0 57 05 50 55 53 48 4D
-84 12 06 58 00 15 8A 58 04 50 4F 50 4D 00 84 12
-06 58 00 17 7C 58 03 53 3E 3D 85 12 00 38 A6 58
-02 53 3C 00 85 12 00 34 98 58 03 30 3E 3D 85 12
-00 30 BA 58 02 30 3C 00 85 12 00 30 00 00 02 55
-3C 00 85 12 00 2C CE 58 03 55 3E 3D 85 12 00 28
-C4 58 03 30 3C 3E 85 12 00 24 E2 58 02 30 3D 00
-85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E
-00 00 A2 53 C6 1D 0E 4A 30 4D D8 58 04 54 48 45
-4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89
-0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D CC 56
-04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00
-A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F 0C 59 05 55
-4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83
-0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03 08 DA
-89 48 00 00 A2 53 C6 1D 30 4D 50 57 05 41 47 41
-49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49
-4C 45 87 12 FA 58 76 44 2A 44 B0 58 06 52 45 50
-45 41 54 00 87 12 82 59 12 59 2A 44 AE 59 3D 41
-08 4E 3E 4F 2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D
-00 00 30 4D E0 57 03 42 57 31 84 12 AC 59 00 00
-C6 59 03 42 57 32 84 12 AC 59 00 00 D2 59 03 42
-57 33 84 12 AC 59 00 00 EA 59 3D 41 1A 42 C6 1D
-28 4E B2 92 C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D
-8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12
-E8 59 00 00 0A 5A 03 46 57 32 84 12 E8 59 00 00
-16 5A 03 46 57 33 84 12 E8 59 00 00 00 00 05 3F
-47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04 3E B0
-00 10 02 24 3E E0 00 08 87 12 C0 4C DA 4A 2A 44
-22 5A 04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40
-00 3C F2 3F 87 12 42 4B 74 48 6C 5A 69 4E 3E 4F
-3C 4F 2C 4C 1B 42 C6 1D A2 53 C6 1D 79 90 52 00
-0A 20 B0 12 D6 54 5E 0E 5E 0E 0E DC 8B 4E 00 00
-0E 4B 3D 41 30 4D 79 90 23 00 0D 20 3C C0 40 00
-92 53 C4 1D A2 53 C6 1D B0 12 8A 54 BB 4F 02 00
-3E F0 0F 00 E8 3F 79 90 26 00 03 20 3C E0 E0 00
-EF 3F 3C C0 F0 00 79 90 40 00 12 20 92 53 C4 1D
-B0 12 D6 54 D8 23 3C D0 10 00 3E 40 2B 00 B0 12
-D6 54 92 92 C0 1D C4 1D CE 27 92 53 C4 1D CB 3F
-3C D0 30 00 A2 53 C6 1D 3E 40 28 00 B0 12 8A 54
-BB 4F 02 00 3E 40 29 00 EA 3F 87 12 42 4B 74 48
-12 5B 3B 4F 2C 4B 69 4E 7E 40 20 00 79 90 52 00
-03 20 B0 12 D6 54 B1 3F 3C C0 F0 00 A2 53 C6 1D
-79 90 26 00 09 20 3C D0 60 00 92 53 C4 1D B0 12
-8A 54 BB 4F 02 00 A1 3F 3C D0 70 00 3E 40 28 00
-B0 12 8A 54 BB 4F 02 00 3E 40 29 00 E2 3F 14 48
-2C 00 64 5A 0A 5B 66 44 2A 44 26 56 04 4D 4F 56
-41 00 84 12 5E 5B C0 00 DE 59 04 43 4D 50 41 00
-84 12 5E 5B D0 00 7C 59 04 41 44 44 41 00 84 12
-5E 5B E0 00 9C 59 04 53 55 42 41 00 84 12 5E 5B
-F0 00
+3B 49 3A 49 3D 15 87 12 74 4A DC 4A B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E 46 D4 44
+70 4A C4 45 74 4A 8C 46 BC 46 2E 44 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 4B 24 44 40 FF
+2A 4E C4 46 2E 44 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 4B 48 44 0C 4B 0A 4A 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A 4B 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 47 24 44 6E 4B F8 49 26 47 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 4F B0 12
+06 45 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 4F 24 44 DE 1D 02 45 D6 45 2E 44 04 1B 5B 37
+6D 00 00 46 7C 46 4C 44 C8 4B 2E 46 2E 44 05 6C
+69 6E 65 3A 00 46 66 47 00 46 2E 44 04 1B 5B 30
+6D 00 00 46 50 4B 00 00 83 5B 27 5D 0D 12 87 12
+F0 4B 24 44 24 44 F8 49 F8 49 26 47 44 48 01 27
+0D 12 87 12 70 4A F2 47 4A 48 4C 44 00 4C 26 47
+AA 4A D2 46 81 5C 92 42 C0 1D C4 1D 30 4D D8 4B
+81 5B 82 43 BE 1D 30 4D 04 4C 01 5D B2 43 BE 1D
+30 4D F2 4A 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 4A F2 47 4A 48 7C 46 4C 44 00 4C BC 46
+4C 44 50 4C 24 44 24 44 F8 49 F8 49 24 44 F8 49
+F8 49 26 47 40 47 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 4C 01 3A
+30 12 B8 4C 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 4A F2 47 86 4C 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E 4C 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 4C 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 44
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 4B CC 4C 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 44 26 47 F8 49 F2 4C 12 4C 26 47 5C 4A 06 43
+52 45 41 54 45 00 B0 12 74 4C BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 4A 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 4D 04 43 4F 44 45 00 B0 12 74 4C A2 82 C6 1D
+0D 12 87 12 8A 4E 64 4E 26 47 72 4D 07 43 4F 44
+45 4E 4E 4D 30 12 7C 4D 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 4C A4 4E 26 47 58 4B
+03 41 53 4D B2 40 68 4E DA 1D DE 3F 9C 4D 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 4D C2 4E 26 47
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 4E 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 4C 85 48 49 32 4C 4F 0D 12
+87 12 2A 4E 1E 4E F8 49 12 4C 80 4D 26 47 2E 53
+30 4D 8C 4D 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 44 CA 1D AE 46 26 47 84 12
+36 4E B0 4D 5A 50 58 4D EE 4B 08 4E 42 46 20 4A
+D8 47 34 4F 4E 4F 62 47 CE 4F 00 00 E2 51 1A 4C
+AA 48 00 00 84 12 36 4E 14 57 7A 57 C8 56 CA 57
+8E 56 00 00 BE 53 00 00 84 56 36 57 E6 56 24 57
+CE 54 00 00 00 00 E6 57 62 4E 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E 4E BC 4E C2 4E
+D2 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 4C 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 4E 88 4E 02 58 A6 47 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 4F 92 42 0C 18 16 4F
+EF 3F 06 4F 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 4F 92 42 C6 1D 16 4F 30 4D 1A 4F 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC 47 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 44 02 44
+B2 40 D8 4F D6 4F B2 40 88 4E 0E 18 B2 40 02 58
+0C 18 30 12 24 4F B2 40 C8 45 C6 45 B2 40 32 46
+30 46 B2 40 4A 46 48 46 B2 40 18 00 0A 18 37 40
+26 47 36 40 9C 46 35 40 FA 44 34 40 EC 44 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 4F 04 57
+41 52 4D 00 30 40 D8 4F 3D 40 10 50 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 44 07 0D 0A 1B 5B 37 6D 23 00 46 9C 47 2E 44
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 46 24 44 40 FF
+2A 4E A6 46 66 47 2E 44 0A 62 79 74 65 73 20 66
+72 65 65 00 48 44 C8 4B 24 4E 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3 06 02
+B2 D3 26 02 B2 40 FF BF 22 02 E2 D3 25 02 F2 43
+22 03 F2 D3 26 03 F2 40 A5 00 61 01 82 43 62 01
+82 43 66 01 39 40 10 00 B2 40 33 00 64 01 D2 43
+61 01 92 D2 9E 01 08 18 38 40 59 14 18 83 FE 23
+19 83 FA 23 B2 D2 B0 01 F2 D0 10 00 2A 03 F2 C0
+40 00 A1 04 39 40 00 08 29 83 89 43 00 1C FC 23
+B0 12 0E 44 B2 40 81 00 C0 05 92 42 02 18 C6 05
+92 42 04 18 C8 05 92 C3 C0 05 3F 40 80 1C 30 12
+D4 4F 52 3F 24 4D 86 5B 54 48 45 4E 5D 00 30 4D
+0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83
+06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27 2D 4D
+3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53 2D 53
+F7 3F 06 51 86 5B 45 4C 53 45 5D 00 0D 12 87 12
+24 44 00 00 AA 46 70 4A F2 47 62 4A 68 46 4C 44
+9E 51 70 46 2E 44 06 5B 54 48 45 4E 5D 00 10 51
+78 51 34 51 56 51 26 47 70 46 2E 44 06 5B 45 4C
+53 45 5D 00 10 51 8E 51 34 51 54 51 26 47 2E 44
+04 5B 49 46 5D 00 10 51 56 51 48 44 54 51 22 46
+2E 44 05 0D 0A 6B 6F 20 00 46 D4 44 C4 44 48 44
+56 51 44 51 84 5B 49 46 5D 00 0E 93 3E 4F C6 27
+30 4D 2F 53 30 4D B4 51 89 5B 44 45 46 49 4E 45
+44 5D 0D 12 87 12 70 4A F2 47 4A 48 C2 51 26 47
+C8 51 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 0D 12
+87 12 D2 51 F6 51 3D 41 30 40 B6 46 38 40 C0 1D
+0A 4E 39 48 2E 48 09 5E 1E 52 C4 1D 09 9E 03 24
+7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 1D 30 4D
+1C 15 87 12 F2 47 4A 48 42 44 34 52 06 49 4C 44
+00 4C 4E 52 36 52 39 4E 39 80 86 12 08 24 19 53
+02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
+30 41 3E 40 28 00 B0 12 20 52 19 42 C6 1D A2 53
+C6 1D 89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 1D
+92 53 C4 1D 87 12 F2 47 06 49 4C 44 8A 52 80 52
+21 53 3E 90 10 00 80 2D E2 2B 8C 52 B2 41 C4 1D
+DE 3F 0D 12 87 12 70 4A FC 51 9C 52 0C 43 1B 42
+C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20
+92 53 C4 1D B0 12 20 52 3C 40 00 03 0E 93 1C 24
+3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
+3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
+3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 1D
+A2 53 C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
+26 00 07 20 3C 40 10 02 92 53 C4 1D B0 12 20 52
+ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 1D
+B0 12 6A 52 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
+6A 52 92 92 C0 1D C4 1D 02 24 92 53 C4 1D 8E 10
+0C 5E DA 3F B0 12 6A 52 FA 23 3C 50 10 00 B0 12
+52 52 EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12
+87 12 70 4A FC 51 68 53 FE 90 26 00 00 00 3E 40
+20 00 03 20 3C 50 82 00 C7 3F B0 12 6A 52 E0 23
+3C 50 80 00 B0 12 52 52 DB 3F 00 00 04 52 45 54
+49 00 0D 12 87 12 24 44 00 13 F8 49 26 47 24 44
+2C 00 92 52 5E 53 A8 53 09 4B 2E 4E 0E DC A2 3F
+F6 4D 03 4D 4F 56 84 12 9E 53 00 40 B2 53 05 4D
+4F 56 2E 42 84 12 9E 53 40 40 00 00 03 41 44 44
+84 12 9E 53 00 50 CC 53 05 41 44 44 2E 42 84 12
+9E 53 40 50 D8 53 04 41 44 44 43 00 84 12 9E 53
+00 60 E6 53 06 41 44 44 43 2E 42 00 84 12 9E 53
+40 60 8C 53 04 53 55 42 43 00 84 12 9E 53 00 70
+04 54 06 53 55 42 43 2E 42 00 84 12 9E 53 40 70
+12 54 03 53 55 42 84 12 9E 53 00 80 22 54 05 53
+55 42 2E 42 84 12 9E 53 40 80 D2 4D 03 43 4D 50
+84 12 9E 53 00 90 3C 54 05 43 4D 50 2E 42 84 12
+9E 53 40 90 BE 4D 04 44 41 44 44 00 84 12 9E 53
+00 A0 56 54 06 44 41 44 44 2E 42 00 84 12 9E 53
+40 A0 48 54 03 42 49 54 84 12 9E 53 00 B0 74 54
+05 42 49 54 2E 42 84 12 9E 53 40 B0 80 54 03 42
+49 43 84 12 9E 53 00 C0 8E 54 05 42 49 43 2E 42
+84 12 9E 53 40 C0 9A 54 03 42 49 53 84 12 9E 53
+00 D0 A8 54 05 42 49 53 2E 42 84 12 9E 53 40 D0
+00 00 03 58 4F 52 84 12 9E 53 00 E0 C2 54 05 58
+4F 52 2E 42 84 12 9E 53 40 E0 F4 53 03 41 4E 44
+84 12 9E 53 00 F0 DC 54 05 41 4E 44 2E 42 84 12
+9E 53 40 F0 70 4A 92 52 FA 54 0A 4C 3C F0 70 00
+8A 10 3A F0 0F 00 0C DA 4F 3F 2E 54 03 52 52 43
+84 12 F4 54 00 10 0C 55 05 52 52 43 2E 42 84 12
+F4 54 40 10 18 55 04 53 57 50 42 00 84 12 F4 54
+80 10 26 55 03 52 52 41 84 12 F4 54 00 11 34 55
+05 52 52 41 2E 42 84 12 F4 54 40 11 40 55 03 53
+58 54 84 12 F4 54 80 11 00 00 04 50 55 53 48 00
+84 12 F4 54 00 12 5A 55 06 50 55 53 48 2E 42 00
+84 12 F4 54 40 12 B4 54 04 43 41 4C 4C 00 84 12
+F4 54 80 12 1A 53 0E 4A 0D 12 87 12 9C 47 2E 44
+0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 7A 4B
+70 4A FC 51 A6 55 92 53 C4 1D 3E 40 2C 00 87 12
+F2 47 06 49 4C 44 00 4C 54 53 BC 55 0A 4E 3E 4F
+1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28
+0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92
+D1 2F 8A 10 5A 06 8F 3F 4E 55 04 52 52 43 4D 00
+84 12 A0 55 50 00 EA 55 04 52 52 41 4D 00 84 12
+A0 55 50 01 F8 55 04 52 4C 41 4D 00 84 12 A0 55
+50 02 06 56 04 52 52 55 4D 00 84 12 A0 55 50 03
+68 55 05 50 55 53 48 4D 84 12 A0 55 00 15 22 56
+04 50 4F 50 4D 00 84 12 A0 55 00 17 14 56 03 53
+3E 3D 85 12 00 38 3E 56 02 53 3C 00 85 12 00 34
+30 56 03 30 3E 3D 85 12 00 30 52 56 02 30 3C 00
+85 12 00 30 00 00 02 55 3C 00 85 12 00 2C 66 56
+03 55 3E 3D 85 12 00 28 5C 56 03 30 3C 3E 85 12
+00 24 7A 56 02 30 3D 00 85 12 00 20 00 00 02 49
+46 00 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A
+30 4D 70 56 04 54 48 45 4E 00 1A 42 C6 1D 08 4E
+3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02 63 2F
+88 DA 00 00 30 4D 64 54 04 45 4C 53 45 00 1A 42
+C6 1D BA 40 00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A
+00 00 E3 3F A4 56 05 55 4E 54 49 4C 3A 4F 08 4E
+3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE
+42 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 1D
+30 4D E8 54 05 41 47 41 49 4E 0A 4E 38 40 00 3C
+E7 3F 00 00 05 57 48 49 4C 45 0D 12 87 12 92 56
+82 46 26 47 48 56 06 52 45 50 45 41 54 00 0D 12
+87 12 1A 57 AA 56 26 47 4A 57 3D 41 08 4E 3E 4F
+2A 48 B2 92 C4 1D CB 2F 98 42 C6 1D 00 00 30 4D
+78 55 03 42 57 31 84 12 48 57 00 00 62 57 03 42
+57 32 84 12 48 57 00 00 6E 57 03 42 57 33 84 12
+48 57 00 00 86 57 3D 41 1A 42 C6 1D 28 4E B2 92
+C4 1D 8E 2B BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00
+3E 4F 30 4D 00 00 03 46 57 31 84 12 84 57 00 00
+A6 57 03 46 57 32 84 12 84 57 00 00 B2 57 03 46
+57 33 84 12 84 57 00 00 BE 57 04 47 4F 54 4F 00
+2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 87 12 F0 4B
+18 4A 26 47 00 00 05 3F 47 4F 54 4F 3E 90 00 30
+F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0 00 08
+EC 3F
@FFFE
-9C 52
+6C 50
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 9E 5B D0 50
-2D 01 6B B4 B6 46 C8 46
+10 00 04 00 51 55 40 1F 05 00 18 00 FE 57 88 4E
+2E 01 6B B0 06 45 18 45 D4 4F
@4400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 44
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 44
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 44
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 44 02 3E 52 00 0E 12 3E 4F 30 4D 70 44 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 44 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 44 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 44
-01 21 BE 4F 00 00 3E 4F 30 4D CC 44 02 30 3D 00
-1E 83 0E 7E 30 4D FC 44 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 45 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 44 B0 12 06 45 12 D2 0A 18 F9 3F 39 40
+34 00 29 83 B9 40 6C 50 CC FF FB 23 B2 40 68 45
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 44 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 45 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 45 02 23 53 00 87 12 88 45 C0 45
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 45
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 44 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 45 34 44 86 44 D4 44 BA 45
-92 44 F8 45 D4 45 D6 47 42 4B 82 47 2A 44 22 45
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 45 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 46 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 46 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 46 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C3 23 02 30 41 B2 40 13 00 CE 05 E2 D3
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 46
-B0 12 B6 46 12 D2 0A 18 F9 3F F0 44 06 41 43 43
-45 50 54 00 3C 40 64 47 3B 40 2E 47 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 47
-92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 CC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
-FD 27 82 48 CE 05 30 4D 5A 47 2D 83 92 B3 DC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 44 04 45 4D 49
-54 00 30 40 86 47 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C 47 04 45 43 48 4F 00 B2 40 82 48
-52 47 82 43 DE 1D 30 4D 32 46 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 47 92 43 DE 1D 30 4D 20 46
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 47
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 47 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 45
-02 43 52 00 30 40 08 48 87 12 1E 48 02 0D 0A 00
-D6 47 2A 44 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 45 82 53 22 00 82 43 B4 1D 87 12 14 48
-1E 48 B0 4A 14 48 22 00 80 48 4C 48 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA 47 82 2E 22 00 87 12 38 48 14 48 D6 47
-B0 4A 2A 44 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 44 34 40 00 44 30 4D 82 44 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 49 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 49 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 45 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 46 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 44 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC 46 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 47 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 4A 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 48 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 48 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 4B 42 4B 80 48 50 4B
-3D 40 58 4B CC 22 82 3E 5A 4B 0A 4E 3E 4F 3D 40
-70 4B 23 27 3D 40 4A 4B 1A E2 BE 1D A1 27 B5 23
-72 4B 3E 4F 3D 40 4A 4B B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 4E CB 3F D2 4A
+12 D3 F5 3F 34 40 EC 44 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C3 23 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D3 23 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 45 3B 40 70 45 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 45
+92 B3 DC 05 05 24 18 42 CC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 44 21 52 3A 17 58 42 CC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+DC 05 FD 27 82 48 CE 05 30 4D 9C 45 2D 83 92 B3
+DC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 45 08 4E 3E 4F E0 3F BE 45
+04 45 43 48 4F 00 B2 40 82 48 94 45 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 45 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 46 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 46 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 46 0D 12 87 12 2E 44 02 0D 0A 00 00 46 26 47
+00 00 03 4B 45 59 30 40 4A 46 18 42 CC 05 2F 83
+8F 4E 00 00 B0 12 06 45 92 B3 DC 05 FD 27 1E 42
+CC 05 B0 12 18 45 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A 46
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 44 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 46
+02 23 53 00 0D 12 87 12 E2 46 1C 47 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 47 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 45 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 46 14 47 9C 46 54 47 30 47
+00 46 70 4A C4 45 26 47 E4 45 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 47 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 44 2E 44 F8 49 24 44 22 00 F2 47 C0 47
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A 47 82 2E 22 00 0D 12 87 12
+AA 47 24 44 00 46 F8 49 26 47 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 44 34 40 EC 44 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 49 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 49 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 44
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C 45 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 49
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 44 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 47 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 44 70 4A F2 47 80 4A
+3D 40 88 4A E2 22 A4 26 8A 4A 0A 4E 3E 4F 3D 40
+A0 4A 39 27 3D 40 7A 4A 1A E2 BE 1D BD 23 AC 27
+A2 4A 3E 4F 3D 40 7A 4A BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 4D D2 3F D0 45
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 44 46 4B AE 4B B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 45 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A 44
-04 48 8C 47 42 4B 82 47 46 4B A4 44 0C 45 1E 48
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 4C
-14 48 30 FF A0 4A 26 45 1E 48 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 4C 3C 46 E0 4B C2 4A 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E 4C 86 41 42 4F
-52 54 22 00 87 12 38 48 14 48 40 4C B0 4A 2A 44
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 C8 51
-B0 12 B6 46 92 C3 DC 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 DC 05 F3 23 87 12
-42 51 14 48 DE 1D EA 44 AC 47 1E 48 04 1B 5B 37
-6D 00 D6 47 58 44 40 46 9A 4C 04 48 1E 48 05 6C
-69 6E 65 3A D6 47 D0 44 24 46 D6 47 1E 48 04 1B
-5B 30 6D 00 D6 47 24 4C 00 00 83 5B 27 5D 87 12
-C0 4C 14 48 14 48 B0 4A B0 4A 2A 44 E8 48 01 27
-87 12 42 4B 80 48 EE 48 40 46 CE 4C 2A 44 7A 4B
-32 45 81 5C 92 42 C0 1D C4 1D 30 4D AA 4C 81 5B
-82 43 BE 1D 30 4D D2 4C 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 4A 82 49 53 00 87 12
-BE 4B EA 44 40 46 12 4D AE 4C 14 48 F0 4C B0 4A
-2A 44 C0 4C F0 4C 2A 44 FA 4C 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 4B 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 4B
-80 48 EE 48 58 44 40 46 CE 4C 0C 45 40 46 5C 4D
-14 48 14 48 B0 4A B0 4A 14 48 B0 4A B0 4A 2A 44
-DE 4C 81 3B 82 93 BE 1D B5 27 87 12 14 48 2A 44
-B0 4A FA 4D E0 4C 2A 44 62 4D 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 4D 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A 4D 01 3A 30 12 A0 4D 92 B3 C6 1D A2 63 C6 1D
-87 12 42 4B 80 48 C8 4D 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 48 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 4C 90 4B 05 44 45 46 45 52
-B0 12 B8 4D BA 40 30 40 FC FF BA 40 AE 4D FE FF
-E3 3F 1E 4B 06 43 52 45 41 54 45 00 B0 12 B8 4D
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 4E 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 49 05 3E 42 4F 44 59 2E 52
-30 4D 44 4E 04 43 4F 44 45 00 B0 12 B8 4D A2 82
-C6 1D 87 12 D2 50 AC 50 2A 44 84 4E 07 43 4F 44
-45 4E 4E 4D B0 12 86 4D F2 3F 00 00 07 45 4E 44
-43 4F 44 45 87 12 E0 50 FA 4D 2A 44 2C 4C 03 41
-53 4D B2 40 B0 50 DA 1D E0 3F AC 4E 06 45 4E 44
-41 53 4D 00 87 12 B4 4E F4 50 2A 44 00 00 05 43
-4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12 00 00 A2 53
-C6 1D B2 43 BE 1D 30 40 E0 50 00 00 05 4C 4F 32
-48 49 1A 42 C6 1D BA 40 B0 12 00 00 BA 40 2A 44
-02 00 A2 52 C6 1D ED 3F 1A 4D 85 48 49 32 4C 4F
-87 12 A0 4A 4A 4F B0 4A E0 4C D2 50 AC 50 2A 44
-1A 4F 82 49 46 00 2F 83 8F 4E 00 00 1E 42 C6 1D
-A2 52 C6 1D BE 40 40 46 00 00 2E 53 30 4D 5E 4E
-84 45 4C 53 45 00 A2 52 C6 1D 1A 42 C6 1D BA 40
-3C 46 FC FF 8E 4A 00 00 2A 83 0E 4A 30 4D D0 47
-84 54 48 45 4E 00 9E 42 C6 1D 00 00 3E 4F 30 4D
-9C 4E 85 42 45 47 49 4E 30 40 A0 4A 70 4F 85 55
-4E 54 49 4C 39 40 40 46 A2 52 C6 1D 1A 42 C6 1D
-8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D BE 4E 85 41
-47 41 49 4E 39 40 3C 46 EF 3F 7A 48 85 57 48 49
-4C 45 87 12 36 4F 76 44 2A 44 34 48 86 52 45 50
-45 41 54 00 87 12 B4 4F 76 4F 2A 44 50 4F 82 44
-4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D
-BE 40 54 46 FE FF A2 53 00 1C 1A 42 00 1C 8A 43
-00 00 30 4D E2 4A 84 4C 4F 4F 50 00 39 40 76 46
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-1E 42 00 1C A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A
-00 00 F6 3F 3E 4F 30 4D 90 46 85 2B 4C 4F 4F 50
-39 40 64 46 E5 3F 06 50 04 4D 4F 56 45 00 0A 4E
-38 4F 39 4F 3E 4F 0A 93 11 24 08 99 0F 24 06 2C
-F8 49 00 00 18 53 1A 83 FB 23 30 4D 08 5A 09 5A
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 14 48
-CA 1D F2 44 2A 44 84 12 7E 50 AE 4F 46 53 DE 4F
-BE 4C 32 4F 3A 50 5A 54 64 48 66 51 80 51 8E 4F
-00 52 00 00 2C 54 E8 4C 78 4E 00 00 84 12 7E 50
-84 5B 76 5B 2C 59 4E 5A F2 58 00 00 68 5B 00 00
-E8 58 92 5B 4A 59 88 59 32 57 00 00 00 00 2A 5A
-AA 50 3A 40 0C 00 39 40 CA 1D 38 40 CC 1D C6 3F
-3A 40 0E 00 39 40 CC 1D 38 40 CA 1D B9 3F 82 43
-CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D 86 50 EE 50
-F4 50 04 51 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D
-3D 40 10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98
-FC 2B 89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23
-3E 4F 3D 41 30 4D 32 4D 09 50 57 52 5F 53 54 41
-54 45 84 12 FC 50 D0 50 9E 5B CC 4F 09 52 53 54
-5F 53 54 41 54 45 92 42 0E 18 46 51 92 42 0C 18
-48 51 EF 3F 38 51 08 50 57 52 5F 48 45 52 45 00
-92 42 C8 1D 46 51 92 42 C6 1D 48 51 30 4D 4C 51
-08 52 53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18
-92 42 C6 1D 0C 18 EC 3F BC 4F 04 57 49 50 45 00
-39 40 10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 46
-DE 46 B2 40 0A 52 08 52 B2 40 D0 50 0E 18 B2 40
-9E 5B 0C 18 30 12 56 51 B2 40 86 47 84 47 B2 40
-08 48 06 48 B2 40 98 46 96 46 B2 40 18 00 0A 18
-37 40 1A 44 36 40 92 44 35 40 0E 44 34 40 00 44
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 9A 51
-04 57 41 52 4D 00 30 40 0A 52 3D 40 3E 52 92 C3
-30 01 1E 42 08 18 0E 93 11 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 3E 90 0A 00 B8 27
-3E 90 16 00 B5 2F 2E 93 84 27 8D 2F 30 4D 1E 48
-06 0D 1B 5B 37 6D 23 00 D6 47 34 46 1E 48 19 46
-61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D 2E 54
-68 6F 6F 72 65 6E 73 20 D6 47 14 48 30 FF A0 4A
-B8 44 24 46 1E 48 0A 62 79 74 65 73 20 66 72 65
-65 00 3C 46 9A 4C 82 4F 04 43 4F 4C 44 00 92 B3
-CA 05 FD 23 B2 40 04 A5 20 01 3E 52 B2 40 88 5A
-5C 01 B2 40 FE FF 02 02 B2 D3 06 02 B2 D3 26 02
-B2 40 FF BF 22 02 E2 D3 25 02 F2 43 22 03 F2 D3
-26 03 F2 40 A5 00 61 01 82 43 66 01 39 40 80 00
-B2 40 33 00 64 01 D2 43 61 01 92 D2 9E 01 08 18
-38 40 59 14 18 83 FE 23 19 83 FA 23 B2 D2 B0 01
-F2 D0 10 00 2A 03 F2 C0 40 00 A1 04 39 40 00 08
-29 83 89 43 00 1C FC 23 39 40 34 00 29 83 B9 40
-9C 52 CC FF FB 23 B2 40 26 47 F0 FF B2 40 81 00
-C0 05 92 42 02 18 C6 05 92 42 04 18 C8 05 92 C3
-C0 05 92 D3 DA 05 3F 40 80 1C 31 40 E0 1C 30 12
-06 52 4B 3F 88 52 07 43 4F 4D 50 41 52 45 0C 4E
-38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30
-1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43
-30 4D 1E 43 30 4D B2 4D 86 5B 54 48 45 4E 5D 00
-30 4D 78 53 86 5B 45 4C 53 45 5D 00 87 12 14 48
-00 00 C6 44 42 4B 80 48 24 4B 34 44 40 46 EE 53
-44 44 1E 48 06 5B 54 48 45 4E 5D 00 4E 53 4A 46
-BE 53 F8 47 D0 44 58 44 4A 46 94 53 2A 44 44 44
-1E 48 06 5B 45 4C 53 45 5D 00 4E 53 4A 46 DC 53
-F8 47 D0 44 58 44 4A 46 92 53 2A 44 1E 48 04 5B
-49 46 5D 00 4E 53 4A 46 94 53 3C 46 92 53 F8 47
-1E 48 05 0D 0A 6B 6F 20 D6 47 8C 47 32 4B 3C 46
-94 53 84 53 84 5B 49 46 5D 00 0E 93 3E 4F BE 27
-30 4D 04 54 89 5B 44 45 46 49 4E 45 44 5D 87 12
-42 4B 80 48 EE 48 6A 44 2A 44 14 54 8B 5B 55 4E
-44 45 46 49 4E 45 44 5D 87 12 42 4B 80 48 EE 48
-6A 44 00 45 2A 44 48 54 3D 41 B2 4E 0E 18 A2 4E
-0C 18 3E 4F 30 40 56 51 48 50 06 4D 41 52 4B 45
-52 00 B0 12 B8 4D BA 40 84 12 FC FF BA 40 46 54
-FE FF 9A 42 C8 1D 00 00 28 83 8A 48 02 00 A2 52
-C6 1D 30 40 00 4E 1C 15 B0 12 2A 44 80 48 EE 48
-4A 46 9C 54 AA 49 40 46 CE 4C B6 54 9E 54 39 4E
-39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53
-19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12
-86 54 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 1D 92 53 C4 1D B0 12 2A 44
-80 48 AA 49 40 46 F4 54 EA 54 21 53 3E 90 10 00
-7D 2D E1 2B F6 54 B2 41 C4 1D DD 3F 87 12 42 4B
-74 48 04 55 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E
-3E 4F 7A 90 23 00 27 20 92 53 C4 1D B0 12 86 54
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02
-92 53 C4 1D B0 12 86 54 ED 3F 7A 90 40 00 16 20
-3C 40 20 00 92 53 C4 1D B0 12 D2 54 0C 20 3C 50
-10 00 3E 40 2B 00 B0 12 D2 54 92 92 C0 1D C4 1D
-02 24 92 53 C4 1D 8E 10 0C 5E DA 3F B0 12 D2 54
-FA 23 3C 50 10 00 B0 12 BA 54 EF 3F 0C 43 1B 42
-C6 1D A2 53 C6 1D 87 12 42 4B 74 48 CE 55 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C8 3F
-B0 12 D2 54 E1 23 3C 50 80 00 B0 12 BA 54 DC 3F
-D6 46 04 52 45 54 49 00 87 12 14 48 00 13 B0 4A
-2A 44 14 48 2C 00 FC 54 C6 55 0C 56 09 4B 2E 4E
-0E DC A4 3F FC 4E 03 4D 4F 56 84 12 02 56 00 40
-16 56 05 4D 4F 56 2E 42 84 12 02 56 40 40 00 00
-03 41 44 44 84 12 02 56 00 50 30 56 05 41 44 44
-2E 42 84 12 02 56 40 50 3C 56 04 41 44 44 43 00
-84 12 02 56 00 60 4A 56 06 41 44 44 43 2E 42 00
-84 12 02 56 40 60 F2 55 04 53 55 42 43 00 84 12
-02 56 00 70 68 56 06 53 55 42 43 2E 42 00 84 12
-02 56 40 70 76 56 03 53 55 42 84 12 02 56 00 80
-86 56 05 53 55 42 2E 42 84 12 02 56 40 80 DE 4E
-03 43 4D 50 84 12 02 56 00 90 A0 56 05 43 4D 50
-2E 42 84 12 02 56 40 90 CC 4E 04 44 41 44 44 00
-84 12 02 56 00 A0 BA 56 06 44 41 44 44 2E 42 00
-84 12 02 56 40 A0 AC 56 03 42 49 54 84 12 02 56
-00 B0 D8 56 05 42 49 54 2E 42 84 12 02 56 40 B0
-E4 56 03 42 49 43 84 12 02 56 00 C0 F2 56 05 42
-49 43 2E 42 84 12 02 56 40 C0 FE 56 03 42 49 53
-84 12 02 56 00 D0 0C 57 05 42 49 53 2E 42 84 12
-02 56 40 D0 00 00 03 58 4F 52 84 12 02 56 00 E0
-26 57 05 58 4F 52 2E 42 84 12 02 56 40 E0 58 56
-03 41 4E 44 84 12 02 56 00 F0 40 57 05 41 4E 44
-2E 42 84 12 02 56 40 F0 42 4B FC 54 5E 57 0A 4C
-3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 92 56
-03 52 52 43 84 12 58 57 00 10 70 57 05 52 52 43
-2E 42 84 12 58 57 40 10 7C 57 04 53 57 50 42 00
-84 12 58 57 80 10 8A 57 03 52 52 41 84 12 58 57
-00 11 98 57 05 52 52 41 2E 42 84 12 58 57 40 11
-A4 57 03 53 58 54 84 12 58 57 80 11 00 00 04 50
-55 53 48 00 84 12 58 57 00 12 BE 57 06 50 55 53
-48 2E 42 00 84 12 58 57 40 12 18 57 04 43 41 4C
-4C 00 84 12 58 57 80 12 1A 53 0E 4A 87 12 34 46
-1E 48 0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73
-4C 4C 42 4B 74 48 08 58 92 53 C4 1D 3E 40 2C 00
-B0 12 2A 44 80 48 AA 49 40 46 CE 4C BC 55 20 58
-0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C
-59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E
-94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F B2 57 04 52
-52 43 4D 00 84 12 02 58 50 00 4E 58 04 52 52 41
-4D 00 84 12 02 58 50 01 5C 58 04 52 4C 41 4D 00
-84 12 02 58 50 02 6A 58 04 52 52 55 4D 00 84 12
-02 58 50 03 CC 57 05 50 55 53 48 4D 84 12 02 58
-00 15 86 58 04 50 4F 50 4D 00 84 12 02 58 00 17
-78 58 03 53 3E 3D 85 12 00 38 A2 58 02 53 3C 00
-85 12 00 34 94 58 03 30 3E 3D 85 12 00 30 B6 58
-02 30 3C 00 85 12 00 30 00 00 02 55 3C 00 85 12
-00 2C CA 58 03 55 3E 3D 85 12 00 28 C0 58 03 30
-3C 3E 85 12 00 24 DE 58 02 30 3D 00 85 12 00 20
-00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00 A2 53
-C6 1D 0E 4A 30 4D D4 58 04 54 48 45 4E 00 1A 42
-C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 63 2F 88 DA 00 00 30 4D C8 56 04 45 4C 53
-45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53 C6 1D
-2F 83 8F 4A 00 00 E3 3F 08 59 05 55 4E 54 49 4C
-3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11
-3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48 00 00
-A2 53 C6 1D 30 4D 4C 57 05 41 47 41 49 4E 0A 4E
-38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12
-F6 58 76 44 2A 44 AC 58 06 52 45 50 45 41 54 00
-87 12 7E 59 0E 59 2A 44 AA 59 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D 00 00 30 4D
-DC 57 03 42 57 31 84 12 A8 59 00 00 C2 59 03 42
-57 32 84 12 A8 59 00 00 CE 59 03 42 57 33 84 12
-A8 59 00 00 E6 59 3D 41 1A 42 C6 1D 28 4E B2 92
-C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 84 12 E4 59 00 00
-06 5A 03 46 57 32 84 12 E4 59 00 00 12 5A 03 46
-57 33 84 12 E4 59 00 00 00 00 05 3F 47 4F 54 4F
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 87 12 C0 4C DA 4A 2A 44 1E 5A 04 47
-4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F
-87 12 42 4B 74 48 68 5A 69 4E 3E 4F 3C 4F 2C 4C
-1B 42 C6 1D A2 53 C6 1D 79 90 52 00 0A 20 B0 12
-D2 54 5E 0E 5E 0E 0E DC 8B 4E 00 00 0E 4B 3D 41
-30 4D 79 90 23 00 0D 20 3C C0 40 00 92 53 C4 1D
-A2 53 C6 1D B0 12 86 54 BB 4F 02 00 3E F0 0F 00
-E8 3F 79 90 26 00 03 20 3C E0 E0 00 EF 3F 3C C0
-F0 00 79 90 40 00 12 20 92 53 C4 1D B0 12 D2 54
-D8 23 3C D0 10 00 3E 40 2B 00 B0 12 D2 54 92 92
-C0 1D C4 1D CE 27 92 53 C4 1D CB 3F 3C D0 30 00
-A2 53 C6 1D 3E 40 28 00 B0 12 86 54 BB 4F 02 00
-3E 40 29 00 EA 3F 87 12 42 4B 74 48 0E 5B 3B 4F
-2C 4B 69 4E 7E 40 20 00 79 90 52 00 03 20 B0 12
-D2 54 B1 3F 3C C0 F0 00 A2 53 C6 1D 79 90 26 00
-09 20 3C D0 60 00 92 53 C4 1D B0 12 86 54 BB 4F
-02 00 A1 3F 3C D0 70 00 3E 40 28 00 B0 12 86 54
-BB 4F 02 00 3E 40 29 00 E2 3F 14 48 2C 00 60 5A
-06 5B 66 44 2A 44 22 56 04 4D 4F 56 41 00 84 12
-5A 5B C0 00 DA 59 04 43 4D 50 41 00 84 12 5A 5B
-D0 00 78 59 04 41 44 44 41 00 84 12 5A 5B E0 00
-98 59 04 53 55 42 41 00 84 12 5A 5B F0 00
+3B 49 3A 49 3D 15 87 12 74 4A DC 4A B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E 46 D4 44
+70 4A C4 45 74 4A 8C 46 BC 46 2E 44 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 4B 24 44 40 FF
+2A 4E C4 46 2E 44 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 4B 48 44 0C 4B 0A 4A 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A 4B 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 47 24 44 6E 4B F8 49 26 47 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 4F B0 12
+06 45 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+10 4F 24 44 DE 1D 02 45 D6 45 2E 44 04 1B 5B 37
+6D 00 00 46 7C 46 4C 44 C8 4B 2E 46 2E 44 05 6C
+69 6E 65 3A 00 46 66 47 00 46 2E 44 04 1B 5B 30
+6D 00 00 46 50 4B 00 00 83 5B 27 5D 0D 12 87 12
+F0 4B 24 44 24 44 F8 49 F8 49 26 47 44 48 01 27
+0D 12 87 12 70 4A F2 47 4A 48 4C 44 00 4C 26 47
+AA 4A D2 46 81 5C 92 42 C0 1D C4 1D 30 4D D8 4B
+81 5B 82 43 BE 1D 30 4D 04 4C 01 5D B2 43 BE 1D
+30 4D F2 4A 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 4A F2 47 4A 48 7C 46 4C 44 00 4C BC 46
+4C 44 50 4C 24 44 24 44 F8 49 F8 49 24 44 F8 49
+F8 49 26 47 40 47 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 4C 01 3A
+30 12 B8 4C 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 4A F2 47 86 4C 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E 4C 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 4C 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 44
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 4B CC 4C 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 44 26 47 F8 49 F2 4C 12 4C 26 47 5C 4A 06 43
+52 45 41 54 45 00 B0 12 74 4C BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 4A 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 4D 04 43 4F 44 45 00 B0 12 74 4C A2 82 C6 1D
+0D 12 87 12 8A 4E 64 4E 26 47 72 4D 07 43 4F 44
+45 4E 4E 4D 30 12 7C 4D 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 4C A4 4E 26 47 58 4B
+03 41 53 4D B2 40 68 4E DA 1D DE 3F 9C 4D 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 4D C2 4E 26 47
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 4E 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 4C 85 48 49 32 4C 4F 0D 12
+87 12 2A 4E 1E 4E F8 49 12 4C 80 4D 26 47 2E 53
+30 4D 8C 4D 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 44 CA 1D AE 46 26 47 84 12
+36 4E B0 4D 5A 50 58 4D EE 4B 08 4E 42 46 20 4A
+D8 47 34 4F 4E 4F 62 47 CE 4F 00 00 DE 51 1A 4C
+AA 48 00 00 84 12 36 4E 10 57 76 57 C4 56 C6 57
+8A 56 00 00 BA 53 00 00 80 56 32 57 E2 56 20 57
+CA 54 00 00 00 00 E2 57 62 4E 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E 4E BC 4E C2 4E
+D2 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 4C 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 4E 88 4E FE 57 A6 47 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 4F 92 42 0C 18 16 4F
+EF 3F 06 4F 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 4F 92 42 C6 1D 16 4F 30 4D 1A 4F 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC 47 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 44 02 44
+B2 40 D8 4F D6 4F B2 40 88 4E 0E 18 B2 40 FE 57
+0C 18 30 12 24 4F B2 40 C8 45 C6 45 B2 40 32 46
+30 46 B2 40 4A 46 48 46 B2 40 18 00 0A 18 37 40
+26 47 36 40 9C 46 35 40 FA 44 34 40 EC 44 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 4F 04 57
+41 52 4D 00 30 40 D8 4F 3D 40 10 50 92 C3 30 01
+1E 42 08 18 0E 93 13 24 D2 B3 01 02 02 20 3E E3
+1E 53 F2 D0 03 00 0D 02 92 D3 DA 05 3E 90 0A 00
+B6 27 3E 90 16 00 B3 2F 2E 93 82 27 8B 2F 30 4D
+2E 44 07 0D 0A 1B 5B 37 6D 23 00 46 9C 47 2E 44
+19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 00 46 24 44 40 FF
+2A 4E A6 46 66 47 2E 44 0A 62 79 74 65 73 20 66
+72 65 65 00 48 44 C8 4B 24 4E 04 43 4F 4C 44 00
+92 B3 CA 05 FD 23 B2 40 04 A5 20 01 31 40 E0 1C
+B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3 06 02
+B2 D3 26 02 B2 40 FF BF 22 02 E2 D3 25 02 F2 43
+22 03 F2 D3 26 03 F2 40 A5 00 61 01 82 43 66 01
+39 40 80 00 B2 40 33 00 64 01 D2 43 61 01 92 D2
+9E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
+B2 D2 B0 01 F2 D0 10 00 2A 03 F2 C0 40 00 A1 04
+39 40 00 08 29 83 89 43 00 1C FC 23 B0 12 0E 44
+B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42 04 18
+C8 05 92 C3 C0 05 3F 40 80 1C 30 12 D4 4F 54 3F
+24 4D 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 02 51
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 44 00 00
+AA 46 70 4A F2 47 62 4A 68 46 4C 44 9A 51 70 46
+2E 44 06 5B 54 48 45 4E 5D 00 0C 51 74 51 30 51
+52 51 26 47 70 46 2E 44 06 5B 45 4C 53 45 5D 00
+0C 51 8A 51 30 51 50 51 26 47 2E 44 04 5B 49 46
+5D 00 0C 51 52 51 48 44 50 51 22 46 2E 44 05 0D
+0A 6B 6F 20 00 46 D4 44 C4 44 48 44 52 51 40 51
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D B0 51 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 4A F2 47 4A 48 BE 51 26 47 C4 51 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 CE 51
+F2 51 3D 41 30 40 B6 46 38 40 C0 1D 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 1D 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 1D 30 4D 1C 15 87 12
+F2 47 4A 48 42 44 30 52 06 49 4C 44 00 4C 4A 52
+32 52 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 1C 52 19 42 C6 1D A2 53 C6 1D 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D
+87 12 F2 47 06 49 4C 44 86 52 7C 52 21 53 3E 90
+10 00 80 2D E2 2B 88 52 B2 41 C4 1D DE 3F 0D 12
+87 12 70 4A F8 51 98 52 0C 43 1B 42 C6 1D A2 53
+C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 1D
+B0 12 1C 52 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 1D B0 12 1C 52 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 66 52
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 66 52 92 92
+C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E DA 3F
+B0 12 66 52 FA 23 3C 50 10 00 B0 12 4E 52 EF 3F
+0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 70 4A
+F8 51 64 53 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 66 52 E0 23 3C 50 80 00
+B0 12 4E 52 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 44 00 13 F8 49 26 47 24 44 2C 00 8E 52
+5A 53 A4 53 09 4B 2E 4E 0E DC A2 3F F6 4D 03 4D
+4F 56 84 12 9A 53 00 40 AE 53 05 4D 4F 56 2E 42
+84 12 9A 53 40 40 00 00 03 41 44 44 84 12 9A 53
+00 50 C8 53 05 41 44 44 2E 42 84 12 9A 53 40 50
+D4 53 04 41 44 44 43 00 84 12 9A 53 00 60 E2 53
+06 41 44 44 43 2E 42 00 84 12 9A 53 40 60 88 53
+04 53 55 42 43 00 84 12 9A 53 00 70 00 54 06 53
+55 42 43 2E 42 00 84 12 9A 53 40 70 0E 54 03 53
+55 42 84 12 9A 53 00 80 1E 54 05 53 55 42 2E 42
+84 12 9A 53 40 80 D2 4D 03 43 4D 50 84 12 9A 53
+00 90 38 54 05 43 4D 50 2E 42 84 12 9A 53 40 90
+BE 4D 04 44 41 44 44 00 84 12 9A 53 00 A0 52 54
+06 44 41 44 44 2E 42 00 84 12 9A 53 40 A0 44 54
+03 42 49 54 84 12 9A 53 00 B0 70 54 05 42 49 54
+2E 42 84 12 9A 53 40 B0 7C 54 03 42 49 43 84 12
+9A 53 00 C0 8A 54 05 42 49 43 2E 42 84 12 9A 53
+40 C0 96 54 03 42 49 53 84 12 9A 53 00 D0 A4 54
+05 42 49 53 2E 42 84 12 9A 53 40 D0 00 00 03 58
+4F 52 84 12 9A 53 00 E0 BE 54 05 58 4F 52 2E 42
+84 12 9A 53 40 E0 F0 53 03 41 4E 44 84 12 9A 53
+00 F0 D8 54 05 41 4E 44 2E 42 84 12 9A 53 40 F0
+70 4A 8E 52 F6 54 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 2A 54 03 52 52 43 84 12 F0 54
+00 10 08 55 05 52 52 43 2E 42 84 12 F0 54 40 10
+14 55 04 53 57 50 42 00 84 12 F0 54 80 10 22 55
+03 52 52 41 84 12 F0 54 00 11 30 55 05 52 52 41
+2E 42 84 12 F0 54 40 11 3C 55 03 53 58 54 84 12
+F0 54 80 11 00 00 04 50 55 53 48 00 84 12 F0 54
+00 12 56 55 06 50 55 53 48 2E 42 00 84 12 F0 54
+40 12 B0 54 04 43 41 4C 4C 00 84 12 F0 54 80 12
+1A 53 0E 4A 0D 12 87 12 9C 47 2E 44 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A 4B 70 4A F8 51
+A2 55 92 53 C4 1D 3E 40 2C 00 87 12 F2 47 06 49
+4C 44 00 4C 50 53 B8 55 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 4A 55 04 52 52 43 4D 00 84 12 9C 55
+50 00 E6 55 04 52 52 41 4D 00 84 12 9C 55 50 01
+F4 55 04 52 4C 41 4D 00 84 12 9C 55 50 02 02 56
+04 52 52 55 4D 00 84 12 9C 55 50 03 64 55 05 50
+55 53 48 4D 84 12 9C 55 00 15 1E 56 04 50 4F 50
+4D 00 84 12 9C 55 00 17 10 56 03 53 3E 3D 85 12
+00 38 3A 56 02 53 3C 00 85 12 00 34 2C 56 03 30
+3E 3D 85 12 00 30 4E 56 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 62 56 03 55 3E 3D
+85 12 00 28 58 56 03 30 3C 3E 85 12 00 24 76 56
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 6C 56
+04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 60 54 04 45 4C 53 45 00 1A 42 C6 1D BA 40
+00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
+A0 56 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D E4 54
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 8E 56 82 46 26 47
+44 56 06 52 45 50 45 41 54 00 0D 12 87 12 16 57
+A6 56 26 47 46 57 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 1D CB 2F 98 42 C6 1D 00 00 30 4D 74 55 03 42
+57 31 84 12 44 57 00 00 5E 57 03 42 57 32 84 12
+44 57 00 00 6A 57 03 42 57 33 84 12 44 57 00 00
+82 57 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B
+BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 80 57 00 00 A2 57 03 46
+57 32 84 12 80 57 00 00 AE 57 03 46 57 33 84 12
+80 57 00 00 BA 57 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 4B 18 4A 26 47
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-9C 52
+6C 50
q
+++ /dev/null
-@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 7A 69 C4 4D
-2D 01 FF B3 B6 42 C8 42 C6 60 02 61
-@4000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 40
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 40
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 40
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 40 02 3E 52 00 0E 12 3E 4F 30 4D 70 40 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 40 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 40 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 40
-01 21 BE 4F 00 00 3E 4F 30 4D CC 40 02 30 3D 00
-1E 83 0E 7E 30 4D FC 40 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 41 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
-1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
-04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
-08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 40 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 41 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 41 02 23 53 00 87 12 88 41 C0 41
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 41
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 40 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 41 34 40 86 40 D4 40 BA 41
-92 40 F8 41 D4 41 38 44 A4 47 E0 43 2A 40 22 41
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 41 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 42 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 42 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 42 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 23 02 30 41 B2 40 13 00 CE 05 E2 D2
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 42
-B0 12 B6 42 12 D2 0A 18 F9 3F 0D 12 3D 40 0A 43
-1B 42 32 20 9B 42 1E 20 16 00 3A 4F 09 4E 0E 43
-1C 42 1E 20 1B 42 20 20 02 3C 0C 43 2D 83 0C 9B
-14 2C 58 4C 00 1E 1C 53 78 90 20 00 07 2C 78 90
-0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3D 24
-CA 48 00 00 1A 53 1E 53 38 3C 1A 15 B0 12 0C 62
-19 17 DE 3F F0 40 06 41 43 43 45 50 54 00 30 40
-52 43 3C 40 C2 43 3B 40 8C 43 2D 15 0A 4E 2E 4F
-0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 B6 43 92 B3
-DC 05 05 24 18 42 CC 05 38 90 0A 00 9C 23 21 53
-3D 15 AC 3F 21 52 3A 17 58 42 CC 05 48 9C 08 2C
-48 9B 9A 27 78 92 11 20 2E 9F 0F 24 1E 83 05 3C
-0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05 FD 27
-82 48 CE 05 30 4D B8 43 2D 83 92 B3 DC 05 E4 23
-FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F 3D 41
-B2 40 18 00 0A 18 30 4D 9E 40 04 45 4D 49 54 00
-30 40 E4 43 08 4E 3E 4F E0 3F 85 12 3C 1D 3F 80
-06 00 8F 4E 04 00 3E 40 54 00 9F 42 EC 43 00 00
-AF 4F 02 00 A4 3F DA 43 04 45 43 48 4F 00 B2 40
-82 48 B0 43 82 43 DE 1D 30 4D 32 42 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D B0 43 92 43 DE 1D 30 4D
-20 42 04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40
-4E 44 28 4F 7E 48 8F 48 00 00 2F 83 C9 3F 50 44
-2D 83 91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D
-D0 41 02 43 52 00 30 40 6A 44 87 12 80 44 02 0D
-0A 00 38 44 2A 40 2F 83 8F 4E 00 00 3E 4D 30 4D
-2F 82 8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3
-0D 63 30 4D F2 41 82 53 22 00 82 43 B4 1D 87 12
-76 44 80 44 12 47 76 44 22 00 E2 44 AE 44 B2 40
-20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41
-3E 4F 30 4D 1C 44 82 2E 22 00 87 12 9A 44 76 44
-38 44 12 47 2A 40 48 43 05 3C 00 00 04 57 4F 52
-44 00 48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52
-C4 1D 09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20
-0E 4A 1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D
-3B 40 60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C
-09 24 18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82
-B4 1D F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D
-08 8E CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00
-2F 83 0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B
-0E 93 1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53
-1E 4E FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95
-F7 23 0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23
-19 B3 09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83
-8F 4C 00 00 35 40 0E 40 34 40 00 40 30 4D 82 40
-07 3E 4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82
-1B 42 DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28
-7A 80 07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C
-82 49 D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04
-18 42 E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C
-00 00 8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02
-1B 42 DC 1D 0C 43 2D 15 3D 40 56 46 09 43 08 43
-3F 82 8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00
-04 28 C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00
-07 24 3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23
-1C 53 1E 83 EA 3F 58 46 2F 24 2D 83 7A 90 28 00
-CB 27 32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00
-23 20 0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C
-69 49 79 80 30 00 79 90 0A 00 05 28 79 80 07 00
-79 90 0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B
-2C 15 B0 12 3E 41 2A 17 E6 3F 9F 4F 04 00 02 00
-AF 4F 04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D
-06 24 32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53
-9F 4F 02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3
-BF E3 02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00
-32 B0 00 02 01 20 2F 53 30 4D 7E 42 04 48 45 52
-45 00 2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 40
-01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F
-30 4D 46 43 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F
-30 4D 08 44 07 45 58 45 43 55 54 45 0A 4E 3E 4F
-00 4A 10 47 87 4C 49 54 45 52 41 4C 82 93 BE 1D
-0C 24 1A 42 C6 1D A2 52 C6 1D BA 40 76 44 00 00
-8A 4E 02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24
-19 4A 02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 62 44
-05 43 4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E
-FF FF 30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
-C4 1D 30 4D 85 12 20 00 87 12 94 47 A4 47 E2 44
-B2 47 3D 40 BA 47 CC 22 82 3E BC 47 0A 4E 3E 4F
-3D 40 D2 47 23 27 3D 40 AC 47 1A E2 BE 1D A1 27
-B5 23 D4 47 3E 4F 3D 40 AC 47 B8 23 DE 53 00 00
-68 4E 08 5E F8 40 3F 00 00 00 3D 40 CC 4A CB 3F
-34 47 08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D
-3C 49 3B 49 3A 49 3D 15 B0 12 2A 40 A8 47 10 48
-B2 41 C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D
-85 12 BE 1D 82 43 08 18 31 40 E0 1C B2 40 00 1C
-00 1C 82 43 BE 1D 30 4D 80 47 04 42 4F 4F 54 00
-82 93 08 18 1D 24 E2 B2 60 02 1A 20 2F 83 8F 4E
-00 00 1E 42 08 18 B0 12 2A 40 24 44 24 48 80 44
-0F 4C 4F 41 44 22 20 42 4F 4F 54 2E 34 54 48 22
-3C 42 8E 48 08 41 04 51 55 49 54 00 30 40 80 48
-B0 12 2A 40 24 48 66 44 EE 43 A4 47 E0 43 A8 47
-A4 40 0C 41 80 44 0C 73 74 61 63 6B 20 65 6D 70
-74 79 21 00 E6 48 76 44 30 FF 02 47 26 41 80 44
-0A 46 52 41 4D 20 66 75 6C 6C 21 00 E6 48 3C 42
-86 48 24 47 05 41 42 4F 52 54 3F 40 80 1C D6 3F
-C4 48 86 41 42 4F 52 54 22 00 87 12 9A 44 76 44
-E6 48 12 47 2A 40 8F 93 02 00 03 20 2F 52 3E 4F
-30 4D B0 12 EC 4E B0 12 B6 42 92 C3 DC 05 38 40
-A0 AA 39 42 03 43 19 83 FD 23 18 83 FA 23 92 B3
-DC 05 F3 23 87 12 60 4E 76 44 DE 1D EA 40 0E 44
-80 44 04 1B 5B 37 6D 00 38 44 58 40 40 42 40 49
-66 44 80 44 05 6C 69 6E 65 3A 38 44 D0 40 24 42
-38 44 80 44 04 1B 5B 30 6D 00 38 44 CA 48 00 00
-83 5B 27 5D 87 12 66 49 76 44 76 44 12 47 12 47
-2A 40 4A 45 01 27 87 12 A4 47 E2 44 50 45 40 42
-74 49 2A 40 DC 47 32 41 81 5C 92 42 C0 1D C4 1D
-30 4D 50 49 81 5B 82 43 BE 1D 30 4D 78 49 01 5D
-B2 43 BE 1D 30 4D BE 4F 02 00 3E 4F 30 4D FC 46
-82 49 53 00 87 12 20 48 EA 40 40 42 B8 49 54 49
-76 44 96 49 12 47 2A 40 66 49 96 49 2A 40 A0 49
-09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 1D FA D0
-80 00 00 00 30 4D 76 48 88 50 4F 53 54 50 4F 4E
-45 00 87 12 A4 47 E2 44 50 45 58 40 40 42 74 49
-0C 41 40 42 02 4A 76 44 76 44 12 47 12 47 76 44
-12 47 12 47 2A 40 84 49 81 3B 82 93 BE 1D B5 27
-87 12 76 44 2A 40 12 47 A0 4A 86 49 2A 40 08 4A
-07 3A 4E 4F 4E 41 4D 45 30 12 46 4A 2F 83 8F 4E
-00 00 1E 42 C6 1D 1E B3 0E 63 0A 4E 39 40 00 02
-38 40 02 02 21 3C BA 40 87 12 FC FF A2 83 C6 1D
-B2 43 BE 1D 30 4D 20 4A 01 3A 30 12 46 4A 92 B3
-C6 1D A2 63 C6 1D 87 12 A4 47 E2 44 6E 4A 3D 41
-08 4E 7A 4E 5A D3 5A 53 0A 58 19 42 DA 1D 6E 4E
-3E F0 1E 00 09 5E 3E 4F 82 48 B6 1D 82 49 B8 1D
-82 4A BA 1D 82 4F BC 1D 2A 52 82 4A C6 1D 30 41
-82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D A8 49
-FE FF 89 48 00 00 30 4D 87 12 80 44 0F 73 74 61
-63 6B 20 6D 69 73 6D 61 74 63 68 21 F2 48 F2 47
-05 44 45 46 45 52 B0 12 5E 4A BA 40 30 40 FC FF
-BA 40 54 4A FE FF E3 3F 3A 48 06 43 52 45 41 54
-45 00 B0 12 5E 4A BA 40 85 12 FC FF 8A 4A FE FF
-D6 3F D0 4A 05 44 4F 45 53 3E 1A 42 BA 1D BA 40
-84 12 00 00 8A 4D 02 00 3D 41 30 4D B0 45 05 3E
-42 4F 44 59 2E 52 30 4D EA 4A 04 43 4F 44 45 00
-B0 12 5E 4A 82 43 D8 5F A2 82 C6 1D 87 12 CE 4D
-A0 4D 2A 40 2A 4B 07 43 4F 44 45 4E 4E 4D B0 12
-2C 4A F0 3F 00 00 07 45 4E 44 43 4F 44 45 87 12
-E8 4D A0 4A 2A 40 D2 48 03 41 53 4D B2 40 A4 4D
-DA 1D DE 3F 56 4B 06 45 4E 44 41 53 4D 00 87 12
-5E 4B 12 4E 2A 40 00 00 05 43 4F 4C 4F 4E 1A 42
-C6 1D BA 40 87 12 00 00 A2 53 C6 1D B2 43 BE 1D
-30 40 E8 4D 00 00 05 4C 4F 32 48 49 1A 42 C6 1D
-BA 40 B0 12 00 00 BA 40 2A 40 02 00 A2 52 C6 1D
-ED 3F C0 49 85 48 49 32 4C 4F 87 12 02 47 F4 4B
-12 47 86 49 CE 4D A0 4D 2A 40 C4 4B 82 49 46 00
-2F 83 8F 4E 00 00 1E 42 C6 1D A2 52 C6 1D BE 40
-40 42 00 00 2E 53 30 4D 04 4B 84 45 4C 53 45 00
-A2 52 C6 1D 1A 42 C6 1D BA 40 3C 42 FC FF 8E 4A
-00 00 2A 83 0E 4A 30 4D 32 44 84 54 48 45 4E 00
-9E 42 C6 1D 00 00 3E 4F 30 4D 46 4B 85 42 45 47
-49 4E 30 40 02 47 1A 4C 85 55 4E 54 49 4C 39 40
-40 42 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E
-FE FF 3E 4F 30 4D 68 4B 85 41 47 41 49 4E 39 40
-3C 42 EF 3F DC 44 85 57 48 49 4C 45 87 12 E0 4B
-76 40 2A 40 96 44 86 52 45 50 45 41 54 00 87 12
-5E 4C 20 4C 2A 40 FA 4B 82 44 4F 00 2F 83 8F 4E
-00 00 A2 53 C6 1D 1E 42 C6 1D BE 40 54 42 FE FF
-A2 53 00 1C 1A 42 00 1C 8A 43 00 00 30 4D 44 47
-84 4C 4F 4F 50 00 39 40 76 42 A2 52 C6 1D 1A 42
-C6 1D 8A 49 FC FF 8A 4E FE FF 1E 42 00 1C A2 83
-00 1C 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F 3E 4F
-30 4D 90 42 85 2B 4C 4F 4F 50 39 40 64 42 E5 3F
-B0 4C 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F 3E 4F
-0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00 18 53
-1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83 E8 49
-00 00 1A 83 FA 23 30 4D 66 4C 0A 56 4F 43 41 42
-55 4C 41 52 59 00 87 12 F2 4A 76 44 10 00 76 44
-00 00 54 42 76 44 00 00 12 47 76 42 44 4D 02 47
-76 44 C8 1D 34 40 EA 40 12 47 F2 40 0A 4B 76 44
-CA 1D F2 40 2A 40 64 49 05 46 4F 52 54 48 84 12
-5E 4D C8 4D DA 63 CE 63 68 4D DC 4B E4 4C E8 63
-F8 4D 84 4E 8E 65 1E 69 40 68 00 00 CA 52 8E 49
-1E 4B 00 00 58 4C 09 41 53 53 45 4D 42 4C 45 52
-84 12 5E 4D A2 5E 3A 5E 9E 5D 62 59 06 58 00 00
-66 5C 00 00 C8 5F DC 5F 5E 58 9C 58 6E 5E 00 00
-00 00 3E 59 92 4D 96 4D 04 41 4C 53 4F 00 3A 40
-0C 00 39 40 CA 1D 38 40 CC 1D 9D 3F D8 49 08 50
-52 45 56 49 4F 55 53 00 3A 40 0E 00 39 40 CC 1D
-38 40 CA 1D 8A 3F C6 44 04 4F 4E 4C 59 00 82 43
-CC 1D 30 4D 88 4C 0B 44 45 46 49 4E 49 54 49 4F
-4E 53 92 42 CA 1D DA 1D 30 4D 6E 4D FE 4D 12 4E
-22 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
-10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
-89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
-3D 41 30 4D DE 4D 09 50 57 52 5F 53 54 41 54 45
-84 12 1A 4E C4 4D 7A 69 76 4C 09 52 53 54 5F 53
-54 41 54 45 92 42 0E 18 64 4E 92 42 0C 18 66 4E
-EF 3F 56 4E 08 50 57 52 5F 48 45 52 45 00 92 42
-C8 1D 64 4E 92 42 C6 1D 66 4E 30 4D 6A 4E 08 52
-53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
-C6 1D 0C 18 EC 3F 2A 4D 04 57 49 50 45 00 39 40
-10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 42 DE 42
-B2 40 4A 4F 48 4F B2 40 80 48 7E 48 B2 40 C4 4D
-0E 18 B2 40 7A 69 0C 18 30 12 74 4E B2 40 E4 43
-E2 43 B2 40 6A 44 68 44 B2 40 98 42 96 42 B2 40
-52 43 50 43 B2 40 3C 1D EC 43 1B 42 32 20 0B 93
-04 24 CB 43 02 00 2B 4B FA 3F B2 40 18 00 0A 18
-37 40 1A 40 36 40 92 40 35 40 0E 40 34 40 00 40
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 B8 4E
-04 57 41 52 4D 00 30 40 4A 4F 3D 40 98 50 92 C3
-30 01 1E 42 08 18 0E 93 9E 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 E2 B2 60 02 8A 20
-39 42 B0 12 9E 60 D2 C3 23 02 2C 42 B2 40 95 00
-14 20 B2 40 00 40 18 20 B0 12 14 60 02 24 30 40
-3A 61 B0 12 9C 60 7A 93 FC 23 B2 40 87 AA 14 20
-92 43 16 20 B2 40 00 48 18 20 B0 12 14 60 29 42
-B0 12 9E 60 92 43 14 20 82 43 16 20 78 43 3C 42
-B2 40 00 77 18 20 B0 12 14 60 B2 40 40 69 18 20
-B0 12 5A 60 03 24 58 83 F3 23 D9 3F 0C 5C A2 43
-16 20 B2 40 00 50 18 20 B0 12 5A 60 D0 23 92 D3
-40 06 82 43 46 06 92 C3 40 06 B0 12 C4 60 38 40
-00 1E 92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48
-C2 01 92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24
-A2 43 02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24
-3A 50 0B 20 0C 4A 30 40 40 61 B0 12 C4 60 D2 48
-0D 00 12 20 19 48 0E 00 82 49 08 20 1A 48 16 00
-0A 93 02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49
-0C 20 09 5A A2 93 02 20 04 24 82 49 0E 20 39 50
-20 00 19 82 12 20 19 82 12 20 82 49 10 20 92 42
-02 20 2C 20 3E 90 0A 00 1A 27 3E 90 16 00 17 2F
-2E 93 E6 26 EF 2E 30 4D 80 44 06 0D 1B 5B 37 6D
-23 00 38 44 34 42 80 44 19 46 61 73 74 46 6F 72
-74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E
-73 20 38 44 76 44 30 FF 02 47 B8 40 24 42 80 44
-0A 62 79 74 65 73 20 66 72 65 65 00 3C 42 40 49
-2C 4C 04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40
-04 A5 20 01 98 50 B2 40 88 5A 5C 01 B2 D3 06 02
-B2 40 FC FF 02 02 B2 43 26 02 B2 D3 22 02 E2 D2
-25 02 B2 43 42 02 B2 D3 46 02 B2 43 62 02 B2 D3
-66 02 F2 43 26 03 F2 D3 22 03 F2 40 A5 00 41 01
-F2 40 10 00 40 01 D2 43 41 01 F2 40 A5 00 61 01
-B2 40 48 00 62 01 82 43 66 01 39 40 00 01 B2 40
-33 00 64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40
-59 14 18 83 FE 23 19 83 FA 23 F2 D0 10 00 2A 03
-F2 40 A5 00 A1 04 F2 C0 40 00 A2 04 B2 42 B0 01
-39 40 00 10 29 83 89 43 00 1C FC 23 39 40 4C 00
-29 83 B9 40 F6 50 B4 FF FB 23 B2 40 84 43 F0 FF
-B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42 04 18
-C8 05 92 C3 C0 05 92 D3 DA 05 B2 40 81 A9 40 06
-B2 40 30 00 46 06 D2 D3 25 02 B2 D0 C0 04 0C 02
-92 C3 40 06 3F 40 80 1C 31 40 E0 1C 30 12 46 4F
-9C 3E E2 50 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D 58 4A 86 5B 54 48 45 4E 5D 00 30 4D
-16 52 86 5B 45 4C 53 45 5D 00 87 12 76 44 00 00
-C6 40 A4 47 E2 44 86 47 34 40 40 42 8C 52 44 40
-80 44 06 5B 54 48 45 4E 5D 00 EC 51 4A 42 5C 52
-5A 44 D0 40 58 40 4A 42 32 52 2A 40 44 40 80 44
-06 5B 45 4C 53 45 5D 00 EC 51 4A 42 7A 52 5A 44
-D0 40 58 40 4A 42 30 52 2A 40 80 44 04 5B 49 46
-5D 00 EC 51 4A 42 32 52 3C 42 30 52 5A 44 80 44
-05 0D 0A 6B 6F 20 38 44 EE 43 94 47 3C 42 32 52
-22 52 84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D
-A2 52 89 5B 44 45 46 49 4E 45 44 5D 87 12 A4 47
-E2 44 50 45 6A 40 2A 40 B2 52 8B 5B 55 4E 44 45
-46 49 4E 45 44 5D 87 12 A4 47 E2 44 50 45 6A 40
-00 41 2A 40 E6 52 3D 41 B2 4E 0E 18 A2 4E 0C 18
-3E 4F 30 40 74 4E F2 4C 06 4D 41 52 4B 45 52 00
-B0 12 5E 4A BA 40 84 12 FC FF BA 40 E4 52 FE FF
-9A 42 C8 1D 00 00 28 83 8A 48 02 00 A2 52 C6 1D
-30 40 A6 4A 1C 15 B0 12 2A 40 E2 44 50 45 4A 42
-3A 53 0C 46 40 42 74 49 54 53 3C 53 39 4E 39 80
-86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
-01 24 2E 82 1B 17 30 41 32 B0 00 02 01 24 3E 4F
-30 41 3E 40 28 00 B0 12 24 53 B0 12 58 53 19 42
-C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 1D 92 53 C4 1D B0 12 2A 40 E2 44 0C 46
-40 42 A0 53 96 53 21 53 3E 90 10 00 81 2D DA 2B
-A2 53 B2 41 C4 1D D6 3F 87 12 A4 47 D6 44 B0 53
-0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90
-23 00 29 20 92 53 C4 1D B0 12 24 53 B0 12 58 53
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 09 20 3C 40 10 02
-92 53 C4 1D B0 12 24 53 B0 12 58 53 EB 3F 7A 90
-40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 7E 53
-0C 20 3C 50 10 00 3E 40 2B 00 B0 12 7E 53 92 92
-C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E D8 3F
-B0 12 7E 53 FA 23 3C 50 10 00 B0 12 62 53 EF 3F
-0C 43 1B 42 C6 1D A2 53 C6 1D 87 12 A4 47 D6 44
-82 54 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
-82 00 C6 3F B0 12 7E 53 E1 23 3C 50 80 00 B0 12
-62 53 DC 3F D6 42 04 52 45 54 49 00 87 12 76 44
-00 13 12 47 2A 40 76 44 2C 00 A8 53 7A 54 C0 54
-09 4B 2E 4E 0E DC A2 3F A6 4B 03 4D 4F 56 84 12
-B6 54 00 40 CA 54 05 4D 4F 56 2E 42 84 12 B6 54
-40 40 00 00 03 41 44 44 84 12 B6 54 00 50 E4 54
-05 41 44 44 2E 42 84 12 B6 54 40 50 F0 54 04 41
-44 44 43 00 84 12 B6 54 00 60 FE 54 06 41 44 44
-43 2E 42 00 84 12 B6 54 40 60 A6 54 04 53 55 42
-43 00 84 12 B6 54 00 70 1C 55 06 53 55 42 43 2E
-42 00 84 12 B6 54 40 70 2A 55 03 53 55 42 84 12
-B6 54 00 80 3A 55 05 53 55 42 2E 42 84 12 B6 54
-40 80 88 4B 03 43 4D 50 84 12 B6 54 00 90 54 55
-05 43 4D 50 2E 42 84 12 B6 54 40 90 76 4B 04 44
-41 44 44 00 84 12 B6 54 00 A0 6E 55 06 44 41 44
-44 2E 42 00 84 12 B6 54 40 A0 60 55 03 42 49 54
-84 12 B6 54 00 B0 8C 55 05 42 49 54 2E 42 84 12
-B6 54 40 B0 98 55 03 42 49 43 84 12 B6 54 00 C0
-A6 55 05 42 49 43 2E 42 84 12 B6 54 40 C0 B2 55
-03 42 49 53 84 12 B6 54 00 D0 C0 55 05 42 49 53
-2E 42 84 12 B6 54 40 D0 00 00 03 58 4F 52 84 12
-B6 54 00 E0 DA 55 05 58 4F 52 2E 42 84 12 B6 54
-40 E0 0C 55 03 41 4E 44 84 12 B6 54 00 F0 F4 55
-05 41 4E 44 2E 42 84 12 B6 54 40 F0 A4 47 A8 53
-12 56 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA
-4F 3F 46 55 03 52 52 43 84 12 0C 56 00 10 24 56
-05 52 52 43 2E 42 84 12 0C 56 40 10 30 56 04 53
-57 50 42 00 84 12 0C 56 80 10 3E 56 03 52 52 41
-84 12 0C 56 00 11 4C 56 05 52 52 41 2E 42 84 12
-0C 56 40 11 58 56 03 53 58 54 84 12 0C 56 80 11
-00 00 04 50 55 53 48 00 84 12 0C 56 00 12 72 56
-06 50 55 53 48 2E 42 00 84 12 0C 56 40 12 CC 55
-04 43 41 4C 4C 00 84 12 0C 56 80 12 1A 53 0E 4A
-87 12 34 42 80 44 0D 6F 75 74 20 6F 66 20 62 6F
-75 6E 64 73 F2 48 A4 47 D6 44 BC 56 92 53 C4 1D
-3E 40 2C 00 B0 12 2A 40 E2 44 0C 46 40 42 74 49
-70 54 D4 56 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E
-0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
-D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F
-66 56 06 52 52 43 4D 2E 41 00 84 12 B6 56 40 00
-02 57 04 52 52 43 4D 00 84 12 B6 56 50 00 12 57
-06 52 52 41 4D 2E 41 00 84 12 B6 56 40 01 20 57
-04 52 52 41 4D 00 84 12 B6 56 50 01 30 57 06 52
-4C 41 4D 2E 41 00 84 12 B6 56 40 02 3E 57 04 52
-4C 41 4D 00 84 12 B6 56 50 02 4E 57 06 52 52 55
-4D 2E 41 00 84 12 B6 56 40 03 5C 57 04 52 52 55
-4D 00 84 12 B6 56 50 03 80 56 07 50 55 53 48 4D
-2E 41 84 12 B6 56 00 14 7A 57 05 50 55 53 48 4D
-84 12 B6 56 00 15 8A 57 06 50 4F 50 4D 2E 41 00
-84 12 B6 56 00 16 98 57 04 50 4F 50 4D 00 84 12
-B6 56 00 17 6C 57 03 53 3E 3D 85 12 00 38 B6 57
-02 53 3C 00 85 12 00 34 A8 57 03 30 3E 3D 85 12
-00 30 CA 57 02 30 3C 00 85 12 00 30 00 00 02 55
-3C 00 85 12 00 2C DE 57 03 55 3E 3D 85 12 00 28
-D4 57 03 30 3C 3E 85 12 00 24 F2 57 02 30 3D 00
-85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E
-00 00 A2 53 C6 1D 0E 4A 30 4D E8 57 04 54 48 45
-4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89
-0A 11 3A 90 00 02 33 2F 88 DA 00 00 30 4D 7C 55
-04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00
-A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F 1C 58 05 55
-4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83
-0A 89 0A 11 3A 90 00 FE 12 3B 3A F0 FF 03 08 DA
-89 48 00 00 A2 53 C6 1D 30 4D 00 56 05 41 47 41
-49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49
-4C 45 87 12 0A 58 76 40 2A 40 C0 57 06 52 45 50
-45 41 54 00 87 12 92 58 22 58 2A 40 BE 58 3D 41
-08 4E 3E 4F 2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D
-00 00 30 4D 90 56 03 42 57 31 84 12 BC 58 00 00
-D6 58 03 42 57 32 84 12 BC 58 00 00 E2 58 03 42
-57 33 84 12 BC 58 00 00 FA 58 3D 41 1A 42 C6 1D
-28 4E B2 92 C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D
-8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12
-F8 58 00 00 1A 59 03 46 57 32 84 12 F8 58 00 00
-26 59 03 46 57 33 84 12 F8 58 00 00 00 00 05 3F
-47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04 3E B0
-00 10 02 24 3E E0 00 08 87 12 66 49 3C 47 2A 40
-32 59 04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40
-00 3C F2 3F 87 12 A4 47 D6 44 7C 59 69 4E 3E 4F
-3C 4F 2C 4C 1B 42 C6 1D A2 53 C6 1D 79 90 52 00
-0A 20 B0 12 7E 53 5E 0E 5E 0E 0E DC 8B 4E 00 00
-0E 4B 3D 41 30 4D 79 90 23 00 0D 20 3C C0 40 00
-92 53 C4 1D A2 53 C6 1D B0 12 24 53 BB 4F 02 00
-3E F0 0F 00 E8 3F 79 90 26 00 03 20 3C E0 E0 00
-EF 3F 3C C0 F0 00 79 90 40 00 12 20 92 53 C4 1D
-B0 12 7E 53 D8 23 3C D0 10 00 3E 40 2B 00 B0 12
-7E 53 92 92 C0 1D C4 1D CE 27 92 53 C4 1D CB 3F
-3C D0 30 00 A2 53 C6 1D 3E 40 28 00 B0 12 24 53
-BB 4F 02 00 3E 40 29 00 EA 3F 87 12 A4 47 D6 44
-22 5A 3B 4F 2C 4B 69 4E 7E 40 20 00 79 90 52 00
-03 20 B0 12 7E 53 B1 3F 3C C0 F0 00 A2 53 C6 1D
-79 90 26 00 09 20 3C D0 60 00 92 53 C4 1D B0 12
-24 53 BB 4F 02 00 A1 3F 3C D0 70 00 3E 40 28 00
-B0 12 24 53 BB 4F 02 00 3E 40 29 00 E2 3F 76 44
-2C 00 74 59 1A 5A 66 40 2A 40 D6 54 04 4D 4F 56
-41 00 84 12 6E 5A C0 00 EE 58 04 43 4D 50 41 00
-84 12 6E 5A D0 00 8C 58 04 41 44 44 41 00 84 12
-6E 5A E0 00 AC 58 04 53 55 42 41 00 84 12 6E 5A
-F0 00 8A 5A 05 43 41 4C 4C 41 87 12 A4 47 D6 44
-C2 5A 1B 42 C6 1D A2 53 C6 1D 6E 4E 3C 40 34 01
-7E 90 52 00 0B 20 7E 40 20 00 B0 12 7E 53 5C 0E
-0C DE 8B 4C 00 00 3E 4F 3D 41 30 4D 2C 53 7E 90
-40 00 0B 20 92 53 C4 1D 7E 40 20 00 B0 12 7E 53
-EE 23 1C 53 3E 40 2B 00 E8 3F A2 53 C6 1D 7E 90
-23 00 09 20 3C 40 3B 01 92 53 C4 1D B0 12 24 53
-BB 4F 02 00 DC 3F 7E 90 26 00 02 20 2C 53 F4 3F
-7E 40 28 00 1C 83 B0 12 24 53 BB 4F 02 00 3E 40
-29 00 CB 3F 87 12 A4 47 D6 44 4C 5B 69 4E 3E 4F
-3C 40 00 18 79 90 52 00 05 20 B0 12 7E 53 0E 4C
-3D 41 30 4D 82 43 D8 5F 79 90 23 00 0B 20 92 53
-C4 1D B0 12 24 53 2F 53 3E F0 0F 00 5E 0A 5E 0E
-0C DE ED 3F 79 90 26 00 F2 27 79 90 40 00 12 20
-92 53 C4 1D B0 12 7E 53 E2 23 3E 40 2B 00 92 53
-C4 1D B0 12 7E 53 92 92 C0 1D C4 1D D8 27 92 53
-C4 1D D5 3F 3E 40 28 00 B0 12 24 53 8F 4E 00 00
-3E 40 29 00 B0 12 7E 53 3E 4F 3E F0 0F 00 0C DE
-EA 3F 87 12 A4 47 D6 44 DA 5B 3C 4F 69 4E 3E 40
-20 00 79 90 52 00 BB 27 82 43 D8 5F 79 90 26 00
-08 20 92 53 C4 1D B0 12 24 53 2F 53 3E F0 0F 00
-BF 3F 3E 40 28 00 B0 12 24 53 F7 3F 1B 42 C6 1D
-A2 53 C6 1D 0C 4E 3E 4F 1C D2 D8 5F 82 43 D8 5F
-3C DE 8B 4C 00 00 B2 41 C4 1D 30 4D 76 44 C4 1D
-EA 40 86 40 76 44 2C 00 44 5B D2 5B 0C 5C 3C 42
-B6 54 7C 5A 04 4D 4F 56 58 00 84 12 2C 5C 40 00
-00 40 44 5C 06 4D 4F 56 58 2E 41 00 84 12 2C 5C
-00 00 40 40 54 5C 06 4D 4F 56 58 2E 42 00 84 12
-2C 5C 40 00 40 40 98 5A 04 41 44 44 58 00 84 12
-2C 5C 40 00 00 50 78 5C 06 41 44 44 58 2E 41 00
-84 12 2C 5C 00 00 40 50 88 5C 06 41 44 44 58 2E
-42 00 84 12 2C 5C 40 00 40 50 9A 5C 05 41 44 44
-43 58 84 12 2C 5C 40 00 00 60 AC 5C 07 41 44 44
-43 58 2E 41 84 12 2C 5C 00 00 40 60 BC 5C 07 41
-44 44 43 58 2E 42 84 12 2C 5C 40 00 40 60 A6 5A
-05 53 55 42 43 58 84 12 2C 5C 40 00 00 70 E0 5C
-07 53 55 42 43 58 2E 41 84 12 2C 5C 00 00 40 70
-F0 5C 07 53 55 42 43 58 2E 42 84 12 2C 5C 40 00
-40 70 02 5D 04 53 55 42 58 00 84 12 2C 5C 40 00
-00 80 14 5D 06 53 55 42 58 2E 41 00 84 12 2C 5C
-00 00 40 80 24 5D 06 53 55 42 58 2E 42 00 84 12
-2C 5C 40 00 40 80 B4 5A 04 43 4D 50 58 00 84 12
-2C 5C 40 00 00 90 48 5D 06 43 4D 50 58 2E 41 00
-84 12 2C 5C 00 00 40 90 58 5D 06 43 4D 50 58 2E
-42 00 84 12 2C 5C 40 00 40 90 40 58 05 44 41 44
-44 58 84 12 2C 5C 40 00 00 A0 7C 5D 07 44 41 44
-44 58 2E 41 84 12 2C 5C 00 00 40 A0 8C 5D 07 44
-41 44 44 58 2E 42 84 12 2C 5C 40 00 40 A0 6A 5D
-04 42 49 54 58 00 84 12 2C 5C 40 00 00 B0 B0 5D
-06 42 49 54 58 2E 41 00 84 12 2C 5C 00 00 40 B0
-C0 5D 06 42 49 54 58 2E 42 00 84 12 2C 5C 40 00
-40 B0 D2 5D 04 42 49 43 58 00 84 12 2C 5C 40 00
-00 C0 E4 5D 06 42 49 43 58 2E 41 00 84 12 2C 5C
-00 00 40 C0 F4 5D 06 42 49 43 58 2E 42 00 84 12
-2C 5C 40 00 40 C0 06 5E 04 42 49 53 58 00 84 12
-2C 5C 40 00 00 D0 18 5E 06 42 49 53 58 2E 41 00
-84 12 2C 5C 00 00 40 D0 28 5E 06 42 49 53 58 2E
-42 00 84 12 2C 5C 40 00 40 D0 E6 55 04 58 4F 52
-58 00 84 12 2C 5C 40 00 00 E0 4C 5E 06 58 4F 52
-58 2E 41 00 84 12 2C 5C 00 00 40 E0 5C 5E 06 58
-4F 52 58 2E 42 00 84 12 2C 5C 40 00 40 E0 CE 5C
-04 41 4E 44 58 00 84 12 2C 5C 40 00 00 F0 80 5E
-06 41 4E 44 58 2E 41 00 84 12 2C 5C 00 00 40 F0
-90 5E 06 41 4E 44 58 2E 42 00 84 12 2C 5C 40 00
-40 F0 76 44 C4 1D EA 40 86 40 A4 47 44 5B 0C 5C
-3C 42 0C 56 36 5D 04 52 52 43 58 00 84 12 B2 5E
-40 00 00 10 C6 5E 06 52 52 43 58 2E 41 00 84 12
-B2 5E 00 00 40 10 D6 5E 06 52 52 43 58 2E 42 00
-84 12 B2 5E 40 00 40 10 E8 5E 04 52 52 55 58 00
-84 12 B2 5E 40 01 00 10 FA 5E 06 52 52 55 58 2E
-41 00 84 12 B2 5E 00 01 40 10 0A 5F 06 52 52 55
-58 2E 42 00 84 12 B2 5E 40 01 40 10 1C 5F 05 53
-57 50 42 58 84 12 B2 5E 40 00 80 10 2E 5F 07 53
-57 50 42 58 2E 41 84 12 B2 5E 00 00 80 10 3E 5F
-04 52 52 41 58 00 84 12 B2 5E 40 00 00 11 50 5F
-06 52 52 41 58 2E 41 00 84 12 B2 5E 00 00 40 11
-60 5F 06 52 52 41 58 2E 42 00 84 12 B2 5E 40 00
-40 11 72 5F 04 53 58 54 58 00 84 12 B2 5E 40 00
-80 11 84 5F 06 53 58 54 58 2E 41 00 84 12 B2 5E
-00 00 80 11 FC 57 05 50 55 53 48 58 84 12 B2 5E
-40 00 00 12 A6 5F 07 50 55 53 48 58 2E 41 84 12
-B2 5E 00 00 40 12 B6 5F 07 50 55 53 48 58 2E 42
-84 12 B2 5E 40 00 40 12 00 00 94 5F 03 52 50 54
-87 12 A4 47 D6 44 E8 5F 29 4E 7E 40 20 00 79 90
-52 00 06 20 B0 12 7E 53 03 24 3E D0 80 00 05 3C
-B0 12 24 53 1E 83 3E F0 0F 00 82 4E D8 5F 3E 4F
-3D 41 30 4D 1A 43 25 3C D2 C3 23 02 E2 B2 60 02
-02 24 30 40 E8 50 1A 52 04 20 19 62 06 20 92 43
-14 20 A2 93 02 20 07 24 0A 5A 49 69 82 4A 16 20
-C2 49 18 20 0A 3C C2 4A 15 20 8A 10 C2 4A 16 20
-C2 49 17 20 89 10 C2 49 18 20 B0 12 9C 60 5A 53
-FC 23 39 40 05 00 D2 49 14 20 4E 06 82 93 46 06
-05 24 92 B3 6C 06 FD 27 C2 93 4C 06 59 83 F3 2F
-19 83 0B 30 F2 43 4E 06 82 93 46 06 03 24 92 B3
-6C 06 FD 27 5A 92 4C 06 F3 23 30 41 19 43 3A 43
-8A 10 C2 4A 4E 06 82 93 46 06 05 24 92 B3 6C 06
-FD 27 C2 93 4C 06 19 83 F3 23 5A 42 4C 06 30 41
-1A 52 08 20 09 43 1C D3 F2 40 51 00 19 20 B0 12
-18 60 33 20 B0 12 9C 60 6A 53 04 24 FB 23 D9 42
-4C 06 FF 1D F2 43 4E 06 03 43 19 53 39 90 01 02
-F6 23 F2 43 4E 06 3C C0 03 00 D2 D3 23 02 30 41
-09 43 2C D3 F0 40 58 00 11 BF B0 12 18 60 15 20
-3A 40 FE FF 29 43 B0 12 A0 60 D2 49 00 1E 4E 06
-03 43 19 53 39 90 00 02 F8 23 39 40 03 00 B0 12
-9E 60 7A C0 E1 00 6A 92 DE 27 8C 10 1C 52 4C 06
-D2 D3 23 02 87 12 80 44 0B 3C 20 53 44 20 45 72
-72 6F 72 21 56 61 2F 83 8F 4E 00 00 B2 40 10 00
-DC 1D 0E 4C B0 12 2A 40 24 42 F2 48 92 4B 0E 00
-22 20 92 4B 10 00 24 20 5A 42 23 20 58 42 22 20
-92 93 02 20 08 24 59 42 24 20 89 10 0A 59 88 10
-08 58 0A 6A 88 10 08 58 30 41 82 43 1C 20 92 42
-0E 20 1A 20 C2 93 24 20 03 20 92 93 22 20 14 24
-92 42 22 20 D0 04 92 42 24 20 D2 04 92 42 12 20
-C8 04 92 42 E4 04 1A 20 92 42 E6 04 1C 20 92 52
-10 20 1A 20 82 63 1C 20 30 41 92 4B 0E 00 22 20
-92 4B 10 00 24 20 B0 12 9A 61 5A 4B 03 00 82 5A
-1A 20 82 63 1C 20 30 41 09 93 07 24 F8 90 20 00
-00 1E 03 20 18 53 19 83 F9 23 30 41 1B 42 32 20
-82 43 1E 20 B2 90 00 02 20 20 A8 20 BB 80 00 02
-12 00 8B 73 14 00 DB 53 03 00 DB 92 12 20 03 00
-11 28 CB 43 03 00 B0 12 6C 61 B0 12 C0 60 8B 43
-10 00 9B 48 00 1E 0E 00 92 93 02 20 03 24 9B 48
-02 1E 10 00 B2 40 00 02 20 20 8B 93 14 00 0B 20
-92 9B 12 00 1E 20 82 2C BB 90 00 02 12 00 03 2C
-92 4B 12 00 20 20 B0 12 DA 61 1A 42 1A 20 19 42
-1C 20 21 3F 3C 42 3B 40 38 20 09 43 CB 93 02 00
-10 24 9B 92 24 20 0C 00 04 20 9B 92 22 20 0A 00
-07 24 09 4B 3B 50 1C 00 3B 90 18 21 EF 23 0C 5C
-30 41 0C 43 82 4B 32 20 8B 49 00 00 09 93 0A 24
-99 52 C4 1D 16 00 4A 93 05 34 C9 93 02 00 02 34
-5A 59 02 00 CB 4A 02 00 CB 43 03 00 9B 42 1A 20
-04 00 9B 42 1C 20 06 00 18 42 30 20 8B 48 08 00
-9B 48 1A 1E 0A 00 9B 48 14 1E 0C 00 9B 48 1A 1E
-0E 00 9B 48 14 1E 10 00 9B 48 1C 1E 12 00 9B 48
-1E 1E 14 00 82 43 1E 20 6A 93 5F 27 C9 37 8B 43
-16 00 7A 93 02 24 07 38 95 3F B2 40 1C 21 EC 43
-B2 40 EA 42 50 43 9B 42 C0 1D 18 00 9B 82 C4 1D
-18 00 9B 42 C2 1D 1A 00 9B 52 C4 1D 1A 00 82 3F
-CB 43 02 00 2B 4B 82 4B 32 20 0B 93 06 24 92 4B
-16 00 1E 20 B0 12 54 62 22 C3 30 41 1B 42 32 20
-0B 93 FB 27 EB 93 02 00 04 20 B0 12 C2 67 B0 12
-8A 67 CB 93 02 00 E4 37 1E 4B 18 00 9F 4B 1A 00
-00 00 31 50 06 00 3D 41 B0 12 50 63 02 24 30 40
-24 44 B2 40 3C 1D EC 43 B2 40 52 43 50 43 30 40
-0E 44 9E 4E 85 52 45 41 44 22 5A 43 19 3C 40 4F
-86 57 52 49 54 45 22 00 6A 43 12 3C 06 4E 84 44
-45 4C 22 00 6A 42 0C 3C E4 51 05 43 4C 4F 53 45
-B0 12 6C 63 30 4D F8 52 85 4C 4F 41 44 22 7A 43
-2F 83 8F 4E 00 00 0E 4A 82 93 BE 1D 0A 24 87 12
-76 44 76 44 12 47 12 47 9A 44 76 44 20 64 12 47
-2A 40 87 12 76 44 22 00 E2 44 86 47 1E 64 3D 41
-35 4F 0E 55 82 4E 36 20 1C 43 92 42 2C 20 22 20
-92 42 2E 20 24 20 0E 95 8D 24 F5 90 3A 00 01 00
-01 20 25 53 F5 90 5C 00 00 00 08 20 15 53 92 42
-02 20 22 20 82 43 24 20 0E 95 70 24 82 45 34 20
-B0 12 9A 61 34 40 20 00 A2 93 02 20 04 24 92 92
-22 20 02 20 02 24 14 42 12 20 B0 12 7A 62 2C 43
-0A 43 08 4A 58 0E 08 58 82 48 30 20 C8 93 00 1E
-61 24 39 42 F8 95 00 1E 04 20 18 53 19 83 FA 23
-15 53 F5 90 2E 00 FF FF 19 24 39 50 03 00 B0 12
-F8 61 06 20 F5 90 5C 00 FF FF 29 24 0E 95 27 28
-15 42 34 20 1A 53 3A 90 10 00 DB 23 92 53 1A 20
-82 63 1C 20 14 83 D1 23 2C 42 3C 3C F5 90 2E 00
-FE FF EE 27 B0 12 F8 61 EB 23 39 40 03 00 F8 95
-00 1E 04 20 18 53 19 83 FA 23 09 3C 0E 95 E0 2F
-F5 90 5C 00 FF FF DC 23 B0 12 F8 61 D9 23 18 42
-30 20 92 48 1A 1E 22 20 92 48 14 1E 24 20 F8 B0
-10 00 0B 1E 14 24 82 93 24 20 06 20 82 93 22 20
-03 20 92 42 02 20 22 20 0E 95 8E 2F 92 42 22 20
-2C 20 92 42 24 20 2E 20 8F 43 00 00 03 3C 2A 4F
-B0 12 84 62 34 40 00 40 35 40 0E 40 3A 4F 3E 4F
-0A 93 04 24 7A 93 0D 20 0C 93 01 20 30 4D 87 12
-80 44 0B 3C 20 4F 70 65 6E 45 72 72 6F 72 3C 42
-54 61 1A 93 B6 20 0C 93 F2 23 30 4D B4 63 04 52
-45 41 44 00 2F 83 8F 4E 00 00 1E 42 32 20 B0 12
-0C 62 1E 82 32 20 30 4D 2C 43 12 12 2A 20 18 42
-02 20 08 58 2A 41 82 9A 0A 20 A1 24 B0 12 C0 60
-09 43 28 93 03 24 89 93 02 1E 03 20 89 93 00 1E
-07 24 09 58 39 90 00 02 F4 23 91 53 00 00 EA 3F
-0C 43 6A 41 B9 43 00 1E 28 93 0F 24 B9 40 FF 0F
-02 1E 09 11 8A 10 09 5A 5A 41 01 00 0A 11 09 10
-82 4A 28 20 82 49 26 20 07 3C 09 11 C2 49 26 20
-C2 4A 27 20 82 43 28 20 3A 41 82 4A 2A 20 30 41
-0A 12 1A 52 08 20 B0 12 00 61 3A 41 1A 52 0C 20
-30 40 00 61 F2 B0 40 00 A2 04 29 20 F2 B0 10 00
-A2 04 FC 27 5A 42 B0 04 4A 11 59 42 B4 04 F2 40
-20 00 C0 04 D2 42 B1 04 C8 04 1A 52 E4 04 D2 42
-B5 04 C8 04 19 52 E4 04 D2 42 B2 04 C0 04 B2 40
-00 08 C8 04 1A 52 E4 04 92 42 B6 04 C0 04 B2 80
-BC 07 C0 04 B2 40 00 02 C8 04 19 52 E4 04 30 41
-22 2A 2B 2C 2F 3A 3B 3C 3D 3E 3F 5B 5C 5D 7C 2E
-29 92 06 38 39 80 03 00 B0 12 E0 66 39 40 03 00
-7A 4B C8 4A 00 1E 82 9B 36 20 12 28 0D 12 3D 40
-0F 00 3C 40 90 66 7A 9C F3 27 1D 83 FC 23 3D 41
-6A 9C E6 27 3A 80 21 00 EB 3B 18 53 19 83 E8 23
-09 93 06 24 F8 40 20 00 00 1E 18 53 19 83 FA 23
-30 41 2A 93 D8 20 2C 93 0D 24 0C 93 A7 24 87 12
-80 44 0C 3C 20 57 72 69 74 65 45 72 72 6F 72 00
-3C 42 54 61 B0 12 A8 65 92 42 26 20 22 20 92 42
-28 20 24 20 B0 12 20 66 B0 12 7A 62 18 42 30 20
-F8 40 20 00 0B 1E B0 12 34 66 88 43 0C 1E 88 4A
-0E 1E 88 49 10 1E 88 49 12 1E 98 42 24 20 14 1E
-98 42 22 20 1A 1E 88 43 1C 1E 88 43 1E 1E 1C 43
-1B 42 34 20 82 9B 36 20 CA 27 FB 90 2E 00 00 00
-C6 27 39 40 0B 00 B0 12 B0 66 B0 12 CC 67 2A 43
-B0 12 84 62 0C 93 BB 23 30 4D 1A 4B 04 00 19 4B
-06 00 B0 12 C6 60 B0 12 34 66 18 4B 08 00 88 49
-12 1E 88 4A 16 1E 88 49 18 1E 98 4B 12 00 1C 1E
-98 4B 14 00 1E 1E 1A 4B 04 00 19 4B 06 00 30 40
-02 61 9B 52 1E 20 12 00 8B 63 14 00 1A 42 1A 20
-19 42 1C 20 30 40 02 61 B2 40 00 02 1E 20 1B 42
-32 20 B0 12 C2 67 82 43 1E 20 DB 53 03 00 DB 92
-12 20 03 00 22 20 CB 43 03 00 B0 12 6C 61 08 12
-0A 12 B0 12 A8 65 2A 91 05 24 B0 12 20 66 2A 41
-B0 12 C0 60 3A 41 38 41 98 42 26 20 00 1E 92 93
-02 20 03 24 98 42 28 20 02 1E B0 12 20 66 9B 42
-26 20 0E 00 9B 42 28 20 10 00 30 40 DA 61 C0 63
-05 57 52 49 54 45 B0 12 D8 67 30 4D 58 4B 13 00
-59 4B 14 00 89 10 09 58 58 4B 15 00 5B 42 12 20
-0A 43 3C 42 08 11 09 10 4A 10 1C 83 0B 11 FA 2B
-0A 11 1C 83 FD 37 1B 42 32 20 19 5B 0A 00 18 6B
-0C 00 8B 49 0E 00 8B 48 10 00 CB 4A 03 00 1A 4B
-12 00 BB C0 FF 01 12 00 3A F0 FF 01 82 4A 1E 20
-B0 12 76 62 30 4D 0C 93 38 20 38 90 E0 01 03 2C
-C8 93 20 1E 02 24 7C 40 E5 00 C8 4C 00 1E B0 12
-CC 67 B0 12 78 61 82 4A 2A 20 0B 4A B0 12 C0 60
-1A 48 00 1E 88 43 00 1E 92 93 02 20 09 24 19 48
-02 1E 88 43 02 1E 39 F0 FF 0F 39 90 FF 0F 02 20
-3A 93 0E 24 82 4A 22 20 82 49 24 20 B0 12 78 61
-0B 9A E6 27 0A 12 0A 4B B0 12 20 66 3A 41 DD 3F
-0A 4B B0 12 20 66 B0 12 6C 63 30 4D 38 4C 08 54
-45 52 4D 32 53 44 22 00 87 12 D4 63 76 44 02 00
-02 47 86 47 20 64 38 69 3D 41 92 C3 DC 05 08 43
-B0 12 B6 42 92 B3 DC 05 FD 27 59 42 CC 05 69 92
-0D 24 C8 49 00 1E 18 53 38 90 FF 01 F3 2B 03 24
-B0 12 D8 67 EC 3F B0 12 C8 42 EC 3F B0 12 C8 42
-82 48 1E 20 B0 12 6C 63 30 4D
-@FFFE
-F6 50
-q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 7A 69 C4 4D
-2D 01 FF B3 B6 42 C8 42 C6 60 02 61
+10 00 08 00 A1 F7 80 3E 05 00 18 00 26 67 78 4B
+2E 01 FF B3 06 41 18 41 68 5E A4 5E
@4000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 40
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 40
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 40
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 40 02 3E 52 00 0E 12 3E 4F 30 4D 70 40 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 40 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 40 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 40
-01 21 BE 4F 00 00 3E 4F 30 4D CC 40 02 30 3D 00
-1E 83 0E 7E 30 4D FC 40 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 41 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 40 B0 12 06 41 12 D2 0A 18 F9 3F 39 40
+4C 00 29 83 B9 40 C2 4E B4 FF FB 23 B2 40 C6 41
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 40 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 41 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 41 02 23 53 00 87 12 88 41 C0 41
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 41
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 40 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 41 34 40 86 40 D4 40 BA 41
-92 40 F8 41 D4 41 38 44 A4 47 E0 43 2A 40 22 41
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 41 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 42 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 42 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 42 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 23 02 30 41 B2 40 13 00 CE 05 E2 D2
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 42
-B0 12 B6 42 12 D2 0A 18 F9 3F 0D 12 3D 40 0A 43
+12 D3 F5 3F 34 40 EC 40 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 51 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 23 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 23 02 30 41 0D 12 3D 40 4A 41
1B 42 32 20 9B 42 1E 20 16 00 3A 4F 09 4E 0E 43
-1C 42 1E 20 1B 42 20 20 02 3C 0C 43 2D 83 0C 9B
+1C 42 1E 20 1B 42 20 20 02 3C 4C 41 2D 83 0C 9B
14 2C 58 4C 00 1E 1C 53 78 90 20 00 07 2C 78 90
-0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3D 24
-CA 48 00 00 1A 53 1E 53 38 3C 1A 15 B0 12 0C 62
-19 17 DE 3F F0 40 06 41 43 43 45 50 54 00 30 40
-52 43 3C 40 C2 43 3B 40 8C 43 2D 15 0A 4E 2E 4F
-0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 B6 43 92 B3
-DC 05 05 24 18 42 CC 05 38 90 0A 00 9C 23 21 53
-3D 15 AC 3F 21 52 3A 17 58 42 CC 05 48 9C 08 2C
-48 9B 9A 27 78 92 11 20 2E 9F 0F 24 1E 83 05 3C
-0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05 FD 27
-82 48 CE 05 30 4D B8 43 2D 83 92 B3 DC 05 E4 23
-FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F 3D 41
-B2 40 18 00 0A 18 30 4D 9E 40 04 45 4D 49 54 00
-30 40 E4 43 08 4E 3E 4F E0 3F 85 12 3C 1D 3F 80
-06 00 8F 4E 04 00 3E 40 54 00 9F 42 EC 43 00 00
-AF 4F 02 00 A4 3F DA 43 04 45 43 48 4F 00 B2 40
-82 48 B0 43 82 43 DE 1D 30 4D 32 42 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D B0 43 92 43 DE 1D 30 4D
-20 42 04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40
-4E 44 28 4F 7E 48 8F 48 00 00 2F 83 C9 3F 50 44
-2D 83 91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D
-D0 41 02 43 52 00 30 40 6A 44 87 12 80 44 02 0D
-0A 00 38 44 2A 40 2F 83 8F 4E 00 00 3E 4D 30 4D
-2F 82 8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3
-0D 63 30 4D F2 41 82 53 22 00 82 43 B4 1D 87 12
-76 44 80 44 12 47 76 44 22 00 E2 44 AE 44 B2 40
+0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3E 24
+CA 48 00 00 1A 53 1E 53 39 3C 1A 15 B0 12 AE 5F
+19 17 DE 3F 00 00 06 41 43 43 45 50 54 00 30 40
+92 41 3C 40 04 42 3B 40 CE 41 2D 15 0A 4E 2E 4F
+0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 F8 41 92 B3
+DC 05 05 24 18 42 CC 05 38 90 0A 00 A4 23 21 53
+3D 15 30 40 00 40 21 52 3A 17 58 42 CC 05 48 9C
+08 2C 48 9B A1 27 78 92 11 20 2E 9F 0F 24 1E 83
+05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
+FD 27 82 48 CE 05 30 4D FA 41 2D 83 92 B3 DC 05
+E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
+3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45 4D 49
+54 00 30 40 26 42 08 4E 3E 4F E0 3F 1C 42 04 45
+43 48 4F 00 B2 40 82 48 F2 41 82 43 DE 1D 30 4D
+00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D F2 41
+92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00 0E 93
+0F 24 1E 15 3D 40 74 42 28 4F 7E 48 8F 48 00 00
+2F 83 D7 3F 76 42 2D 83 91 83 02 00 F5 23 1D 17
+2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40 90 42
+0D 12 87 12 2E 40 02 0D 0A 00 5E 42 84 43 00 00
+03 4B 45 59 30 40 A8 42 18 42 CC 05 2F 83 8F 4E
+00 00 B0 12 06 41 92 B3 DC 05 FD 27 1E 42 CC 05
+B0 12 18 41 30 4D 2F 83 8F 4E 00 00 30 4D 8F 4E
+FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23 30 4D
+2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF 3E 40
+80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E 00 00
+3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F 00 00
+3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E 3E E3
+30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D 00 00
+02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 88 42 01 23
+1B 42 DC 1D 2C 4F 2F 83 B0 12 86 40 BF 4F 00 00
+7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00 92 83
+B2 1D 18 42 B2 1D C8 4A 00 00 30 4D 3E 43 02 23
+53 00 0D 12 87 12 40 43 7A 43 2D 83 09 93 E2 23
+0E 93 E0 23 3D 41 30 4D 6E 43 02 23 3E 00 9F 42
+B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00 04 48
+4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53 49 47
+4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D 58 42
+02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 0D 12
+0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53 00 00
+0E 63 87 12 34 43 72 43 FA 42 B2 43 8E 43 5E 42
+CE 46 22 42 84 43 42 42 01 2E 0E 93 E3 37 38 43
+E2 3F AC 43 82 53 22 00 82 43 B4 1D 0D 12 87 12
+24 40 2E 40 56 46 24 40 22 00 50 44 1E 44 B2 40
20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41
-3E 4F 30 4D 1C 44 82 2E 22 00 87 12 9A 44 76 44
-38 44 12 47 2A 40 48 43 05 3C 00 00 04 57 4F 52
-44 00 48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52
-C4 1D 09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20
-0E 4A 1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D
-3B 40 60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C
-09 24 18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82
-B4 1D F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D
-08 8E CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00
-2F 83 0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B
-0E 93 1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53
-1E 4E FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95
-F7 23 0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23
-19 B3 09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83
-8F 4C 00 00 35 40 0E 40 34 40 00 40 30 4D 82 40
-07 3E 4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82
-1B 42 DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28
-7A 80 07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C
-82 49 D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04
-18 42 E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C
-00 00 8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02
-1B 42 DC 1D 0C 43 2D 15 3D 40 56 46 09 43 08 43
-3F 82 8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00
-04 28 C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00
-07 24 3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23
-1C 53 1E 83 EA 3F 58 46 2F 24 2D 83 7A 90 28 00
-CB 27 32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00
-23 20 0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C
-69 49 79 80 30 00 79 90 0A 00 05 28 79 80 07 00
-79 90 0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B
-2C 15 B0 12 3E 41 2A 17 E6 3F 9F 4F 04 00 02 00
-AF 4F 04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D
-06 24 32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53
-9F 4F 02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3
-BF E3 02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00
-32 B0 00 02 01 20 2F 53 30 4D 7E 42 04 48 45 52
-45 00 2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 40
-01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F
-30 4D 46 43 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F
-30 4D 08 44 07 45 58 45 43 55 54 45 0A 4E 3E 4F
-00 4A 10 47 87 4C 49 54 45 52 41 4C 82 93 BE 1D
-0C 24 1A 42 C6 1D A2 52 C6 1D BA 40 76 44 00 00
-8A 4E 02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24
-19 4A 02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 62 44
-05 43 4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E
-FF FF 30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
-C4 1D 30 4D 85 12 20 00 87 12 94 47 A4 47 E2 44
-B2 47 3D 40 BA 47 CC 22 82 3E BC 47 0A 4E 3E 4F
-3D 40 D2 47 23 27 3D 40 AC 47 1A E2 BE 1D A1 27
-B5 23 D4 47 3E 4F 3D 40 AC 47 B8 23 DE 53 00 00
-68 4E 08 5E F8 40 3F 00 00 00 3D 40 CC 4A CB 3F
-34 47 08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D
-3C 49 3B 49 3A 49 3D 15 B0 12 2A 40 A8 47 10 48
-B2 41 C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D
-85 12 BE 1D 82 43 08 18 31 40 E0 1C B2 40 00 1C
-00 1C 82 43 BE 1D 30 4D 80 47 04 42 4F 4F 54 00
-82 93 08 18 1D 24 E2 B2 60 02 1A 20 2F 83 8F 4E
-00 00 1E 42 08 18 B0 12 2A 40 24 44 24 48 80 44
-0F 4C 4F 41 44 22 20 42 4F 4F 54 2E 34 54 48 22
-3C 42 8E 48 08 41 04 51 55 49 54 00 30 40 80 48
-B0 12 2A 40 24 48 66 44 EE 43 A4 47 E0 43 A8 47
-A4 40 0C 41 80 44 0C 73 74 61 63 6B 20 65 6D 70
-74 79 21 00 E6 48 76 44 30 FF 02 47 26 41 80 44
-0A 46 52 41 4D 20 66 75 6C 6C 21 00 E6 48 3C 42
-86 48 24 47 05 41 42 4F 52 54 3F 40 80 1C D6 3F
-C4 48 86 41 42 4F 52 54 22 00 87 12 9A 44 76 44
-E6 48 12 47 2A 40 8F 93 02 00 03 20 2F 52 3E 4F
-30 4D B0 12 EC 4E B0 12 B6 42 92 C3 DC 05 38 40
-A0 AA 39 42 03 43 19 83 FD 23 18 83 FA 23 92 B3
-DC 05 F3 23 87 12 60 4E 76 44 DE 1D EA 40 0E 44
-80 44 04 1B 5B 37 6D 00 38 44 58 40 40 42 40 49
-66 44 80 44 05 6C 69 6E 65 3A 38 44 D0 40 24 42
-38 44 80 44 04 1B 5B 30 6D 00 38 44 CA 48 00 00
-83 5B 27 5D 87 12 66 49 76 44 76 44 12 47 12 47
-2A 40 4A 45 01 27 87 12 A4 47 E2 44 50 45 40 42
-74 49 2A 40 DC 47 32 41 81 5C 92 42 C0 1D C4 1D
-30 4D 50 49 81 5B 82 43 BE 1D 30 4D 78 49 01 5D
-B2 43 BE 1D 30 4D BE 4F 02 00 3E 4F 30 4D FC 46
-82 49 53 00 87 12 20 48 EA 40 40 42 B8 49 54 49
-76 44 96 49 12 47 2A 40 66 49 96 49 2A 40 A0 49
-09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 1D FA D0
-80 00 00 00 30 4D 76 48 88 50 4F 53 54 50 4F 4E
-45 00 87 12 A4 47 E2 44 50 45 58 40 40 42 74 49
-0C 41 40 42 02 4A 76 44 76 44 12 47 12 47 76 44
-12 47 12 47 2A 40 84 49 81 3B 82 93 BE 1D B5 27
-87 12 76 44 2A 40 12 47 A0 4A 86 49 2A 40 08 4A
-07 3A 4E 4F 4E 41 4D 45 30 12 46 4A 2F 83 8F 4E
-00 00 1E 42 C6 1D 1E B3 0E 63 0A 4E 39 40 00 02
-38 40 02 02 21 3C BA 40 87 12 FC FF A2 83 C6 1D
-B2 43 BE 1D 30 4D 20 4A 01 3A 30 12 46 4A 92 B3
-C6 1D A2 63 C6 1D 87 12 A4 47 E2 44 6E 4A 3D 41
-08 4E 7A 4E 5A D3 5A 53 0A 58 19 42 DA 1D 6E 4E
-3E F0 1E 00 09 5E 3E 4F 82 48 B6 1D 82 49 B8 1D
-82 4A BA 1D 82 4F BC 1D 2A 52 82 4A C6 1D 30 41
-82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D A8 49
-FE FF 89 48 00 00 30 4D 87 12 80 44 0F 73 74 61
-63 6B 20 6D 69 73 6D 61 74 63 68 21 F2 48 F2 47
-05 44 45 46 45 52 B0 12 5E 4A BA 40 30 40 FC FF
-BA 40 54 4A FE FF E3 3F 3A 48 06 43 52 45 41 54
-45 00 B0 12 5E 4A BA 40 85 12 FC FF 8A 4A FE FF
-D6 3F D0 4A 05 44 4F 45 53 3E 1A 42 BA 1D BA 40
-84 12 00 00 8A 4D 02 00 3D 41 30 4D B0 45 05 3E
-42 4F 44 59 2E 52 30 4D EA 4A 04 43 4F 44 45 00
-B0 12 5E 4A 82 43 D8 5F A2 82 C6 1D 87 12 CE 4D
-A0 4D 2A 40 2A 4B 07 43 4F 44 45 4E 4E 4D B0 12
-2C 4A F0 3F 00 00 07 45 4E 44 43 4F 44 45 87 12
-E8 4D A0 4A 2A 40 D2 48 03 41 53 4D B2 40 A4 4D
-DA 1D DE 3F 56 4B 06 45 4E 44 41 53 4D 00 87 12
-5E 4B 12 4E 2A 40 00 00 05 43 4F 4C 4F 4E 1A 42
-C6 1D BA 40 87 12 00 00 A2 53 C6 1D B2 43 BE 1D
-30 40 E8 4D 00 00 05 4C 4F 32 48 49 1A 42 C6 1D
-BA 40 B0 12 00 00 BA 40 2A 40 02 00 A2 52 C6 1D
-ED 3F C0 49 85 48 49 32 4C 4F 87 12 02 47 F4 4B
-12 47 86 49 CE 4D A0 4D 2A 40 C4 4B 82 49 46 00
-2F 83 8F 4E 00 00 1E 42 C6 1D A2 52 C6 1D BE 40
-40 42 00 00 2E 53 30 4D 04 4B 84 45 4C 53 45 00
-A2 52 C6 1D 1A 42 C6 1D BA 40 3C 42 FC FF 8E 4A
-00 00 2A 83 0E 4A 30 4D 32 44 84 54 48 45 4E 00
-9E 42 C6 1D 00 00 3E 4F 30 4D 46 4B 85 42 45 47
-49 4E 30 40 02 47 1A 4C 85 55 4E 54 49 4C 39 40
-40 42 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E
-FE FF 3E 4F 30 4D 68 4B 85 41 47 41 49 4E 39 40
-3C 42 EF 3F DC 44 85 57 48 49 4C 45 87 12 E0 4B
-76 40 2A 40 96 44 86 52 45 50 45 41 54 00 87 12
-5E 4C 20 4C 2A 40 FA 4B 82 44 4F 00 2F 83 8F 4E
-00 00 A2 53 C6 1D 1E 42 C6 1D BE 40 54 42 FE FF
-A2 53 00 1C 1A 42 00 1C 8A 43 00 00 30 4D 44 47
-84 4C 4F 4F 50 00 39 40 76 42 A2 52 C6 1D 1A 42
-C6 1D 8A 49 FC FF 8A 4E FE FF 1E 42 00 1C A2 83
-00 1C 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F 3E 4F
-30 4D 90 42 85 2B 4C 4F 4F 50 39 40 64 42 E5 3F
-B0 4C 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F 3E 4F
-0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00 18 53
-1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83 E8 49
-00 00 1A 83 FA 23 30 4D 66 4C 0A 56 4F 43 41 42
-55 4C 41 52 59 00 87 12 F2 4A 76 44 10 00 76 44
-00 00 54 42 76 44 00 00 12 47 76 42 44 4D 02 47
-76 44 C8 1D 34 40 EA 40 12 47 F2 40 0A 4B 76 44
-CA 1D F2 40 2A 40 64 49 05 46 4F 52 54 48 84 12
-5E 4D C8 4D DA 63 CE 63 68 4D DC 4B E4 4C E8 63
-F8 4D 84 4E 8E 65 1E 69 40 68 00 00 CA 52 8E 49
-1E 4B 00 00 58 4C 09 41 53 53 45 4D 42 4C 45 52
-84 12 5E 4D A2 5E 3A 5E 9E 5D 62 59 06 58 00 00
-66 5C 00 00 C8 5F DC 5F 5E 58 9C 58 6E 5E 00 00
-00 00 3E 59 92 4D 96 4D 04 41 4C 53 4F 00 3A 40
-0C 00 39 40 CA 1D 38 40 CC 1D 9D 3F D8 49 08 50
-52 45 56 49 4F 55 53 00 3A 40 0E 00 39 40 CC 1D
-38 40 CA 1D 8A 3F C6 44 04 4F 4E 4C 59 00 82 43
-CC 1D 30 4D 88 4C 0B 44 45 46 49 4E 49 54 49 4F
-4E 53 92 42 CA 1D DA 1D 30 4D 6E 4D FE 4D 12 4E
-22 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
-10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
-89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
-3D 41 30 4D DE 4D 09 50 57 52 5F 53 54 41 54 45
-84 12 1A 4E C4 4D 7A 69 76 4C 09 52 53 54 5F 53
-54 41 54 45 92 42 0E 18 64 4E 92 42 0C 18 66 4E
-EF 3F 56 4E 08 50 57 52 5F 48 45 52 45 00 92 42
-C8 1D 64 4E 92 42 C6 1D 66 4E 30 4D 6A 4E 08 52
-53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
-C6 1D 0C 18 EC 3F 2A 4D 04 57 49 50 45 00 39 40
-10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 42 DE 42
-B2 40 4A 4F 48 4F B2 40 80 48 7E 48 B2 40 C4 4D
-0E 18 B2 40 7A 69 0C 18 30 12 74 4E B2 40 E4 43
-E2 43 B2 40 6A 44 68 44 B2 40 98 42 96 42 B2 40
-52 43 50 43 B2 40 3C 1D EC 43 1B 42 32 20 0B 93
-04 24 CB 43 02 00 2B 4B FA 3F B2 40 18 00 0A 18
-37 40 1A 40 36 40 92 40 35 40 0E 40 34 40 00 40
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 B8 4E
-04 57 41 52 4D 00 30 40 4A 4F 3D 40 98 50 92 C3
-30 01 1E 42 08 18 0E 93 9E 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 E2 B2 60 02 8A 20
-39 42 B0 12 9E 60 D2 C3 23 02 2C 42 B2 40 95 00
-14 20 B2 40 00 40 18 20 B0 12 14 60 02 24 30 40
-3A 61 B0 12 9C 60 7A 93 FC 23 B2 40 87 AA 14 20
-92 43 16 20 B2 40 00 48 18 20 B0 12 14 60 29 42
-B0 12 9E 60 92 43 14 20 82 43 16 20 78 43 3C 42
-B2 40 00 77 18 20 B0 12 14 60 B2 40 40 69 18 20
-B0 12 5A 60 03 24 58 83 F3 23 D9 3F 0C 5C A2 43
-16 20 B2 40 00 50 18 20 B0 12 5A 60 D0 23 92 D3
-40 06 82 43 46 06 92 C3 40 06 B0 12 C4 60 38 40
-00 1E 92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48
-C2 01 92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24
-A2 43 02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24
-3A 50 0B 20 0C 4A 30 40 40 61 B0 12 C4 60 D2 48
-0D 00 12 20 19 48 0E 00 82 49 08 20 1A 48 16 00
-0A 93 02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49
-0C 20 09 5A A2 93 02 20 04 24 82 49 0E 20 39 50
-20 00 19 82 12 20 19 82 12 20 82 49 10 20 92 42
-02 20 2C 20 3E 90 0A 00 1A 27 3E 90 16 00 17 2F
-2E 93 E6 26 EF 2E 30 4D 80 44 06 0D 1B 5B 37 6D
-23 00 38 44 34 42 80 44 19 46 61 73 74 46 6F 72
-74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E
-73 20 38 44 76 44 30 FF 02 47 B8 40 24 42 80 44
-0A 62 79 74 65 73 20 66 72 65 65 00 3C 42 40 49
-2C 4C 04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40
-04 A5 20 01 98 50 B2 40 88 5A 5C 01 B2 D3 06 02
+3E 4F 30 4D F8 43 82 2E 22 00 0D 12 87 12 08 44
+24 40 5E 42 56 46 84 43 00 00 04 57 4F 52 44 00
+3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C 09 9A
+15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C 00 00
+09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C F6 2F
+7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82 C2 1D
+82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00 30 4D
+00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C 74 40
+80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C 01 00
+78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93 F3 27
+09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99 01 00
+F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49 6A 4E
+1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40 FA 40
+34 40 EC 40 30 4D 00 00 07 3E 4E 55 4D 42 45 52
+3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C 7A 80
+30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90 0A 00
+12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48 D2 04
+82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A 08 63
+1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00 8F 49
+04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43 2D 15
+3D 40 AE 45 09 43 08 43 3F 82 8F 4E 06 00 0C 4E
+7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43 02 00
+0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53 04 24
+3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F B0 45
+2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02 7A 90
+F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43 8F 49
+02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00 79 90
+0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28 09 9B
+08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 40 2A 17
+E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A 4E 93
+2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02 3F 50
+06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00 BF 4F
+00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3 00 00
+9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20 2F 53
+30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53
+C6 1D 3E 4F 30 4D 86 41 05 41 4C 4C 4F 54 82 5E
+C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A 54 46 87 4C
+49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42 C6 1D
+A2 52 C6 1D BA 40 24 40 00 00 8A 4E 02 00 3E 4F
+32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E
+02 00 0E 49 EB 3F 30 4D 8A 43 05 43 4F 55 4E 54
+2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 85 12
+20 00 0D 12 87 12 C4 40 CE 46 50 44 DE 46 3D 40
+E6 46 E2 22 A4 26 E8 46 0A 4E 3E 4F 3D 40 FE 46
+39 27 3D 40 D8 46 1A E2 BE 1D BD 23 AC 27 00 47
+3E 4F 3D 40 D8 46 BF 23 DE 53 00 00 68 4E 08 5E
+F8 40 3F 00 00 00 3D 40 C0 49 D2 3F 2E 42 08 45
+56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49 3B 49
+3A 49 3D 15 87 12 D2 46 3A 47 B2 41 C4 1D B2 41
+C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D 82 43
+08 18 31 40 E0 1C B2 40 00 1C 00 1C 82 43 BE 1D
+30 4D BA 46 04 42 4F 4F 54 00 82 93 08 18 1C 24
+E2 B2 60 02 19 20 2F 83 8F 4E 00 00 1E 42 08 18
+87 12 4A 42 4E 47 2E 40 0F 4C 4F 41 44 22 20 42
+4F 4F 54 2E 34 54 48 22 48 40 B4 47 00 00 04 51
+55 49 54 00 30 40 A8 47 87 12 4E 47 8C 42 D4 40
+CE 46 22 42 D2 46 EA 42 1A 43 2E 40 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 0E 48 24 40 40 FF
+CE 4A 22 43 2E 40 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 0E 48 48 40 AC 47 68 46 05 41 42 4F 52 54
+3F 40 80 1C D7 3F EA 47 86 41 42 4F 52 54 22 00
+0D 12 87 12 08 44 24 40 0E 48 56 46 84 43 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 B6 4C B0 12
+06 41 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+2A 4C 24 40 DE 1D 02 41 34 42 2E 40 04 1B 5B 37
+6D 00 5E 42 DA 42 4C 40 68 48 8C 42 2E 40 05 6C
+69 6E 65 3A 5E 42 C4 43 5E 42 2E 40 04 1B 5B 30
+6D 00 5E 42 F0 47 00 00 83 5B 27 5D 0D 12 87 12
+90 48 24 40 24 40 56 46 56 46 84 43 A2 44 01 27
+0D 12 87 12 CE 46 50 44 A8 44 4C 40 A0 48 84 43
+08 47 30 43 81 5C 92 42 C0 1D C4 1D 30 4D 78 48
+81 5B 82 43 BE 1D 30 4D A4 48 01 5D B2 43 BE 1D
+30 4D 9E 47 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 CE 46 50 44 A8 44 DA 42 4C 40 A0 48 1A 43
+4C 40 F0 48 24 40 24 40 56 46 56 46 24 40 56 46
+56 46 84 43 9E 43 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D B0 48 01 3A
+30 12 58 49 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+CE 46 50 44 26 49 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 0E 49 07 3A 4E 4F
+4E 41 4D 45 30 12 58 49 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 40
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+1A 48 6C 49 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 40 84 43 56 46 92 49 B2 48 84 43 64 47 06 43
+52 45 41 54 45 00 B0 12 14 49 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F 1E 47 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+DE 49 04 43 4F 44 45 00 B0 12 14 49 A2 82 C6 1D
+82 43 78 5D 0D 12 87 12 82 4B 54 4B 84 43 12 4A
+07 43 4F 44 45 4E 4E 4D 30 12 1C 4A 9D 3F 00 00
+07 45 4E 44 43 4F 44 45 0D 12 87 12 92 49 A8 4B
+84 43 F8 47 03 41 53 4D B2 40 58 4B DA 1D DC 3F
+40 4A 06 45 4E 44 41 53 4D 00 0D 12 87 12 48 4A
+DC 4B 84 43 00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D
+BA 40 0D 12 00 00 BA 40 87 12 02 00 A2 52 C6 1D
+B2 43 BE 1D 30 40 A8 4B 00 00 05 4C 4F 32 48 49
+A2 83 C6 1D 1A 42 C6 1D EE 3F F6 48 85 48 49 32
+4C 4F 0D 12 87 12 CE 4A C2 4A 56 46 B2 48 20 4A
+84 43 2E 53 30 4D 30 4A 85 42 45 47 49 4E 2F 83
+8F 4E 00 00 1E 42 C6 1D 30 4D 4A 44 0A 56 4F 43
+41 42 55 4C 41 52 59 00 0D 12 87 12 E6 49 24 40
+10 00 24 40 00 00 56 40 24 40 00 00 56 46 78 40
+F8 4A CE 4A 24 40 C8 1D C6 42 02 41 56 46 0C 43
+FE 49 24 40 CA 1D 0C 43 84 43 8E 48 05 46 4F 52
+54 48 84 12 12 4B 7C 4B 7C 61 70 61 1C 4B AC 4A
+A0 42 8A 61 C2 4B 4E 4C 36 63 C8 66 EA 65 00 00
+78 50 BA 48 08 45 00 00 54 4A 09 41 53 53 45 4D
+42 4C 45 52 84 12 12 4B 44 5C DC 5B 40 5B FC 56
+9A 55 00 00 08 5A 00 00 68 5D 7C 5D F2 55 30 56
+10 5C 00 00 00 00 D6 56 46 4B 4A 4B 04 41 4C 53
+4F 00 3A 40 0C 00 39 40 D6 1D 08 49 28 53 19 83
+18 83 E8 49 00 00 1A 83 FA 23 30 4D C4 48 08 50
+52 45 56 49 4F 55 53 00 3A 40 0E 00 38 40 CA 1D
+09 48 29 53 F8 49 00 00 18 53 1A 83 FB 23 30 4D
+36 44 04 4F 4E 4C 59 00 82 43 CC 1D 30 4D F8 49
+0B 44 45 46 49 4E 49 54 49 4F 4E 53 92 42 CA 1D
+DA 1D 30 4D 22 4B C8 4B DC 4B EC 4B 3A 4E 82 4A
+C8 1D 2E 4E 82 4E C6 1D 3D 40 10 00 09 4A 08 49
+29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00 1D 83
+F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D 9E 4B
+09 50 57 52 5F 53 54 41 54 45 84 12 E4 4B 78 4B
+26 67 04 44 09 52 53 54 5F 53 54 41 54 45 92 42
+0E 18 2E 4C 92 42 0C 18 30 4C EF 3F 20 4C 08 50
+57 52 5F 48 45 52 45 00 92 42 C8 1D 2E 4C 92 42
+C6 1D 30 4C 30 4D 34 4C 08 52 53 54 5F 48 45 52
+45 00 92 42 C8 1D 0E 18 92 42 C6 1D 0C 18 EC 3F
+DC 4A 04 57 49 50 45 00 39 40 10 00 29 83 B9 43
+80 FF FC 23 B2 40 04 40 02 40 B2 40 14 4D 12 4D
+B2 40 A8 47 A6 47 B2 40 78 4B 0E 18 B2 40 26 67
+0C 18 30 12 3E 4C B2 40 26 42 24 42 B2 40 90 42
+8E 42 B2 40 A8 42 A6 42 B2 40 92 41 90 41 B2 40
+3C 1D E2 40 1B 42 32 20 0B 93 04 24 CB 43 02 00
+2B 4B FA 3F B2 40 18 00 0A 18 37 40 84 43 36 40
+FA 42 35 40 FA 40 34 40 EC 40 B2 40 0A 00 DC 1D
+B2 40 20 00 B4 1D 30 41 82 4C 04 57 41 52 4D 00
+30 40 14 4D 3D 40 66 4E 92 C3 30 01 1E 42 08 18
+0E 93 A0 24 D2 B3 01 02 02 20 3E E3 1E 53 F2 D0
+03 00 0D 02 92 D3 DA 05 E2 B2 60 02 8A 20 39 42
+B0 12 40 5E D2 C3 23 02 2C 42 B2 40 95 00 14 20
+B2 40 00 40 18 20 B0 12 B6 5D 02 24 30 40 DC 5E
+B0 12 3E 5E 7A 93 FC 23 B2 40 87 AA 14 20 92 43
+16 20 B2 40 00 48 18 20 B0 12 B6 5D 29 42 B0 12
+40 5E 92 43 14 20 82 43 16 20 78 43 3C 42 B2 40
+00 77 18 20 B0 12 B6 5D B2 40 40 69 18 20 B0 12
+FC 5D 03 24 58 83 F3 23 D9 3F 0C 5C A2 43 16 20
+B2 40 00 50 18 20 B0 12 FC 5D D0 23 92 D3 40 06
+82 43 46 06 92 C3 40 06 B0 12 66 5E 38 40 00 1E
+92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48 C2 01
+92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24 A2 43
+02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24 3A 50
+0B 20 0C 4A 30 40 E2 5E B0 12 66 5E D2 48 0D 00
+12 20 19 48 0E 00 82 49 08 20 1A 48 16 00 0A 93
+02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49 0C 20
+09 5A A2 93 02 20 04 24 82 49 0E 20 39 50 20 00
+19 82 12 20 19 82 12 20 82 49 10 20 92 42 02 20
+2C 20 3E 90 0A 00 18 27 3E 90 16 00 15 2F 2E 93
+E4 26 ED 2E 30 4D 2E 40 07 0D 0A 1B 5B 37 6D 23
+5E 42 FA 43 2E 40 19 46 61 73 74 46 6F 72 74 68
+20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20
+5E 42 24 40 40 FF CE 4A 04 43 C4 43 2E 40 0A 62
+79 74 65 73 20 66 72 65 65 00 48 40 68 48 C8 4A
+04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40 04 A5
+20 01 31 40 E0 1C B2 40 88 5A 5C 01 B2 D3 06 02
B2 40 FC FF 02 02 B2 43 26 02 B2 D3 22 02 E2 D2
25 02 B2 43 42 02 B2 D3 46 02 B2 43 62 02 B2 D3
66 02 F2 43 26 03 F2 D3 22 03 F2 40 A5 00 41 01
33 00 64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40
59 14 18 83 FE 23 19 83 FA 23 F2 D0 10 00 2A 03
F2 40 A5 00 A1 04 F2 C0 40 00 A2 04 B2 42 B0 01
-39 40 00 10 29 83 89 43 00 1C FC 23 39 40 4C 00
-29 83 B9 40 F6 50 B4 FF FB 23 B2 40 84 43 F0 FF
+39 40 00 10 29 83 89 43 00 1C FC 23 B0 12 0E 40
B2 40 81 00 C0 05 92 42 02 18 C6 05 92 42 04 18
-C8 05 92 C3 C0 05 92 D3 DA 05 B2 40 81 A9 40 06
-B2 40 30 00 46 06 D2 D3 25 02 B2 D0 C0 04 0C 02
-92 C3 40 06 3F 40 80 1C 31 40 E0 1C 30 12 46 4F
-9C 3E E2 50 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D 58 4A 86 5B 54 48 45 4E 5D 00 30 4D
-16 52 86 5B 45 4C 53 45 5D 00 87 12 76 44 00 00
-C6 40 A4 47 E2 44 86 47 34 40 40 42 8C 52 44 40
-80 44 06 5B 54 48 45 4E 5D 00 EC 51 4A 42 5C 52
-5A 44 D0 40 58 40 4A 42 32 52 2A 40 44 40 80 44
-06 5B 45 4C 53 45 5D 00 EC 51 4A 42 7A 52 5A 44
-D0 40 58 40 4A 42 30 52 2A 40 80 44 04 5B 49 46
-5D 00 EC 51 4A 42 32 52 3C 42 30 52 5A 44 80 44
-05 0D 0A 6B 6F 20 38 44 EE 43 94 47 3C 42 32 52
-22 52 84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D
-A2 52 89 5B 44 45 46 49 4E 45 44 5D 87 12 A4 47
-E2 44 50 45 6A 40 2A 40 B2 52 8B 5B 55 4E 44 45
-46 49 4E 45 44 5D 87 12 A4 47 E2 44 50 45 6A 40
-00 41 2A 40 E6 52 3D 41 B2 4E 0E 18 A2 4E 0C 18
-3E 4F 30 40 74 4E F2 4C 06 4D 41 52 4B 45 52 00
-B0 12 5E 4A BA 40 84 12 FC FF BA 40 E4 52 FE FF
-9A 42 C8 1D 00 00 28 83 8A 48 02 00 A2 52 C6 1D
-30 40 A6 4A 1C 15 B0 12 2A 40 E2 44 50 45 4A 42
-3A 53 0C 46 40 42 74 49 54 53 3C 53 39 4E 39 80
+C8 05 92 C3 C0 05 B2 40 81 A9 40 06 B2 40 30 00
+46 06 D2 D3 25 02 B2 D0 C0 04 0C 02 92 C3 40 06
+3F 40 80 1C 30 12 10 4D A5 3E C4 49 86 5B 54 48
+45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
+0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
+FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
+F9 23 2F 53 2D 53 F7 3F 9C 4F 86 5B 45 4C 53 45
+5D 00 0D 12 87 12 24 40 00 00 08 43 CE 46 50 44
+C0 46 C6 42 4C 40 34 50 CE 42 2E 40 06 5B 54 48
+45 4E 5D 00 A6 4F 0E 50 CA 4F EC 4F 84 43 CE 42
+2E 40 06 5B 45 4C 53 45 5D 00 A6 4F 24 50 CA 4F
+EA 4F 84 43 2E 40 04 5B 49 46 5D 00 A6 4F EC 4F
+48 40 EA 4F 80 42 2E 40 05 0D 0A 6B 6F 20 5E 42
+D4 40 C4 40 48 40 EC 4F DA 4F 84 5B 49 46 5D 00
+0E 93 3E 4F C6 27 30 4D 2F 53 30 4D 4A 50 89 5B
+44 45 46 49 4E 45 44 5D 0D 12 87 12 CE 46 50 44
+A8 44 58 50 84 43 5E 50 8B 5B 55 4E 44 45 46 49
+4E 45 44 5D 0D 12 87 12 68 50 8C 50 3D 41 30 40
+14 43 38 40 C0 1D 0A 4E 39 48 2E 48 09 5E 1E 52
+C4 1D 09 9E 03 24 7A 9E FC 27 1E 83 0A 4E 2A 88
+82 4A C4 1D 30 4D 1C 15 87 12 50 44 A8 44 42 40
+CA 50 64 45 4C 40 A0 48 E4 50 CC 50 39 4E 39 80
86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
01 24 2E 82 1B 17 30 41 32 B0 00 02 01 24 3E 4F
-30 41 3E 40 28 00 B0 12 24 53 B0 12 58 53 19 42
+30 41 3E 40 28 00 B0 12 B6 50 B0 12 E8 50 19 42
C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 1D 92 53 C4 1D B0 12 2A 40 E2 44 0C 46
-40 42 A0 53 96 53 21 53 3E 90 10 00 81 2D DA 2B
-A2 53 B2 41 C4 1D D6 3F 87 12 A4 47 D6 44 B0 53
+12 12 C4 1D 92 53 C4 1D 87 12 50 44 64 45 4C 40
+2E 51 24 51 21 53 3E 90 10 00 84 2D DB 2B 30 51
+B2 41 C4 1D D7 3F 0D 12 87 12 CE 46 92 50 40 51
0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90
-23 00 29 20 92 53 C4 1D B0 12 24 53 B0 12 58 53
+23 00 29 20 92 53 C4 1D B0 12 B6 50 B0 12 E8 50
3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
3E 4F 3D 41 30 4D 7A 90 26 00 09 20 3C 40 10 02
-92 53 C4 1D B0 12 24 53 B0 12 58 53 EB 3F 7A 90
-40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 7E 53
-0C 20 3C 50 10 00 3E 40 2B 00 B0 12 7E 53 92 92
+92 53 C4 1D B0 12 B6 50 B0 12 E8 50 EB 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 0E 51
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 0E 51 92 92
C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E D8 3F
-B0 12 7E 53 FA 23 3C 50 10 00 B0 12 62 53 EF 3F
-0C 43 1B 42 C6 1D A2 53 C6 1D 87 12 A4 47 D6 44
-82 54 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
-82 00 C6 3F B0 12 7E 53 E1 23 3C 50 80 00 B0 12
-62 53 DC 3F D6 42 04 52 45 54 49 00 87 12 76 44
-00 13 12 47 2A 40 76 44 2C 00 A8 53 7A 54 C0 54
-09 4B 2E 4E 0E DC A2 3F A6 4B 03 4D 4F 56 84 12
-B6 54 00 40 CA 54 05 4D 4F 56 2E 42 84 12 B6 54
-40 40 00 00 03 41 44 44 84 12 B6 54 00 50 E4 54
-05 41 44 44 2E 42 84 12 B6 54 40 50 F0 54 04 41
-44 44 43 00 84 12 B6 54 00 60 FE 54 06 41 44 44
-43 2E 42 00 84 12 B6 54 40 60 A6 54 04 53 55 42
-43 00 84 12 B6 54 00 70 1C 55 06 53 55 42 43 2E
-42 00 84 12 B6 54 40 70 2A 55 03 53 55 42 84 12
-B6 54 00 80 3A 55 05 53 55 42 2E 42 84 12 B6 54
-40 80 88 4B 03 43 4D 50 84 12 B6 54 00 90 54 55
-05 43 4D 50 2E 42 84 12 B6 54 40 90 76 4B 04 44
-41 44 44 00 84 12 B6 54 00 A0 6E 55 06 44 41 44
-44 2E 42 00 84 12 B6 54 40 A0 60 55 03 42 49 54
-84 12 B6 54 00 B0 8C 55 05 42 49 54 2E 42 84 12
-B6 54 40 B0 98 55 03 42 49 43 84 12 B6 54 00 C0
-A6 55 05 42 49 43 2E 42 84 12 B6 54 40 C0 B2 55
-03 42 49 53 84 12 B6 54 00 D0 C0 55 05 42 49 53
-2E 42 84 12 B6 54 40 D0 00 00 03 58 4F 52 84 12
-B6 54 00 E0 DA 55 05 58 4F 52 2E 42 84 12 B6 54
-40 E0 0C 55 03 41 4E 44 84 12 B6 54 00 F0 F4 55
-05 41 4E 44 2E 42 84 12 B6 54 40 F0 A4 47 A8 53
-12 56 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA
-4F 3F 46 55 03 52 52 43 84 12 0C 56 00 10 24 56
-05 52 52 43 2E 42 84 12 0C 56 40 10 30 56 04 53
-57 50 42 00 84 12 0C 56 80 10 3E 56 03 52 52 41
-84 12 0C 56 00 11 4C 56 05 52 52 41 2E 42 84 12
-0C 56 40 11 58 56 03 53 58 54 84 12 0C 56 80 11
-00 00 04 50 55 53 48 00 84 12 0C 56 00 12 72 56
-06 50 55 53 48 2E 42 00 84 12 0C 56 40 12 CC 55
-04 43 41 4C 4C 00 84 12 0C 56 80 12 1A 53 0E 4A
-87 12 34 42 80 44 0D 6F 75 74 20 6F 66 20 62 6F
-75 6E 64 73 F2 48 A4 47 D6 44 BC 56 92 53 C4 1D
-3E 40 2C 00 B0 12 2A 40 E2 44 0C 46 40 42 74 49
-70 54 D4 56 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E
-0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
-D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F
-66 56 06 52 52 43 4D 2E 41 00 84 12 B6 56 40 00
-02 57 04 52 52 43 4D 00 84 12 B6 56 50 00 12 57
-06 52 52 41 4D 2E 41 00 84 12 B6 56 40 01 20 57
-04 52 52 41 4D 00 84 12 B6 56 50 01 30 57 06 52
-4C 41 4D 2E 41 00 84 12 B6 56 40 02 3E 57 04 52
-4C 41 4D 00 84 12 B6 56 50 02 4E 57 06 52 52 55
-4D 2E 41 00 84 12 B6 56 40 03 5C 57 04 52 52 55
-4D 00 84 12 B6 56 50 03 80 56 07 50 55 53 48 4D
-2E 41 84 12 B6 56 00 14 7A 57 05 50 55 53 48 4D
-84 12 B6 56 00 15 8A 57 06 50 4F 50 4D 2E 41 00
-84 12 B6 56 00 16 98 57 04 50 4F 50 4D 00 84 12
-B6 56 00 17 6C 57 03 53 3E 3D 85 12 00 38 B6 57
-02 53 3C 00 85 12 00 34 A8 57 03 30 3E 3D 85 12
-00 30 CA 57 02 30 3C 00 85 12 00 30 00 00 02 55
-3C 00 85 12 00 2C DE 57 03 55 3E 3D 85 12 00 28
-D4 57 03 30 3C 3E 85 12 00 24 F2 57 02 30 3D 00
-85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E
-00 00 A2 53 C6 1D 0E 4A 30 4D E8 57 04 54 48 45
-4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89
-0A 11 3A 90 00 02 33 2F 88 DA 00 00 30 4D 7C 55
-04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00
-A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F 1C 58 05 55
-4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83
-0A 89 0A 11 3A 90 00 FE 12 3B 3A F0 FF 03 08 DA
-89 48 00 00 A2 53 C6 1D 30 4D 00 56 05 41 47 41
-49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49
-4C 45 87 12 0A 58 76 40 2A 40 C0 57 06 52 45 50
-45 41 54 00 87 12 92 58 22 58 2A 40 BE 58 3D 41
-08 4E 3E 4F 2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D
-00 00 30 4D 90 56 03 42 57 31 84 12 BC 58 00 00
-D6 58 03 42 57 32 84 12 BC 58 00 00 E2 58 03 42
-57 33 84 12 BC 58 00 00 FA 58 3D 41 1A 42 C6 1D
-28 4E B2 92 C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D
-8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12
-F8 58 00 00 1A 59 03 46 57 32 84 12 F8 58 00 00
-26 59 03 46 57 33 84 12 F8 58 00 00 00 00 05 3F
-47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04 3E B0
-00 10 02 24 3E E0 00 08 87 12 66 49 3C 47 2A 40
-32 59 04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40
-00 3C F2 3F 87 12 A4 47 D6 44 7C 59 69 4E 3E 4F
-3C 4F 2C 4C 1B 42 C6 1D A2 53 C6 1D 79 90 52 00
-0A 20 B0 12 7E 53 5E 0E 5E 0E 0E DC 8B 4E 00 00
-0E 4B 3D 41 30 4D 79 90 23 00 0D 20 3C C0 40 00
-92 53 C4 1D A2 53 C6 1D B0 12 24 53 BB 4F 02 00
-3E F0 0F 00 E8 3F 79 90 26 00 03 20 3C E0 E0 00
-EF 3F 3C C0 F0 00 79 90 40 00 12 20 92 53 C4 1D
-B0 12 7E 53 D8 23 3C D0 10 00 3E 40 2B 00 B0 12
-7E 53 92 92 C0 1D C4 1D CE 27 92 53 C4 1D CB 3F
-3C D0 30 00 A2 53 C6 1D 3E 40 28 00 B0 12 24 53
-BB 4F 02 00 3E 40 29 00 EA 3F 87 12 A4 47 D6 44
-22 5A 3B 4F 2C 4B 69 4E 7E 40 20 00 79 90 52 00
-03 20 B0 12 7E 53 B1 3F 3C C0 F0 00 A2 53 C6 1D
-79 90 26 00 09 20 3C D0 60 00 92 53 C4 1D B0 12
-24 53 BB 4F 02 00 A1 3F 3C D0 70 00 3E 40 28 00
-B0 12 24 53 BB 4F 02 00 3E 40 29 00 E2 3F 76 44
-2C 00 74 59 1A 5A 66 40 2A 40 D6 54 04 4D 4F 56
-41 00 84 12 6E 5A C0 00 EE 58 04 43 4D 50 41 00
-84 12 6E 5A D0 00 8C 58 04 41 44 44 41 00 84 12
-6E 5A E0 00 AC 58 04 53 55 42 41 00 84 12 6E 5A
-F0 00 8A 5A 05 43 41 4C 4C 41 87 12 A4 47 D6 44
-C2 5A 1B 42 C6 1D A2 53 C6 1D 6E 4E 3C 40 34 01
-7E 90 52 00 0B 20 7E 40 20 00 B0 12 7E 53 5C 0E
+B0 12 0E 51 FA 23 3C 50 10 00 B0 12 F2 50 EF 3F
+0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 CE 46
+92 50 14 52 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C5 3F B0 12 0E 51 E0 23 3C 50 80 00
+B0 12 F2 50 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 40 00 13 56 46 84 43 24 40 2C 00 36 51
+0A 52 54 52 09 4B 2E 4E 0E DC A0 3F 9A 4A 03 4D
+4F 56 84 12 4A 52 00 40 5E 52 05 4D 4F 56 2E 42
+84 12 4A 52 40 40 00 00 03 41 44 44 84 12 4A 52
+00 50 78 52 05 41 44 44 2E 42 84 12 4A 52 40 50
+84 52 04 41 44 44 43 00 84 12 4A 52 00 60 92 52
+06 41 44 44 43 2E 42 00 84 12 4A 52 40 60 38 52
+04 53 55 42 43 00 84 12 4A 52 00 70 B0 52 06 53
+55 42 43 2E 42 00 84 12 4A 52 40 70 BE 52 03 53
+55 42 84 12 4A 52 00 80 CE 52 05 53 55 42 2E 42
+84 12 4A 52 40 80 76 4A 03 43 4D 50 84 12 4A 52
+00 90 E8 52 05 43 4D 50 2E 42 84 12 4A 52 40 90
+62 4A 04 44 41 44 44 00 84 12 4A 52 00 A0 02 53
+06 44 41 44 44 2E 42 00 84 12 4A 52 40 A0 F4 52
+03 42 49 54 84 12 4A 52 00 B0 20 53 05 42 49 54
+2E 42 84 12 4A 52 40 B0 2C 53 03 42 49 43 84 12
+4A 52 00 C0 3A 53 05 42 49 43 2E 42 84 12 4A 52
+40 C0 46 53 03 42 49 53 84 12 4A 52 00 D0 54 53
+05 42 49 53 2E 42 84 12 4A 52 40 D0 00 00 03 58
+4F 52 84 12 4A 52 00 E0 6E 53 05 58 4F 52 2E 42
+84 12 4A 52 40 E0 A0 52 03 41 4E 44 84 12 4A 52
+00 F0 88 53 05 41 4E 44 2E 42 84 12 4A 52 40 F0
+CE 46 36 51 A6 53 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F DA 52 03 52 52 43 84 12 A0 53
+00 10 B8 53 05 52 52 43 2E 42 84 12 A0 53 40 10
+C4 53 04 53 57 50 42 00 84 12 A0 53 80 10 D2 53
+03 52 52 41 84 12 A0 53 00 11 E0 53 05 52 52 41
+2E 42 84 12 A0 53 40 11 EC 53 03 53 58 54 84 12
+A0 53 80 11 00 00 04 50 55 53 48 00 84 12 A0 53
+00 12 06 54 06 50 55 53 48 2E 42 00 84 12 A0 53
+40 12 60 53 04 43 41 4C 4C 00 84 12 A0 53 80 12
+1A 53 0E 4A 0D 12 87 12 FA 43 2E 40 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 1A 48 CE 46 92 50
+52 54 92 53 C4 1D 3E 40 2C 00 87 12 50 44 64 45
+4C 40 A0 48 00 52 68 54 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F FA 53 06 52 52 43 4D 2E 41 00 84 12
+4C 54 40 00 96 54 04 52 52 43 4D 00 84 12 4C 54
+50 00 A6 54 06 52 52 41 4D 2E 41 00 84 12 4C 54
+40 01 B4 54 04 52 52 41 4D 00 84 12 4C 54 50 01
+C4 54 06 52 4C 41 4D 2E 41 00 84 12 4C 54 40 02
+D2 54 04 52 4C 41 4D 00 84 12 4C 54 50 02 E2 54
+06 52 52 55 4D 2E 41 00 84 12 4C 54 40 03 F0 54
+04 52 52 55 4D 00 84 12 4C 54 50 03 14 54 07 50
+55 53 48 4D 2E 41 84 12 4C 54 00 14 0E 55 05 50
+55 53 48 4D 84 12 4C 54 00 15 1E 55 06 50 4F 50
+4D 2E 41 00 84 12 4C 54 00 16 2C 55 04 50 4F 50
+4D 00 84 12 4C 54 00 17 00 55 03 53 3E 3D 85 12
+00 38 4A 55 02 53 3C 00 85 12 00 34 3C 55 03 30
+3E 3D 85 12 00 30 5E 55 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 72 55 03 55 3E 3D
+85 12 00 28 68 55 03 30 3C 3E 85 12 00 24 86 55
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 7C 55
+04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 33 2F 88 DA 00 00
+30 4D 10 53 04 45 4C 53 45 00 1A 42 C6 1D BA 40
+00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
+B0 55 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 12 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D 94 53
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 9E 55 E0 42 84 43
+54 55 06 52 45 50 45 41 54 00 0D 12 87 12 26 56
+B6 55 84 43 56 56 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 1D CB 2F 98 42 C6 1D 00 00 30 4D 24 54 03 42
+57 31 84 12 54 56 00 00 6E 56 03 42 57 32 84 12
+54 56 00 00 7A 56 03 42 57 33 84 12 54 56 00 00
+92 56 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B
+BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 90 56 00 00 B2 56 03 46
+57 32 84 12 90 56 00 00 BE 56 03 46 57 33 84 12
+90 56 00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30
+07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08
+0D 12 87 12 90 48 76 46 84 43 CA 56 04 47 4F 54
+4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F1 3F 0D 12
+87 12 CE 46 92 50 18 57 69 4E 3E 4F 3C 4F 2C 4C
+1B 42 C6 1D A2 53 C6 1D 79 90 52 00 0A 20 B0 12
+0E 51 5E 0E 5E 0E 0E DC 8B 4E 00 00 0E 4B 3D 41
+30 4D 79 90 23 00 0D 20 3C C0 40 00 92 53 C4 1D
+A2 53 C6 1D B0 12 B6 50 BB 4F 02 00 3E F0 0F 00
+E8 3F 79 90 26 00 03 20 3C E0 E0 00 EF 3F 3C C0
+F0 00 79 90 40 00 12 20 92 53 C4 1D B0 12 0E 51
+D8 23 3C D0 10 00 3E 40 2B 00 B0 12 0E 51 92 92
+C0 1D C4 1D CE 27 92 53 C4 1D CB 3F 3C D0 30 00
+A2 53 C6 1D 3E 40 28 00 B0 12 B6 50 BB 4F 02 00
+3E 40 29 00 EA 3F 0D 12 87 12 CE 46 92 50 C0 57
+3B 4F 2C 4B 69 4E 7E 40 20 00 79 90 52 00 03 20
+B0 12 0E 51 B0 3F 3C C0 F0 00 A2 53 C6 1D 79 90
+26 00 09 20 3C D0 60 00 92 53 C4 1D B0 12 B6 50
+BB 4F 02 00 A0 3F 3C D0 70 00 3E 40 28 00 B0 12
+B6 50 BB 4F 02 00 3E 40 29 00 E2 3F 24 40 2C 00
+0E 57 B6 57 82 42 84 43 6A 52 04 4D 4F 56 41 00
+84 12 0C 58 C0 00 86 56 04 43 4D 50 41 00 84 12
+0C 58 D0 00 20 56 04 41 44 44 41 00 84 12 0C 58
+E0 00 42 56 04 53 55 42 41 00 84 12 0C 58 F0 00
+28 58 05 43 41 4C 4C 41 0D 12 87 12 CE 46 92 50
+62 58 1B 42 C6 1D A2 53 C6 1D 6E 4E 3C 40 34 01
+7E 90 52 00 0B 20 7E 40 20 00 B0 12 0E 51 5C 0E
0C DE 8B 4C 00 00 3E 4F 3D 41 30 4D 2C 53 7E 90
-40 00 0B 20 92 53 C4 1D 7E 40 20 00 B0 12 7E 53
+40 00 0B 20 92 53 C4 1D 7E 40 20 00 B0 12 0E 51
EE 23 1C 53 3E 40 2B 00 E8 3F A2 53 C6 1D 7E 90
-23 00 09 20 3C 40 3B 01 92 53 C4 1D B0 12 24 53
+23 00 09 20 3C 40 3B 01 92 53 C4 1D B0 12 B6 50
BB 4F 02 00 DC 3F 7E 90 26 00 02 20 2C 53 F4 3F
-7E 40 28 00 1C 83 B0 12 24 53 BB 4F 02 00 3E 40
-29 00 CB 3F 87 12 A4 47 D6 44 4C 5B 69 4E 3E 4F
-3C 40 00 18 79 90 52 00 05 20 B0 12 7E 53 0E 4C
-3D 41 30 4D 82 43 D8 5F 79 90 23 00 0B 20 92 53
-C4 1D B0 12 24 53 2F 53 3E F0 0F 00 5E 0A 5E 0E
-0C DE ED 3F 79 90 26 00 F2 27 79 90 40 00 12 20
-92 53 C4 1D B0 12 7E 53 E2 23 3E 40 2B 00 92 53
-C4 1D B0 12 7E 53 92 92 C0 1D C4 1D D8 27 92 53
-C4 1D D5 3F 3E 40 28 00 B0 12 24 53 8F 4E 00 00
-3E 40 29 00 B0 12 7E 53 3E 4F 3E F0 0F 00 0C DE
-EA 3F 87 12 A4 47 D6 44 DA 5B 3C 4F 69 4E 3E 40
-20 00 79 90 52 00 BB 27 82 43 D8 5F 79 90 26 00
-08 20 92 53 C4 1D B0 12 24 53 2F 53 3E F0 0F 00
-BF 3F 3E 40 28 00 B0 12 24 53 F7 3F 1B 42 C6 1D
-A2 53 C6 1D 0C 4E 3E 4F 1C D2 D8 5F 82 43 D8 5F
-3C DE 8B 4C 00 00 B2 41 C4 1D 30 4D 76 44 C4 1D
-EA 40 86 40 76 44 2C 00 44 5B D2 5B 0C 5C 3C 42
-B6 54 7C 5A 04 4D 4F 56 58 00 84 12 2C 5C 40 00
-00 40 44 5C 06 4D 4F 56 58 2E 41 00 84 12 2C 5C
-00 00 40 40 54 5C 06 4D 4F 56 58 2E 42 00 84 12
-2C 5C 40 00 40 40 98 5A 04 41 44 44 58 00 84 12
-2C 5C 40 00 00 50 78 5C 06 41 44 44 58 2E 41 00
-84 12 2C 5C 00 00 40 50 88 5C 06 41 44 44 58 2E
-42 00 84 12 2C 5C 40 00 40 50 9A 5C 05 41 44 44
-43 58 84 12 2C 5C 40 00 00 60 AC 5C 07 41 44 44
-43 58 2E 41 84 12 2C 5C 00 00 40 60 BC 5C 07 41
-44 44 43 58 2E 42 84 12 2C 5C 40 00 40 60 A6 5A
-05 53 55 42 43 58 84 12 2C 5C 40 00 00 70 E0 5C
-07 53 55 42 43 58 2E 41 84 12 2C 5C 00 00 40 70
-F0 5C 07 53 55 42 43 58 2E 42 84 12 2C 5C 40 00
-40 70 02 5D 04 53 55 42 58 00 84 12 2C 5C 40 00
-00 80 14 5D 06 53 55 42 58 2E 41 00 84 12 2C 5C
-00 00 40 80 24 5D 06 53 55 42 58 2E 42 00 84 12
-2C 5C 40 00 40 80 B4 5A 04 43 4D 50 58 00 84 12
-2C 5C 40 00 00 90 48 5D 06 43 4D 50 58 2E 41 00
-84 12 2C 5C 00 00 40 90 58 5D 06 43 4D 50 58 2E
-42 00 84 12 2C 5C 40 00 40 90 40 58 05 44 41 44
-44 58 84 12 2C 5C 40 00 00 A0 7C 5D 07 44 41 44
-44 58 2E 41 84 12 2C 5C 00 00 40 A0 8C 5D 07 44
-41 44 44 58 2E 42 84 12 2C 5C 40 00 40 A0 6A 5D
-04 42 49 54 58 00 84 12 2C 5C 40 00 00 B0 B0 5D
-06 42 49 54 58 2E 41 00 84 12 2C 5C 00 00 40 B0
-C0 5D 06 42 49 54 58 2E 42 00 84 12 2C 5C 40 00
-40 B0 D2 5D 04 42 49 43 58 00 84 12 2C 5C 40 00
-00 C0 E4 5D 06 42 49 43 58 2E 41 00 84 12 2C 5C
-00 00 40 C0 F4 5D 06 42 49 43 58 2E 42 00 84 12
-2C 5C 40 00 40 C0 06 5E 04 42 49 53 58 00 84 12
-2C 5C 40 00 00 D0 18 5E 06 42 49 53 58 2E 41 00
-84 12 2C 5C 00 00 40 D0 28 5E 06 42 49 53 58 2E
-42 00 84 12 2C 5C 40 00 40 D0 E6 55 04 58 4F 52
-58 00 84 12 2C 5C 40 00 00 E0 4C 5E 06 58 4F 52
-58 2E 41 00 84 12 2C 5C 00 00 40 E0 5C 5E 06 58
-4F 52 58 2E 42 00 84 12 2C 5C 40 00 40 E0 CE 5C
-04 41 4E 44 58 00 84 12 2C 5C 40 00 00 F0 80 5E
-06 41 4E 44 58 2E 41 00 84 12 2C 5C 00 00 40 F0
-90 5E 06 41 4E 44 58 2E 42 00 84 12 2C 5C 40 00
-40 F0 76 44 C4 1D EA 40 86 40 A4 47 44 5B 0C 5C
-3C 42 0C 56 36 5D 04 52 52 43 58 00 84 12 B2 5E
-40 00 00 10 C6 5E 06 52 52 43 58 2E 41 00 84 12
-B2 5E 00 00 40 10 D6 5E 06 52 52 43 58 2E 42 00
-84 12 B2 5E 40 00 40 10 E8 5E 04 52 52 55 58 00
-84 12 B2 5E 40 01 00 10 FA 5E 06 52 52 55 58 2E
-41 00 84 12 B2 5E 00 01 40 10 0A 5F 06 52 52 55
-58 2E 42 00 84 12 B2 5E 40 01 40 10 1C 5F 05 53
-57 50 42 58 84 12 B2 5E 40 00 80 10 2E 5F 07 53
-57 50 42 58 2E 41 84 12 B2 5E 00 00 80 10 3E 5F
-04 52 52 41 58 00 84 12 B2 5E 40 00 00 11 50 5F
-06 52 52 41 58 2E 41 00 84 12 B2 5E 00 00 40 11
-60 5F 06 52 52 41 58 2E 42 00 84 12 B2 5E 40 00
-40 11 72 5F 04 53 58 54 58 00 84 12 B2 5E 40 00
-80 11 84 5F 06 53 58 54 58 2E 41 00 84 12 B2 5E
-00 00 80 11 FC 57 05 50 55 53 48 58 84 12 B2 5E
-40 00 00 12 A6 5F 07 50 55 53 48 58 2E 41 84 12
-B2 5E 00 00 40 12 B6 5F 07 50 55 53 48 58 2E 42
-84 12 B2 5E 40 00 40 12 00 00 94 5F 03 52 50 54
-87 12 A4 47 D6 44 E8 5F 29 4E 7E 40 20 00 79 90
-52 00 06 20 B0 12 7E 53 03 24 3E D0 80 00 05 3C
-B0 12 24 53 1E 83 3E F0 0F 00 82 4E D8 5F 3E 4F
-3D 41 30 4D 1A 43 25 3C D2 C3 23 02 E2 B2 60 02
-02 24 30 40 E8 50 1A 52 04 20 19 62 06 20 92 43
-14 20 A2 93 02 20 07 24 0A 5A 49 69 82 4A 16 20
-C2 49 18 20 0A 3C C2 4A 15 20 8A 10 C2 4A 16 20
-C2 49 17 20 89 10 C2 49 18 20 B0 12 9C 60 5A 53
-FC 23 39 40 05 00 D2 49 14 20 4E 06 82 93 46 06
-05 24 92 B3 6C 06 FD 27 C2 93 4C 06 59 83 F3 2F
-19 83 0B 30 F2 43 4E 06 82 93 46 06 03 24 92 B3
-6C 06 FD 27 5A 92 4C 06 F3 23 30 41 19 43 3A 43
-8A 10 C2 4A 4E 06 82 93 46 06 05 24 92 B3 6C 06
-FD 27 C2 93 4C 06 19 83 F3 23 5A 42 4C 06 30 41
-1A 52 08 20 09 43 1C D3 F2 40 51 00 19 20 B0 12
-18 60 33 20 B0 12 9C 60 6A 53 04 24 FB 23 D9 42
-4C 06 FF 1D F2 43 4E 06 03 43 19 53 39 90 01 02
-F6 23 F2 43 4E 06 3C C0 03 00 D2 D3 23 02 30 41
-09 43 2C D3 F0 40 58 00 11 BF B0 12 18 60 15 20
-3A 40 FE FF 29 43 B0 12 A0 60 D2 49 00 1E 4E 06
-03 43 19 53 39 90 00 02 F8 23 39 40 03 00 B0 12
-9E 60 7A C0 E1 00 6A 92 DE 27 8C 10 1C 52 4C 06
-D2 D3 23 02 87 12 80 44 0B 3C 20 53 44 20 45 72
-72 6F 72 21 56 61 2F 83 8F 4E 00 00 B2 40 10 00
-DC 1D 0E 4C B0 12 2A 40 24 42 F2 48 92 4B 0E 00
-22 20 92 4B 10 00 24 20 5A 42 23 20 58 42 22 20
-92 93 02 20 08 24 59 42 24 20 89 10 0A 59 88 10
-08 58 0A 6A 88 10 08 58 30 41 82 43 1C 20 92 42
-0E 20 1A 20 C2 93 24 20 03 20 92 93 22 20 14 24
-92 42 22 20 D0 04 92 42 24 20 D2 04 92 42 12 20
-C8 04 92 42 E4 04 1A 20 92 42 E6 04 1C 20 92 52
-10 20 1A 20 82 63 1C 20 30 41 92 4B 0E 00 22 20
-92 4B 10 00 24 20 B0 12 9A 61 5A 4B 03 00 82 5A
-1A 20 82 63 1C 20 30 41 09 93 07 24 F8 90 20 00
-00 1E 03 20 18 53 19 83 F9 23 30 41 1B 42 32 20
-82 43 1E 20 B2 90 00 02 20 20 A8 20 BB 80 00 02
-12 00 8B 73 14 00 DB 53 03 00 DB 92 12 20 03 00
-11 28 CB 43 03 00 B0 12 6C 61 B0 12 C0 60 8B 43
-10 00 9B 48 00 1E 0E 00 92 93 02 20 03 24 9B 48
-02 1E 10 00 B2 40 00 02 20 20 8B 93 14 00 0B 20
-92 9B 12 00 1E 20 82 2C BB 90 00 02 12 00 03 2C
-92 4B 12 00 20 20 B0 12 DA 61 1A 42 1A 20 19 42
-1C 20 21 3F 3C 42 3B 40 38 20 09 43 CB 93 02 00
-10 24 9B 92 24 20 0C 00 04 20 9B 92 22 20 0A 00
-07 24 09 4B 3B 50 1C 00 3B 90 18 21 EF 23 0C 5C
-30 41 0C 43 82 4B 32 20 8B 49 00 00 09 93 0A 24
-99 52 C4 1D 16 00 4A 93 05 34 C9 93 02 00 02 34
-5A 59 02 00 CB 4A 02 00 CB 43 03 00 9B 42 1A 20
-04 00 9B 42 1C 20 06 00 18 42 30 20 8B 48 08 00
-9B 48 1A 1E 0A 00 9B 48 14 1E 0C 00 9B 48 1A 1E
-0E 00 9B 48 14 1E 10 00 9B 48 1C 1E 12 00 9B 48
-1E 1E 14 00 82 43 1E 20 6A 93 5F 27 C9 37 8B 43
-16 00 7A 93 02 24 07 38 95 3F B2 40 1C 21 EC 43
-B2 40 EA 42 50 43 9B 42 C0 1D 18 00 9B 82 C4 1D
-18 00 9B 42 C2 1D 1A 00 9B 52 C4 1D 1A 00 82 3F
-CB 43 02 00 2B 4B 82 4B 32 20 0B 93 06 24 92 4B
-16 00 1E 20 B0 12 54 62 22 C3 30 41 1B 42 32 20
-0B 93 FB 27 EB 93 02 00 04 20 B0 12 C2 67 B0 12
-8A 67 CB 93 02 00 E4 37 1E 4B 18 00 9F 4B 1A 00
-00 00 31 50 06 00 3D 41 B0 12 50 63 02 24 30 40
-24 44 B2 40 3C 1D EC 43 B2 40 52 43 50 43 30 40
-0E 44 9E 4E 85 52 45 41 44 22 5A 43 19 3C 40 4F
-86 57 52 49 54 45 22 00 6A 43 12 3C 06 4E 84 44
-45 4C 22 00 6A 42 0C 3C E4 51 05 43 4C 4F 53 45
-B0 12 6C 63 30 4D F8 52 85 4C 4F 41 44 22 7A 43
-2F 83 8F 4E 00 00 0E 4A 82 93 BE 1D 0A 24 87 12
-76 44 76 44 12 47 12 47 9A 44 76 44 20 64 12 47
-2A 40 87 12 76 44 22 00 E2 44 86 47 1E 64 3D 41
-35 4F 0E 55 82 4E 36 20 1C 43 92 42 2C 20 22 20
-92 42 2E 20 24 20 0E 95 8D 24 F5 90 3A 00 01 00
-01 20 25 53 F5 90 5C 00 00 00 08 20 15 53 92 42
-02 20 22 20 82 43 24 20 0E 95 70 24 82 45 34 20
-B0 12 9A 61 34 40 20 00 A2 93 02 20 04 24 92 92
-22 20 02 20 02 24 14 42 12 20 B0 12 7A 62 2C 43
-0A 43 08 4A 58 0E 08 58 82 48 30 20 C8 93 00 1E
-61 24 39 42 F8 95 00 1E 04 20 18 53 19 83 FA 23
-15 53 F5 90 2E 00 FF FF 19 24 39 50 03 00 B0 12
-F8 61 06 20 F5 90 5C 00 FF FF 29 24 0E 95 27 28
-15 42 34 20 1A 53 3A 90 10 00 DB 23 92 53 1A 20
-82 63 1C 20 14 83 D1 23 2C 42 3C 3C F5 90 2E 00
-FE FF EE 27 B0 12 F8 61 EB 23 39 40 03 00 F8 95
-00 1E 04 20 18 53 19 83 FA 23 09 3C 0E 95 E0 2F
-F5 90 5C 00 FF FF DC 23 B0 12 F8 61 D9 23 18 42
-30 20 92 48 1A 1E 22 20 92 48 14 1E 24 20 F8 B0
-10 00 0B 1E 14 24 82 93 24 20 06 20 82 93 22 20
-03 20 92 42 02 20 22 20 0E 95 8E 2F 92 42 22 20
-2C 20 92 42 24 20 2E 20 8F 43 00 00 03 3C 2A 4F
-B0 12 84 62 34 40 00 40 35 40 0E 40 3A 4F 3E 4F
-0A 93 04 24 7A 93 0D 20 0C 93 01 20 30 4D 87 12
-80 44 0B 3C 20 4F 70 65 6E 45 72 72 6F 72 3C 42
-54 61 1A 93 B6 20 0C 93 F2 23 30 4D B4 63 04 52
-45 41 44 00 2F 83 8F 4E 00 00 1E 42 32 20 B0 12
-0C 62 1E 82 32 20 30 4D 2C 43 12 12 2A 20 18 42
-02 20 08 58 2A 41 82 9A 0A 20 A1 24 B0 12 C0 60
-09 43 28 93 03 24 89 93 02 1E 03 20 89 93 00 1E
-07 24 09 58 39 90 00 02 F4 23 91 53 00 00 EA 3F
-0C 43 6A 41 B9 43 00 1E 28 93 0F 24 B9 40 FF 0F
-02 1E 09 11 8A 10 09 5A 5A 41 01 00 0A 11 09 10
-82 4A 28 20 82 49 26 20 07 3C 09 11 C2 49 26 20
-C2 4A 27 20 82 43 28 20 3A 41 82 4A 2A 20 30 41
-0A 12 1A 52 08 20 B0 12 00 61 3A 41 1A 52 0C 20
-30 40 00 61 F2 B0 40 00 A2 04 29 20 F2 B0 10 00
-A2 04 FC 27 5A 42 B0 04 4A 11 59 42 B4 04 F2 40
-20 00 C0 04 D2 42 B1 04 C8 04 1A 52 E4 04 D2 42
-B5 04 C8 04 19 52 E4 04 D2 42 B2 04 C0 04 B2 40
-00 08 C8 04 1A 52 E4 04 92 42 B6 04 C0 04 B2 80
-BC 07 C0 04 B2 40 00 02 C8 04 19 52 E4 04 30 41
-22 2A 2B 2C 2F 3A 3B 3C 3D 3E 3F 5B 5C 5D 7C 2E
-29 92 06 38 39 80 03 00 B0 12 E0 66 39 40 03 00
-7A 4B C8 4A 00 1E 82 9B 36 20 12 28 0D 12 3D 40
-0F 00 3C 40 90 66 7A 9C F3 27 1D 83 FC 23 3D 41
-6A 9C E6 27 3A 80 21 00 EB 3B 18 53 19 83 E8 23
-09 93 06 24 F8 40 20 00 00 1E 18 53 19 83 FA 23
-30 41 2A 93 D8 20 2C 93 0D 24 0C 93 A7 24 87 12
-80 44 0C 3C 20 57 72 69 74 65 45 72 72 6F 72 00
-3C 42 54 61 B0 12 A8 65 92 42 26 20 22 20 92 42
-28 20 24 20 B0 12 20 66 B0 12 7A 62 18 42 30 20
-F8 40 20 00 0B 1E B0 12 34 66 88 43 0C 1E 88 4A
-0E 1E 88 49 10 1E 88 49 12 1E 98 42 24 20 14 1E
-98 42 22 20 1A 1E 88 43 1C 1E 88 43 1E 1E 1C 43
-1B 42 34 20 82 9B 36 20 CA 27 FB 90 2E 00 00 00
-C6 27 39 40 0B 00 B0 12 B0 66 B0 12 CC 67 2A 43
-B0 12 84 62 0C 93 BB 23 30 4D 1A 4B 04 00 19 4B
-06 00 B0 12 C6 60 B0 12 34 66 18 4B 08 00 88 49
-12 1E 88 4A 16 1E 88 49 18 1E 98 4B 12 00 1C 1E
-98 4B 14 00 1E 1E 1A 4B 04 00 19 4B 06 00 30 40
-02 61 9B 52 1E 20 12 00 8B 63 14 00 1A 42 1A 20
-19 42 1C 20 30 40 02 61 B2 40 00 02 1E 20 1B 42
-32 20 B0 12 C2 67 82 43 1E 20 DB 53 03 00 DB 92
-12 20 03 00 22 20 CB 43 03 00 B0 12 6C 61 08 12
-0A 12 B0 12 A8 65 2A 91 05 24 B0 12 20 66 2A 41
-B0 12 C0 60 3A 41 38 41 98 42 26 20 00 1E 92 93
-02 20 03 24 98 42 28 20 02 1E B0 12 20 66 9B 42
-26 20 0E 00 9B 42 28 20 10 00 30 40 DA 61 C0 63
-05 57 52 49 54 45 B0 12 D8 67 30 4D 58 4B 13 00
-59 4B 14 00 89 10 09 58 58 4B 15 00 5B 42 12 20
-0A 43 3C 42 08 11 09 10 4A 10 1C 83 0B 11 FA 2B
-0A 11 1C 83 FD 37 1B 42 32 20 19 5B 0A 00 18 6B
-0C 00 8B 49 0E 00 8B 48 10 00 CB 4A 03 00 1A 4B
-12 00 BB C0 FF 01 12 00 3A F0 FF 01 82 4A 1E 20
-B0 12 76 62 30 4D 0C 93 38 20 38 90 E0 01 03 2C
-C8 93 20 1E 02 24 7C 40 E5 00 C8 4C 00 1E B0 12
-CC 67 B0 12 78 61 82 4A 2A 20 0B 4A B0 12 C0 60
-1A 48 00 1E 88 43 00 1E 92 93 02 20 09 24 19 48
-02 1E 88 43 02 1E 39 F0 FF 0F 39 90 FF 0F 02 20
-3A 93 0E 24 82 4A 22 20 82 49 24 20 B0 12 78 61
-0B 9A E6 27 0A 12 0A 4B B0 12 20 66 3A 41 DD 3F
-0A 4B B0 12 20 66 B0 12 6C 63 30 4D 38 4C 08 54
-45 52 4D 32 53 44 22 00 87 12 D4 63 76 44 02 00
-02 47 86 47 20 64 38 69 3D 41 92 C3 DC 05 08 43
-B0 12 B6 42 92 B3 DC 05 FD 27 59 42 CC 05 69 92
-0D 24 C8 49 00 1E 18 53 38 90 FF 01 F3 2B 03 24
-B0 12 D8 67 EC 3F B0 12 C8 42 EC 3F B0 12 C8 42
-82 48 1E 20 B0 12 6C 63 30 4D
+7E 40 28 00 1C 83 B0 12 B6 50 BB 4F 02 00 3E 40
+29 00 CB 3F 0D 12 87 12 CE 46 92 50 EE 58 69 4E
+3E 4F 3C 40 00 18 79 90 52 00 05 20 B0 12 0E 51
+0E 4C 3D 41 30 4D 82 43 78 5D 79 90 23 00 0B 20
+92 53 C4 1D B0 12 B6 50 2F 53 3E F0 0F 00 5E 0A
+5E 0E 0C DE ED 3F 79 90 26 00 F2 27 79 90 40 00
+12 20 92 53 C4 1D B0 12 0E 51 E2 23 3E 40 2B 00
+92 53 C4 1D B0 12 0E 51 92 92 C0 1D C4 1D D8 27
+92 53 C4 1D D5 3F 3E 40 28 00 B0 12 B6 50 8F 4E
+00 00 3E 40 29 00 B0 12 0E 51 3E 4F 3E F0 0F 00
+0C DE EA 3F 0D 12 87 12 CE 46 92 50 7E 59 3C 4F
+69 4E 3E 40 20 00 79 90 52 00 BA 27 82 43 78 5D
+79 90 26 00 08 20 92 53 C4 1D B0 12 B6 50 2F 53
+3E F0 0F 00 BE 3F 3E 40 28 00 B0 12 B6 50 F7 3F
+B2 4F C4 1D 1B 42 C6 1D A2 53 C6 1D 0C 4E 3E 4F
+1C D2 78 5D 82 43 78 5D 3C DE 8B 4C 00 00 30 4D
+24 40 C4 1D 02 41 24 40 2C 00 E4 58 74 59 B0 59
+48 40 4A 52 1A 58 04 4D 4F 56 58 00 84 12 D0 59
+40 00 00 40 E6 59 06 4D 4F 56 58 2E 41 00 84 12
+D0 59 00 00 40 40 F6 59 06 4D 4F 56 58 2E 42 00
+84 12 D0 59 40 00 40 40 36 58 04 41 44 44 58 00
+84 12 D0 59 40 00 00 50 1A 5A 06 41 44 44 58 2E
+41 00 84 12 D0 59 00 00 40 50 2A 5A 06 41 44 44
+58 2E 42 00 84 12 D0 59 40 00 40 50 3C 5A 05 41
+44 44 43 58 84 12 D0 59 40 00 00 60 4E 5A 07 41
+44 44 43 58 2E 41 84 12 D0 59 00 00 40 60 5E 5A
+07 41 44 44 43 58 2E 42 84 12 D0 59 40 00 40 60
+44 58 05 53 55 42 43 58 84 12 D0 59 40 00 00 70
+82 5A 07 53 55 42 43 58 2E 41 84 12 D0 59 00 00
+40 70 92 5A 07 53 55 42 43 58 2E 42 84 12 D0 59
+40 00 40 70 A4 5A 04 53 55 42 58 00 84 12 D0 59
+40 00 00 80 B6 5A 06 53 55 42 58 2E 41 00 84 12
+D0 59 00 00 40 80 C6 5A 06 53 55 42 58 2E 42 00
+84 12 D0 59 40 00 40 80 52 58 04 43 4D 50 58 00
+84 12 D0 59 40 00 00 90 EA 5A 06 43 4D 50 58 2E
+41 00 84 12 D0 59 00 00 40 90 FA 5A 06 43 4D 50
+58 2E 42 00 84 12 D0 59 40 00 40 90 D4 55 05 44
+41 44 44 58 84 12 D0 59 40 00 00 A0 1E 5B 07 44
+41 44 44 58 2E 41 84 12 D0 59 00 00 40 A0 2E 5B
+07 44 41 44 44 58 2E 42 84 12 D0 59 40 00 40 A0
+0C 5B 04 42 49 54 58 00 84 12 D0 59 40 00 00 B0
+52 5B 06 42 49 54 58 2E 41 00 84 12 D0 59 00 00
+40 B0 62 5B 06 42 49 54 58 2E 42 00 84 12 D0 59
+40 00 40 B0 74 5B 04 42 49 43 58 00 84 12 D0 59
+40 00 00 C0 86 5B 06 42 49 43 58 2E 41 00 84 12
+D0 59 00 00 40 C0 96 5B 06 42 49 43 58 2E 42 00
+84 12 D0 59 40 00 40 C0 A8 5B 04 42 49 53 58 00
+84 12 D0 59 40 00 00 D0 BA 5B 06 42 49 53 58 2E
+41 00 84 12 D0 59 00 00 40 D0 CA 5B 06 42 49 53
+58 2E 42 00 84 12 D0 59 40 00 40 D0 7A 53 04 58
+4F 52 58 00 84 12 D0 59 40 00 00 E0 EE 5B 06 58
+4F 52 58 2E 41 00 84 12 D0 59 00 00 40 E0 FE 5B
+06 58 4F 52 58 2E 42 00 84 12 D0 59 40 00 40 E0
+70 5A 04 41 4E 44 58 00 84 12 D0 59 40 00 00 F0
+22 5C 06 41 4E 44 58 2E 41 00 84 12 D0 59 00 00
+40 F0 32 5C 06 41 4E 44 58 2E 42 00 84 12 D0 59
+40 00 40 F0 24 40 C4 1D 02 41 CE 46 E4 58 B0 59
+48 40 A0 53 D8 5A 04 52 52 43 58 00 84 12 54 5C
+40 00 00 10 66 5C 06 52 52 43 58 2E 41 00 84 12
+54 5C 00 00 40 10 76 5C 06 52 52 43 58 2E 42 00
+84 12 54 5C 40 00 40 10 88 5C 04 52 52 55 58 00
+84 12 54 5C 40 01 00 10 9A 5C 06 52 52 55 58 2E
+41 00 84 12 54 5C 00 01 40 10 AA 5C 06 52 52 55
+58 2E 42 00 84 12 54 5C 40 01 40 10 BC 5C 05 53
+57 50 42 58 84 12 54 5C 40 00 80 10 CE 5C 07 53
+57 50 42 58 2E 41 84 12 54 5C 00 00 80 10 DE 5C
+04 52 52 41 58 00 84 12 54 5C 40 00 00 11 F0 5C
+06 52 52 41 58 2E 41 00 84 12 54 5C 00 00 40 11
+00 5D 06 52 52 41 58 2E 42 00 84 12 54 5C 40 00
+40 11 12 5D 04 53 58 54 58 00 84 12 54 5C 40 00
+80 11 24 5D 06 53 58 54 58 2E 41 00 84 12 54 5C
+00 00 80 11 90 55 05 50 55 53 48 58 84 12 54 5C
+40 00 00 12 46 5D 07 50 55 53 48 58 2E 41 84 12
+54 5C 00 00 40 12 56 5D 07 50 55 53 48 58 2E 42
+84 12 54 5C 40 00 40 12 00 00 34 5D 03 52 50 54
+0D 12 87 12 CE 46 92 50 8A 5D 29 4E 7E 40 20 00
+79 90 52 00 06 20 B0 12 0E 51 03 24 3E D0 80 00
+05 3C B0 12 B6 50 1E 83 3E F0 0F 00 82 4E 78 5D
+3E 4F 3D 41 30 4D 1A 43 25 3C D2 C3 23 02 E2 B2
+60 02 02 24 30 40 B6 4E 1A 52 04 20 19 62 06 20
+92 43 14 20 A2 93 02 20 07 24 0A 5A 49 69 82 4A
+16 20 C2 49 18 20 0A 3C C2 4A 15 20 8A 10 C2 4A
+16 20 C2 49 17 20 89 10 C2 49 18 20 B0 12 3E 5E
+5A 53 FC 23 39 40 05 00 D2 49 14 20 4E 06 82 93
+46 06 05 24 92 B3 6C 06 FD 27 C2 93 4C 06 59 83
+F3 2F 19 83 0B 30 F2 43 4E 06 82 93 46 06 03 24
+92 B3 6C 06 FD 27 5A 92 4C 06 F3 23 30 41 19 43
+3A 43 8A 10 C2 4A 4E 06 82 93 46 06 05 24 92 B3
+6C 06 FD 27 C2 93 4C 06 19 83 F3 23 5A 42 4C 06
+30 41 1A 52 08 20 09 43 1C D3 F2 40 51 00 19 20
+B0 12 BA 5D 33 20 B0 12 3E 5E 6A 53 04 24 FB 23
+D9 42 4C 06 FF 1D F2 43 4E 06 03 43 19 53 39 90
+01 02 F6 23 F2 43 4E 06 3C C0 03 00 D2 D3 23 02
+30 41 09 43 2C D3 F0 40 58 00 6F C1 B0 12 BA 5D
+15 20 3A 40 FE FF 29 43 B0 12 42 5E D2 49 00 1E
+4E 06 03 43 19 53 39 90 00 02 F8 23 39 40 03 00
+B0 12 40 5E 7A C0 E1 00 6A 92 DE 27 8C 10 1C 52
+4C 06 D2 D3 23 02 0D 12 87 12 2E 40 0B 3C 20 53
+44 20 45 72 72 6F 72 21 FA 5E 2F 83 8F 4E 00 00
+B2 40 10 00 DC 1D 0E 4C 87 12 C4 43 1A 48 92 4B
+0E 00 22 20 92 4B 10 00 24 20 5A 42 23 20 58 42
+22 20 92 93 02 20 08 24 59 42 24 20 89 10 0A 59
+88 10 08 58 0A 6A 88 10 08 58 30 41 82 43 1C 20
+92 42 0E 20 1A 20 C2 93 24 20 03 20 92 93 22 20
+14 24 92 42 22 20 D0 04 92 42 24 20 D2 04 92 42
+12 20 C8 04 92 42 E4 04 1A 20 92 42 E6 04 1C 20
+92 52 10 20 1A 20 82 63 1C 20 30 41 92 4B 0E 00
+22 20 92 4B 10 00 24 20 B0 12 3C 5F 5A 4B 03 00
+82 5A 1A 20 82 63 1C 20 30 41 09 93 07 24 F8 90
+20 00 00 1E 03 20 18 53 19 83 F9 23 30 41 1B 42
+32 20 82 43 1E 20 B2 90 00 02 20 20 A8 20 BB 80
+00 02 12 00 8B 73 14 00 DB 53 03 00 DB 92 12 20
+03 00 11 28 CB 43 03 00 B0 12 0E 5F B0 12 62 5E
+8B 43 10 00 9B 48 00 1E 0E 00 92 93 02 20 03 24
+9B 48 02 1E 10 00 B2 40 00 02 20 20 8B 93 14 00
+0B 20 92 9B 12 00 1E 20 82 2C BB 90 00 02 12 00
+03 2C 92 4B 12 00 20 20 B0 12 7C 5F 1A 42 1A 20
+19 42 1C 20 21 3F 3C 42 3B 40 38 20 09 43 CB 93
+02 00 10 24 9B 92 24 20 0C 00 04 20 9B 92 22 20
+0A 00 07 24 09 4B 3B 50 1C 00 3B 90 18 21 EF 23
+0C 5C 30 41 0C 43 82 4B 32 20 8B 49 00 00 09 93
+0A 24 99 52 C4 1D 16 00 4A 93 05 34 C9 93 02 00
+02 34 5A 59 02 00 CB 4A 02 00 CB 43 03 00 9B 42
+1A 20 04 00 9B 42 1C 20 06 00 18 42 30 20 8B 48
+08 00 9B 48 1A 1E 0A 00 9B 48 14 1E 0C 00 9B 48
+1A 1E 0E 00 9B 48 14 1E 10 00 9B 48 1C 1E 12 00
+9B 48 1E 1E 14 00 82 43 1E 20 6A 93 5F 27 C9 37
+8B 43 16 00 7A 93 02 24 07 38 95 3F B2 40 1C 21
+E2 40 B2 40 2A 41 90 41 9B 42 C0 1D 18 00 9B 82
+C4 1D 18 00 9B 42 C2 1D 1A 00 9B 52 C4 1D 1A 00
+82 3F CB 43 02 00 2B 4B 82 4B 32 20 0B 93 06 24
+92 4B 16 00 1E 20 B0 12 F6 5F 22 C3 30 41 1B 42
+32 20 0B 93 FB 27 EB 93 02 00 04 20 B0 12 6C 65
+B0 12 34 65 CB 93 02 00 E4 37 1E 4B 18 00 9F 4B
+1A 00 00 00 31 50 06 00 3D 41 B0 12 F2 60 02 24
+30 40 4A 42 B2 40 3C 1D E2 40 B2 40 92 41 90 41
+30 40 34 42 68 4C 85 52 45 41 44 22 5A 43 19 3C
+0A 4D 86 57 52 49 54 45 22 00 6A 43 12 3C D0 4B
+84 44 45 4C 22 00 6A 42 0C 3C B0 4E 05 43 4C 4F
+53 45 B0 12 0E 61 30 4D 7E 46 85 4C 4F 41 44 22
+7A 43 2F 83 8F 4E 00 00 0E 4A 82 93 BE 1D 0B 24
+0D 12 87 12 24 40 24 40 56 46 56 46 08 44 24 40
+C6 61 56 46 84 43 0D 12 87 12 24 40 22 00 50 44
+C0 46 C4 61 3D 41 35 4F 0E 55 82 4E 36 20 1C 43
+92 42 2C 20 22 20 92 42 2E 20 24 20 0E 95 8D 24
+F5 90 3A 00 01 00 01 20 25 53 F5 90 5C 00 00 00
+08 20 15 53 92 42 02 20 22 20 82 43 24 20 0E 95
+70 24 82 45 34 20 B0 12 3C 5F 34 40 20 00 A2 93
+02 20 04 24 92 92 22 20 02 20 02 24 14 42 12 20
+B0 12 1C 60 2C 43 0A 43 08 4A 58 0E 08 58 82 48
+30 20 C8 93 00 1E 61 24 39 42 F8 95 00 1E 04 20
+18 53 19 83 FA 23 15 53 F5 90 2E 00 FF FF 19 24
+39 50 03 00 B0 12 9A 5F 06 20 F5 90 5C 00 FF FF
+29 24 0E 95 27 28 15 42 34 20 1A 53 3A 90 10 00
+DB 23 92 53 1A 20 82 63 1C 20 14 83 D1 23 2C 42
+3C 3C F5 90 2E 00 FE FF EE 27 B0 12 9A 5F EB 23
+39 40 03 00 F8 95 00 1E 04 20 18 53 19 83 FA 23
+09 3C 0E 95 E0 2F F5 90 5C 00 FF FF DC 23 B0 12
+9A 5F D9 23 18 42 30 20 92 48 1A 1E 22 20 92 48
+14 1E 24 20 F8 B0 10 00 0B 1E 14 24 82 93 24 20
+06 20 82 93 22 20 03 20 92 42 02 20 22 20 0E 95
+8E 2F 92 42 22 20 2C 20 92 42 24 20 2E 20 8F 43
+00 00 03 3C 2A 4F B0 12 26 60 34 40 EC 40 35 40
+FA 40 3A 4F 3E 4F 0A 93 04 24 7A 93 0E 20 0C 93
+01 20 30 4D 0D 12 87 12 2E 40 0B 3C 20 4F 70 65
+6E 45 72 72 6F 72 48 40 F8 5E 1A 93 B6 20 0C 93
+F1 23 30 4D 56 61 04 52 45 41 44 00 2F 83 8F 4E
+00 00 1E 42 32 20 B0 12 AE 5F 1E 82 32 20 30 4D
+2C 43 12 12 2A 20 18 42 02 20 08 58 2A 41 82 9A
+0A 20 A1 24 B0 12 62 5E 09 43 28 93 03 24 89 93
+02 1E 03 20 89 93 00 1E 07 24 09 58 39 90 00 02
+F4 23 91 53 00 00 EA 3F 0C 43 6A 41 B9 43 00 1E
+28 93 0F 24 B9 40 FF 0F 02 1E 09 11 8A 10 09 5A
+5A 41 01 00 0A 11 09 10 82 4A 28 20 82 49 26 20
+07 3C 09 11 C2 49 26 20 C2 4A 27 20 82 43 28 20
+3A 41 82 4A 2A 20 30 41 0A 12 1A 52 08 20 B0 12
+A2 5E 3A 41 1A 52 0C 20 30 40 A2 5E F2 B0 40 00
+A2 04 29 20 F2 B0 10 00 A2 04 FC 27 5A 42 B0 04
+4A 11 59 42 B4 04 F2 40 20 00 C0 04 D2 42 B1 04
+C8 04 1A 52 E4 04 D2 42 B5 04 C8 04 19 52 E4 04
+D2 42 B2 04 C0 04 B2 40 00 08 C8 04 1A 52 E4 04
+92 42 B6 04 C0 04 B2 80 BC 07 C0 04 B2 40 00 02
+C8 04 19 52 E4 04 30 41 22 2A 2B 2C 2F 3A 3B 3C
+3D 3E 3F 5B 5C 5D 7C 2E 29 92 06 38 39 80 03 00
+B0 12 88 64 39 40 03 00 7A 4B C8 4A 00 1E 82 9B
+36 20 12 28 0D 12 3D 40 0F 00 3C 40 38 64 7A 9C
+F3 27 1D 83 FC 23 3D 41 6A 9C E6 27 3A 80 21 00
+EB 3B 18 53 19 83 E8 23 09 93 06 24 F8 40 20 00
+00 1E 18 53 19 83 FA 23 30 41 2A 93 D9 20 2C 93
+0E 24 0C 93 A8 24 0D 12 87 12 2E 40 0C 3C 20 57
+72 69 74 65 45 72 72 6F 72 00 48 40 F8 5E B0 12
+50 63 92 42 26 20 22 20 92 42 28 20 24 20 B0 12
+C8 63 B0 12 1C 60 18 42 30 20 F8 40 20 00 0B 1E
+B0 12 DC 63 88 43 0C 1E 88 4A 0E 1E 88 49 10 1E
+88 49 12 1E 98 42 24 20 14 1E 98 42 22 20 1A 1E
+88 43 1C 1E 88 43 1E 1E 1C 43 1B 42 34 20 82 9B
+36 20 C9 27 FB 90 2E 00 00 00 C5 27 39 40 0B 00
+B0 12 58 64 B0 12 76 65 2A 43 B0 12 26 60 0C 93
+BA 23 30 4D 1A 4B 04 00 19 4B 06 00 B0 12 68 5E
+B0 12 DC 63 18 4B 08 00 88 49 12 1E 88 4A 16 1E
+88 49 18 1E 98 4B 12 00 1C 1E 98 4B 14 00 1E 1E
+1A 4B 04 00 19 4B 06 00 30 40 A4 5E 9B 52 1E 20
+12 00 8B 63 14 00 1A 42 1A 20 19 42 1C 20 30 40
+A4 5E B2 40 00 02 1E 20 1B 42 32 20 B0 12 6C 65
+82 43 1E 20 DB 53 03 00 DB 92 12 20 03 00 22 20
+CB 43 03 00 B0 12 0E 5F 08 12 0A 12 B0 12 50 63
+2A 91 05 24 B0 12 C8 63 2A 41 B0 12 62 5E 3A 41
+38 41 98 42 26 20 00 1E 92 93 02 20 03 24 98 42
+28 20 02 1E B0 12 C8 63 9B 42 26 20 0E 00 9B 42
+28 20 10 00 30 40 7C 5F 62 61 05 57 52 49 54 45
+B0 12 82 65 30 4D 58 4B 13 00 59 4B 14 00 89 10
+09 58 58 4B 15 00 5B 42 12 20 0A 43 3C 42 08 11
+09 10 4A 10 1C 83 0B 11 FA 2B 0A 11 1C 83 FD 37
+1B 42 32 20 19 5B 0A 00 18 6B 0C 00 8B 49 0E 00
+8B 48 10 00 CB 4A 03 00 1A 4B 12 00 BB C0 FF 01
+12 00 3A F0 FF 01 82 4A 1E 20 B0 12 18 60 30 4D
+0C 93 38 20 38 90 E0 01 03 2C C8 93 20 1E 02 24
+7C 40 E5 00 C8 4C 00 1E B0 12 76 65 B0 12 1A 5F
+82 4A 2A 20 0B 4A B0 12 62 5E 1A 48 00 1E 88 43
+00 1E 92 93 02 20 09 24 19 48 02 1E 88 43 02 1E
+39 F0 FF 0F 39 90 FF 0F 02 20 3A 93 0E 24 82 4A
+22 20 82 49 24 20 B0 12 1A 5F 0B 9A E6 27 0A 12
+0A 4B B0 12 C8 63 3A 41 DD 3F 0A 4B B0 12 C8 63
+B0 12 0E 61 30 4D C0 43 08 54 45 52 4D 32 53 44
+22 00 0D 12 87 12 76 61 24 40 02 00 CE 4A C0 46
+C6 61 E4 66 3D 41 92 C3 DC 05 08 43 B0 12 06 41
+92 B3 DC 05 FD 27 59 42 CC 05 69 92 0D 24 C8 49
+00 1E 18 53 38 90 FF 01 F3 2B 03 24 B0 12 82 65
+EC 3F B0 12 18 41 EC 3F B0 12 18 41 82 48 1E 20
+B0 12 0E 61 30 4D
@FFFE
-F6 50
+C2 4E
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 68 69 C4 4D
-2D 01 FF B3 B6 42 C8 42 B4 60 F0 60
+10 00 08 00 00 D6 E8 03 05 00 18 00 14 67 78 4B
+2E 01 FF B3 06 41 18 41 56 5E 92 5E
@4000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 40
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 40
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 40
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 40 02 3E 52 00 0E 12 3E 4F 30 4D 70 40 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 40 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 40 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 40
-01 21 BE 4F 00 00 3E 4F 30 4D CC 40 02 30 3D 00
-1E 83 0E 7E 30 4D FC 40 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 41 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 40 B0 12 06 41 12 D2 0A 18 F9 3F 39 40
+4C 00 29 83 B9 40 C2 4E B4 FF FB 23 B2 40 C6 41
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 40 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 41 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 41 02 23 53 00 87 12 88 41 C0 41
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 41
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 40 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 41 34 40 86 40 D4 40 BA 41
-92 40 F8 41 D4 41 38 44 A4 47 E0 43 2A 40 22 41
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 41 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 42 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 42 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 42 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 23 02 30 41 B2 40 13 00 CE 05 E2 D2
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 42
-B0 12 B6 42 12 D2 0A 18 F9 3F 0D 12 3D 40 0A 43
+12 D3 F5 3F 34 40 EC 40 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 51 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 23 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 23 02 30 41 0D 12 3D 40 4A 41
1B 42 32 20 9B 42 1E 20 16 00 3A 4F 09 4E 0E 43
-1C 42 1E 20 1B 42 20 20 02 3C 0C 43 2D 83 0C 9B
+1C 42 1E 20 1B 42 20 20 02 3C 4C 41 2D 83 0C 9B
14 2C 58 4C 00 1E 1C 53 78 90 20 00 07 2C 78 90
-0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3D 24
-CA 48 00 00 1A 53 1E 53 38 3C 1A 15 B0 12 FA 61
-19 17 DE 3F F0 40 06 41 43 43 45 50 54 00 30 40
-52 43 3C 40 C2 43 3B 40 8C 43 2D 15 0A 4E 2E 4F
-0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 B6 43 92 B3
-DC 05 05 24 18 42 CC 05 38 90 0A 00 9C 23 21 53
-3D 15 AC 3F 21 52 3A 17 58 42 CC 05 48 9C 08 2C
-48 9B 9A 27 78 92 11 20 2E 9F 0F 24 1E 83 05 3C
-0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05 FD 27
-82 48 CE 05 30 4D B8 43 2D 83 92 B3 DC 05 E4 23
-FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F 3D 41
-B2 40 18 00 0A 18 30 4D 9E 40 04 45 4D 49 54 00
-30 40 E4 43 08 4E 3E 4F E0 3F 85 12 3C 1D 3F 80
-06 00 8F 4E 04 00 3E 40 54 00 9F 42 EC 43 00 00
-AF 4F 02 00 A4 3F DA 43 04 45 43 48 4F 00 B2 40
-82 48 B0 43 82 43 DE 1D 30 4D 32 42 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D B0 43 92 43 DE 1D 30 4D
-20 42 04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40
-4E 44 28 4F 7E 48 8F 48 00 00 2F 83 C9 3F 50 44
-2D 83 91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D
-D0 41 02 43 52 00 30 40 6A 44 87 12 80 44 02 0D
-0A 00 38 44 2A 40 2F 83 8F 4E 00 00 3E 4D 30 4D
-2F 82 8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3
-0D 63 30 4D F2 41 82 53 22 00 82 43 B4 1D 87 12
-76 44 80 44 12 47 76 44 22 00 E2 44 AE 44 B2 40
+0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3E 24
+CA 48 00 00 1A 53 1E 53 39 3C 1A 15 B0 12 9C 5F
+19 17 DE 3F 00 00 06 41 43 43 45 50 54 00 30 40
+92 41 3C 40 04 42 3B 40 CE 41 2D 15 0A 4E 2E 4F
+0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 F8 41 92 B3
+DC 05 05 24 18 42 CC 05 38 90 0A 00 A4 23 21 53
+3D 15 30 40 00 40 21 52 3A 17 58 42 CC 05 48 9C
+08 2C 48 9B A1 27 78 92 11 20 2E 9F 0F 24 1E 83
+05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
+FD 27 82 48 CE 05 30 4D FA 41 2D 83 92 B3 DC 05
+E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
+3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45 4D 49
+54 00 30 40 26 42 08 4E 3E 4F E0 3F 1C 42 04 45
+43 48 4F 00 B2 40 82 48 F2 41 82 43 DE 1D 30 4D
+00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D F2 41
+92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00 0E 93
+0F 24 1E 15 3D 40 74 42 28 4F 7E 48 8F 48 00 00
+2F 83 D7 3F 76 42 2D 83 91 83 02 00 F5 23 1D 17
+2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40 90 42
+0D 12 87 12 2E 40 02 0D 0A 00 5E 42 84 43 00 00
+03 4B 45 59 30 40 A8 42 18 42 CC 05 2F 83 8F 4E
+00 00 B0 12 06 41 92 B3 DC 05 FD 27 1E 42 CC 05
+B0 12 18 41 30 4D 2F 83 8F 4E 00 00 30 4D 8F 4E
+FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23 30 4D
+2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF 3E 40
+80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E 00 00
+3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F 00 00
+3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E 3E E3
+30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D 00 00
+02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 88 42 01 23
+1B 42 DC 1D 2C 4F 2F 83 B0 12 86 40 BF 4F 00 00
+7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00 92 83
+B2 1D 18 42 B2 1D C8 4A 00 00 30 4D 3E 43 02 23
+53 00 0D 12 87 12 40 43 7A 43 2D 83 09 93 E2 23
+0E 93 E0 23 3D 41 30 4D 6E 43 02 23 3E 00 9F 42
+B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00 04 48
+4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53 49 47
+4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D 58 42
+02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 0D 12
+0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53 00 00
+0E 63 87 12 34 43 72 43 FA 42 B2 43 8E 43 5E 42
+CE 46 22 42 84 43 42 42 01 2E 0E 93 E3 37 38 43
+E2 3F AC 43 82 53 22 00 82 43 B4 1D 0D 12 87 12
+24 40 2E 40 56 46 24 40 22 00 50 44 1E 44 B2 40
20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41
-3E 4F 30 4D 1C 44 82 2E 22 00 87 12 9A 44 76 44
-38 44 12 47 2A 40 48 43 05 3C 00 00 04 57 4F 52
-44 00 48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52
-C4 1D 09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20
-0E 4A 1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D
-3B 40 60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C
-09 24 18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82
-B4 1D F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D
-08 8E CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00
-2F 83 0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B
-0E 93 1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53
-1E 4E FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95
-F7 23 0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23
-19 B3 09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83
-8F 4C 00 00 35 40 0E 40 34 40 00 40 30 4D 82 40
-07 3E 4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82
-1B 42 DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28
-7A 80 07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C
-82 49 D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04
-18 42 E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C
-00 00 8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02
-1B 42 DC 1D 0C 43 2D 15 3D 40 56 46 09 43 08 43
-3F 82 8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00
-04 28 C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00
-07 24 3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23
-1C 53 1E 83 EA 3F 58 46 2F 24 2D 83 7A 90 28 00
-CB 27 32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00
-23 20 0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C
-69 49 79 80 30 00 79 90 0A 00 05 28 79 80 07 00
-79 90 0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B
-2C 15 B0 12 3E 41 2A 17 E6 3F 9F 4F 04 00 02 00
-AF 4F 04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D
-06 24 32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53
-9F 4F 02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3
-BF E3 02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00
-32 B0 00 02 01 20 2F 53 30 4D 7E 42 04 48 45 52
-45 00 2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 40
-01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F
-30 4D 46 43 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F
-30 4D 08 44 07 45 58 45 43 55 54 45 0A 4E 3E 4F
-00 4A 10 47 87 4C 49 54 45 52 41 4C 82 93 BE 1D
-0C 24 1A 42 C6 1D A2 52 C6 1D BA 40 76 44 00 00
-8A 4E 02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24
-19 4A 02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 62 44
-05 43 4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E
-FF FF 30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
-C4 1D 30 4D 85 12 20 00 87 12 94 47 A4 47 E2 44
-B2 47 3D 40 BA 47 CC 22 82 3E BC 47 0A 4E 3E 4F
-3D 40 D2 47 23 27 3D 40 AC 47 1A E2 BE 1D A1 27
-B5 23 D4 47 3E 4F 3D 40 AC 47 B8 23 DE 53 00 00
-68 4E 08 5E F8 40 3F 00 00 00 3D 40 CC 4A CB 3F
-34 47 08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D
-3C 49 3B 49 3A 49 3D 15 B0 12 2A 40 A8 47 10 48
-B2 41 C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D
-85 12 BE 1D 82 43 08 18 31 40 E0 1C B2 40 00 1C
-00 1C 82 43 BE 1D 30 4D 80 47 04 42 4F 4F 54 00
-82 93 08 18 1D 24 E2 B2 60 02 1A 20 2F 83 8F 4E
-00 00 1E 42 08 18 B0 12 2A 40 24 44 24 48 80 44
-0F 4C 4F 41 44 22 20 42 4F 4F 54 2E 34 54 48 22
-3C 42 8E 48 08 41 04 51 55 49 54 00 30 40 80 48
-B0 12 2A 40 24 48 66 44 EE 43 A4 47 E0 43 A8 47
-A4 40 0C 41 80 44 0C 73 74 61 63 6B 20 65 6D 70
-74 79 21 00 E6 48 76 44 30 FF 02 47 26 41 80 44
-0A 46 52 41 4D 20 66 75 6C 6C 21 00 E6 48 3C 42
-86 48 24 47 05 41 42 4F 52 54 3F 40 80 1C D6 3F
-C4 48 86 41 42 4F 52 54 22 00 87 12 9A 44 76 44
-E6 48 12 47 2A 40 8F 93 02 00 03 20 2F 52 3E 4F
-30 4D B0 12 EC 4E B0 12 B6 42 92 C3 DC 05 38 40
-AA 0A 39 42 03 43 19 83 FD 23 18 83 FA 23 92 B3
-DC 05 F3 23 87 12 60 4E 76 44 DE 1D EA 40 0E 44
-80 44 04 1B 5B 37 6D 00 38 44 58 40 40 42 40 49
-66 44 80 44 05 6C 69 6E 65 3A 38 44 D0 40 24 42
-38 44 80 44 04 1B 5B 30 6D 00 38 44 CA 48 00 00
-83 5B 27 5D 87 12 66 49 76 44 76 44 12 47 12 47
-2A 40 4A 45 01 27 87 12 A4 47 E2 44 50 45 40 42
-74 49 2A 40 DC 47 32 41 81 5C 92 42 C0 1D C4 1D
-30 4D 50 49 81 5B 82 43 BE 1D 30 4D 78 49 01 5D
-B2 43 BE 1D 30 4D BE 4F 02 00 3E 4F 30 4D FC 46
-82 49 53 00 87 12 20 48 EA 40 40 42 B8 49 54 49
-76 44 96 49 12 47 2A 40 66 49 96 49 2A 40 A0 49
-09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 1D FA D0
-80 00 00 00 30 4D 76 48 88 50 4F 53 54 50 4F 4E
-45 00 87 12 A4 47 E2 44 50 45 58 40 40 42 74 49
-0C 41 40 42 02 4A 76 44 76 44 12 47 12 47 76 44
-12 47 12 47 2A 40 84 49 81 3B 82 93 BE 1D B5 27
-87 12 76 44 2A 40 12 47 A0 4A 86 49 2A 40 08 4A
-07 3A 4E 4F 4E 41 4D 45 30 12 46 4A 2F 83 8F 4E
-00 00 1E 42 C6 1D 1E B3 0E 63 0A 4E 39 40 00 02
-38 40 02 02 21 3C BA 40 87 12 FC FF A2 83 C6 1D
-B2 43 BE 1D 30 4D 20 4A 01 3A 30 12 46 4A 92 B3
-C6 1D A2 63 C6 1D 87 12 A4 47 E2 44 6E 4A 3D 41
-08 4E 7A 4E 5A D3 5A 53 0A 58 19 42 DA 1D 6E 4E
-3E F0 1E 00 09 5E 3E 4F 82 48 B6 1D 82 49 B8 1D
-82 4A BA 1D 82 4F BC 1D 2A 52 82 4A C6 1D 30 41
-82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D A8 49
-FE FF 89 48 00 00 30 4D 87 12 80 44 0F 73 74 61
-63 6B 20 6D 69 73 6D 61 74 63 68 21 F2 48 F2 47
-05 44 45 46 45 52 B0 12 5E 4A BA 40 30 40 FC FF
-BA 40 54 4A FE FF E3 3F 3A 48 06 43 52 45 41 54
-45 00 B0 12 5E 4A BA 40 85 12 FC FF 8A 4A FE FF
-D6 3F D0 4A 05 44 4F 45 53 3E 1A 42 BA 1D BA 40
-84 12 00 00 8A 4D 02 00 3D 41 30 4D B0 45 05 3E
-42 4F 44 59 2E 52 30 4D EA 4A 04 43 4F 44 45 00
-B0 12 5E 4A 82 43 C6 5F A2 82 C6 1D 87 12 CE 4D
-A0 4D 2A 40 2A 4B 07 43 4F 44 45 4E 4E 4D B0 12
-2C 4A F0 3F 00 00 07 45 4E 44 43 4F 44 45 87 12
-E8 4D A0 4A 2A 40 D2 48 03 41 53 4D B2 40 A4 4D
-DA 1D DE 3F 56 4B 06 45 4E 44 41 53 4D 00 87 12
-5E 4B 12 4E 2A 40 00 00 05 43 4F 4C 4F 4E 1A 42
-C6 1D BA 40 87 12 00 00 A2 53 C6 1D B2 43 BE 1D
-30 40 E8 4D 00 00 05 4C 4F 32 48 49 1A 42 C6 1D
-BA 40 B0 12 00 00 BA 40 2A 40 02 00 A2 52 C6 1D
-ED 3F C0 49 85 48 49 32 4C 4F 87 12 02 47 F4 4B
-12 47 86 49 CE 4D A0 4D 2A 40 C4 4B 82 49 46 00
-2F 83 8F 4E 00 00 1E 42 C6 1D A2 52 C6 1D BE 40
-40 42 00 00 2E 53 30 4D 04 4B 84 45 4C 53 45 00
-A2 52 C6 1D 1A 42 C6 1D BA 40 3C 42 FC FF 8E 4A
-00 00 2A 83 0E 4A 30 4D 32 44 84 54 48 45 4E 00
-9E 42 C6 1D 00 00 3E 4F 30 4D 46 4B 85 42 45 47
-49 4E 30 40 02 47 1A 4C 85 55 4E 54 49 4C 39 40
-40 42 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E
-FE FF 3E 4F 30 4D 68 4B 85 41 47 41 49 4E 39 40
-3C 42 EF 3F DC 44 85 57 48 49 4C 45 87 12 E0 4B
-76 40 2A 40 96 44 86 52 45 50 45 41 54 00 87 12
-5E 4C 20 4C 2A 40 FA 4B 82 44 4F 00 2F 83 8F 4E
-00 00 A2 53 C6 1D 1E 42 C6 1D BE 40 54 42 FE FF
-A2 53 00 1C 1A 42 00 1C 8A 43 00 00 30 4D 44 47
-84 4C 4F 4F 50 00 39 40 76 42 A2 52 C6 1D 1A 42
-C6 1D 8A 49 FC FF 8A 4E FE FF 1E 42 00 1C A2 83
-00 1C 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F 3E 4F
-30 4D 90 42 85 2B 4C 4F 4F 50 39 40 64 42 E5 3F
-B0 4C 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F 3E 4F
-0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00 18 53
-1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83 E8 49
-00 00 1A 83 FA 23 30 4D 66 4C 0A 56 4F 43 41 42
-55 4C 41 52 59 00 87 12 F2 4A 76 44 10 00 76 44
-00 00 54 42 76 44 00 00 12 47 76 42 44 4D 02 47
-76 44 C8 1D 34 40 EA 40 12 47 F2 40 0A 4B 76 44
-CA 1D F2 40 2A 40 64 49 05 46 4F 52 54 48 84 12
-5E 4D C8 4D C8 63 BC 63 68 4D DC 4B E4 4C D6 63
-F8 4D 84 4E 7C 65 0C 69 2E 68 00 00 B8 52 8E 49
-1E 4B 00 00 58 4C 09 41 53 53 45 4D 42 4C 45 52
-84 12 5E 4D 90 5E 28 5E 8C 5D 50 59 F4 57 00 00
-54 5C 00 00 B6 5F CA 5F 4C 58 8A 58 5C 5E 00 00
-00 00 2C 59 92 4D 96 4D 04 41 4C 53 4F 00 3A 40
-0C 00 39 40 CA 1D 38 40 CC 1D 9D 3F D8 49 08 50
-52 45 56 49 4F 55 53 00 3A 40 0E 00 39 40 CC 1D
-38 40 CA 1D 8A 3F C6 44 04 4F 4E 4C 59 00 82 43
-CC 1D 30 4D 88 4C 0B 44 45 46 49 4E 49 54 49 4F
-4E 53 92 42 CA 1D DA 1D 30 4D 6E 4D FE 4D 12 4E
-22 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
-10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
-89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
-3D 41 30 4D DE 4D 09 50 57 52 5F 53 54 41 54 45
-84 12 1A 4E C4 4D 68 69 76 4C 09 52 53 54 5F 53
-54 41 54 45 92 42 0E 18 64 4E 92 42 0C 18 66 4E
-EF 3F 56 4E 08 50 57 52 5F 48 45 52 45 00 92 42
-C8 1D 64 4E 92 42 C6 1D 66 4E 30 4D 6A 4E 08 52
-53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
-C6 1D 0C 18 EC 3F 2A 4D 04 57 49 50 45 00 39 40
-10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 42 DE 42
-B2 40 4A 4F 48 4F B2 40 80 48 7E 48 B2 40 C4 4D
-0E 18 B2 40 68 69 0C 18 30 12 74 4E B2 40 E4 43
-E2 43 B2 40 6A 44 68 44 B2 40 98 42 96 42 B2 40
-52 43 50 43 B2 40 3C 1D EC 43 1B 42 32 20 0B 93
-04 24 CB 43 02 00 2B 4B FA 3F B2 40 18 00 0A 18
-37 40 1A 40 36 40 92 40 35 40 0E 40 34 40 00 40
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 B8 4E
-04 57 41 52 4D 00 30 40 4A 4F 3D 40 98 50 92 C3
-30 01 1E 42 08 18 0E 93 9E 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 E2 B2 60 02 8A 20
-39 42 B0 12 8C 60 D2 C3 23 02 2C 42 B2 40 95 00
-14 20 B2 40 00 40 18 20 B0 12 02 60 02 24 30 40
-28 61 B0 12 8A 60 7A 93 FC 23 B2 40 87 AA 14 20
-92 43 16 20 B2 40 00 48 18 20 B0 12 02 60 29 42
-B0 12 8C 60 92 43 14 20 82 43 16 20 78 43 3C 42
-B2 40 00 77 18 20 B0 12 02 60 B2 40 40 69 18 20
-B0 12 48 60 03 24 58 83 F3 23 D9 3F 0C 5C A2 43
-16 20 B2 40 00 50 18 20 B0 12 48 60 D0 23 92 D3
-40 06 82 43 46 06 92 C3 40 06 B0 12 B2 60 38 40
-00 1E 92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48
-C2 01 92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24
-A2 43 02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24
-3A 50 0B 20 0C 4A 30 40 2E 61 B0 12 B2 60 D2 48
-0D 00 12 20 19 48 0E 00 82 49 08 20 1A 48 16 00
-0A 93 02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49
-0C 20 09 5A A2 93 02 20 04 24 82 49 0E 20 39 50
-20 00 19 82 12 20 19 82 12 20 82 49 10 20 92 42
-02 20 2C 20 3E 90 0A 00 1A 27 3E 90 16 00 17 2F
-2E 93 E6 26 EF 2E 30 4D 80 44 06 0D 1B 5B 37 6D
-23 00 38 44 34 42 80 44 19 46 61 73 74 46 6F 72
-74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E
-73 20 38 44 76 44 30 FF 02 47 B8 40 24 42 80 44
-0A 62 79 74 65 73 20 66 72 65 65 00 3C 42 40 49
-2C 4C 04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40
-04 A5 20 01 98 50 B2 40 88 5A 5C 01 B2 D3 06 02
+3E 4F 30 4D F8 43 82 2E 22 00 0D 12 87 12 08 44
+24 40 5E 42 56 46 84 43 00 00 04 57 4F 52 44 00
+3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C 09 9A
+15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C 00 00
+09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C F6 2F
+7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82 C2 1D
+82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00 30 4D
+00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C 74 40
+80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C 01 00
+78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93 F3 27
+09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99 01 00
+F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49 6A 4E
+1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40 FA 40
+34 40 EC 40 30 4D 00 00 07 3E 4E 55 4D 42 45 52
+3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C 7A 80
+30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90 0A 00
+12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48 D2 04
+82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A 08 63
+1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00 8F 49
+04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43 2D 15
+3D 40 AE 45 09 43 08 43 3F 82 8F 4E 06 00 0C 4E
+7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43 02 00
+0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53 04 24
+3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F B0 45
+2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02 7A 90
+F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43 8F 49
+02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00 79 90
+0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28 09 9B
+08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 40 2A 17
+E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A 4E 93
+2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02 3F 50
+06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00 BF 4F
+00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3 00 00
+9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20 2F 53
+30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53
+C6 1D 3E 4F 30 4D 86 41 05 41 4C 4C 4F 54 82 5E
+C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A 54 46 87 4C
+49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42 C6 1D
+A2 52 C6 1D BA 40 24 40 00 00 8A 4E 02 00 3E 4F
+32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E
+02 00 0E 49 EB 3F 30 4D 8A 43 05 43 4F 55 4E 54
+2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 85 12
+20 00 0D 12 87 12 C4 40 CE 46 50 44 DE 46 3D 40
+E6 46 E2 22 A4 26 E8 46 0A 4E 3E 4F 3D 40 FE 46
+39 27 3D 40 D8 46 1A E2 BE 1D BD 23 AC 27 00 47
+3E 4F 3D 40 D8 46 BF 23 DE 53 00 00 68 4E 08 5E
+F8 40 3F 00 00 00 3D 40 C0 49 D2 3F 2E 42 08 45
+56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49 3B 49
+3A 49 3D 15 87 12 D2 46 3A 47 B2 41 C4 1D B2 41
+C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D 82 43
+08 18 31 40 E0 1C B2 40 00 1C 00 1C 82 43 BE 1D
+30 4D BA 46 04 42 4F 4F 54 00 82 93 08 18 1C 24
+E2 B2 60 02 19 20 2F 83 8F 4E 00 00 1E 42 08 18
+87 12 4A 42 4E 47 2E 40 0F 4C 4F 41 44 22 20 42
+4F 4F 54 2E 34 54 48 22 48 40 B4 47 00 00 04 51
+55 49 54 00 30 40 A8 47 87 12 4E 47 8C 42 D4 40
+CE 46 22 42 D2 46 EA 42 1A 43 2E 40 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 0E 48 24 40 40 FF
+CE 4A 22 43 2E 40 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 0E 48 48 40 AC 47 68 46 05 41 42 4F 52 54
+3F 40 80 1C D7 3F EA 47 86 41 42 4F 52 54 22 00
+0D 12 87 12 08 44 24 40 0E 48 56 46 84 43 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 B6 4C B0 12
+06 41 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+2A 4C 24 40 DE 1D 02 41 34 42 2E 40 04 1B 5B 37
+6D 00 5E 42 DA 42 4C 40 68 48 8C 42 2E 40 05 6C
+69 6E 65 3A 5E 42 C4 43 5E 42 2E 40 04 1B 5B 30
+6D 00 5E 42 F0 47 00 00 83 5B 27 5D 0D 12 87 12
+90 48 24 40 24 40 56 46 56 46 84 43 A2 44 01 27
+0D 12 87 12 CE 46 50 44 A8 44 4C 40 A0 48 84 43
+08 47 30 43 81 5C 92 42 C0 1D C4 1D 30 4D 78 48
+81 5B 82 43 BE 1D 30 4D A4 48 01 5D B2 43 BE 1D
+30 4D 9E 47 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 CE 46 50 44 A8 44 DA 42 4C 40 A0 48 1A 43
+4C 40 F0 48 24 40 24 40 56 46 56 46 24 40 56 46
+56 46 84 43 9E 43 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D B0 48 01 3A
+30 12 58 49 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+CE 46 50 44 26 49 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 0E 49 07 3A 4E 4F
+4E 41 4D 45 30 12 58 49 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 40
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+1A 48 6C 49 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 40 84 43 56 46 92 49 B2 48 84 43 64 47 06 43
+52 45 41 54 45 00 B0 12 14 49 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F 1E 47 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+DE 49 04 43 4F 44 45 00 B0 12 14 49 A2 82 C6 1D
+82 43 66 5D 0D 12 87 12 82 4B 54 4B 84 43 12 4A
+07 43 4F 44 45 4E 4E 4D 30 12 1C 4A 9D 3F 00 00
+07 45 4E 44 43 4F 44 45 0D 12 87 12 92 49 A8 4B
+84 43 F8 47 03 41 53 4D B2 40 58 4B DA 1D DC 3F
+40 4A 06 45 4E 44 41 53 4D 00 0D 12 87 12 48 4A
+DC 4B 84 43 00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D
+BA 40 0D 12 00 00 BA 40 87 12 02 00 A2 52 C6 1D
+B2 43 BE 1D 30 40 A8 4B 00 00 05 4C 4F 32 48 49
+A2 83 C6 1D 1A 42 C6 1D EE 3F F6 48 85 48 49 32
+4C 4F 0D 12 87 12 CE 4A C2 4A 56 46 B2 48 20 4A
+84 43 2E 53 30 4D 30 4A 85 42 45 47 49 4E 2F 83
+8F 4E 00 00 1E 42 C6 1D 30 4D 4A 44 0A 56 4F 43
+41 42 55 4C 41 52 59 00 0D 12 87 12 E6 49 24 40
+10 00 24 40 00 00 56 40 24 40 00 00 56 46 78 40
+F8 4A CE 4A 24 40 C8 1D C6 42 02 41 56 46 0C 43
+FE 49 24 40 CA 1D 0C 43 84 43 8E 48 05 46 4F 52
+54 48 84 12 12 4B 7C 4B 6A 61 5E 61 1C 4B AC 4A
+A0 42 78 61 C2 4B 4E 4C 24 63 B6 66 D8 65 00 00
+66 50 BA 48 08 45 00 00 54 4A 09 41 53 53 45 4D
+42 4C 45 52 84 12 12 4B 32 5C CA 5B 2E 5B EA 56
+88 55 00 00 F6 59 00 00 56 5D 6A 5D E0 55 1E 56
+FE 5B 00 00 00 00 C4 56 46 4B 4A 4B 04 41 4C 53
+4F 00 3A 40 0C 00 39 40 D6 1D 08 49 28 53 19 83
+18 83 E8 49 00 00 1A 83 FA 23 30 4D C4 48 08 50
+52 45 56 49 4F 55 53 00 3A 40 0E 00 38 40 CA 1D
+09 48 29 53 F8 49 00 00 18 53 1A 83 FB 23 30 4D
+36 44 04 4F 4E 4C 59 00 82 43 CC 1D 30 4D F8 49
+0B 44 45 46 49 4E 49 54 49 4F 4E 53 92 42 CA 1D
+DA 1D 30 4D 22 4B C8 4B DC 4B EC 4B 3A 4E 82 4A
+C8 1D 2E 4E 82 4E C6 1D 3D 40 10 00 09 4A 08 49
+29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00 1D 83
+F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D 9E 4B
+09 50 57 52 5F 53 54 41 54 45 84 12 E4 4B 78 4B
+14 67 04 44 09 52 53 54 5F 53 54 41 54 45 92 42
+0E 18 2E 4C 92 42 0C 18 30 4C EF 3F 20 4C 08 50
+57 52 5F 48 45 52 45 00 92 42 C8 1D 2E 4C 92 42
+C6 1D 30 4C 30 4D 34 4C 08 52 53 54 5F 48 45 52
+45 00 92 42 C8 1D 0E 18 92 42 C6 1D 0C 18 EC 3F
+DC 4A 04 57 49 50 45 00 39 40 10 00 29 83 B9 43
+80 FF FC 23 B2 40 04 40 02 40 B2 40 14 4D 12 4D
+B2 40 A8 47 A6 47 B2 40 78 4B 0E 18 B2 40 14 67
+0C 18 30 12 3E 4C B2 40 26 42 24 42 B2 40 90 42
+8E 42 B2 40 A8 42 A6 42 B2 40 92 41 90 41 B2 40
+3C 1D E2 40 1B 42 32 20 0B 93 04 24 CB 43 02 00
+2B 4B FA 3F B2 40 18 00 0A 18 37 40 84 43 36 40
+FA 42 35 40 FA 40 34 40 EC 40 B2 40 0A 00 DC 1D
+B2 40 20 00 B4 1D 30 41 82 4C 04 57 41 52 4D 00
+30 40 14 4D 3D 40 66 4E 92 C3 30 01 1E 42 08 18
+0E 93 A0 24 D2 B3 01 02 02 20 3E E3 1E 53 F2 D0
+03 00 0D 02 92 D3 DA 05 E2 B2 60 02 8A 20 39 42
+B0 12 2E 5E D2 C3 23 02 2C 42 B2 40 95 00 14 20
+B2 40 00 40 18 20 B0 12 A4 5D 02 24 30 40 CA 5E
+B0 12 2C 5E 7A 93 FC 23 B2 40 87 AA 14 20 92 43
+16 20 B2 40 00 48 18 20 B0 12 A4 5D 29 42 B0 12
+2E 5E 92 43 14 20 82 43 16 20 78 43 3C 42 B2 40
+00 77 18 20 B0 12 A4 5D B2 40 40 69 18 20 B0 12
+EA 5D 03 24 58 83 F3 23 D9 3F 0C 5C A2 43 16 20
+B2 40 00 50 18 20 B0 12 EA 5D D0 23 92 D3 40 06
+82 43 46 06 92 C3 40 06 B0 12 54 5E 38 40 00 1E
+92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48 C2 01
+92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24 A2 43
+02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24 3A 50
+0B 20 0C 4A 30 40 D0 5E B0 12 54 5E D2 48 0D 00
+12 20 19 48 0E 00 82 49 08 20 1A 48 16 00 0A 93
+02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49 0C 20
+09 5A A2 93 02 20 04 24 82 49 0E 20 39 50 20 00
+19 82 12 20 19 82 12 20 82 49 10 20 92 42 02 20
+2C 20 3E 90 0A 00 18 27 3E 90 16 00 15 2F 2E 93
+E4 26 ED 2E 30 4D 2E 40 07 0D 0A 1B 5B 37 6D 23
+5E 42 FA 43 2E 40 19 46 61 73 74 46 6F 72 74 68
+20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20
+5E 42 24 40 40 FF CE 4A 04 43 C4 43 2E 40 0A 62
+79 74 65 73 20 66 72 65 65 00 48 40 68 48 C8 4A
+04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40 04 A5
+20 01 31 40 E0 1C B2 40 88 5A 5C 01 B2 D3 06 02
B2 40 FC FF 02 02 B2 43 26 02 B2 D3 22 02 E2 D2
25 02 B2 43 42 02 B2 D3 46 02 B2 43 62 02 B2 D3
66 02 F2 43 26 03 F2 D3 22 03 F2 40 A5 00 61 01
64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40 59 14
18 83 FE 23 19 83 FA 23 F2 D0 10 00 2A 03 F2 40
A5 00 A1 04 F2 C0 40 00 A2 04 B2 42 B0 01 39 40
-00 10 29 83 89 43 00 1C FC 23 39 40 4C 00 29 83
-B9 40 F6 50 B4 FF FB 23 B2 40 84 43 F0 FF B2 40
+00 10 29 83 89 43 00 1C FC 23 B0 12 0E 40 B2 40
81 00 C0 05 92 42 02 18 C6 05 92 42 04 18 C8 05
-92 C3 C0 05 92 D3 DA 05 B2 40 81 A9 40 06 B2 40
-03 00 46 06 D2 D3 25 02 B2 D0 C0 04 0C 02 92 C3
-40 06 3F 40 80 1C 31 40 E0 1C 30 12 46 4F A5 3E
-E2 50 07 43 4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F
-39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83 07 30
-19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D 1E 43
-30 4D 58 4A 86 5B 54 48 45 4E 5D 00 30 4D 04 52
-86 5B 45 4C 53 45 5D 00 87 12 76 44 00 00 C6 40
-A4 47 E2 44 86 47 34 40 40 42 7A 52 44 40 80 44
-06 5B 54 48 45 4E 5D 00 DA 51 4A 42 4A 52 5A 44
-D0 40 58 40 4A 42 20 52 2A 40 44 40 80 44 06 5B
-45 4C 53 45 5D 00 DA 51 4A 42 68 52 5A 44 D0 40
-58 40 4A 42 1E 52 2A 40 80 44 04 5B 49 46 5D 00
-DA 51 4A 42 20 52 3C 42 1E 52 5A 44 80 44 05 0D
-0A 6B 6F 20 38 44 EE 43 94 47 3C 42 20 52 10 52
-84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D 90 52
-89 5B 44 45 46 49 4E 45 44 5D 87 12 A4 47 E2 44
-50 45 6A 40 2A 40 A0 52 8B 5B 55 4E 44 45 46 49
-4E 45 44 5D 87 12 A4 47 E2 44 50 45 6A 40 00 41
-2A 40 D4 52 3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F
-30 40 74 4E F2 4C 06 4D 41 52 4B 45 52 00 B0 12
-5E 4A BA 40 84 12 FC FF BA 40 D2 52 FE FF 9A 42
-C8 1D 00 00 28 83 8A 48 02 00 A2 52 C6 1D 30 40
-A6 4A 1C 15 B0 12 2A 40 E2 44 50 45 4A 42 28 53
-0C 46 40 42 74 49 42 53 2A 53 39 4E 39 80 86 12
+92 C3 C0 05 B2 40 81 A9 40 06 B2 40 03 00 46 06
+D2 D3 25 02 B2 D0 C0 04 0C 02 92 C3 40 06 3F 40
+80 1C 30 12 10 4D AE 3E C4 49 86 5B 54 48 45 4E
+5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C
+10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98 FF FF
+F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00 F9 23
+2F 53 2D 53 F7 3F 8A 4F 86 5B 45 4C 53 45 5D 00
+0D 12 87 12 24 40 00 00 08 43 CE 46 50 44 C0 46
+C6 42 4C 40 22 50 CE 42 2E 40 06 5B 54 48 45 4E
+5D 00 94 4F FC 4F B8 4F DA 4F 84 43 CE 42 2E 40
+06 5B 45 4C 53 45 5D 00 94 4F 12 50 B8 4F D8 4F
+84 43 2E 40 04 5B 49 46 5D 00 94 4F DA 4F 48 40
+D8 4F 80 42 2E 40 05 0D 0A 6B 6F 20 5E 42 D4 40
+C4 40 48 40 DA 4F C8 4F 84 5B 49 46 5D 00 0E 93
+3E 4F C6 27 30 4D 2F 53 30 4D 38 50 89 5B 44 45
+46 49 4E 45 44 5D 0D 12 87 12 CE 46 50 44 A8 44
+46 50 84 43 4C 50 8B 5B 55 4E 44 45 46 49 4E 45
+44 5D 0D 12 87 12 56 50 7A 50 3D 41 30 40 14 43
+38 40 C0 1D 0A 4E 39 48 2E 48 09 5E 1E 52 C4 1D
+09 9E 03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A
+C4 1D 30 4D 1C 15 87 12 50 44 A8 44 42 40 B8 50
+64 45 4C 40 A0 48 D2 50 BA 50 39 4E 39 80 86 12
08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53 01 24
2E 82 1B 17 30 41 32 B0 00 02 01 24 3E 4F 30 41
-3E 40 28 00 B0 12 12 53 B0 12 46 53 19 42 C6 1D
+3E 40 28 00 B0 12 A4 50 B0 12 D6 50 19 42 C6 1D
A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15 12 12
-C4 1D 92 53 C4 1D B0 12 2A 40 E2 44 0C 46 40 42
-8E 53 84 53 21 53 3E 90 10 00 81 2D DA 2B 90 53
-B2 41 C4 1D D6 3F 87 12 A4 47 D6 44 9E 53 0C 43
+C4 1D 92 53 C4 1D 87 12 50 44 64 45 4C 40 1C 51
+12 51 21 53 3E 90 10 00 84 2D DB 2B 1E 51 B2 41
+C4 1D D7 3F 0D 12 87 12 CE 46 80 50 2E 51 0C 43
1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00
-29 20 92 53 C4 1D B0 12 12 53 B0 12 46 53 3C 40
+29 20 92 53 C4 1D B0 12 A4 50 B0 12 D6 50 3C 40
00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40
20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40
30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40
30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F
3D 41 30 4D 7A 90 26 00 09 20 3C 40 10 02 92 53
-C4 1D B0 12 12 53 B0 12 46 53 EB 3F 7A 90 40 00
-16 20 3C 40 20 00 92 53 C4 1D B0 12 6C 53 0C 20
-3C 50 10 00 3E 40 2B 00 B0 12 6C 53 92 92 C0 1D
+C4 1D B0 12 A4 50 B0 12 D6 50 EB 3F 7A 90 40 00
+16 20 3C 40 20 00 92 53 C4 1D B0 12 FC 50 0C 20
+3C 50 10 00 3E 40 2B 00 B0 12 FC 50 92 92 C0 1D
C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E D8 3F B0 12
-6C 53 FA 23 3C 50 10 00 B0 12 50 53 EF 3F 0C 43
-1B 42 C6 1D A2 53 C6 1D 87 12 A4 47 D6 44 70 54
-FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50 82 00
-C6 3F B0 12 6C 53 E1 23 3C 50 80 00 B0 12 50 53
-DC 3F D6 42 04 52 45 54 49 00 87 12 76 44 00 13
-12 47 2A 40 76 44 2C 00 96 53 68 54 AE 54 09 4B
-2E 4E 0E DC A2 3F A6 4B 03 4D 4F 56 84 12 A4 54
-00 40 B8 54 05 4D 4F 56 2E 42 84 12 A4 54 40 40
-00 00 03 41 44 44 84 12 A4 54 00 50 D2 54 05 41
-44 44 2E 42 84 12 A4 54 40 50 DE 54 04 41 44 44
-43 00 84 12 A4 54 00 60 EC 54 06 41 44 44 43 2E
-42 00 84 12 A4 54 40 60 94 54 04 53 55 42 43 00
-84 12 A4 54 00 70 0A 55 06 53 55 42 43 2E 42 00
-84 12 A4 54 40 70 18 55 03 53 55 42 84 12 A4 54
-00 80 28 55 05 53 55 42 2E 42 84 12 A4 54 40 80
-88 4B 03 43 4D 50 84 12 A4 54 00 90 42 55 05 43
-4D 50 2E 42 84 12 A4 54 40 90 76 4B 04 44 41 44
-44 00 84 12 A4 54 00 A0 5C 55 06 44 41 44 44 2E
-42 00 84 12 A4 54 40 A0 4E 55 03 42 49 54 84 12
-A4 54 00 B0 7A 55 05 42 49 54 2E 42 84 12 A4 54
-40 B0 86 55 03 42 49 43 84 12 A4 54 00 C0 94 55
-05 42 49 43 2E 42 84 12 A4 54 40 C0 A0 55 03 42
-49 53 84 12 A4 54 00 D0 AE 55 05 42 49 53 2E 42
-84 12 A4 54 40 D0 00 00 03 58 4F 52 84 12 A4 54
-00 E0 C8 55 05 58 4F 52 2E 42 84 12 A4 54 40 E0
-FA 54 03 41 4E 44 84 12 A4 54 00 F0 E2 55 05 41
-4E 44 2E 42 84 12 A4 54 40 F0 A4 47 96 53 00 56
-0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F
-34 55 03 52 52 43 84 12 FA 55 00 10 12 56 05 52
-52 43 2E 42 84 12 FA 55 40 10 1E 56 04 53 57 50
-42 00 84 12 FA 55 80 10 2C 56 03 52 52 41 84 12
-FA 55 00 11 3A 56 05 52 52 41 2E 42 84 12 FA 55
-40 11 46 56 03 53 58 54 84 12 FA 55 80 11 00 00
-04 50 55 53 48 00 84 12 FA 55 00 12 60 56 06 50
-55 53 48 2E 42 00 84 12 FA 55 40 12 BA 55 04 43
-41 4C 4C 00 84 12 FA 55 80 12 1A 53 0E 4A 87 12
-34 42 80 44 0D 6F 75 74 20 6F 66 20 62 6F 75 6E
-64 73 F2 48 A4 47 D6 44 AA 56 92 53 C4 1D 3E 40
-2C 00 B0 12 2A 40 E2 44 0C 46 40 42 74 49 5E 54
-C2 56 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28
-08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F
-5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F 54 56
-06 52 52 43 4D 2E 41 00 84 12 A4 56 40 00 F0 56
-04 52 52 43 4D 00 84 12 A4 56 50 00 00 57 06 52
-52 41 4D 2E 41 00 84 12 A4 56 40 01 0E 57 04 52
-52 41 4D 00 84 12 A4 56 50 01 1E 57 06 52 4C 41
-4D 2E 41 00 84 12 A4 56 40 02 2C 57 04 52 4C 41
-4D 00 84 12 A4 56 50 02 3C 57 06 52 52 55 4D 2E
-41 00 84 12 A4 56 40 03 4A 57 04 52 52 55 4D 00
-84 12 A4 56 50 03 6E 56 07 50 55 53 48 4D 2E 41
-84 12 A4 56 00 14 68 57 05 50 55 53 48 4D 84 12
-A4 56 00 15 78 57 06 50 4F 50 4D 2E 41 00 84 12
-A4 56 00 16 86 57 04 50 4F 50 4D 00 84 12 A4 56
-00 17 5A 57 03 53 3E 3D 85 12 00 38 A4 57 02 53
-3C 00 85 12 00 34 96 57 03 30 3E 3D 85 12 00 30
-B8 57 02 30 3C 00 85 12 00 30 00 00 02 55 3C 00
-85 12 00 2C CC 57 03 55 3E 3D 85 12 00 28 C2 57
-03 30 3C 3E 85 12 00 24 E0 57 02 30 3D 00 85 12
-00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00
-A2 53 C6 1D 0E 4A 30 4D D6 57 04 54 48 45 4E 00
-1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11
-3A 90 00 02 33 2F 88 DA 00 00 30 4D 6A 55 04 45
-4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53
-C6 1D 2F 83 8F 4A 00 00 E3 3F 0A 58 05 55 4E 54
-49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89
-0A 11 3A 90 00 FE 12 3B 3A F0 FF 03 08 DA 89 48
-00 00 A2 53 C6 1D 30 4D EE 55 05 41 47 41 49 4E
-0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45
-87 12 F8 57 76 40 2A 40 AE 57 06 52 45 50 45 41
-54 00 87 12 80 58 10 58 2A 40 AC 58 3D 41 08 4E
-3E 4F 2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D 00 00
-30 4D 7E 56 03 42 57 31 84 12 AA 58 00 00 C4 58
-03 42 57 32 84 12 AA 58 00 00 D0 58 03 42 57 33
-84 12 AA 58 00 00 E8 58 3D 41 1A 42 C6 1D 28 4E
-B2 92 C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D 8E 4A
-00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12 E6 58
-00 00 08 59 03 46 57 32 84 12 E6 58 00 00 14 59
-03 46 57 33 84 12 E6 58 00 00 00 00 05 3F 47 4F
-54 4F 3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10
-02 24 3E E0 00 08 87 12 66 49 3C 47 2A 40 20 59
-04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C
-F2 3F 87 12 A4 47 D6 44 6A 59 69 4E 3E 4F 3C 4F
-2C 4C 1B 42 C6 1D A2 53 C6 1D 79 90 52 00 0A 20
-B0 12 6C 53 5E 0E 5E 0E 0E DC 8B 4E 00 00 0E 4B
-3D 41 30 4D 79 90 23 00 0D 20 3C C0 40 00 92 53
-C4 1D A2 53 C6 1D B0 12 12 53 BB 4F 02 00 3E F0
-0F 00 E8 3F 79 90 26 00 03 20 3C E0 E0 00 EF 3F
-3C C0 F0 00 79 90 40 00 12 20 92 53 C4 1D B0 12
-6C 53 D8 23 3C D0 10 00 3E 40 2B 00 B0 12 6C 53
-92 92 C0 1D C4 1D CE 27 92 53 C4 1D CB 3F 3C D0
-30 00 A2 53 C6 1D 3E 40 28 00 B0 12 12 53 BB 4F
-02 00 3E 40 29 00 EA 3F 87 12 A4 47 D6 44 10 5A
-3B 4F 2C 4B 69 4E 7E 40 20 00 79 90 52 00 03 20
-B0 12 6C 53 B1 3F 3C C0 F0 00 A2 53 C6 1D 79 90
-26 00 09 20 3C D0 60 00 92 53 C4 1D B0 12 12 53
-BB 4F 02 00 A1 3F 3C D0 70 00 3E 40 28 00 B0 12
-12 53 BB 4F 02 00 3E 40 29 00 E2 3F 76 44 2C 00
-62 59 08 5A 66 40 2A 40 C4 54 04 4D 4F 56 41 00
-84 12 5C 5A C0 00 DC 58 04 43 4D 50 41 00 84 12
-5C 5A D0 00 7A 58 04 41 44 44 41 00 84 12 5C 5A
-E0 00 9A 58 04 53 55 42 41 00 84 12 5C 5A F0 00
-78 5A 05 43 41 4C 4C 41 87 12 A4 47 D6 44 B0 5A
+FC 50 FA 23 3C 50 10 00 B0 12 E0 50 EF 3F 0C 43
+1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 CE 46 80 50
+02 52 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
+82 00 C5 3F B0 12 FC 50 E0 23 3C 50 80 00 B0 12
+E0 50 DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12
+24 40 00 13 56 46 84 43 24 40 2C 00 24 51 F8 51
+42 52 09 4B 2E 4E 0E DC A0 3F 9A 4A 03 4D 4F 56
+84 12 38 52 00 40 4C 52 05 4D 4F 56 2E 42 84 12
+38 52 40 40 00 00 03 41 44 44 84 12 38 52 00 50
+66 52 05 41 44 44 2E 42 84 12 38 52 40 50 72 52
+04 41 44 44 43 00 84 12 38 52 00 60 80 52 06 41
+44 44 43 2E 42 00 84 12 38 52 40 60 26 52 04 53
+55 42 43 00 84 12 38 52 00 70 9E 52 06 53 55 42
+43 2E 42 00 84 12 38 52 40 70 AC 52 03 53 55 42
+84 12 38 52 00 80 BC 52 05 53 55 42 2E 42 84 12
+38 52 40 80 76 4A 03 43 4D 50 84 12 38 52 00 90
+D6 52 05 43 4D 50 2E 42 84 12 38 52 40 90 62 4A
+04 44 41 44 44 00 84 12 38 52 00 A0 F0 52 06 44
+41 44 44 2E 42 00 84 12 38 52 40 A0 E2 52 03 42
+49 54 84 12 38 52 00 B0 0E 53 05 42 49 54 2E 42
+84 12 38 52 40 B0 1A 53 03 42 49 43 84 12 38 52
+00 C0 28 53 05 42 49 43 2E 42 84 12 38 52 40 C0
+34 53 03 42 49 53 84 12 38 52 00 D0 42 53 05 42
+49 53 2E 42 84 12 38 52 40 D0 00 00 03 58 4F 52
+84 12 38 52 00 E0 5C 53 05 58 4F 52 2E 42 84 12
+38 52 40 E0 8E 52 03 41 4E 44 84 12 38 52 00 F0
+76 53 05 41 4E 44 2E 42 84 12 38 52 40 F0 CE 46
+24 51 94 53 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
+0C DA 4F 3F C8 52 03 52 52 43 84 12 8E 53 00 10
+A6 53 05 52 52 43 2E 42 84 12 8E 53 40 10 B2 53
+04 53 57 50 42 00 84 12 8E 53 80 10 C0 53 03 52
+52 41 84 12 8E 53 00 11 CE 53 05 52 52 41 2E 42
+84 12 8E 53 40 11 DA 53 03 53 58 54 84 12 8E 53
+80 11 00 00 04 50 55 53 48 00 84 12 8E 53 00 12
+F4 53 06 50 55 53 48 2E 42 00 84 12 8E 53 40 12
+4E 53 04 43 41 4C 4C 00 84 12 8E 53 80 12 1A 53
+0E 4A 0D 12 87 12 FA 43 2E 40 0D 6F 75 74 20 6F
+66 20 62 6F 75 6E 64 73 1A 48 CE 46 80 50 40 54
+92 53 C4 1D 3E 40 2C 00 87 12 50 44 64 45 4C 40
+A0 48 EE 51 56 54 0A 4E 3E 4F 1A 83 E0 33 29 4E
+59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
+10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
+8F 3F E8 53 06 52 52 43 4D 2E 41 00 84 12 3A 54
+40 00 84 54 04 52 52 43 4D 00 84 12 3A 54 50 00
+94 54 06 52 52 41 4D 2E 41 00 84 12 3A 54 40 01
+A2 54 04 52 52 41 4D 00 84 12 3A 54 50 01 B2 54
+06 52 4C 41 4D 2E 41 00 84 12 3A 54 40 02 C0 54
+04 52 4C 41 4D 00 84 12 3A 54 50 02 D0 54 06 52
+52 55 4D 2E 41 00 84 12 3A 54 40 03 DE 54 04 52
+52 55 4D 00 84 12 3A 54 50 03 02 54 07 50 55 53
+48 4D 2E 41 84 12 3A 54 00 14 FC 54 05 50 55 53
+48 4D 84 12 3A 54 00 15 0C 55 06 50 4F 50 4D 2E
+41 00 84 12 3A 54 00 16 1A 55 04 50 4F 50 4D 00
+84 12 3A 54 00 17 EE 54 03 53 3E 3D 85 12 00 38
+38 55 02 53 3C 00 85 12 00 34 2A 55 03 30 3E 3D
+85 12 00 30 4C 55 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 60 55 03 55 3E 3D 85 12
+00 28 56 55 03 30 3C 3E 85 12 00 24 74 55 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D
+8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 6A 55 04 54
+48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 33 2F 88 DA 00 00 30 4D
+FE 52 04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C
+00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F 9E 55
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D
+2A 83 0A 89 0A 11 3A 90 00 FE 12 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 1D 30 4D 82 53 05 41
+47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
+48 49 4C 45 0D 12 87 12 8C 55 E0 42 84 43 42 55
+06 52 45 50 45 41 54 00 0D 12 87 12 14 56 A4 55
+84 43 44 56 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D
+CB 2F 98 42 C6 1D 00 00 30 4D 12 54 03 42 57 31
+84 12 42 56 00 00 5C 56 03 42 57 32 84 12 42 56
+00 00 68 56 03 42 57 33 84 12 42 56 00 00 80 56
+3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B BA 4F
+00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00
+03 46 57 31 84 12 7E 56 00 00 A0 56 03 46 57 32
+84 12 7E 56 00 00 AC 56 03 46 57 33 84 12 7E 56
+00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24
+3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08 0D 12
+87 12 90 48 76 46 84 43 B8 56 04 47 4F 54 4F 00
+2F 83 8F 4E 00 00 3E 40 00 3C F1 3F 0D 12 87 12
+CE 46 80 50 06 57 69 4E 3E 4F 3C 4F 2C 4C 1B 42
+C6 1D A2 53 C6 1D 79 90 52 00 0A 20 B0 12 FC 50
+5E 0E 5E 0E 0E DC 8B 4E 00 00 0E 4B 3D 41 30 4D
+79 90 23 00 0D 20 3C C0 40 00 92 53 C4 1D A2 53
+C6 1D B0 12 A4 50 BB 4F 02 00 3E F0 0F 00 E8 3F
+79 90 26 00 03 20 3C E0 E0 00 EF 3F 3C C0 F0 00
+79 90 40 00 12 20 92 53 C4 1D B0 12 FC 50 D8 23
+3C D0 10 00 3E 40 2B 00 B0 12 FC 50 92 92 C0 1D
+C4 1D CE 27 92 53 C4 1D CB 3F 3C D0 30 00 A2 53
+C6 1D 3E 40 28 00 B0 12 A4 50 BB 4F 02 00 3E 40
+29 00 EA 3F 0D 12 87 12 CE 46 80 50 AE 57 3B 4F
+2C 4B 69 4E 7E 40 20 00 79 90 52 00 03 20 B0 12
+FC 50 B0 3F 3C C0 F0 00 A2 53 C6 1D 79 90 26 00
+09 20 3C D0 60 00 92 53 C4 1D B0 12 A4 50 BB 4F
+02 00 A0 3F 3C D0 70 00 3E 40 28 00 B0 12 A4 50
+BB 4F 02 00 3E 40 29 00 E2 3F 24 40 2C 00 FC 56
+A4 57 82 42 84 43 58 52 04 4D 4F 56 41 00 84 12
+FA 57 C0 00 74 56 04 43 4D 50 41 00 84 12 FA 57
+D0 00 0E 56 04 41 44 44 41 00 84 12 FA 57 E0 00
+30 56 04 53 55 42 41 00 84 12 FA 57 F0 00 16 58
+05 43 41 4C 4C 41 0D 12 87 12 CE 46 80 50 50 58
1B 42 C6 1D A2 53 C6 1D 6E 4E 3C 40 34 01 7E 90
-52 00 0B 20 7E 40 20 00 B0 12 6C 53 5C 0E 0C DE
+52 00 0B 20 7E 40 20 00 B0 12 FC 50 5C 0E 0C DE
8B 4C 00 00 3E 4F 3D 41 30 4D 2C 53 7E 90 40 00
-0B 20 92 53 C4 1D 7E 40 20 00 B0 12 6C 53 EE 23
+0B 20 92 53 C4 1D 7E 40 20 00 B0 12 FC 50 EE 23
1C 53 3E 40 2B 00 E8 3F A2 53 C6 1D 7E 90 23 00
-09 20 3C 40 3B 01 92 53 C4 1D B0 12 12 53 BB 4F
+09 20 3C 40 3B 01 92 53 C4 1D B0 12 A4 50 BB 4F
02 00 DC 3F 7E 90 26 00 02 20 2C 53 F4 3F 7E 40
-28 00 1C 83 B0 12 12 53 BB 4F 02 00 3E 40 29 00
-CB 3F 87 12 A4 47 D6 44 3A 5B 69 4E 3E 4F 3C 40
-00 18 79 90 52 00 05 20 B0 12 6C 53 0E 4C 3D 41
-30 4D 82 43 C6 5F 79 90 23 00 0B 20 92 53 C4 1D
-B0 12 12 53 2F 53 3E F0 0F 00 5E 0A 5E 0E 0C DE
-ED 3F 79 90 26 00 F2 27 79 90 40 00 12 20 92 53
-C4 1D B0 12 6C 53 E2 23 3E 40 2B 00 92 53 C4 1D
-B0 12 6C 53 92 92 C0 1D C4 1D D8 27 92 53 C4 1D
-D5 3F 3E 40 28 00 B0 12 12 53 8F 4E 00 00 3E 40
-29 00 B0 12 6C 53 3E 4F 3E F0 0F 00 0C DE EA 3F
-87 12 A4 47 D6 44 C8 5B 3C 4F 69 4E 3E 40 20 00
-79 90 52 00 BB 27 82 43 C6 5F 79 90 26 00 08 20
-92 53 C4 1D B0 12 12 53 2F 53 3E F0 0F 00 BF 3F
-3E 40 28 00 B0 12 12 53 F7 3F 1B 42 C6 1D A2 53
-C6 1D 0C 4E 3E 4F 1C D2 C6 5F 82 43 C6 5F 3C DE
-8B 4C 00 00 B2 41 C4 1D 30 4D 76 44 C4 1D EA 40
-86 40 76 44 2C 00 32 5B C0 5B FA 5B 3C 42 A4 54
-6A 5A 04 4D 4F 56 58 00 84 12 1A 5C 40 00 00 40
-32 5C 06 4D 4F 56 58 2E 41 00 84 12 1A 5C 00 00
-40 40 42 5C 06 4D 4F 56 58 2E 42 00 84 12 1A 5C
-40 00 40 40 86 5A 04 41 44 44 58 00 84 12 1A 5C
-40 00 00 50 66 5C 06 41 44 44 58 2E 41 00 84 12
-1A 5C 00 00 40 50 76 5C 06 41 44 44 58 2E 42 00
-84 12 1A 5C 40 00 40 50 88 5C 05 41 44 44 43 58
-84 12 1A 5C 40 00 00 60 9A 5C 07 41 44 44 43 58
-2E 41 84 12 1A 5C 00 00 40 60 AA 5C 07 41 44 44
-43 58 2E 42 84 12 1A 5C 40 00 40 60 94 5A 05 53
-55 42 43 58 84 12 1A 5C 40 00 00 70 CE 5C 07 53
-55 42 43 58 2E 41 84 12 1A 5C 00 00 40 70 DE 5C
-07 53 55 42 43 58 2E 42 84 12 1A 5C 40 00 40 70
-F0 5C 04 53 55 42 58 00 84 12 1A 5C 40 00 00 80
-02 5D 06 53 55 42 58 2E 41 00 84 12 1A 5C 00 00
-40 80 12 5D 06 53 55 42 58 2E 42 00 84 12 1A 5C
-40 00 40 80 A2 5A 04 43 4D 50 58 00 84 12 1A 5C
-40 00 00 90 36 5D 06 43 4D 50 58 2E 41 00 84 12
-1A 5C 00 00 40 90 46 5D 06 43 4D 50 58 2E 42 00
-84 12 1A 5C 40 00 40 90 2E 58 05 44 41 44 44 58
-84 12 1A 5C 40 00 00 A0 6A 5D 07 44 41 44 44 58
-2E 41 84 12 1A 5C 00 00 40 A0 7A 5D 07 44 41 44
-44 58 2E 42 84 12 1A 5C 40 00 40 A0 58 5D 04 42
-49 54 58 00 84 12 1A 5C 40 00 00 B0 9E 5D 06 42
-49 54 58 2E 41 00 84 12 1A 5C 00 00 40 B0 AE 5D
-06 42 49 54 58 2E 42 00 84 12 1A 5C 40 00 40 B0
-C0 5D 04 42 49 43 58 00 84 12 1A 5C 40 00 00 C0
-D2 5D 06 42 49 43 58 2E 41 00 84 12 1A 5C 00 00
-40 C0 E2 5D 06 42 49 43 58 2E 42 00 84 12 1A 5C
-40 00 40 C0 F4 5D 04 42 49 53 58 00 84 12 1A 5C
-40 00 00 D0 06 5E 06 42 49 53 58 2E 41 00 84 12
-1A 5C 00 00 40 D0 16 5E 06 42 49 53 58 2E 42 00
-84 12 1A 5C 40 00 40 D0 D4 55 04 58 4F 52 58 00
-84 12 1A 5C 40 00 00 E0 3A 5E 06 58 4F 52 58 2E
-41 00 84 12 1A 5C 00 00 40 E0 4A 5E 06 58 4F 52
-58 2E 42 00 84 12 1A 5C 40 00 40 E0 BC 5C 04 41
-4E 44 58 00 84 12 1A 5C 40 00 00 F0 6E 5E 06 41
-4E 44 58 2E 41 00 84 12 1A 5C 00 00 40 F0 7E 5E
-06 41 4E 44 58 2E 42 00 84 12 1A 5C 40 00 40 F0
-76 44 C4 1D EA 40 86 40 A4 47 32 5B FA 5B 3C 42
-FA 55 24 5D 04 52 52 43 58 00 84 12 A0 5E 40 00
-00 10 B4 5E 06 52 52 43 58 2E 41 00 84 12 A0 5E
-00 00 40 10 C4 5E 06 52 52 43 58 2E 42 00 84 12
-A0 5E 40 00 40 10 D6 5E 04 52 52 55 58 00 84 12
-A0 5E 40 01 00 10 E8 5E 06 52 52 55 58 2E 41 00
-84 12 A0 5E 00 01 40 10 F8 5E 06 52 52 55 58 2E
-42 00 84 12 A0 5E 40 01 40 10 0A 5F 05 53 57 50
-42 58 84 12 A0 5E 40 00 80 10 1C 5F 07 53 57 50
-42 58 2E 41 84 12 A0 5E 00 00 80 10 2C 5F 04 52
-52 41 58 00 84 12 A0 5E 40 00 00 11 3E 5F 06 52
-52 41 58 2E 41 00 84 12 A0 5E 00 00 40 11 4E 5F
-06 52 52 41 58 2E 42 00 84 12 A0 5E 40 00 40 11
-60 5F 04 53 58 54 58 00 84 12 A0 5E 40 00 80 11
-72 5F 06 53 58 54 58 2E 41 00 84 12 A0 5E 00 00
-80 11 EA 57 05 50 55 53 48 58 84 12 A0 5E 40 00
-00 12 94 5F 07 50 55 53 48 58 2E 41 84 12 A0 5E
-00 00 40 12 A4 5F 07 50 55 53 48 58 2E 42 84 12
-A0 5E 40 00 40 12 00 00 82 5F 03 52 50 54 87 12
-A4 47 D6 44 D6 5F 29 4E 7E 40 20 00 79 90 52 00
-06 20 B0 12 6C 53 03 24 3E D0 80 00 05 3C B0 12
-12 53 1E 83 3E F0 0F 00 82 4E C6 5F 3E 4F 3D 41
-30 4D 1A 43 25 3C D2 C3 23 02 E2 B2 60 02 02 24
-30 40 E8 50 1A 52 04 20 19 62 06 20 92 43 14 20
-A2 93 02 20 07 24 0A 5A 49 69 82 4A 16 20 C2 49
-18 20 0A 3C C2 4A 15 20 8A 10 C2 4A 16 20 C2 49
-17 20 89 10 C2 49 18 20 B0 12 8A 60 5A 53 FC 23
-39 40 05 00 D2 49 14 20 4E 06 82 93 46 06 05 24
-92 B3 6C 06 FD 27 C2 93 4C 06 59 83 F3 2F 19 83
-0B 30 F2 43 4E 06 82 93 46 06 03 24 92 B3 6C 06
-FD 27 5A 92 4C 06 F3 23 30 41 19 43 3A 43 8A 10
-C2 4A 4E 06 82 93 46 06 05 24 92 B3 6C 06 FD 27
-C2 93 4C 06 19 83 F3 23 5A 42 4C 06 30 41 1A 52
-08 20 09 43 1C D3 F2 40 51 00 19 20 B0 12 06 60
-33 20 B0 12 8A 60 6A 53 04 24 FB 23 D9 42 4C 06
-FF 1D F2 43 4E 06 03 43 19 53 39 90 01 02 F6 23
-F2 43 4E 06 3C C0 03 00 D2 D3 23 02 30 41 09 43
-2C D3 F0 40 58 00 23 BF B0 12 06 60 15 20 3A 40
-FE FF 29 43 B0 12 8E 60 D2 49 00 1E 4E 06 03 43
-19 53 39 90 00 02 F8 23 39 40 03 00 B0 12 8C 60
-7A C0 E1 00 6A 92 DE 27 8C 10 1C 52 4C 06 D2 D3
-23 02 87 12 80 44 0B 3C 20 53 44 20 45 72 72 6F
-72 21 44 61 2F 83 8F 4E 00 00 B2 40 10 00 DC 1D
-0E 4C B0 12 2A 40 24 42 F2 48 92 4B 0E 00 22 20
-92 4B 10 00 24 20 5A 42 23 20 58 42 22 20 92 93
-02 20 08 24 59 42 24 20 89 10 0A 59 88 10 08 58
-0A 6A 88 10 08 58 30 41 82 43 1C 20 92 42 0E 20
-1A 20 C2 93 24 20 03 20 92 93 22 20 14 24 92 42
-22 20 D0 04 92 42 24 20 D2 04 92 42 12 20 C8 04
-92 42 E4 04 1A 20 92 42 E6 04 1C 20 92 52 10 20
-1A 20 82 63 1C 20 30 41 92 4B 0E 00 22 20 92 4B
-10 00 24 20 B0 12 88 61 5A 4B 03 00 82 5A 1A 20
-82 63 1C 20 30 41 09 93 07 24 F8 90 20 00 00 1E
-03 20 18 53 19 83 F9 23 30 41 1B 42 32 20 82 43
-1E 20 B2 90 00 02 20 20 A8 20 BB 80 00 02 12 00
-8B 73 14 00 DB 53 03 00 DB 92 12 20 03 00 11 28
-CB 43 03 00 B0 12 5A 61 B0 12 AE 60 8B 43 10 00
-9B 48 00 1E 0E 00 92 93 02 20 03 24 9B 48 02 1E
-10 00 B2 40 00 02 20 20 8B 93 14 00 0B 20 92 9B
-12 00 1E 20 82 2C BB 90 00 02 12 00 03 2C 92 4B
-12 00 20 20 B0 12 C8 61 1A 42 1A 20 19 42 1C 20
-21 3F 3C 42 3B 40 38 20 09 43 CB 93 02 00 10 24
-9B 92 24 20 0C 00 04 20 9B 92 22 20 0A 00 07 24
-09 4B 3B 50 1C 00 3B 90 18 21 EF 23 0C 5C 30 41
-0C 43 82 4B 32 20 8B 49 00 00 09 93 0A 24 99 52
-C4 1D 16 00 4A 93 05 34 C9 93 02 00 02 34 5A 59
-02 00 CB 4A 02 00 CB 43 03 00 9B 42 1A 20 04 00
-9B 42 1C 20 06 00 18 42 30 20 8B 48 08 00 9B 48
-1A 1E 0A 00 9B 48 14 1E 0C 00 9B 48 1A 1E 0E 00
-9B 48 14 1E 10 00 9B 48 1C 1E 12 00 9B 48 1E 1E
-14 00 82 43 1E 20 6A 93 5F 27 C9 37 8B 43 16 00
-7A 93 02 24 07 38 95 3F B2 40 1C 21 EC 43 B2 40
-EA 42 50 43 9B 42 C0 1D 18 00 9B 82 C4 1D 18 00
-9B 42 C2 1D 1A 00 9B 52 C4 1D 1A 00 82 3F CB 43
-02 00 2B 4B 82 4B 32 20 0B 93 06 24 92 4B 16 00
-1E 20 B0 12 42 62 22 C3 30 41 1B 42 32 20 0B 93
-FB 27 EB 93 02 00 04 20 B0 12 B0 67 B0 12 78 67
-CB 93 02 00 E4 37 1E 4B 18 00 9F 4B 1A 00 00 00
-31 50 06 00 3D 41 B0 12 3E 63 02 24 30 40 24 44
-B2 40 3C 1D EC 43 B2 40 52 43 50 43 30 40 0E 44
-9E 4E 85 52 45 41 44 22 5A 43 19 3C 40 4F 86 57
-52 49 54 45 22 00 6A 43 12 3C 06 4E 84 44 45 4C
-22 00 6A 42 0C 3C D2 51 05 43 4C 4F 53 45 B0 12
-5A 63 30 4D E6 52 85 4C 4F 41 44 22 7A 43 2F 83
-8F 4E 00 00 0E 4A 82 93 BE 1D 0A 24 87 12 76 44
-76 44 12 47 12 47 9A 44 76 44 0E 64 12 47 2A 40
-87 12 76 44 22 00 E2 44 86 47 0C 64 3D 41 35 4F
-0E 55 82 4E 36 20 1C 43 92 42 2C 20 22 20 92 42
-2E 20 24 20 0E 95 8D 24 F5 90 3A 00 01 00 01 20
-25 53 F5 90 5C 00 00 00 08 20 15 53 92 42 02 20
-22 20 82 43 24 20 0E 95 70 24 82 45 34 20 B0 12
-88 61 34 40 20 00 A2 93 02 20 04 24 92 92 22 20
-02 20 02 24 14 42 12 20 B0 12 68 62 2C 43 0A 43
-08 4A 58 0E 08 58 82 48 30 20 C8 93 00 1E 61 24
-39 42 F8 95 00 1E 04 20 18 53 19 83 FA 23 15 53
-F5 90 2E 00 FF FF 19 24 39 50 03 00 B0 12 E6 61
-06 20 F5 90 5C 00 FF FF 29 24 0E 95 27 28 15 42
-34 20 1A 53 3A 90 10 00 DB 23 92 53 1A 20 82 63
-1C 20 14 83 D1 23 2C 42 3C 3C F5 90 2E 00 FE FF
-EE 27 B0 12 E6 61 EB 23 39 40 03 00 F8 95 00 1E
-04 20 18 53 19 83 FA 23 09 3C 0E 95 E0 2F F5 90
-5C 00 FF FF DC 23 B0 12 E6 61 D9 23 18 42 30 20
-92 48 1A 1E 22 20 92 48 14 1E 24 20 F8 B0 10 00
-0B 1E 14 24 82 93 24 20 06 20 82 93 22 20 03 20
-92 42 02 20 22 20 0E 95 8E 2F 92 42 22 20 2C 20
-92 42 24 20 2E 20 8F 43 00 00 03 3C 2A 4F B0 12
-72 62 34 40 00 40 35 40 0E 40 3A 4F 3E 4F 0A 93
-04 24 7A 93 0D 20 0C 93 01 20 30 4D 87 12 80 44
-0B 3C 20 4F 70 65 6E 45 72 72 6F 72 3C 42 42 61
-1A 93 B6 20 0C 93 F2 23 30 4D A2 63 04 52 45 41
-44 00 2F 83 8F 4E 00 00 1E 42 32 20 B0 12 FA 61
-1E 82 32 20 30 4D 2C 43 12 12 2A 20 18 42 02 20
-08 58 2A 41 82 9A 0A 20 A1 24 B0 12 AE 60 09 43
-28 93 03 24 89 93 02 1E 03 20 89 93 00 1E 07 24
-09 58 39 90 00 02 F4 23 91 53 00 00 EA 3F 0C 43
-6A 41 B9 43 00 1E 28 93 0F 24 B9 40 FF 0F 02 1E
-09 11 8A 10 09 5A 5A 41 01 00 0A 11 09 10 82 4A
-28 20 82 49 26 20 07 3C 09 11 C2 49 26 20 C2 4A
-27 20 82 43 28 20 3A 41 82 4A 2A 20 30 41 0A 12
-1A 52 08 20 B0 12 EE 60 3A 41 1A 52 0C 20 30 40
-EE 60 F2 B0 40 00 A2 04 29 20 F2 B0 10 00 A2 04
-FC 27 5A 42 B0 04 4A 11 59 42 B4 04 F2 40 20 00
-C0 04 D2 42 B1 04 C8 04 1A 52 E4 04 D2 42 B5 04
-C8 04 19 52 E4 04 D2 42 B2 04 C0 04 B2 40 00 08
-C8 04 1A 52 E4 04 92 42 B6 04 C0 04 B2 80 BC 07
-C0 04 B2 40 00 02 C8 04 19 52 E4 04 30 41 22 2A
-2B 2C 2F 3A 3B 3C 3D 3E 3F 5B 5C 5D 7C 2E 29 92
-06 38 39 80 03 00 B0 12 CE 66 39 40 03 00 7A 4B
-C8 4A 00 1E 82 9B 36 20 12 28 0D 12 3D 40 0F 00
-3C 40 7E 66 7A 9C F3 27 1D 83 FC 23 3D 41 6A 9C
-E6 27 3A 80 21 00 EB 3B 18 53 19 83 E8 23 09 93
-06 24 F8 40 20 00 00 1E 18 53 19 83 FA 23 30 41
-2A 93 D8 20 2C 93 0D 24 0C 93 A7 24 87 12 80 44
-0C 3C 20 57 72 69 74 65 45 72 72 6F 72 00 3C 42
-42 61 B0 12 96 65 92 42 26 20 22 20 92 42 28 20
-24 20 B0 12 0E 66 B0 12 68 62 18 42 30 20 F8 40
-20 00 0B 1E B0 12 22 66 88 43 0C 1E 88 4A 0E 1E
-88 49 10 1E 88 49 12 1E 98 42 24 20 14 1E 98 42
-22 20 1A 1E 88 43 1C 1E 88 43 1E 1E 1C 43 1B 42
-34 20 82 9B 36 20 CA 27 FB 90 2E 00 00 00 C6 27
-39 40 0B 00 B0 12 9E 66 B0 12 BA 67 2A 43 B0 12
-72 62 0C 93 BB 23 30 4D 1A 4B 04 00 19 4B 06 00
-B0 12 B4 60 B0 12 22 66 18 4B 08 00 88 49 12 1E
-88 4A 16 1E 88 49 18 1E 98 4B 12 00 1C 1E 98 4B
-14 00 1E 1E 1A 4B 04 00 19 4B 06 00 30 40 F0 60
-9B 52 1E 20 12 00 8B 63 14 00 1A 42 1A 20 19 42
-1C 20 30 40 F0 60 B2 40 00 02 1E 20 1B 42 32 20
-B0 12 B0 67 82 43 1E 20 DB 53 03 00 DB 92 12 20
-03 00 22 20 CB 43 03 00 B0 12 5A 61 08 12 0A 12
-B0 12 96 65 2A 91 05 24 B0 12 0E 66 2A 41 B0 12
-AE 60 3A 41 38 41 98 42 26 20 00 1E 92 93 02 20
-03 24 98 42 28 20 02 1E B0 12 0E 66 9B 42 26 20
-0E 00 9B 42 28 20 10 00 30 40 C8 61 AE 63 05 57
-52 49 54 45 B0 12 C6 67 30 4D 58 4B 13 00 59 4B
-14 00 89 10 09 58 58 4B 15 00 5B 42 12 20 0A 43
-3C 42 08 11 09 10 4A 10 1C 83 0B 11 FA 2B 0A 11
-1C 83 FD 37 1B 42 32 20 19 5B 0A 00 18 6B 0C 00
-8B 49 0E 00 8B 48 10 00 CB 4A 03 00 1A 4B 12 00
-BB C0 FF 01 12 00 3A F0 FF 01 82 4A 1E 20 B0 12
-64 62 30 4D 0C 93 38 20 38 90 E0 01 03 2C C8 93
-20 1E 02 24 7C 40 E5 00 C8 4C 00 1E B0 12 BA 67
-B0 12 66 61 82 4A 2A 20 0B 4A B0 12 AE 60 1A 48
-00 1E 88 43 00 1E 92 93 02 20 09 24 19 48 02 1E
-88 43 02 1E 39 F0 FF 0F 39 90 FF 0F 02 20 3A 93
-0E 24 82 4A 22 20 82 49 24 20 B0 12 66 61 0B 9A
-E6 27 0A 12 0A 4B B0 12 0E 66 3A 41 DD 3F 0A 4B
-B0 12 0E 66 B0 12 5A 63 30 4D 38 4C 08 54 45 52
-4D 32 53 44 22 00 87 12 C2 63 76 44 02 00 02 47
-86 47 0E 64 26 69 3D 41 92 C3 DC 05 08 43 B0 12
-B6 42 92 B3 DC 05 FD 27 59 42 CC 05 69 92 0D 24
-C8 49 00 1E 18 53 38 90 FF 01 F3 2B 03 24 B0 12
-C6 67 EC 3F B0 12 C8 42 EC 3F B0 12 C8 42 82 48
-1E 20 B0 12 5A 63 30 4D
+28 00 1C 83 B0 12 A4 50 BB 4F 02 00 3E 40 29 00
+CB 3F 0D 12 87 12 CE 46 80 50 DC 58 69 4E 3E 4F
+3C 40 00 18 79 90 52 00 05 20 B0 12 FC 50 0E 4C
+3D 41 30 4D 82 43 66 5D 79 90 23 00 0B 20 92 53
+C4 1D B0 12 A4 50 2F 53 3E F0 0F 00 5E 0A 5E 0E
+0C DE ED 3F 79 90 26 00 F2 27 79 90 40 00 12 20
+92 53 C4 1D B0 12 FC 50 E2 23 3E 40 2B 00 92 53
+C4 1D B0 12 FC 50 92 92 C0 1D C4 1D D8 27 92 53
+C4 1D D5 3F 3E 40 28 00 B0 12 A4 50 8F 4E 00 00
+3E 40 29 00 B0 12 FC 50 3E 4F 3E F0 0F 00 0C DE
+EA 3F 0D 12 87 12 CE 46 80 50 6C 59 3C 4F 69 4E
+3E 40 20 00 79 90 52 00 BA 27 82 43 66 5D 79 90
+26 00 08 20 92 53 C4 1D B0 12 A4 50 2F 53 3E F0
+0F 00 BE 3F 3E 40 28 00 B0 12 A4 50 F7 3F B2 4F
+C4 1D 1B 42 C6 1D A2 53 C6 1D 0C 4E 3E 4F 1C D2
+66 5D 82 43 66 5D 3C DE 8B 4C 00 00 30 4D 24 40
+C4 1D 02 41 24 40 2C 00 D2 58 62 59 9E 59 48 40
+38 52 08 58 04 4D 4F 56 58 00 84 12 BE 59 40 00
+00 40 D4 59 06 4D 4F 56 58 2E 41 00 84 12 BE 59
+00 00 40 40 E4 59 06 4D 4F 56 58 2E 42 00 84 12
+BE 59 40 00 40 40 24 58 04 41 44 44 58 00 84 12
+BE 59 40 00 00 50 08 5A 06 41 44 44 58 2E 41 00
+84 12 BE 59 00 00 40 50 18 5A 06 41 44 44 58 2E
+42 00 84 12 BE 59 40 00 40 50 2A 5A 05 41 44 44
+43 58 84 12 BE 59 40 00 00 60 3C 5A 07 41 44 44
+43 58 2E 41 84 12 BE 59 00 00 40 60 4C 5A 07 41
+44 44 43 58 2E 42 84 12 BE 59 40 00 40 60 32 58
+05 53 55 42 43 58 84 12 BE 59 40 00 00 70 70 5A
+07 53 55 42 43 58 2E 41 84 12 BE 59 00 00 40 70
+80 5A 07 53 55 42 43 58 2E 42 84 12 BE 59 40 00
+40 70 92 5A 04 53 55 42 58 00 84 12 BE 59 40 00
+00 80 A4 5A 06 53 55 42 58 2E 41 00 84 12 BE 59
+00 00 40 80 B4 5A 06 53 55 42 58 2E 42 00 84 12
+BE 59 40 00 40 80 40 58 04 43 4D 50 58 00 84 12
+BE 59 40 00 00 90 D8 5A 06 43 4D 50 58 2E 41 00
+84 12 BE 59 00 00 40 90 E8 5A 06 43 4D 50 58 2E
+42 00 84 12 BE 59 40 00 40 90 C2 55 05 44 41 44
+44 58 84 12 BE 59 40 00 00 A0 0C 5B 07 44 41 44
+44 58 2E 41 84 12 BE 59 00 00 40 A0 1C 5B 07 44
+41 44 44 58 2E 42 84 12 BE 59 40 00 40 A0 FA 5A
+04 42 49 54 58 00 84 12 BE 59 40 00 00 B0 40 5B
+06 42 49 54 58 2E 41 00 84 12 BE 59 00 00 40 B0
+50 5B 06 42 49 54 58 2E 42 00 84 12 BE 59 40 00
+40 B0 62 5B 04 42 49 43 58 00 84 12 BE 59 40 00
+00 C0 74 5B 06 42 49 43 58 2E 41 00 84 12 BE 59
+00 00 40 C0 84 5B 06 42 49 43 58 2E 42 00 84 12
+BE 59 40 00 40 C0 96 5B 04 42 49 53 58 00 84 12
+BE 59 40 00 00 D0 A8 5B 06 42 49 53 58 2E 41 00
+84 12 BE 59 00 00 40 D0 B8 5B 06 42 49 53 58 2E
+42 00 84 12 BE 59 40 00 40 D0 68 53 04 58 4F 52
+58 00 84 12 BE 59 40 00 00 E0 DC 5B 06 58 4F 52
+58 2E 41 00 84 12 BE 59 00 00 40 E0 EC 5B 06 58
+4F 52 58 2E 42 00 84 12 BE 59 40 00 40 E0 5E 5A
+04 41 4E 44 58 00 84 12 BE 59 40 00 00 F0 10 5C
+06 41 4E 44 58 2E 41 00 84 12 BE 59 00 00 40 F0
+20 5C 06 41 4E 44 58 2E 42 00 84 12 BE 59 40 00
+40 F0 24 40 C4 1D 02 41 CE 46 D2 58 9E 59 48 40
+8E 53 C6 5A 04 52 52 43 58 00 84 12 42 5C 40 00
+00 10 54 5C 06 52 52 43 58 2E 41 00 84 12 42 5C
+00 00 40 10 64 5C 06 52 52 43 58 2E 42 00 84 12
+42 5C 40 00 40 10 76 5C 04 52 52 55 58 00 84 12
+42 5C 40 01 00 10 88 5C 06 52 52 55 58 2E 41 00
+84 12 42 5C 00 01 40 10 98 5C 06 52 52 55 58 2E
+42 00 84 12 42 5C 40 01 40 10 AA 5C 05 53 57 50
+42 58 84 12 42 5C 40 00 80 10 BC 5C 07 53 57 50
+42 58 2E 41 84 12 42 5C 00 00 80 10 CC 5C 04 52
+52 41 58 00 84 12 42 5C 40 00 00 11 DE 5C 06 52
+52 41 58 2E 41 00 84 12 42 5C 00 00 40 11 EE 5C
+06 52 52 41 58 2E 42 00 84 12 42 5C 40 00 40 11
+00 5D 04 53 58 54 58 00 84 12 42 5C 40 00 80 11
+12 5D 06 53 58 54 58 2E 41 00 84 12 42 5C 00 00
+80 11 7E 55 05 50 55 53 48 58 84 12 42 5C 40 00
+00 12 34 5D 07 50 55 53 48 58 2E 41 84 12 42 5C
+00 00 40 12 44 5D 07 50 55 53 48 58 2E 42 84 12
+42 5C 40 00 40 12 00 00 22 5D 03 52 50 54 0D 12
+87 12 CE 46 80 50 78 5D 29 4E 7E 40 20 00 79 90
+52 00 06 20 B0 12 FC 50 03 24 3E D0 80 00 05 3C
+B0 12 A4 50 1E 83 3E F0 0F 00 82 4E 66 5D 3E 4F
+3D 41 30 4D 1A 43 25 3C D2 C3 23 02 E2 B2 60 02
+02 24 30 40 B6 4E 1A 52 04 20 19 62 06 20 92 43
+14 20 A2 93 02 20 07 24 0A 5A 49 69 82 4A 16 20
+C2 49 18 20 0A 3C C2 4A 15 20 8A 10 C2 4A 16 20
+C2 49 17 20 89 10 C2 49 18 20 B0 12 2C 5E 5A 53
+FC 23 39 40 05 00 D2 49 14 20 4E 06 82 93 46 06
+05 24 92 B3 6C 06 FD 27 C2 93 4C 06 59 83 F3 2F
+19 83 0B 30 F2 43 4E 06 82 93 46 06 03 24 92 B3
+6C 06 FD 27 5A 92 4C 06 F3 23 30 41 19 43 3A 43
+8A 10 C2 4A 4E 06 82 93 46 06 05 24 92 B3 6C 06
+FD 27 C2 93 4C 06 19 83 F3 23 5A 42 4C 06 30 41
+1A 52 08 20 09 43 1C D3 F2 40 51 00 19 20 B0 12
+A8 5D 33 20 B0 12 2C 5E 6A 53 04 24 FB 23 D9 42
+4C 06 FF 1D F2 43 4E 06 03 43 19 53 39 90 01 02
+F6 23 F2 43 4E 06 3C C0 03 00 D2 D3 23 02 30 41
+09 43 2C D3 F0 40 58 00 81 C1 B0 12 A8 5D 15 20
+3A 40 FE FF 29 43 B0 12 30 5E D2 49 00 1E 4E 06
+03 43 19 53 39 90 00 02 F8 23 39 40 03 00 B0 12
+2E 5E 7A C0 E1 00 6A 92 DE 27 8C 10 1C 52 4C 06
+D2 D3 23 02 0D 12 87 12 2E 40 0B 3C 20 53 44 20
+45 72 72 6F 72 21 E8 5E 2F 83 8F 4E 00 00 B2 40
+10 00 DC 1D 0E 4C 87 12 C4 43 1A 48 92 4B 0E 00
+22 20 92 4B 10 00 24 20 5A 42 23 20 58 42 22 20
+92 93 02 20 08 24 59 42 24 20 89 10 0A 59 88 10
+08 58 0A 6A 88 10 08 58 30 41 82 43 1C 20 92 42
+0E 20 1A 20 C2 93 24 20 03 20 92 93 22 20 14 24
+92 42 22 20 D0 04 92 42 24 20 D2 04 92 42 12 20
+C8 04 92 42 E4 04 1A 20 92 42 E6 04 1C 20 92 52
+10 20 1A 20 82 63 1C 20 30 41 92 4B 0E 00 22 20
+92 4B 10 00 24 20 B0 12 2A 5F 5A 4B 03 00 82 5A
+1A 20 82 63 1C 20 30 41 09 93 07 24 F8 90 20 00
+00 1E 03 20 18 53 19 83 F9 23 30 41 1B 42 32 20
+82 43 1E 20 B2 90 00 02 20 20 A8 20 BB 80 00 02
+12 00 8B 73 14 00 DB 53 03 00 DB 92 12 20 03 00
+11 28 CB 43 03 00 B0 12 FC 5E B0 12 50 5E 8B 43
+10 00 9B 48 00 1E 0E 00 92 93 02 20 03 24 9B 48
+02 1E 10 00 B2 40 00 02 20 20 8B 93 14 00 0B 20
+92 9B 12 00 1E 20 82 2C BB 90 00 02 12 00 03 2C
+92 4B 12 00 20 20 B0 12 6A 5F 1A 42 1A 20 19 42
+1C 20 21 3F 3C 42 3B 40 38 20 09 43 CB 93 02 00
+10 24 9B 92 24 20 0C 00 04 20 9B 92 22 20 0A 00
+07 24 09 4B 3B 50 1C 00 3B 90 18 21 EF 23 0C 5C
+30 41 0C 43 82 4B 32 20 8B 49 00 00 09 93 0A 24
+99 52 C4 1D 16 00 4A 93 05 34 C9 93 02 00 02 34
+5A 59 02 00 CB 4A 02 00 CB 43 03 00 9B 42 1A 20
+04 00 9B 42 1C 20 06 00 18 42 30 20 8B 48 08 00
+9B 48 1A 1E 0A 00 9B 48 14 1E 0C 00 9B 48 1A 1E
+0E 00 9B 48 14 1E 10 00 9B 48 1C 1E 12 00 9B 48
+1E 1E 14 00 82 43 1E 20 6A 93 5F 27 C9 37 8B 43
+16 00 7A 93 02 24 07 38 95 3F B2 40 1C 21 E2 40
+B2 40 2A 41 90 41 9B 42 C0 1D 18 00 9B 82 C4 1D
+18 00 9B 42 C2 1D 1A 00 9B 52 C4 1D 1A 00 82 3F
+CB 43 02 00 2B 4B 82 4B 32 20 0B 93 06 24 92 4B
+16 00 1E 20 B0 12 E4 5F 22 C3 30 41 1B 42 32 20
+0B 93 FB 27 EB 93 02 00 04 20 B0 12 5A 65 B0 12
+22 65 CB 93 02 00 E4 37 1E 4B 18 00 9F 4B 1A 00
+00 00 31 50 06 00 3D 41 B0 12 E0 60 02 24 30 40
+4A 42 B2 40 3C 1D E2 40 B2 40 92 41 90 41 30 40
+34 42 68 4C 85 52 45 41 44 22 5A 43 19 3C 0A 4D
+86 57 52 49 54 45 22 00 6A 43 12 3C D0 4B 84 44
+45 4C 22 00 6A 42 0C 3C B0 4E 05 43 4C 4F 53 45
+B0 12 FC 60 30 4D 7E 46 85 4C 4F 41 44 22 7A 43
+2F 83 8F 4E 00 00 0E 4A 82 93 BE 1D 0B 24 0D 12
+87 12 24 40 24 40 56 46 56 46 08 44 24 40 B4 61
+56 46 84 43 0D 12 87 12 24 40 22 00 50 44 C0 46
+B2 61 3D 41 35 4F 0E 55 82 4E 36 20 1C 43 92 42
+2C 20 22 20 92 42 2E 20 24 20 0E 95 8D 24 F5 90
+3A 00 01 00 01 20 25 53 F5 90 5C 00 00 00 08 20
+15 53 92 42 02 20 22 20 82 43 24 20 0E 95 70 24
+82 45 34 20 B0 12 2A 5F 34 40 20 00 A2 93 02 20
+04 24 92 92 22 20 02 20 02 24 14 42 12 20 B0 12
+0A 60 2C 43 0A 43 08 4A 58 0E 08 58 82 48 30 20
+C8 93 00 1E 61 24 39 42 F8 95 00 1E 04 20 18 53
+19 83 FA 23 15 53 F5 90 2E 00 FF FF 19 24 39 50
+03 00 B0 12 88 5F 06 20 F5 90 5C 00 FF FF 29 24
+0E 95 27 28 15 42 34 20 1A 53 3A 90 10 00 DB 23
+92 53 1A 20 82 63 1C 20 14 83 D1 23 2C 42 3C 3C
+F5 90 2E 00 FE FF EE 27 B0 12 88 5F EB 23 39 40
+03 00 F8 95 00 1E 04 20 18 53 19 83 FA 23 09 3C
+0E 95 E0 2F F5 90 5C 00 FF FF DC 23 B0 12 88 5F
+D9 23 18 42 30 20 92 48 1A 1E 22 20 92 48 14 1E
+24 20 F8 B0 10 00 0B 1E 14 24 82 93 24 20 06 20
+82 93 22 20 03 20 92 42 02 20 22 20 0E 95 8E 2F
+92 42 22 20 2C 20 92 42 24 20 2E 20 8F 43 00 00
+03 3C 2A 4F B0 12 14 60 34 40 EC 40 35 40 FA 40
+3A 4F 3E 4F 0A 93 04 24 7A 93 0E 20 0C 93 01 20
+30 4D 0D 12 87 12 2E 40 0B 3C 20 4F 70 65 6E 45
+72 72 6F 72 48 40 E6 5E 1A 93 B6 20 0C 93 F1 23
+30 4D 44 61 04 52 45 41 44 00 2F 83 8F 4E 00 00
+1E 42 32 20 B0 12 9C 5F 1E 82 32 20 30 4D 2C 43
+12 12 2A 20 18 42 02 20 08 58 2A 41 82 9A 0A 20
+A1 24 B0 12 50 5E 09 43 28 93 03 24 89 93 02 1E
+03 20 89 93 00 1E 07 24 09 58 39 90 00 02 F4 23
+91 53 00 00 EA 3F 0C 43 6A 41 B9 43 00 1E 28 93
+0F 24 B9 40 FF 0F 02 1E 09 11 8A 10 09 5A 5A 41
+01 00 0A 11 09 10 82 4A 28 20 82 49 26 20 07 3C
+09 11 C2 49 26 20 C2 4A 27 20 82 43 28 20 3A 41
+82 4A 2A 20 30 41 0A 12 1A 52 08 20 B0 12 90 5E
+3A 41 1A 52 0C 20 30 40 90 5E F2 B0 40 00 A2 04
+29 20 F2 B0 10 00 A2 04 FC 27 5A 42 B0 04 4A 11
+59 42 B4 04 F2 40 20 00 C0 04 D2 42 B1 04 C8 04
+1A 52 E4 04 D2 42 B5 04 C8 04 19 52 E4 04 D2 42
+B2 04 C0 04 B2 40 00 08 C8 04 1A 52 E4 04 92 42
+B6 04 C0 04 B2 80 BC 07 C0 04 B2 40 00 02 C8 04
+19 52 E4 04 30 41 22 2A 2B 2C 2F 3A 3B 3C 3D 3E
+3F 5B 5C 5D 7C 2E 29 92 06 38 39 80 03 00 B0 12
+76 64 39 40 03 00 7A 4B C8 4A 00 1E 82 9B 36 20
+12 28 0D 12 3D 40 0F 00 3C 40 26 64 7A 9C F3 27
+1D 83 FC 23 3D 41 6A 9C E6 27 3A 80 21 00 EB 3B
+18 53 19 83 E8 23 09 93 06 24 F8 40 20 00 00 1E
+18 53 19 83 FA 23 30 41 2A 93 D9 20 2C 93 0E 24
+0C 93 A8 24 0D 12 87 12 2E 40 0C 3C 20 57 72 69
+74 65 45 72 72 6F 72 00 48 40 E6 5E B0 12 3E 63
+92 42 26 20 22 20 92 42 28 20 24 20 B0 12 B6 63
+B0 12 0A 60 18 42 30 20 F8 40 20 00 0B 1E B0 12
+CA 63 88 43 0C 1E 88 4A 0E 1E 88 49 10 1E 88 49
+12 1E 98 42 24 20 14 1E 98 42 22 20 1A 1E 88 43
+1C 1E 88 43 1E 1E 1C 43 1B 42 34 20 82 9B 36 20
+C9 27 FB 90 2E 00 00 00 C5 27 39 40 0B 00 B0 12
+46 64 B0 12 64 65 2A 43 B0 12 14 60 0C 93 BA 23
+30 4D 1A 4B 04 00 19 4B 06 00 B0 12 56 5E B0 12
+CA 63 18 4B 08 00 88 49 12 1E 88 4A 16 1E 88 49
+18 1E 98 4B 12 00 1C 1E 98 4B 14 00 1E 1E 1A 4B
+04 00 19 4B 06 00 30 40 92 5E 9B 52 1E 20 12 00
+8B 63 14 00 1A 42 1A 20 19 42 1C 20 30 40 92 5E
+B2 40 00 02 1E 20 1B 42 32 20 B0 12 5A 65 82 43
+1E 20 DB 53 03 00 DB 92 12 20 03 00 22 20 CB 43
+03 00 B0 12 FC 5E 08 12 0A 12 B0 12 3E 63 2A 91
+05 24 B0 12 B6 63 2A 41 B0 12 50 5E 3A 41 38 41
+98 42 26 20 00 1E 92 93 02 20 03 24 98 42 28 20
+02 1E B0 12 B6 63 9B 42 26 20 0E 00 9B 42 28 20
+10 00 30 40 6A 5F 50 61 05 57 52 49 54 45 B0 12
+70 65 30 4D 58 4B 13 00 59 4B 14 00 89 10 09 58
+58 4B 15 00 5B 42 12 20 0A 43 3C 42 08 11 09 10
+4A 10 1C 83 0B 11 FA 2B 0A 11 1C 83 FD 37 1B 42
+32 20 19 5B 0A 00 18 6B 0C 00 8B 49 0E 00 8B 48
+10 00 CB 4A 03 00 1A 4B 12 00 BB C0 FF 01 12 00
+3A F0 FF 01 82 4A 1E 20 B0 12 06 60 30 4D 0C 93
+38 20 38 90 E0 01 03 2C C8 93 20 1E 02 24 7C 40
+E5 00 C8 4C 00 1E B0 12 64 65 B0 12 08 5F 82 4A
+2A 20 0B 4A B0 12 50 5E 1A 48 00 1E 88 43 00 1E
+92 93 02 20 09 24 19 48 02 1E 88 43 02 1E 39 F0
+FF 0F 39 90 FF 0F 02 20 3A 93 0E 24 82 4A 22 20
+82 49 24 20 B0 12 08 5F 0B 9A E6 27 0A 12 0A 4B
+B0 12 B6 63 3A 41 DD 3F 0A 4B B0 12 B6 63 B0 12
+FC 60 30 4D C0 43 08 54 45 52 4D 32 53 44 22 00
+0D 12 87 12 64 61 24 40 02 00 CE 4A C0 46 B4 61
+D2 66 3D 41 92 C3 DC 05 08 43 B0 12 06 41 92 B3
+DC 05 FD 27 59 42 CC 05 69 92 0D 24 C8 49 00 1E
+18 53 38 90 FF 01 F3 2B 03 24 B0 12 70 65 EC 3F
+B0 12 18 41 EC 3F B0 12 18 41 82 48 1E 20 B0 12
+FC 60 30 4D
@FFFE
-F6 50
+C2 4E
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 64 69 C4 4D
-2D 01 FF B3 B6 42 C8 42 B0 60 EC 60
+10 00 04 00 51 55 40 1F 05 00 18 00 10 67 78 4B
+2E 01 FF B3 06 41 18 41 52 5E 8E 5E
@4000
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 40
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 40
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 40
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 40 02 3E 52 00 0E 12 3E 4F 30 4D 70 40 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 40 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 40 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 40
-01 21 BE 4F 00 00 3E 4F 30 4D CC 40 02 30 3D 00
-1E 83 0E 7E 30 4D FC 40 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 41 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 40 B0 12 06 41 12 D2 0A 18 F9 3F 39 40
+4C 00 29 83 B9 40 C2 4E B4 FF FB 23 B2 40 C6 41
+F0 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 40 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 41 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 41 02 23 53 00 87 12 88 41 C0 41
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 41
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 40 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 41 34 40 86 40 D4 40 BA 41
-92 40 F8 41 D4 41 38 44 A4 47 E0 43 2A 40 22 41
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 41 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 42 18 42 CC 05 2F 83 8F 4E
-00 00 B0 12 B6 42 92 B3 DC 05 FD 27 1E 42 CC 05
-B0 12 C8 42 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
-CE 05 E2 C2 23 02 30 41 B2 40 13 00 CE 05 E2 D2
-23 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 42
-B0 12 B6 42 12 D2 0A 18 F9 3F 0D 12 3D 40 0A 43
+12 D3 F5 3F 34 40 EC 40 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 51 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 DC 05 FD 27 B2 40 11 00
+CE 05 E2 C2 23 02 30 41 A2 B3 DC 05 FD 27 B2 40
+13 00 CE 05 E2 D2 23 02 30 41 0D 12 3D 40 4A 41
1B 42 32 20 9B 42 1E 20 16 00 3A 4F 09 4E 0E 43
-1C 42 1E 20 1B 42 20 20 02 3C 0C 43 2D 83 0C 9B
+1C 42 1E 20 1B 42 20 20 02 3C 4C 41 2D 83 0C 9B
14 2C 58 4C 00 1E 1C 53 78 90 20 00 07 2C 78 90
-0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3D 24
-CA 48 00 00 1A 53 1E 53 38 3C 1A 15 B0 12 F6 61
-19 17 DE 3F F0 40 06 41 43 43 45 50 54 00 30 40
-52 43 3C 40 C2 43 3B 40 8C 43 2D 15 0A 4E 2E 4F
-0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 B6 43 92 B3
-DC 05 05 24 18 42 CC 05 38 90 0A 00 9C 23 21 53
-3D 15 AC 3F 21 52 3A 17 58 42 CC 05 48 9C 08 2C
-48 9B 9A 27 78 92 11 20 2E 9F 0F 24 1E 83 05 3C
-0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05 FD 27
-82 48 CE 05 30 4D B8 43 2D 83 92 B3 DC 05 E4 23
-FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F 3D 41
-B2 40 18 00 0A 18 30 4D 9E 40 04 45 4D 49 54 00
-30 40 E4 43 08 4E 3E 4F E0 3F 85 12 3C 1D 3F 80
-06 00 8F 4E 04 00 3E 40 54 00 9F 42 EC 43 00 00
-AF 4F 02 00 A4 3F DA 43 04 45 43 48 4F 00 B2 40
-82 48 B0 43 82 43 DE 1D 30 4D 32 42 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D B0 43 92 43 DE 1D 30 4D
-20 42 04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40
-4E 44 28 4F 7E 48 8F 48 00 00 2F 83 C9 3F 50 44
-2D 83 91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D
-D0 41 02 43 52 00 30 40 6A 44 87 12 80 44 02 0D
-0A 00 38 44 2A 40 2F 83 8F 4E 00 00 3E 4D 30 4D
-2F 82 8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3
-0D 63 30 4D F2 41 82 53 22 00 82 43 B4 1D 87 12
-76 44 80 44 12 47 76 44 22 00 E2 44 AE 44 B2 40
+0A 00 F5 23 82 4C 1E 20 3D 41 30 4D 0E 99 3E 24
+CA 48 00 00 1A 53 1E 53 39 3C 1A 15 B0 12 98 5F
+19 17 DE 3F 00 00 06 41 43 43 45 50 54 00 30 40
+92 41 3C 40 04 42 3B 40 CE 41 2D 15 0A 4E 2E 4F
+0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 F8 41 92 B3
+DC 05 05 24 18 42 CC 05 38 90 0A 00 A4 23 21 53
+3D 15 30 40 00 40 21 52 3A 17 58 42 CC 05 48 9C
+08 2C 48 9B A1 27 78 92 11 20 2E 9F 0F 24 1E 83
+05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 DC 05
+FD 27 82 48 CE 05 30 4D FA 41 2D 83 92 B3 DC 05
+E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
+3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45 4D 49
+54 00 30 40 26 42 08 4E 3E 4F E0 3F 1C 42 04 45
+43 48 4F 00 B2 40 82 48 F2 41 82 43 DE 1D 30 4D
+00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D F2 41
+92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00 0E 93
+0F 24 1E 15 3D 40 74 42 28 4F 7E 48 8F 48 00 00
+2F 83 D7 3F 76 42 2D 83 91 83 02 00 F5 23 1D 17
+2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40 90 42
+0D 12 87 12 2E 40 02 0D 0A 00 5E 42 84 43 00 00
+03 4B 45 59 30 40 A8 42 18 42 CC 05 2F 83 8F 4E
+00 00 B0 12 06 41 92 B3 DC 05 FD 27 1E 42 CC 05
+B0 12 18 41 30 4D 2F 83 8F 4E 00 00 30 4D 8F 4E
+FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23 30 4D
+2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF 3E 40
+80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E 00 00
+3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F 00 00
+3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E 3E E3
+30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D 00 00
+02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 88 42 01 23
+1B 42 DC 1D 2C 4F 2F 83 B0 12 86 40 BF 4F 00 00
+7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00 92 83
+B2 1D 18 42 B2 1D C8 4A 00 00 30 4D 3E 43 02 23
+53 00 0D 12 87 12 40 43 7A 43 2D 83 09 93 E2 23
+0E 93 E0 23 3D 41 30 4D 6E 43 02 23 3E 00 9F 42
+B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00 04 48
+4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53 49 47
+4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D 58 42
+02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 0D 12
+0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53 00 00
+0E 63 87 12 34 43 72 43 FA 42 B2 43 8E 43 5E 42
+CE 46 22 42 84 43 42 42 01 2E 0E 93 E3 37 38 43
+E2 3F AC 43 82 53 22 00 82 43 B4 1D 0D 12 87 12
+24 40 2E 40 56 46 24 40 22 00 50 44 1E 44 B2 40
20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41
-3E 4F 30 4D 1C 44 82 2E 22 00 87 12 9A 44 76 44
-38 44 12 47 2A 40 48 43 05 3C 00 00 04 57 4F 52
-44 00 48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52
-C4 1D 09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20
-0E 4A 1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D
-3B 40 60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C
-09 24 18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82
-B4 1D F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D
-08 8E CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00
-2F 83 0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B
-0E 93 1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53
-1E 4E FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95
-F7 23 0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23
-19 B3 09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83
-8F 4C 00 00 35 40 0E 40 34 40 00 40 30 4D 82 40
-07 3E 4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82
-1B 42 DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28
-7A 80 07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C
-82 49 D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04
-18 42 E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C
-00 00 8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02
-1B 42 DC 1D 0C 43 2D 15 3D 40 56 46 09 43 08 43
-3F 82 8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00
-04 28 C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00
-07 24 3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23
-1C 53 1E 83 EA 3F 58 46 2F 24 2D 83 7A 90 28 00
-CB 27 32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00
-23 20 0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C
-69 49 79 80 30 00 79 90 0A 00 05 28 79 80 07 00
-79 90 0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B
-2C 15 B0 12 3E 41 2A 17 E6 3F 9F 4F 04 00 02 00
-AF 4F 04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D
-06 24 32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53
-9F 4F 02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3
-BF E3 02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00
-32 B0 00 02 01 20 2F 53 30 4D 7E 42 04 48 45 52
-45 00 2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 40
-01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F
-30 4D 46 43 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F
-30 4D 08 44 07 45 58 45 43 55 54 45 0A 4E 3E 4F
-00 4A 10 47 87 4C 49 54 45 52 41 4C 82 93 BE 1D
-0C 24 1A 42 C6 1D A2 52 C6 1D BA 40 76 44 00 00
-8A 4E 02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24
-19 4A 02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 62 44
-05 43 4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E
-FF FF 30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
-C4 1D 30 4D 85 12 20 00 87 12 94 47 A4 47 E2 44
-B2 47 3D 40 BA 47 CC 22 82 3E BC 47 0A 4E 3E 4F
-3D 40 D2 47 23 27 3D 40 AC 47 1A E2 BE 1D A1 27
-B5 23 D4 47 3E 4F 3D 40 AC 47 B8 23 DE 53 00 00
-68 4E 08 5E F8 40 3F 00 00 00 3D 40 CC 4A CB 3F
-34 47 08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D
-3C 49 3B 49 3A 49 3D 15 B0 12 2A 40 A8 47 10 48
-B2 41 C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D
-85 12 BE 1D 82 43 08 18 31 40 E0 1C B2 40 00 1C
-00 1C 82 43 BE 1D 30 4D 80 47 04 42 4F 4F 54 00
-82 93 08 18 1D 24 E2 B2 60 02 1A 20 2F 83 8F 4E
-00 00 1E 42 08 18 B0 12 2A 40 24 44 24 48 80 44
-0F 4C 4F 41 44 22 20 42 4F 4F 54 2E 34 54 48 22
-3C 42 8E 48 08 41 04 51 55 49 54 00 30 40 80 48
-B0 12 2A 40 24 48 66 44 EE 43 A4 47 E0 43 A8 47
-A4 40 0C 41 80 44 0C 73 74 61 63 6B 20 65 6D 70
-74 79 21 00 E6 48 76 44 30 FF 02 47 26 41 80 44
-0A 46 52 41 4D 20 66 75 6C 6C 21 00 E6 48 3C 42
-86 48 24 47 05 41 42 4F 52 54 3F 40 80 1C D6 3F
-C4 48 86 41 42 4F 52 54 22 00 87 12 9A 44 76 44
-E6 48 12 47 2A 40 8F 93 02 00 03 20 2F 52 3E 4F
-30 4D B0 12 EC 4E B0 12 B6 42 92 C3 DC 05 38 40
-50 55 39 42 03 43 19 83 FD 23 18 83 FA 23 92 B3
-DC 05 F3 23 87 12 60 4E 76 44 DE 1D EA 40 0E 44
-80 44 04 1B 5B 37 6D 00 38 44 58 40 40 42 40 49
-66 44 80 44 05 6C 69 6E 65 3A 38 44 D0 40 24 42
-38 44 80 44 04 1B 5B 30 6D 00 38 44 CA 48 00 00
-83 5B 27 5D 87 12 66 49 76 44 76 44 12 47 12 47
-2A 40 4A 45 01 27 87 12 A4 47 E2 44 50 45 40 42
-74 49 2A 40 DC 47 32 41 81 5C 92 42 C0 1D C4 1D
-30 4D 50 49 81 5B 82 43 BE 1D 30 4D 78 49 01 5D
-B2 43 BE 1D 30 4D BE 4F 02 00 3E 4F 30 4D FC 46
-82 49 53 00 87 12 20 48 EA 40 40 42 B8 49 54 49
-76 44 96 49 12 47 2A 40 66 49 96 49 2A 40 A0 49
-09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 1D FA D0
-80 00 00 00 30 4D 76 48 88 50 4F 53 54 50 4F 4E
-45 00 87 12 A4 47 E2 44 50 45 58 40 40 42 74 49
-0C 41 40 42 02 4A 76 44 76 44 12 47 12 47 76 44
-12 47 12 47 2A 40 84 49 81 3B 82 93 BE 1D B5 27
-87 12 76 44 2A 40 12 47 A0 4A 86 49 2A 40 08 4A
-07 3A 4E 4F 4E 41 4D 45 30 12 46 4A 2F 83 8F 4E
-00 00 1E 42 C6 1D 1E B3 0E 63 0A 4E 39 40 00 02
-38 40 02 02 21 3C BA 40 87 12 FC FF A2 83 C6 1D
-B2 43 BE 1D 30 4D 20 4A 01 3A 30 12 46 4A 92 B3
-C6 1D A2 63 C6 1D 87 12 A4 47 E2 44 6E 4A 3D 41
-08 4E 7A 4E 5A D3 5A 53 0A 58 19 42 DA 1D 6E 4E
-3E F0 1E 00 09 5E 3E 4F 82 48 B6 1D 82 49 B8 1D
-82 4A BA 1D 82 4F BC 1D 2A 52 82 4A C6 1D 30 41
-82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D A8 49
-FE FF 89 48 00 00 30 4D 87 12 80 44 0F 73 74 61
-63 6B 20 6D 69 73 6D 61 74 63 68 21 F2 48 F2 47
-05 44 45 46 45 52 B0 12 5E 4A BA 40 30 40 FC FF
-BA 40 54 4A FE FF E3 3F 3A 48 06 43 52 45 41 54
-45 00 B0 12 5E 4A BA 40 85 12 FC FF 8A 4A FE FF
-D6 3F D0 4A 05 44 4F 45 53 3E 1A 42 BA 1D BA 40
-84 12 00 00 8A 4D 02 00 3D 41 30 4D B0 45 05 3E
-42 4F 44 59 2E 52 30 4D EA 4A 04 43 4F 44 45 00
-B0 12 5E 4A 82 43 C2 5F A2 82 C6 1D 87 12 CE 4D
-A0 4D 2A 40 2A 4B 07 43 4F 44 45 4E 4E 4D B0 12
-2C 4A F0 3F 00 00 07 45 4E 44 43 4F 44 45 87 12
-E8 4D A0 4A 2A 40 D2 48 03 41 53 4D B2 40 A4 4D
-DA 1D DE 3F 56 4B 06 45 4E 44 41 53 4D 00 87 12
-5E 4B 12 4E 2A 40 00 00 05 43 4F 4C 4F 4E 1A 42
-C6 1D BA 40 87 12 00 00 A2 53 C6 1D B2 43 BE 1D
-30 40 E8 4D 00 00 05 4C 4F 32 48 49 1A 42 C6 1D
-BA 40 B0 12 00 00 BA 40 2A 40 02 00 A2 52 C6 1D
-ED 3F C0 49 85 48 49 32 4C 4F 87 12 02 47 F4 4B
-12 47 86 49 CE 4D A0 4D 2A 40 C4 4B 82 49 46 00
-2F 83 8F 4E 00 00 1E 42 C6 1D A2 52 C6 1D BE 40
-40 42 00 00 2E 53 30 4D 04 4B 84 45 4C 53 45 00
-A2 52 C6 1D 1A 42 C6 1D BA 40 3C 42 FC FF 8E 4A
-00 00 2A 83 0E 4A 30 4D 32 44 84 54 48 45 4E 00
-9E 42 C6 1D 00 00 3E 4F 30 4D 46 4B 85 42 45 47
-49 4E 30 40 02 47 1A 4C 85 55 4E 54 49 4C 39 40
-40 42 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E
-FE FF 3E 4F 30 4D 68 4B 85 41 47 41 49 4E 39 40
-3C 42 EF 3F DC 44 85 57 48 49 4C 45 87 12 E0 4B
-76 40 2A 40 96 44 86 52 45 50 45 41 54 00 87 12
-5E 4C 20 4C 2A 40 FA 4B 82 44 4F 00 2F 83 8F 4E
-00 00 A2 53 C6 1D 1E 42 C6 1D BE 40 54 42 FE FF
-A2 53 00 1C 1A 42 00 1C 8A 43 00 00 30 4D 44 47
-84 4C 4F 4F 50 00 39 40 76 42 A2 52 C6 1D 1A 42
-C6 1D 8A 49 FC FF 8A 4E FE FF 1E 42 00 1C A2 83
-00 1C 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F 3E 4F
-30 4D 90 42 85 2B 4C 4F 4F 50 39 40 64 42 E5 3F
-B0 4C 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F 3E 4F
-0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00 18 53
-1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83 E8 49
-00 00 1A 83 FA 23 30 4D 66 4C 0A 56 4F 43 41 42
-55 4C 41 52 59 00 87 12 F2 4A 76 44 10 00 76 44
-00 00 54 42 76 44 00 00 12 47 76 42 44 4D 02 47
-76 44 C8 1D 34 40 EA 40 12 47 F2 40 0A 4B 76 44
-CA 1D F2 40 2A 40 64 49 05 46 4F 52 54 48 84 12
-5E 4D C8 4D C4 63 B8 63 68 4D DC 4B E4 4C D2 63
-F8 4D 84 4E 78 65 08 69 2A 68 00 00 B4 52 8E 49
-1E 4B 00 00 58 4C 09 41 53 53 45 4D 42 4C 45 52
-84 12 5E 4D 8C 5E 24 5E 88 5D 4C 59 F0 57 00 00
-50 5C 00 00 B2 5F C6 5F 48 58 86 58 58 5E 00 00
-00 00 28 59 92 4D 96 4D 04 41 4C 53 4F 00 3A 40
-0C 00 39 40 CA 1D 38 40 CC 1D 9D 3F D8 49 08 50
-52 45 56 49 4F 55 53 00 3A 40 0E 00 39 40 CC 1D
-38 40 CA 1D 8A 3F C6 44 04 4F 4E 4C 59 00 82 43
-CC 1D 30 4D 88 4C 0B 44 45 46 49 4E 49 54 49 4F
-4E 53 92 42 CA 1D DA 1D 30 4D 6E 4D FE 4D 12 4E
-22 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
-10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
-89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
-3D 41 30 4D DE 4D 09 50 57 52 5F 53 54 41 54 45
-84 12 1A 4E C4 4D 64 69 76 4C 09 52 53 54 5F 53
-54 41 54 45 92 42 0E 18 64 4E 92 42 0C 18 66 4E
-EF 3F 56 4E 08 50 57 52 5F 48 45 52 45 00 92 42
-C8 1D 64 4E 92 42 C6 1D 66 4E 30 4D 6A 4E 08 52
-53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
-C6 1D 0C 18 EC 3F 2A 4D 04 57 49 50 45 00 39 40
-10 00 29 83 B9 43 80 FF FC 23 B2 40 E0 42 DE 42
-B2 40 4A 4F 48 4F B2 40 80 48 7E 48 B2 40 C4 4D
-0E 18 B2 40 64 69 0C 18 30 12 74 4E B2 40 E4 43
-E2 43 B2 40 6A 44 68 44 B2 40 98 42 96 42 B2 40
-52 43 50 43 B2 40 3C 1D EC 43 1B 42 32 20 0B 93
-04 24 CB 43 02 00 2B 4B FA 3F B2 40 18 00 0A 18
-37 40 1A 40 36 40 92 40 35 40 0E 40 34 40 00 40
-B2 40 0A 00 DC 1D B2 40 20 00 B4 1D 30 41 B8 4E
-04 57 41 52 4D 00 30 40 4A 4F 3D 40 98 50 92 C3
-30 01 1E 42 08 18 0E 93 9E 24 D2 B3 01 02 02 20
-3E E3 1E 53 F2 D0 03 00 0D 02 E2 B2 60 02 8A 20
-39 42 B0 12 88 60 D2 C3 23 02 2C 42 B2 40 95 00
-14 20 B2 40 00 40 18 20 B0 12 FE 5F 02 24 30 40
-24 61 B0 12 86 60 7A 93 FC 23 B2 40 87 AA 14 20
-92 43 16 20 B2 40 00 48 18 20 B0 12 FE 5F 29 42
-B0 12 88 60 92 43 14 20 82 43 16 20 78 43 3C 42
-B2 40 00 77 18 20 B0 12 FE 5F B2 40 40 69 18 20
-B0 12 44 60 03 24 58 83 F3 23 D9 3F 0C 5C A2 43
-16 20 B2 40 00 50 18 20 B0 12 44 60 D0 23 92 D3
-40 06 82 43 46 06 92 C3 40 06 B0 12 AE 60 38 40
-00 1E 92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48
-C2 01 92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24
-A2 43 02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24
-3A 50 0B 20 0C 4A 30 40 2A 61 B0 12 AE 60 D2 48
-0D 00 12 20 19 48 0E 00 82 49 08 20 1A 48 16 00
-0A 93 02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49
-0C 20 09 5A A2 93 02 20 04 24 82 49 0E 20 39 50
-20 00 19 82 12 20 19 82 12 20 82 49 10 20 92 42
-02 20 2C 20 3E 90 0A 00 1A 27 3E 90 16 00 17 2F
-2E 93 E6 26 EF 2E 30 4D 80 44 06 0D 1B 5B 37 6D
-23 00 38 44 34 42 80 44 19 46 61 73 74 46 6F 72
-74 68 20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E
-73 20 38 44 76 44 30 FF 02 47 B8 40 24 42 80 44
-0A 62 79 74 65 73 20 66 72 65 65 00 3C 42 40 49
-2C 4C 04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40
-04 A5 20 01 98 50 B2 40 88 5A 5C 01 B2 D3 06 02
+3E 4F 30 4D F8 43 82 2E 22 00 0D 12 87 12 08 44
+24 40 5E 42 56 46 84 43 00 00 04 57 4F 52 44 00
+3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C 09 9A
+15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C 00 00
+09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C F6 2F
+7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82 C2 1D
+82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00 30 4D
+00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C 74 40
+80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C 01 00
+78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93 F3 27
+09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99 01 00
+F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49 6A 4E
+1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40 FA 40
+34 40 EC 40 30 4D 00 00 07 3E 4E 55 4D 42 45 52
+3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C 7A 80
+30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90 0A 00
+12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48 D2 04
+82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A 08 63
+1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00 8F 49
+04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43 2D 15
+3D 40 AE 45 09 43 08 43 3F 82 8F 4E 06 00 0C 4E
+7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43 02 00
+0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53 04 24
+3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F B0 45
+2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02 7A 90
+F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43 8F 49
+02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00 79 90
+0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28 09 9B
+08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 40 2A 17
+E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A 4E 93
+2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02 3F 50
+06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00 BF 4F
+00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3 00 00
+9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20 2F 53
+30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00 A2 53
+C6 1D 3E 4F 30 4D 86 41 05 41 4C 4C 4F 54 82 5E
+C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A 54 46 87 4C
+49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42 C6 1D
+A2 52 C6 1D BA 40 24 40 00 00 8A 4E 02 00 3E 4F
+32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00 8A 4E
+02 00 0E 49 EB 3F 30 4D 8A 43 05 43 4F 55 4E 54
+2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 85 12
+20 00 0D 12 87 12 C4 40 CE 46 50 44 DE 46 3D 40
+E6 46 E2 22 A4 26 E8 46 0A 4E 3E 4F 3D 40 FE 46
+39 27 3D 40 D8 46 1A E2 BE 1D BD 23 AC 27 00 47
+3E 4F 3D 40 D8 46 BF 23 DE 53 00 00 68 4E 08 5E
+F8 40 3F 00 00 00 3D 40 C0 49 D2 3F 2E 42 08 45
+56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49 3B 49
+3A 49 3D 15 87 12 D2 46 3A 47 B2 41 C4 1D B2 41
+C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D 82 43
+08 18 31 40 E0 1C B2 40 00 1C 00 1C 82 43 BE 1D
+30 4D BA 46 04 42 4F 4F 54 00 82 93 08 18 1C 24
+E2 B2 60 02 19 20 2F 83 8F 4E 00 00 1E 42 08 18
+87 12 4A 42 4E 47 2E 40 0F 4C 4F 41 44 22 20 42
+4F 4F 54 2E 34 54 48 22 48 40 B4 47 00 00 04 51
+55 49 54 00 30 40 A8 47 87 12 4E 47 8C 42 D4 40
+CE 46 22 42 D2 46 EA 42 1A 43 2E 40 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 0E 48 24 40 40 FF
+CE 4A 22 43 2E 40 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 0E 48 48 40 AC 47 68 46 05 41 42 4F 52 54
+3F 40 80 1C D7 3F EA 47 86 41 42 4F 52 54 22 00
+0D 12 87 12 08 44 24 40 0E 48 56 46 84 43 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 B6 4C B0 12
+06 41 92 C3 DC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 DC 05 F3 23 0D 12 87 12
+2A 4C 24 40 DE 1D 02 41 34 42 2E 40 04 1B 5B 37
+6D 00 5E 42 DA 42 4C 40 68 48 8C 42 2E 40 05 6C
+69 6E 65 3A 5E 42 C4 43 5E 42 2E 40 04 1B 5B 30
+6D 00 5E 42 F0 47 00 00 83 5B 27 5D 0D 12 87 12
+90 48 24 40 24 40 56 46 56 46 84 43 A2 44 01 27
+0D 12 87 12 CE 46 50 44 A8 44 4C 40 A0 48 84 43
+08 47 30 43 81 5C 92 42 C0 1D C4 1D 30 4D 78 48
+81 5B 82 43 BE 1D 30 4D A4 48 01 5D B2 43 BE 1D
+30 4D 9E 47 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 CE 46 50 44 A8 44 DA 42 4C 40 A0 48 1A 43
+4C 40 F0 48 24 40 24 40 56 46 56 46 24 40 56 46
+56 46 84 43 9E 43 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D B0 48 01 3A
+30 12 58 49 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+CE 46 50 44 26 49 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 0E 49 07 3A 4E 4F
+4E 41 4D 45 30 12 58 49 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 40
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+1A 48 6C 49 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 40 84 43 56 46 92 49 B2 48 84 43 64 47 06 43
+52 45 41 54 45 00 B0 12 14 49 BA 40 85 12 FC FF
+8A 4A FE FF D5 3F 1E 47 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+DE 49 04 43 4F 44 45 00 B0 12 14 49 A2 82 C6 1D
+82 43 62 5D 0D 12 87 12 82 4B 54 4B 84 43 12 4A
+07 43 4F 44 45 4E 4E 4D 30 12 1C 4A 9D 3F 00 00
+07 45 4E 44 43 4F 44 45 0D 12 87 12 92 49 A8 4B
+84 43 F8 47 03 41 53 4D B2 40 58 4B DA 1D DC 3F
+40 4A 06 45 4E 44 41 53 4D 00 0D 12 87 12 48 4A
+DC 4B 84 43 00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D
+BA 40 0D 12 00 00 BA 40 87 12 02 00 A2 52 C6 1D
+B2 43 BE 1D 30 40 A8 4B 00 00 05 4C 4F 32 48 49
+A2 83 C6 1D 1A 42 C6 1D EE 3F F6 48 85 48 49 32
+4C 4F 0D 12 87 12 CE 4A C2 4A 56 46 B2 48 20 4A
+84 43 2E 53 30 4D 30 4A 85 42 45 47 49 4E 2F 83
+8F 4E 00 00 1E 42 C6 1D 30 4D 4A 44 0A 56 4F 43
+41 42 55 4C 41 52 59 00 0D 12 87 12 E6 49 24 40
+10 00 24 40 00 00 56 40 24 40 00 00 56 46 78 40
+F8 4A CE 4A 24 40 C8 1D C6 42 02 41 56 46 0C 43
+FE 49 24 40 CA 1D 0C 43 84 43 8E 48 05 46 4F 52
+54 48 84 12 12 4B 7C 4B 66 61 5A 61 1C 4B AC 4A
+A0 42 74 61 C2 4B 4E 4C 20 63 B2 66 D4 65 00 00
+62 50 BA 48 08 45 00 00 54 4A 09 41 53 53 45 4D
+42 4C 45 52 84 12 12 4B 2E 5C C6 5B 2A 5B E6 56
+84 55 00 00 F2 59 00 00 52 5D 66 5D DC 55 1A 56
+FA 5B 00 00 00 00 C0 56 46 4B 4A 4B 04 41 4C 53
+4F 00 3A 40 0C 00 39 40 D6 1D 08 49 28 53 19 83
+18 83 E8 49 00 00 1A 83 FA 23 30 4D C4 48 08 50
+52 45 56 49 4F 55 53 00 3A 40 0E 00 38 40 CA 1D
+09 48 29 53 F8 49 00 00 18 53 1A 83 FB 23 30 4D
+36 44 04 4F 4E 4C 59 00 82 43 CC 1D 30 4D F8 49
+0B 44 45 46 49 4E 49 54 49 4F 4E 53 92 42 CA 1D
+DA 1D 30 4D 22 4B C8 4B DC 4B EC 4B 3A 4E 82 4A
+C8 1D 2E 4E 82 4E C6 1D 3D 40 10 00 09 4A 08 49
+29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00 1D 83
+F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D 9E 4B
+09 50 57 52 5F 53 54 41 54 45 84 12 E4 4B 78 4B
+10 67 04 44 09 52 53 54 5F 53 54 41 54 45 92 42
+0E 18 2E 4C 92 42 0C 18 30 4C EF 3F 20 4C 08 50
+57 52 5F 48 45 52 45 00 92 42 C8 1D 2E 4C 92 42
+C6 1D 30 4C 30 4D 34 4C 08 52 53 54 5F 48 45 52
+45 00 92 42 C8 1D 0E 18 92 42 C6 1D 0C 18 EC 3F
+DC 4A 04 57 49 50 45 00 39 40 10 00 29 83 B9 43
+80 FF FC 23 B2 40 04 40 02 40 B2 40 14 4D 12 4D
+B2 40 A8 47 A6 47 B2 40 78 4B 0E 18 B2 40 10 67
+0C 18 30 12 3E 4C B2 40 26 42 24 42 B2 40 90 42
+8E 42 B2 40 A8 42 A6 42 B2 40 92 41 90 41 B2 40
+3C 1D E2 40 1B 42 32 20 0B 93 04 24 CB 43 02 00
+2B 4B FA 3F B2 40 18 00 0A 18 37 40 84 43 36 40
+FA 42 35 40 FA 40 34 40 EC 40 B2 40 0A 00 DC 1D
+B2 40 20 00 B4 1D 30 41 82 4C 04 57 41 52 4D 00
+30 40 14 4D 3D 40 66 4E 92 C3 30 01 1E 42 08 18
+0E 93 A0 24 D2 B3 01 02 02 20 3E E3 1E 53 F2 D0
+03 00 0D 02 92 D3 DA 05 E2 B2 60 02 8A 20 39 42
+B0 12 2A 5E D2 C3 23 02 2C 42 B2 40 95 00 14 20
+B2 40 00 40 18 20 B0 12 A0 5D 02 24 30 40 C6 5E
+B0 12 28 5E 7A 93 FC 23 B2 40 87 AA 14 20 92 43
+16 20 B2 40 00 48 18 20 B0 12 A0 5D 29 42 B0 12
+2A 5E 92 43 14 20 82 43 16 20 78 43 3C 42 B2 40
+00 77 18 20 B0 12 A0 5D B2 40 40 69 18 20 B0 12
+E6 5D 03 24 58 83 F3 23 D9 3F 0C 5C A2 43 16 20
+B2 40 00 50 18 20 B0 12 E6 5D D0 23 92 D3 40 06
+82 43 46 06 92 C3 40 06 B0 12 50 5E 38 40 00 1E
+92 48 C6 01 04 20 92 48 C8 01 06 20 5A 48 C2 01
+92 43 02 20 7A 80 06 00 0F 24 7A 82 0D 24 A2 43
+02 20 6A 53 09 24 5A 53 07 24 6A 52 05 24 3A 50
+0B 20 0C 4A 30 40 CC 5E B0 12 50 5E D2 48 0D 00
+12 20 19 48 0E 00 82 49 08 20 1A 48 16 00 0A 93
+02 20 1A 48 24 00 82 4A 0A 20 09 5A 82 49 0C 20
+09 5A A2 93 02 20 04 24 82 49 0E 20 39 50 20 00
+19 82 12 20 19 82 12 20 82 49 10 20 92 42 02 20
+2C 20 3E 90 0A 00 18 27 3E 90 16 00 15 2F 2E 93
+E4 26 ED 2E 30 4D 2E 40 07 0D 0A 1B 5B 37 6D 23
+5E 42 FA 43 2E 40 19 46 61 73 74 46 6F 72 74 68
+20 C2 A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20
+5E 42 24 40 40 FF CE 4A 04 43 C4 43 2E 40 0A 62
+79 74 65 73 20 66 72 65 65 00 48 40 68 48 C8 4A
+04 43 4F 4C 44 00 92 B3 CA 05 FD 23 B2 40 04 A5
+20 01 31 40 E0 1C B2 40 88 5A 5C 01 B2 D3 06 02
B2 40 FC FF 02 02 B2 43 26 02 B2 D3 22 02 E2 D2
25 02 B2 43 42 02 B2 D3 46 02 B2 43 62 02 B2 D3
66 02 F2 43 26 03 F2 D3 22 03 F2 40 A5 00 61 01
61 01 92 D2 9E 01 08 18 38 40 59 14 18 83 FE 23
19 83 FA 23 F2 D0 10 00 2A 03 F2 40 A5 00 A1 04
F2 C0 40 00 A2 04 B2 42 B0 01 39 40 00 10 29 83
-89 43 00 1C FC 23 39 40 4C 00 29 83 B9 40 F6 50
-B4 FF FB 23 B2 40 84 43 F0 FF B2 40 81 00 C0 05
+89 43 00 1C FC 23 B0 12 0E 40 B2 40 81 00 C0 05
92 42 02 18 C6 05 92 42 04 18 C8 05 92 C3 C0 05
-92 D3 DA 05 B2 40 81 A9 40 06 B2 40 18 00 46 06
-D2 D3 25 02 B2 D0 C0 04 0C 02 92 C3 40 06 3F 40
-80 1C 31 40 E0 1C 30 12 46 4F A7 3E E2 50 07 43
-4F 4D 50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B
-0E 5C 0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98
-FF FF F5 27 02 2C 3E 43 30 4D 1E 43 30 4D 58 4A
-86 5B 54 48 45 4E 5D 00 30 4D 00 52 86 5B 45 4C
-53 45 5D 00 87 12 76 44 00 00 C6 40 A4 47 E2 44
-86 47 34 40 40 42 76 52 44 40 80 44 06 5B 54 48
-45 4E 5D 00 D6 51 4A 42 46 52 5A 44 D0 40 58 40
-4A 42 1C 52 2A 40 44 40 80 44 06 5B 45 4C 53 45
-5D 00 D6 51 4A 42 64 52 5A 44 D0 40 58 40 4A 42
-1A 52 2A 40 80 44 04 5B 49 46 5D 00 D6 51 4A 42
-1C 52 3C 42 1A 52 5A 44 80 44 05 0D 0A 6B 6F 20
-38 44 EE 43 94 47 3C 42 1C 52 0C 52 84 5B 49 46
-5D 00 0E 93 3E 4F BE 27 30 4D 8C 52 89 5B 44 45
-46 49 4E 45 44 5D 87 12 A4 47 E2 44 50 45 6A 40
-2A 40 9C 52 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
-87 12 A4 47 E2 44 50 45 6A 40 00 41 2A 40 D0 52
-3D 41 B2 4E 0E 18 A2 4E 0C 18 3E 4F 30 40 74 4E
-F2 4C 06 4D 41 52 4B 45 52 00 B0 12 5E 4A BA 40
-84 12 FC FF BA 40 CE 52 FE FF 9A 42 C8 1D 00 00
-28 83 8A 48 02 00 A2 52 C6 1D 30 40 A6 4A 1C 15
-B0 12 2A 40 E2 44 50 45 4A 42 24 53 0C 46 40 42
-74 49 3E 53 26 53 39 4E 39 80 86 12 08 24 19 53
+B2 40 81 A9 40 06 B2 40 18 00 46 06 D2 D3 25 02
+B2 D0 C0 04 0C 02 92 C3 40 06 3F 40 80 1C 30 12
+10 4D B0 3E C4 49 86 5B 54 48 45 4E 5D 00 30 4D
+0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83
+06 30 1C 83 04 30 19 53 F9 98 FF FF F5 27 2D 4D
+3E 4F 30 4D 2F 53 9F 83 00 00 F9 23 2F 53 2D 53
+F7 3F 86 4F 86 5B 45 4C 53 45 5D 00 0D 12 87 12
+24 40 00 00 08 43 CE 46 50 44 C0 46 C6 42 4C 40
+1E 50 CE 42 2E 40 06 5B 54 48 45 4E 5D 00 90 4F
+F8 4F B4 4F D6 4F 84 43 CE 42 2E 40 06 5B 45 4C
+53 45 5D 00 90 4F 0E 50 B4 4F D4 4F 84 43 2E 40
+04 5B 49 46 5D 00 90 4F D6 4F 48 40 D4 4F 80 42
+2E 40 05 0D 0A 6B 6F 20 5E 42 D4 40 C4 40 48 40
+D6 4F C4 4F 84 5B 49 46 5D 00 0E 93 3E 4F C6 27
+30 4D 2F 53 30 4D 34 50 89 5B 44 45 46 49 4E 45
+44 5D 0D 12 87 12 CE 46 50 44 A8 44 42 50 84 43
+48 50 8B 5B 55 4E 44 45 46 49 4E 45 44 5D 0D 12
+87 12 52 50 76 50 3D 41 30 40 14 43 38 40 C0 1D
+0A 4E 39 48 2E 48 09 5E 1E 52 C4 1D 09 9E 03 24
+7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 1D 30 4D
+1C 15 87 12 50 44 A8 44 42 40 B4 50 64 45 4C 40
+A0 48 CE 50 B6 50 39 4E 39 80 86 12 08 24 19 53
02 20 2E 4E 04 3C 2E 53 19 53 01 24 2E 82 1B 17
30 41 32 B0 00 02 01 24 3E 4F 30 41 3E 40 28 00
-B0 12 0E 53 B0 12 42 53 19 42 C6 1D A2 53 C6 1D
+B0 12 A0 50 B0 12 D2 50 19 42 C6 1D A2 53 C6 1D
89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53
-C4 1D B0 12 2A 40 E2 44 0C 46 40 42 8A 53 80 53
-21 53 3E 90 10 00 81 2D DA 2B 8C 53 B2 41 C4 1D
-D6 3F 87 12 A4 47 D6 44 9A 53 0C 43 1B 42 C6 1D
+C4 1D 87 12 50 44 64 45 4C 40 18 51 0E 51 21 53
+3E 90 10 00 84 2D DB 2B 1A 51 B2 41 C4 1D D7 3F
+0D 12 87 12 CE 46 7C 50 2A 51 0C 43 1B 42 C6 1D
A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00 29 20 92 53
-C4 1D B0 12 0E 53 B0 12 42 53 3C 40 00 03 0E 93
+C4 1D B0 12 A0 50 B0 12 D2 50 3C 40 00 03 0E 93
1C 24 3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93
14 24 3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92
0C 24 3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42
C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D
7A 90 26 00 09 20 3C 40 10 02 92 53 C4 1D B0 12
-0E 53 B0 12 42 53 EB 3F 7A 90 40 00 16 20 3C 40
-20 00 92 53 C4 1D B0 12 68 53 0C 20 3C 50 10 00
-3E 40 2B 00 B0 12 68 53 92 92 C0 1D C4 1D 02 24
-92 53 C4 1D 8E 10 0C 5E D8 3F B0 12 68 53 FA 23
-3C 50 10 00 B0 12 4C 53 EF 3F 0C 43 1B 42 C6 1D
-A2 53 C6 1D 87 12 A4 47 D6 44 6C 54 FE 90 26 00
-00 00 3E 40 20 00 03 20 3C 50 82 00 C6 3F B0 12
-68 53 E1 23 3C 50 80 00 B0 12 4C 53 DC 3F D6 42
-04 52 45 54 49 00 87 12 76 44 00 13 12 47 2A 40
-76 44 2C 00 92 53 64 54 AA 54 09 4B 2E 4E 0E DC
-A2 3F A6 4B 03 4D 4F 56 84 12 A0 54 00 40 B4 54
-05 4D 4F 56 2E 42 84 12 A0 54 40 40 00 00 03 41
-44 44 84 12 A0 54 00 50 CE 54 05 41 44 44 2E 42
-84 12 A0 54 40 50 DA 54 04 41 44 44 43 00 84 12
-A0 54 00 60 E8 54 06 41 44 44 43 2E 42 00 84 12
-A0 54 40 60 90 54 04 53 55 42 43 00 84 12 A0 54
-00 70 06 55 06 53 55 42 43 2E 42 00 84 12 A0 54
-40 70 14 55 03 53 55 42 84 12 A0 54 00 80 24 55
-05 53 55 42 2E 42 84 12 A0 54 40 80 88 4B 03 43
-4D 50 84 12 A0 54 00 90 3E 55 05 43 4D 50 2E 42
-84 12 A0 54 40 90 76 4B 04 44 41 44 44 00 84 12
-A0 54 00 A0 58 55 06 44 41 44 44 2E 42 00 84 12
-A0 54 40 A0 4A 55 03 42 49 54 84 12 A0 54 00 B0
-76 55 05 42 49 54 2E 42 84 12 A0 54 40 B0 82 55
-03 42 49 43 84 12 A0 54 00 C0 90 55 05 42 49 43
-2E 42 84 12 A0 54 40 C0 9C 55 03 42 49 53 84 12
-A0 54 00 D0 AA 55 05 42 49 53 2E 42 84 12 A0 54
-40 D0 00 00 03 58 4F 52 84 12 A0 54 00 E0 C4 55
-05 58 4F 52 2E 42 84 12 A0 54 40 E0 F6 54 03 41
-4E 44 84 12 A0 54 00 F0 DE 55 05 41 4E 44 2E 42
-84 12 A0 54 40 F0 A4 47 92 53 FC 55 0A 4C 3C F0
-70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 30 55 03 52
-52 43 84 12 F6 55 00 10 0E 56 05 52 52 43 2E 42
-84 12 F6 55 40 10 1A 56 04 53 57 50 42 00 84 12
-F6 55 80 10 28 56 03 52 52 41 84 12 F6 55 00 11
-36 56 05 52 52 41 2E 42 84 12 F6 55 40 11 42 56
-03 53 58 54 84 12 F6 55 80 11 00 00 04 50 55 53
-48 00 84 12 F6 55 00 12 5C 56 06 50 55 53 48 2E
-42 00 84 12 F6 55 40 12 B6 55 04 43 41 4C 4C 00
-84 12 F6 55 80 12 1A 53 0E 4A 87 12 34 42 80 44
-0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 F2 48
-A4 47 D6 44 A6 56 92 53 C4 1D 3E 40 2C 00 B0 12
-2A 40 E2 44 0C 46 40 42 74 49 5A 54 BE 56 0A 4E
-3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28 08 4C 59 0A
-01 28 0C 8A 08 8A 38 90 10 00 D5 2F 5A 0E 94 3F
-2A 92 D1 2F 8A 10 5A 06 8F 3F 50 56 06 52 52 43
-4D 2E 41 00 84 12 A0 56 40 00 EC 56 04 52 52 43
-4D 00 84 12 A0 56 50 00 FC 56 06 52 52 41 4D 2E
-41 00 84 12 A0 56 40 01 0A 57 04 52 52 41 4D 00
-84 12 A0 56 50 01 1A 57 06 52 4C 41 4D 2E 41 00
-84 12 A0 56 40 02 28 57 04 52 4C 41 4D 00 84 12
-A0 56 50 02 38 57 06 52 52 55 4D 2E 41 00 84 12
-A0 56 40 03 46 57 04 52 52 55 4D 00 84 12 A0 56
-50 03 6A 56 07 50 55 53 48 4D 2E 41 84 12 A0 56
-00 14 64 57 05 50 55 53 48 4D 84 12 A0 56 00 15
-74 57 06 50 4F 50 4D 2E 41 00 84 12 A0 56 00 16
-82 57 04 50 4F 50 4D 00 84 12 A0 56 00 17 56 57
-03 53 3E 3D 85 12 00 38 A0 57 02 53 3C 00 85 12
-00 34 92 57 03 30 3E 3D 85 12 00 30 B4 57 02 30
-3C 00 85 12 00 30 00 00 02 55 3C 00 85 12 00 2C
-C8 57 03 55 3E 3D 85 12 00 28 BE 57 03 30 3C 3E
-85 12 00 24 DC 57 02 30 3D 00 85 12 00 20 00 00
-02 49 46 00 1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D
-0E 4A 30 4D D2 57 04 54 48 45 4E 00 1A 42 C6 1D
-08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90 00 02
-33 2F 88 DA 00 00 30 4D 66 55 04 45 4C 53 45 00
-1A 42 C6 1D BA 40 00 3C 00 00 A2 53 C6 1D 2F 83
-8F 4A 00 00 E3 3F 06 58 05 55 4E 54 49 4C 3A 4F
-08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11 3A 90
-00 FE 12 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53
-C6 1D 30 4D EA 55 05 41 47 41 49 4E 0A 4E 38 40
-00 3C E7 3F 00 00 05 57 48 49 4C 45 87 12 F4 57
-76 40 2A 40 AA 57 06 52 45 50 45 41 54 00 87 12
-7C 58 0C 58 2A 40 A8 58 3D 41 08 4E 3E 4F 2A 48
-B2 92 C4 1D CD 2F 98 42 C6 1D 00 00 30 4D 7A 56
-03 42 57 31 84 12 A6 58 00 00 C0 58 03 42 57 32
-84 12 A6 58 00 00 CC 58 03 42 57 33 84 12 A6 58
-00 00 E4 58 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D
-90 2B BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F
-30 4D 00 00 03 46 57 31 84 12 E2 58 00 00 04 59
-03 46 57 32 84 12 E2 58 00 00 10 59 03 46 57 33
-84 12 E2 58 00 00 00 00 05 3F 47 4F 54 4F 3E 90
-00 30 07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0
-00 08 87 12 66 49 3C 47 2A 40 1C 59 04 47 4F 54
-4F 00 2F 83 8F 4E 00 00 3E 40 00 3C F2 3F 87 12
-A4 47 D6 44 66 59 69 4E 3E 4F 3C 4F 2C 4C 1B 42
-C6 1D A2 53 C6 1D 79 90 52 00 0A 20 B0 12 68 53
-5E 0E 5E 0E 0E DC 8B 4E 00 00 0E 4B 3D 41 30 4D
-79 90 23 00 0D 20 3C C0 40 00 92 53 C4 1D A2 53
-C6 1D B0 12 0E 53 BB 4F 02 00 3E F0 0F 00 E8 3F
-79 90 26 00 03 20 3C E0 E0 00 EF 3F 3C C0 F0 00
-79 90 40 00 12 20 92 53 C4 1D B0 12 68 53 D8 23
-3C D0 10 00 3E 40 2B 00 B0 12 68 53 92 92 C0 1D
-C4 1D CE 27 92 53 C4 1D CB 3F 3C D0 30 00 A2 53
-C6 1D 3E 40 28 00 B0 12 0E 53 BB 4F 02 00 3E 40
-29 00 EA 3F 87 12 A4 47 D6 44 0C 5A 3B 4F 2C 4B
-69 4E 7E 40 20 00 79 90 52 00 03 20 B0 12 68 53
-B1 3F 3C C0 F0 00 A2 53 C6 1D 79 90 26 00 09 20
-3C D0 60 00 92 53 C4 1D B0 12 0E 53 BB 4F 02 00
-A1 3F 3C D0 70 00 3E 40 28 00 B0 12 0E 53 BB 4F
-02 00 3E 40 29 00 E2 3F 76 44 2C 00 5E 59 04 5A
-66 40 2A 40 C0 54 04 4D 4F 56 41 00 84 12 58 5A
-C0 00 D8 58 04 43 4D 50 41 00 84 12 58 5A D0 00
-76 58 04 41 44 44 41 00 84 12 58 5A E0 00 96 58
-04 53 55 42 41 00 84 12 58 5A F0 00 74 5A 05 43
-41 4C 4C 41 87 12 A4 47 D6 44 AC 5A 1B 42 C6 1D
+A0 50 B0 12 D2 50 EB 3F 7A 90 40 00 16 20 3C 40
+20 00 92 53 C4 1D B0 12 F8 50 0C 20 3C 50 10 00
+3E 40 2B 00 B0 12 F8 50 92 92 C0 1D C4 1D 02 24
+92 53 C4 1D 8E 10 0C 5E D8 3F B0 12 F8 50 FA 23
+3C 50 10 00 B0 12 DC 50 EF 3F 0C 43 1B 42 C6 1D
+A2 53 C6 1D 0D 12 87 12 CE 46 7C 50 FE 51 FE 90
+26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C5 3F
+B0 12 F8 50 E0 23 3C 50 80 00 B0 12 DC 50 DB 3F
+00 00 04 52 45 54 49 00 0D 12 87 12 24 40 00 13
+56 46 84 43 24 40 2C 00 20 51 F4 51 3E 52 09 4B
+2E 4E 0E DC A0 3F 9A 4A 03 4D 4F 56 84 12 34 52
+00 40 48 52 05 4D 4F 56 2E 42 84 12 34 52 40 40
+00 00 03 41 44 44 84 12 34 52 00 50 62 52 05 41
+44 44 2E 42 84 12 34 52 40 50 6E 52 04 41 44 44
+43 00 84 12 34 52 00 60 7C 52 06 41 44 44 43 2E
+42 00 84 12 34 52 40 60 22 52 04 53 55 42 43 00
+84 12 34 52 00 70 9A 52 06 53 55 42 43 2E 42 00
+84 12 34 52 40 70 A8 52 03 53 55 42 84 12 34 52
+00 80 B8 52 05 53 55 42 2E 42 84 12 34 52 40 80
+76 4A 03 43 4D 50 84 12 34 52 00 90 D2 52 05 43
+4D 50 2E 42 84 12 34 52 40 90 62 4A 04 44 41 44
+44 00 84 12 34 52 00 A0 EC 52 06 44 41 44 44 2E
+42 00 84 12 34 52 40 A0 DE 52 03 42 49 54 84 12
+34 52 00 B0 0A 53 05 42 49 54 2E 42 84 12 34 52
+40 B0 16 53 03 42 49 43 84 12 34 52 00 C0 24 53
+05 42 49 43 2E 42 84 12 34 52 40 C0 30 53 03 42
+49 53 84 12 34 52 00 D0 3E 53 05 42 49 53 2E 42
+84 12 34 52 40 D0 00 00 03 58 4F 52 84 12 34 52
+00 E0 58 53 05 58 4F 52 2E 42 84 12 34 52 40 E0
+8A 52 03 41 4E 44 84 12 34 52 00 F0 72 53 05 41
+4E 44 2E 42 84 12 34 52 40 F0 CE 46 20 51 90 53
+0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F
+C4 52 03 52 52 43 84 12 8A 53 00 10 A2 53 05 52
+52 43 2E 42 84 12 8A 53 40 10 AE 53 04 53 57 50
+42 00 84 12 8A 53 80 10 BC 53 03 52 52 41 84 12
+8A 53 00 11 CA 53 05 52 52 41 2E 42 84 12 8A 53
+40 11 D6 53 03 53 58 54 84 12 8A 53 80 11 00 00
+04 50 55 53 48 00 84 12 8A 53 00 12 F0 53 06 50
+55 53 48 2E 42 00 84 12 8A 53 40 12 4A 53 04 43
+41 4C 4C 00 84 12 8A 53 80 12 1A 53 0E 4A 0D 12
+87 12 FA 43 2E 40 0D 6F 75 74 20 6F 66 20 62 6F
+75 6E 64 73 1A 48 CE 46 7C 50 3C 54 92 53 C4 1D
+3E 40 2C 00 87 12 50 44 64 45 4C 40 A0 48 EA 51
+52 54 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28
+08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F
+5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F E4 53
+06 52 52 43 4D 2E 41 00 84 12 36 54 40 00 80 54
+04 52 52 43 4D 00 84 12 36 54 50 00 90 54 06 52
+52 41 4D 2E 41 00 84 12 36 54 40 01 9E 54 04 52
+52 41 4D 00 84 12 36 54 50 01 AE 54 06 52 4C 41
+4D 2E 41 00 84 12 36 54 40 02 BC 54 04 52 4C 41
+4D 00 84 12 36 54 50 02 CC 54 06 52 52 55 4D 2E
+41 00 84 12 36 54 40 03 DA 54 04 52 52 55 4D 00
+84 12 36 54 50 03 FE 53 07 50 55 53 48 4D 2E 41
+84 12 36 54 00 14 F8 54 05 50 55 53 48 4D 84 12
+36 54 00 15 08 55 06 50 4F 50 4D 2E 41 00 84 12
+36 54 00 16 16 55 04 50 4F 50 4D 00 84 12 36 54
+00 17 EA 54 03 53 3E 3D 85 12 00 38 34 55 02 53
+3C 00 85 12 00 34 26 55 03 30 3E 3D 85 12 00 30
+48 55 02 30 3C 00 85 12 00 30 00 00 02 55 3C 00
+85 12 00 2C 5C 55 03 55 3E 3D 85 12 00 28 52 55
+03 30 3C 3E 85 12 00 24 70 55 02 30 3D 00 85 12
+00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 0E 4A 30 4D 66 55 04 54 48 45 4E 00
+1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11
+3A 90 00 02 33 2F 88 DA 00 00 30 4D FA 52 04 45
+4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53
+C6 1D 2F 83 8F 4A 00 00 E3 3F 9A 55 05 55 4E 54
+49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89
+0A 11 3A 90 00 FE 12 3B 3A F0 FF 03 08 DA 89 48
+00 00 A2 53 C6 1D 30 4D 7E 53 05 41 47 41 49 4E
+0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45
+0D 12 87 12 88 55 E0 42 84 43 3E 55 06 52 45 50
+45 41 54 00 0D 12 87 12 10 56 A0 55 84 43 40 56
+3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D CB 2F 98 42
+C6 1D 00 00 30 4D 0E 54 03 42 57 31 84 12 3E 56
+00 00 58 56 03 42 57 32 84 12 3E 56 00 00 64 56
+03 42 57 33 84 12 3E 56 00 00 7C 56 3D 41 1A 42
+C6 1D 28 4E B2 92 C4 1D 8E 2B BA 4F 00 00 A2 53
+C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
+84 12 7A 56 00 00 9C 56 03 46 57 32 84 12 7A 56
+00 00 A8 56 03 46 57 33 84 12 7A 56 00 00 00 00
+05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04
+3E B0 00 10 02 24 3E E0 00 08 0D 12 87 12 90 48
+76 46 84 43 B4 56 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C F1 3F 0D 12 87 12 CE 46 7C 50
+02 57 69 4E 3E 4F 3C 4F 2C 4C 1B 42 C6 1D A2 53
+C6 1D 79 90 52 00 0A 20 B0 12 F8 50 5E 0E 5E 0E
+0E DC 8B 4E 00 00 0E 4B 3D 41 30 4D 79 90 23 00
+0D 20 3C C0 40 00 92 53 C4 1D A2 53 C6 1D B0 12
+A0 50 BB 4F 02 00 3E F0 0F 00 E8 3F 79 90 26 00
+03 20 3C E0 E0 00 EF 3F 3C C0 F0 00 79 90 40 00
+12 20 92 53 C4 1D B0 12 F8 50 D8 23 3C D0 10 00
+3E 40 2B 00 B0 12 F8 50 92 92 C0 1D C4 1D CE 27
+92 53 C4 1D CB 3F 3C D0 30 00 A2 53 C6 1D 3E 40
+28 00 B0 12 A0 50 BB 4F 02 00 3E 40 29 00 EA 3F
+0D 12 87 12 CE 46 7C 50 AA 57 3B 4F 2C 4B 69 4E
+7E 40 20 00 79 90 52 00 03 20 B0 12 F8 50 B0 3F
+3C C0 F0 00 A2 53 C6 1D 79 90 26 00 09 20 3C D0
+60 00 92 53 C4 1D B0 12 A0 50 BB 4F 02 00 A0 3F
+3C D0 70 00 3E 40 28 00 B0 12 A0 50 BB 4F 02 00
+3E 40 29 00 E2 3F 24 40 2C 00 F8 56 A0 57 82 42
+84 43 54 52 04 4D 4F 56 41 00 84 12 F6 57 C0 00
+70 56 04 43 4D 50 41 00 84 12 F6 57 D0 00 0A 56
+04 41 44 44 41 00 84 12 F6 57 E0 00 2C 56 04 53
+55 42 41 00 84 12 F6 57 F0 00 12 58 05 43 41 4C
+4C 41 0D 12 87 12 CE 46 7C 50 4C 58 1B 42 C6 1D
A2 53 C6 1D 6E 4E 3C 40 34 01 7E 90 52 00 0B 20
-7E 40 20 00 B0 12 68 53 5C 0E 0C DE 8B 4C 00 00
+7E 40 20 00 B0 12 F8 50 5C 0E 0C DE 8B 4C 00 00
3E 4F 3D 41 30 4D 2C 53 7E 90 40 00 0B 20 92 53
-C4 1D 7E 40 20 00 B0 12 68 53 EE 23 1C 53 3E 40
+C4 1D 7E 40 20 00 B0 12 F8 50 EE 23 1C 53 3E 40
2B 00 E8 3F A2 53 C6 1D 7E 90 23 00 09 20 3C 40
-3B 01 92 53 C4 1D B0 12 0E 53 BB 4F 02 00 DC 3F
+3B 01 92 53 C4 1D B0 12 A0 50 BB 4F 02 00 DC 3F
7E 90 26 00 02 20 2C 53 F4 3F 7E 40 28 00 1C 83
-B0 12 0E 53 BB 4F 02 00 3E 40 29 00 CB 3F 87 12
-A4 47 D6 44 36 5B 69 4E 3E 4F 3C 40 00 18 79 90
-52 00 05 20 B0 12 68 53 0E 4C 3D 41 30 4D 82 43
-C2 5F 79 90 23 00 0B 20 92 53 C4 1D B0 12 0E 53
-2F 53 3E F0 0F 00 5E 0A 5E 0E 0C DE ED 3F 79 90
-26 00 F2 27 79 90 40 00 12 20 92 53 C4 1D B0 12
-68 53 E2 23 3E 40 2B 00 92 53 C4 1D B0 12 68 53
-92 92 C0 1D C4 1D D8 27 92 53 C4 1D D5 3F 3E 40
-28 00 B0 12 0E 53 8F 4E 00 00 3E 40 29 00 B0 12
-68 53 3E 4F 3E F0 0F 00 0C DE EA 3F 87 12 A4 47
-D6 44 C4 5B 3C 4F 69 4E 3E 40 20 00 79 90 52 00
-BB 27 82 43 C2 5F 79 90 26 00 08 20 92 53 C4 1D
-B0 12 0E 53 2F 53 3E F0 0F 00 BF 3F 3E 40 28 00
-B0 12 0E 53 F7 3F 1B 42 C6 1D A2 53 C6 1D 0C 4E
-3E 4F 1C D2 C2 5F 82 43 C2 5F 3C DE 8B 4C 00 00
-B2 41 C4 1D 30 4D 76 44 C4 1D EA 40 86 40 76 44
-2C 00 2E 5B BC 5B F6 5B 3C 42 A0 54 66 5A 04 4D
-4F 56 58 00 84 12 16 5C 40 00 00 40 2E 5C 06 4D
-4F 56 58 2E 41 00 84 12 16 5C 00 00 40 40 3E 5C
-06 4D 4F 56 58 2E 42 00 84 12 16 5C 40 00 40 40
-82 5A 04 41 44 44 58 00 84 12 16 5C 40 00 00 50
-62 5C 06 41 44 44 58 2E 41 00 84 12 16 5C 00 00
-40 50 72 5C 06 41 44 44 58 2E 42 00 84 12 16 5C
-40 00 40 50 84 5C 05 41 44 44 43 58 84 12 16 5C
-40 00 00 60 96 5C 07 41 44 44 43 58 2E 41 84 12
-16 5C 00 00 40 60 A6 5C 07 41 44 44 43 58 2E 42
-84 12 16 5C 40 00 40 60 90 5A 05 53 55 42 43 58
-84 12 16 5C 40 00 00 70 CA 5C 07 53 55 42 43 58
-2E 41 84 12 16 5C 00 00 40 70 DA 5C 07 53 55 42
-43 58 2E 42 84 12 16 5C 40 00 40 70 EC 5C 04 53
-55 42 58 00 84 12 16 5C 40 00 00 80 FE 5C 06 53
-55 42 58 2E 41 00 84 12 16 5C 00 00 40 80 0E 5D
-06 53 55 42 58 2E 42 00 84 12 16 5C 40 00 40 80
-9E 5A 04 43 4D 50 58 00 84 12 16 5C 40 00 00 90
-32 5D 06 43 4D 50 58 2E 41 00 84 12 16 5C 00 00
-40 90 42 5D 06 43 4D 50 58 2E 42 00 84 12 16 5C
-40 00 40 90 2A 58 05 44 41 44 44 58 84 12 16 5C
-40 00 00 A0 66 5D 07 44 41 44 44 58 2E 41 84 12
-16 5C 00 00 40 A0 76 5D 07 44 41 44 44 58 2E 42
-84 12 16 5C 40 00 40 A0 54 5D 04 42 49 54 58 00
-84 12 16 5C 40 00 00 B0 9A 5D 06 42 49 54 58 2E
-41 00 84 12 16 5C 00 00 40 B0 AA 5D 06 42 49 54
-58 2E 42 00 84 12 16 5C 40 00 40 B0 BC 5D 04 42
-49 43 58 00 84 12 16 5C 40 00 00 C0 CE 5D 06 42
-49 43 58 2E 41 00 84 12 16 5C 00 00 40 C0 DE 5D
-06 42 49 43 58 2E 42 00 84 12 16 5C 40 00 40 C0
-F0 5D 04 42 49 53 58 00 84 12 16 5C 40 00 00 D0
-02 5E 06 42 49 53 58 2E 41 00 84 12 16 5C 00 00
-40 D0 12 5E 06 42 49 53 58 2E 42 00 84 12 16 5C
-40 00 40 D0 D0 55 04 58 4F 52 58 00 84 12 16 5C
-40 00 00 E0 36 5E 06 58 4F 52 58 2E 41 00 84 12
-16 5C 00 00 40 E0 46 5E 06 58 4F 52 58 2E 42 00
-84 12 16 5C 40 00 40 E0 B8 5C 04 41 4E 44 58 00
-84 12 16 5C 40 00 00 F0 6A 5E 06 41 4E 44 58 2E
-41 00 84 12 16 5C 00 00 40 F0 7A 5E 06 41 4E 44
-58 2E 42 00 84 12 16 5C 40 00 40 F0 76 44 C4 1D
-EA 40 86 40 A4 47 2E 5B F6 5B 3C 42 F6 55 20 5D
-04 52 52 43 58 00 84 12 9C 5E 40 00 00 10 B0 5E
-06 52 52 43 58 2E 41 00 84 12 9C 5E 00 00 40 10
-C0 5E 06 52 52 43 58 2E 42 00 84 12 9C 5E 40 00
-40 10 D2 5E 04 52 52 55 58 00 84 12 9C 5E 40 01
-00 10 E4 5E 06 52 52 55 58 2E 41 00 84 12 9C 5E
-00 01 40 10 F4 5E 06 52 52 55 58 2E 42 00 84 12
-9C 5E 40 01 40 10 06 5F 05 53 57 50 42 58 84 12
-9C 5E 40 00 80 10 18 5F 07 53 57 50 42 58 2E 41
-84 12 9C 5E 00 00 80 10 28 5F 04 52 52 41 58 00
-84 12 9C 5E 40 00 00 11 3A 5F 06 52 52 41 58 2E
-41 00 84 12 9C 5E 00 00 40 11 4A 5F 06 52 52 41
-58 2E 42 00 84 12 9C 5E 40 00 40 11 5C 5F 04 53
-58 54 58 00 84 12 9C 5E 40 00 80 11 6E 5F 06 53
-58 54 58 2E 41 00 84 12 9C 5E 00 00 80 11 E6 57
-05 50 55 53 48 58 84 12 9C 5E 40 00 00 12 90 5F
-07 50 55 53 48 58 2E 41 84 12 9C 5E 00 00 40 12
-A0 5F 07 50 55 53 48 58 2E 42 84 12 9C 5E 40 00
-40 12 00 00 7E 5F 03 52 50 54 87 12 A4 47 D6 44
-D2 5F 29 4E 7E 40 20 00 79 90 52 00 06 20 B0 12
-68 53 03 24 3E D0 80 00 05 3C B0 12 0E 53 1E 83
-3E F0 0F 00 82 4E C2 5F 3E 4F 3D 41 30 4D 1A 43
-25 3C D2 C3 23 02 E2 B2 60 02 02 24 30 40 E8 50
-1A 52 04 20 19 62 06 20 92 43 14 20 A2 93 02 20
-07 24 0A 5A 49 69 82 4A 16 20 C2 49 18 20 0A 3C
-C2 4A 15 20 8A 10 C2 4A 16 20 C2 49 17 20 89 10
-C2 49 18 20 B0 12 86 60 5A 53 FC 23 39 40 05 00
-D2 49 14 20 4E 06 82 93 46 06 05 24 92 B3 6C 06
-FD 27 C2 93 4C 06 59 83 F3 2F 19 83 0B 30 F2 43
-4E 06 82 93 46 06 03 24 92 B3 6C 06 FD 27 5A 92
-4C 06 F3 23 30 41 19 43 3A 43 8A 10 C2 4A 4E 06
-82 93 46 06 05 24 92 B3 6C 06 FD 27 C2 93 4C 06
-19 83 F3 23 5A 42 4C 06 30 41 1A 52 08 20 09 43
-1C D3 F2 40 51 00 19 20 B0 12 02 60 33 20 B0 12
-86 60 6A 53 04 24 FB 23 D9 42 4C 06 FF 1D F2 43
-4E 06 03 43 19 53 39 90 01 02 F6 23 F2 43 4E 06
-3C C0 03 00 D2 D3 23 02 30 41 09 43 2C D3 F0 40
-58 00 27 BF B0 12 02 60 15 20 3A 40 FE FF 29 43
-B0 12 8A 60 D2 49 00 1E 4E 06 03 43 19 53 39 90
-00 02 F8 23 39 40 03 00 B0 12 88 60 7A C0 E1 00
-6A 92 DE 27 8C 10 1C 52 4C 06 D2 D3 23 02 87 12
-80 44 0B 3C 20 53 44 20 45 72 72 6F 72 21 40 61
-2F 83 8F 4E 00 00 B2 40 10 00 DC 1D 0E 4C B0 12
-2A 40 24 42 F2 48 92 4B 0E 00 22 20 92 4B 10 00
-24 20 5A 42 23 20 58 42 22 20 92 93 02 20 08 24
-59 42 24 20 89 10 0A 59 88 10 08 58 0A 6A 88 10
-08 58 30 41 82 43 1C 20 92 42 0E 20 1A 20 C2 93
-24 20 03 20 92 93 22 20 14 24 92 42 22 20 D0 04
-92 42 24 20 D2 04 92 42 12 20 C8 04 92 42 E4 04
-1A 20 92 42 E6 04 1C 20 92 52 10 20 1A 20 82 63
-1C 20 30 41 92 4B 0E 00 22 20 92 4B 10 00 24 20
-B0 12 84 61 5A 4B 03 00 82 5A 1A 20 82 63 1C 20
-30 41 09 93 07 24 F8 90 20 00 00 1E 03 20 18 53
-19 83 F9 23 30 41 1B 42 32 20 82 43 1E 20 B2 90
-00 02 20 20 A8 20 BB 80 00 02 12 00 8B 73 14 00
-DB 53 03 00 DB 92 12 20 03 00 11 28 CB 43 03 00
-B0 12 56 61 B0 12 AA 60 8B 43 10 00 9B 48 00 1E
-0E 00 92 93 02 20 03 24 9B 48 02 1E 10 00 B2 40
-00 02 20 20 8B 93 14 00 0B 20 92 9B 12 00 1E 20
-82 2C BB 90 00 02 12 00 03 2C 92 4B 12 00 20 20
-B0 12 C4 61 1A 42 1A 20 19 42 1C 20 21 3F 3C 42
-3B 40 38 20 09 43 CB 93 02 00 10 24 9B 92 24 20
-0C 00 04 20 9B 92 22 20 0A 00 07 24 09 4B 3B 50
-1C 00 3B 90 18 21 EF 23 0C 5C 30 41 0C 43 82 4B
-32 20 8B 49 00 00 09 93 0A 24 99 52 C4 1D 16 00
-4A 93 05 34 C9 93 02 00 02 34 5A 59 02 00 CB 4A
-02 00 CB 43 03 00 9B 42 1A 20 04 00 9B 42 1C 20
-06 00 18 42 30 20 8B 48 08 00 9B 48 1A 1E 0A 00
-9B 48 14 1E 0C 00 9B 48 1A 1E 0E 00 9B 48 14 1E
-10 00 9B 48 1C 1E 12 00 9B 48 1E 1E 14 00 82 43
-1E 20 6A 93 5F 27 C9 37 8B 43 16 00 7A 93 02 24
-07 38 95 3F B2 40 1C 21 EC 43 B2 40 EA 42 50 43
-9B 42 C0 1D 18 00 9B 82 C4 1D 18 00 9B 42 C2 1D
-1A 00 9B 52 C4 1D 1A 00 82 3F CB 43 02 00 2B 4B
-82 4B 32 20 0B 93 06 24 92 4B 16 00 1E 20 B0 12
-3E 62 22 C3 30 41 1B 42 32 20 0B 93 FB 27 EB 93
-02 00 04 20 B0 12 AC 67 B0 12 74 67 CB 93 02 00
-E4 37 1E 4B 18 00 9F 4B 1A 00 00 00 31 50 06 00
-3D 41 B0 12 3A 63 02 24 30 40 24 44 B2 40 3C 1D
-EC 43 B2 40 52 43 50 43 30 40 0E 44 9E 4E 85 52
-45 41 44 22 5A 43 19 3C 40 4F 86 57 52 49 54 45
-22 00 6A 43 12 3C 06 4E 84 44 45 4C 22 00 6A 42
-0C 3C CE 51 05 43 4C 4F 53 45 B0 12 56 63 30 4D
-E2 52 85 4C 4F 41 44 22 7A 43 2F 83 8F 4E 00 00
-0E 4A 82 93 BE 1D 0A 24 87 12 76 44 76 44 12 47
-12 47 9A 44 76 44 0A 64 12 47 2A 40 87 12 76 44
-22 00 E2 44 86 47 08 64 3D 41 35 4F 0E 55 82 4E
-36 20 1C 43 92 42 2C 20 22 20 92 42 2E 20 24 20
-0E 95 8D 24 F5 90 3A 00 01 00 01 20 25 53 F5 90
-5C 00 00 00 08 20 15 53 92 42 02 20 22 20 82 43
-24 20 0E 95 70 24 82 45 34 20 B0 12 84 61 34 40
-20 00 A2 93 02 20 04 24 92 92 22 20 02 20 02 24
-14 42 12 20 B0 12 64 62 2C 43 0A 43 08 4A 58 0E
-08 58 82 48 30 20 C8 93 00 1E 61 24 39 42 F8 95
-00 1E 04 20 18 53 19 83 FA 23 15 53 F5 90 2E 00
-FF FF 19 24 39 50 03 00 B0 12 E2 61 06 20 F5 90
-5C 00 FF FF 29 24 0E 95 27 28 15 42 34 20 1A 53
-3A 90 10 00 DB 23 92 53 1A 20 82 63 1C 20 14 83
-D1 23 2C 42 3C 3C F5 90 2E 00 FE FF EE 27 B0 12
-E2 61 EB 23 39 40 03 00 F8 95 00 1E 04 20 18 53
-19 83 FA 23 09 3C 0E 95 E0 2F F5 90 5C 00 FF FF
-DC 23 B0 12 E2 61 D9 23 18 42 30 20 92 48 1A 1E
-22 20 92 48 14 1E 24 20 F8 B0 10 00 0B 1E 14 24
-82 93 24 20 06 20 82 93 22 20 03 20 92 42 02 20
-22 20 0E 95 8E 2F 92 42 22 20 2C 20 92 42 24 20
-2E 20 8F 43 00 00 03 3C 2A 4F B0 12 6E 62 34 40
-00 40 35 40 0E 40 3A 4F 3E 4F 0A 93 04 24 7A 93
-0D 20 0C 93 01 20 30 4D 87 12 80 44 0B 3C 20 4F
-70 65 6E 45 72 72 6F 72 3C 42 3E 61 1A 93 B6 20
-0C 93 F2 23 30 4D 9E 63 04 52 45 41 44 00 2F 83
-8F 4E 00 00 1E 42 32 20 B0 12 F6 61 1E 82 32 20
-30 4D 2C 43 12 12 2A 20 18 42 02 20 08 58 2A 41
-82 9A 0A 20 A1 24 B0 12 AA 60 09 43 28 93 03 24
-89 93 02 1E 03 20 89 93 00 1E 07 24 09 58 39 90
-00 02 F4 23 91 53 00 00 EA 3F 0C 43 6A 41 B9 43
-00 1E 28 93 0F 24 B9 40 FF 0F 02 1E 09 11 8A 10
-09 5A 5A 41 01 00 0A 11 09 10 82 4A 28 20 82 49
-26 20 07 3C 09 11 C2 49 26 20 C2 4A 27 20 82 43
-28 20 3A 41 82 4A 2A 20 30 41 0A 12 1A 52 08 20
-B0 12 EA 60 3A 41 1A 52 0C 20 30 40 EA 60 F2 B0
-40 00 A2 04 29 20 F2 B0 10 00 A2 04 FC 27 5A 42
-B0 04 4A 11 59 42 B4 04 F2 40 20 00 C0 04 D2 42
-B1 04 C8 04 1A 52 E4 04 D2 42 B5 04 C8 04 19 52
-E4 04 D2 42 B2 04 C0 04 B2 40 00 08 C8 04 1A 52
-E4 04 92 42 B6 04 C0 04 B2 80 BC 07 C0 04 B2 40
-00 02 C8 04 19 52 E4 04 30 41 22 2A 2B 2C 2F 3A
-3B 3C 3D 3E 3F 5B 5C 5D 7C 2E 29 92 06 38 39 80
-03 00 B0 12 CA 66 39 40 03 00 7A 4B C8 4A 00 1E
-82 9B 36 20 12 28 0D 12 3D 40 0F 00 3C 40 7A 66
-7A 9C F3 27 1D 83 FC 23 3D 41 6A 9C E6 27 3A 80
-21 00 EB 3B 18 53 19 83 E8 23 09 93 06 24 F8 40
-20 00 00 1E 18 53 19 83 FA 23 30 41 2A 93 D8 20
-2C 93 0D 24 0C 93 A7 24 87 12 80 44 0C 3C 20 57
-72 69 74 65 45 72 72 6F 72 00 3C 42 3E 61 B0 12
-92 65 92 42 26 20 22 20 92 42 28 20 24 20 B0 12
-0A 66 B0 12 64 62 18 42 30 20 F8 40 20 00 0B 1E
-B0 12 1E 66 88 43 0C 1E 88 4A 0E 1E 88 49 10 1E
-88 49 12 1E 98 42 24 20 14 1E 98 42 22 20 1A 1E
-88 43 1C 1E 88 43 1E 1E 1C 43 1B 42 34 20 82 9B
-36 20 CA 27 FB 90 2E 00 00 00 C6 27 39 40 0B 00
-B0 12 9A 66 B0 12 B6 67 2A 43 B0 12 6E 62 0C 93
-BB 23 30 4D 1A 4B 04 00 19 4B 06 00 B0 12 B0 60
-B0 12 1E 66 18 4B 08 00 88 49 12 1E 88 4A 16 1E
-88 49 18 1E 98 4B 12 00 1C 1E 98 4B 14 00 1E 1E
-1A 4B 04 00 19 4B 06 00 30 40 EC 60 9B 52 1E 20
-12 00 8B 63 14 00 1A 42 1A 20 19 42 1C 20 30 40
-EC 60 B2 40 00 02 1E 20 1B 42 32 20 B0 12 AC 67
-82 43 1E 20 DB 53 03 00 DB 92 12 20 03 00 22 20
-CB 43 03 00 B0 12 56 61 08 12 0A 12 B0 12 92 65
-2A 91 05 24 B0 12 0A 66 2A 41 B0 12 AA 60 3A 41
-38 41 98 42 26 20 00 1E 92 93 02 20 03 24 98 42
-28 20 02 1E B0 12 0A 66 9B 42 26 20 0E 00 9B 42
-28 20 10 00 30 40 C4 61 AA 63 05 57 52 49 54 45
-B0 12 C2 67 30 4D 58 4B 13 00 59 4B 14 00 89 10
-09 58 58 4B 15 00 5B 42 12 20 0A 43 3C 42 08 11
-09 10 4A 10 1C 83 0B 11 FA 2B 0A 11 1C 83 FD 37
-1B 42 32 20 19 5B 0A 00 18 6B 0C 00 8B 49 0E 00
-8B 48 10 00 CB 4A 03 00 1A 4B 12 00 BB C0 FF 01
-12 00 3A F0 FF 01 82 4A 1E 20 B0 12 60 62 30 4D
-0C 93 38 20 38 90 E0 01 03 2C C8 93 20 1E 02 24
-7C 40 E5 00 C8 4C 00 1E B0 12 B6 67 B0 12 62 61
-82 4A 2A 20 0B 4A B0 12 AA 60 1A 48 00 1E 88 43
-00 1E 92 93 02 20 09 24 19 48 02 1E 88 43 02 1E
-39 F0 FF 0F 39 90 FF 0F 02 20 3A 93 0E 24 82 4A
-22 20 82 49 24 20 B0 12 62 61 0B 9A E6 27 0A 12
-0A 4B B0 12 0A 66 3A 41 DD 3F 0A 4B B0 12 0A 66
-B0 12 56 63 30 4D 38 4C 08 54 45 52 4D 32 53 44
-22 00 87 12 BE 63 76 44 02 00 02 47 86 47 0A 64
-22 69 3D 41 92 C3 DC 05 08 43 B0 12 B6 42 92 B3
-DC 05 FD 27 59 42 CC 05 69 92 0D 24 C8 49 00 1E
-18 53 38 90 FF 01 F3 2B 03 24 B0 12 C2 67 EC 3F
-B0 12 C8 42 EC 3F B0 12 C8 42 82 48 1E 20 B0 12
-56 63 30 4D
+B0 12 A0 50 BB 4F 02 00 3E 40 29 00 CB 3F 0D 12
+87 12 CE 46 7C 50 D8 58 69 4E 3E 4F 3C 40 00 18
+79 90 52 00 05 20 B0 12 F8 50 0E 4C 3D 41 30 4D
+82 43 62 5D 79 90 23 00 0B 20 92 53 C4 1D B0 12
+A0 50 2F 53 3E F0 0F 00 5E 0A 5E 0E 0C DE ED 3F
+79 90 26 00 F2 27 79 90 40 00 12 20 92 53 C4 1D
+B0 12 F8 50 E2 23 3E 40 2B 00 92 53 C4 1D B0 12
+F8 50 92 92 C0 1D C4 1D D8 27 92 53 C4 1D D5 3F
+3E 40 28 00 B0 12 A0 50 8F 4E 00 00 3E 40 29 00
+B0 12 F8 50 3E 4F 3E F0 0F 00 0C DE EA 3F 0D 12
+87 12 CE 46 7C 50 68 59 3C 4F 69 4E 3E 40 20 00
+79 90 52 00 BA 27 82 43 62 5D 79 90 26 00 08 20
+92 53 C4 1D B0 12 A0 50 2F 53 3E F0 0F 00 BE 3F
+3E 40 28 00 B0 12 A0 50 F7 3F B2 4F C4 1D 1B 42
+C6 1D A2 53 C6 1D 0C 4E 3E 4F 1C D2 62 5D 82 43
+62 5D 3C DE 8B 4C 00 00 30 4D 24 40 C4 1D 02 41
+24 40 2C 00 CE 58 5E 59 9A 59 48 40 34 52 04 58
+04 4D 4F 56 58 00 84 12 BA 59 40 00 00 40 D0 59
+06 4D 4F 56 58 2E 41 00 84 12 BA 59 00 00 40 40
+E0 59 06 4D 4F 56 58 2E 42 00 84 12 BA 59 40 00
+40 40 20 58 04 41 44 44 58 00 84 12 BA 59 40 00
+00 50 04 5A 06 41 44 44 58 2E 41 00 84 12 BA 59
+00 00 40 50 14 5A 06 41 44 44 58 2E 42 00 84 12
+BA 59 40 00 40 50 26 5A 05 41 44 44 43 58 84 12
+BA 59 40 00 00 60 38 5A 07 41 44 44 43 58 2E 41
+84 12 BA 59 00 00 40 60 48 5A 07 41 44 44 43 58
+2E 42 84 12 BA 59 40 00 40 60 2E 58 05 53 55 42
+43 58 84 12 BA 59 40 00 00 70 6C 5A 07 53 55 42
+43 58 2E 41 84 12 BA 59 00 00 40 70 7C 5A 07 53
+55 42 43 58 2E 42 84 12 BA 59 40 00 40 70 8E 5A
+04 53 55 42 58 00 84 12 BA 59 40 00 00 80 A0 5A
+06 53 55 42 58 2E 41 00 84 12 BA 59 00 00 40 80
+B0 5A 06 53 55 42 58 2E 42 00 84 12 BA 59 40 00
+40 80 3C 58 04 43 4D 50 58 00 84 12 BA 59 40 00
+00 90 D4 5A 06 43 4D 50 58 2E 41 00 84 12 BA 59
+00 00 40 90 E4 5A 06 43 4D 50 58 2E 42 00 84 12
+BA 59 40 00 40 90 BE 55 05 44 41 44 44 58 84 12
+BA 59 40 00 00 A0 08 5B 07 44 41 44 44 58 2E 41
+84 12 BA 59 00 00 40 A0 18 5B 07 44 41 44 44 58
+2E 42 84 12 BA 59 40 00 40 A0 F6 5A 04 42 49 54
+58 00 84 12 BA 59 40 00 00 B0 3C 5B 06 42 49 54
+58 2E 41 00 84 12 BA 59 00 00 40 B0 4C 5B 06 42
+49 54 58 2E 42 00 84 12 BA 59 40 00 40 B0 5E 5B
+04 42 49 43 58 00 84 12 BA 59 40 00 00 C0 70 5B
+06 42 49 43 58 2E 41 00 84 12 BA 59 00 00 40 C0
+80 5B 06 42 49 43 58 2E 42 00 84 12 BA 59 40 00
+40 C0 92 5B 04 42 49 53 58 00 84 12 BA 59 40 00
+00 D0 A4 5B 06 42 49 53 58 2E 41 00 84 12 BA 59
+00 00 40 D0 B4 5B 06 42 49 53 58 2E 42 00 84 12
+BA 59 40 00 40 D0 64 53 04 58 4F 52 58 00 84 12
+BA 59 40 00 00 E0 D8 5B 06 58 4F 52 58 2E 41 00
+84 12 BA 59 00 00 40 E0 E8 5B 06 58 4F 52 58 2E
+42 00 84 12 BA 59 40 00 40 E0 5A 5A 04 41 4E 44
+58 00 84 12 BA 59 40 00 00 F0 0C 5C 06 41 4E 44
+58 2E 41 00 84 12 BA 59 00 00 40 F0 1C 5C 06 41
+4E 44 58 2E 42 00 84 12 BA 59 40 00 40 F0 24 40
+C4 1D 02 41 CE 46 CE 58 9A 59 48 40 8A 53 C2 5A
+04 52 52 43 58 00 84 12 3E 5C 40 00 00 10 50 5C
+06 52 52 43 58 2E 41 00 84 12 3E 5C 00 00 40 10
+60 5C 06 52 52 43 58 2E 42 00 84 12 3E 5C 40 00
+40 10 72 5C 04 52 52 55 58 00 84 12 3E 5C 40 01
+00 10 84 5C 06 52 52 55 58 2E 41 00 84 12 3E 5C
+00 01 40 10 94 5C 06 52 52 55 58 2E 42 00 84 12
+3E 5C 40 01 40 10 A6 5C 05 53 57 50 42 58 84 12
+3E 5C 40 00 80 10 B8 5C 07 53 57 50 42 58 2E 41
+84 12 3E 5C 00 00 80 10 C8 5C 04 52 52 41 58 00
+84 12 3E 5C 40 00 00 11 DA 5C 06 52 52 41 58 2E
+41 00 84 12 3E 5C 00 00 40 11 EA 5C 06 52 52 41
+58 2E 42 00 84 12 3E 5C 40 00 40 11 FC 5C 04 53
+58 54 58 00 84 12 3E 5C 40 00 80 11 0E 5D 06 53
+58 54 58 2E 41 00 84 12 3E 5C 00 00 80 11 7A 55
+05 50 55 53 48 58 84 12 3E 5C 40 00 00 12 30 5D
+07 50 55 53 48 58 2E 41 84 12 3E 5C 00 00 40 12
+40 5D 07 50 55 53 48 58 2E 42 84 12 3E 5C 40 00
+40 12 00 00 1E 5D 03 52 50 54 0D 12 87 12 CE 46
+7C 50 74 5D 29 4E 7E 40 20 00 79 90 52 00 06 20
+B0 12 F8 50 03 24 3E D0 80 00 05 3C B0 12 A0 50
+1E 83 3E F0 0F 00 82 4E 62 5D 3E 4F 3D 41 30 4D
+1A 43 25 3C D2 C3 23 02 E2 B2 60 02 02 24 30 40
+B6 4E 1A 52 04 20 19 62 06 20 92 43 14 20 A2 93
+02 20 07 24 0A 5A 49 69 82 4A 16 20 C2 49 18 20
+0A 3C C2 4A 15 20 8A 10 C2 4A 16 20 C2 49 17 20
+89 10 C2 49 18 20 B0 12 28 5E 5A 53 FC 23 39 40
+05 00 D2 49 14 20 4E 06 82 93 46 06 05 24 92 B3
+6C 06 FD 27 C2 93 4C 06 59 83 F3 2F 19 83 0B 30
+F2 43 4E 06 82 93 46 06 03 24 92 B3 6C 06 FD 27
+5A 92 4C 06 F3 23 30 41 19 43 3A 43 8A 10 C2 4A
+4E 06 82 93 46 06 05 24 92 B3 6C 06 FD 27 C2 93
+4C 06 19 83 F3 23 5A 42 4C 06 30 41 1A 52 08 20
+09 43 1C D3 F2 40 51 00 19 20 B0 12 A4 5D 33 20
+B0 12 28 5E 6A 53 04 24 FB 23 D9 42 4C 06 FF 1D
+F2 43 4E 06 03 43 19 53 39 90 01 02 F6 23 F2 43
+4E 06 3C C0 03 00 D2 D3 23 02 30 41 09 43 2C D3
+F0 40 58 00 85 C1 B0 12 A4 5D 15 20 3A 40 FE FF
+29 43 B0 12 2C 5E D2 49 00 1E 4E 06 03 43 19 53
+39 90 00 02 F8 23 39 40 03 00 B0 12 2A 5E 7A C0
+E1 00 6A 92 DE 27 8C 10 1C 52 4C 06 D2 D3 23 02
+0D 12 87 12 2E 40 0B 3C 20 53 44 20 45 72 72 6F
+72 21 E4 5E 2F 83 8F 4E 00 00 B2 40 10 00 DC 1D
+0E 4C 87 12 C4 43 1A 48 92 4B 0E 00 22 20 92 4B
+10 00 24 20 5A 42 23 20 58 42 22 20 92 93 02 20
+08 24 59 42 24 20 89 10 0A 59 88 10 08 58 0A 6A
+88 10 08 58 30 41 82 43 1C 20 92 42 0E 20 1A 20
+C2 93 24 20 03 20 92 93 22 20 14 24 92 42 22 20
+D0 04 92 42 24 20 D2 04 92 42 12 20 C8 04 92 42
+E4 04 1A 20 92 42 E6 04 1C 20 92 52 10 20 1A 20
+82 63 1C 20 30 41 92 4B 0E 00 22 20 92 4B 10 00
+24 20 B0 12 26 5F 5A 4B 03 00 82 5A 1A 20 82 63
+1C 20 30 41 09 93 07 24 F8 90 20 00 00 1E 03 20
+18 53 19 83 F9 23 30 41 1B 42 32 20 82 43 1E 20
+B2 90 00 02 20 20 A8 20 BB 80 00 02 12 00 8B 73
+14 00 DB 53 03 00 DB 92 12 20 03 00 11 28 CB 43
+03 00 B0 12 F8 5E B0 12 4C 5E 8B 43 10 00 9B 48
+00 1E 0E 00 92 93 02 20 03 24 9B 48 02 1E 10 00
+B2 40 00 02 20 20 8B 93 14 00 0B 20 92 9B 12 00
+1E 20 82 2C BB 90 00 02 12 00 03 2C 92 4B 12 00
+20 20 B0 12 66 5F 1A 42 1A 20 19 42 1C 20 21 3F
+3C 42 3B 40 38 20 09 43 CB 93 02 00 10 24 9B 92
+24 20 0C 00 04 20 9B 92 22 20 0A 00 07 24 09 4B
+3B 50 1C 00 3B 90 18 21 EF 23 0C 5C 30 41 0C 43
+82 4B 32 20 8B 49 00 00 09 93 0A 24 99 52 C4 1D
+16 00 4A 93 05 34 C9 93 02 00 02 34 5A 59 02 00
+CB 4A 02 00 CB 43 03 00 9B 42 1A 20 04 00 9B 42
+1C 20 06 00 18 42 30 20 8B 48 08 00 9B 48 1A 1E
+0A 00 9B 48 14 1E 0C 00 9B 48 1A 1E 0E 00 9B 48
+14 1E 10 00 9B 48 1C 1E 12 00 9B 48 1E 1E 14 00
+82 43 1E 20 6A 93 5F 27 C9 37 8B 43 16 00 7A 93
+02 24 07 38 95 3F B2 40 1C 21 E2 40 B2 40 2A 41
+90 41 9B 42 C0 1D 18 00 9B 82 C4 1D 18 00 9B 42
+C2 1D 1A 00 9B 52 C4 1D 1A 00 82 3F CB 43 02 00
+2B 4B 82 4B 32 20 0B 93 06 24 92 4B 16 00 1E 20
+B0 12 E0 5F 22 C3 30 41 1B 42 32 20 0B 93 FB 27
+EB 93 02 00 04 20 B0 12 56 65 B0 12 1E 65 CB 93
+02 00 E4 37 1E 4B 18 00 9F 4B 1A 00 00 00 31 50
+06 00 3D 41 B0 12 DC 60 02 24 30 40 4A 42 B2 40
+3C 1D E2 40 B2 40 92 41 90 41 30 40 34 42 68 4C
+85 52 45 41 44 22 5A 43 19 3C 0A 4D 86 57 52 49
+54 45 22 00 6A 43 12 3C D0 4B 84 44 45 4C 22 00
+6A 42 0C 3C B0 4E 05 43 4C 4F 53 45 B0 12 F8 60
+30 4D 7E 46 85 4C 4F 41 44 22 7A 43 2F 83 8F 4E
+00 00 0E 4A 82 93 BE 1D 0B 24 0D 12 87 12 24 40
+24 40 56 46 56 46 08 44 24 40 B0 61 56 46 84 43
+0D 12 87 12 24 40 22 00 50 44 C0 46 AE 61 3D 41
+35 4F 0E 55 82 4E 36 20 1C 43 92 42 2C 20 22 20
+92 42 2E 20 24 20 0E 95 8D 24 F5 90 3A 00 01 00
+01 20 25 53 F5 90 5C 00 00 00 08 20 15 53 92 42
+02 20 22 20 82 43 24 20 0E 95 70 24 82 45 34 20
+B0 12 26 5F 34 40 20 00 A2 93 02 20 04 24 92 92
+22 20 02 20 02 24 14 42 12 20 B0 12 06 60 2C 43
+0A 43 08 4A 58 0E 08 58 82 48 30 20 C8 93 00 1E
+61 24 39 42 F8 95 00 1E 04 20 18 53 19 83 FA 23
+15 53 F5 90 2E 00 FF FF 19 24 39 50 03 00 B0 12
+84 5F 06 20 F5 90 5C 00 FF FF 29 24 0E 95 27 28
+15 42 34 20 1A 53 3A 90 10 00 DB 23 92 53 1A 20
+82 63 1C 20 14 83 D1 23 2C 42 3C 3C F5 90 2E 00
+FE FF EE 27 B0 12 84 5F EB 23 39 40 03 00 F8 95
+00 1E 04 20 18 53 19 83 FA 23 09 3C 0E 95 E0 2F
+F5 90 5C 00 FF FF DC 23 B0 12 84 5F D9 23 18 42
+30 20 92 48 1A 1E 22 20 92 48 14 1E 24 20 F8 B0
+10 00 0B 1E 14 24 82 93 24 20 06 20 82 93 22 20
+03 20 92 42 02 20 22 20 0E 95 8E 2F 92 42 22 20
+2C 20 92 42 24 20 2E 20 8F 43 00 00 03 3C 2A 4F
+B0 12 10 60 34 40 EC 40 35 40 FA 40 3A 4F 3E 4F
+0A 93 04 24 7A 93 0E 20 0C 93 01 20 30 4D 0D 12
+87 12 2E 40 0B 3C 20 4F 70 65 6E 45 72 72 6F 72
+48 40 E2 5E 1A 93 B6 20 0C 93 F1 23 30 4D 40 61
+04 52 45 41 44 00 2F 83 8F 4E 00 00 1E 42 32 20
+B0 12 98 5F 1E 82 32 20 30 4D 2C 43 12 12 2A 20
+18 42 02 20 08 58 2A 41 82 9A 0A 20 A1 24 B0 12
+4C 5E 09 43 28 93 03 24 89 93 02 1E 03 20 89 93
+00 1E 07 24 09 58 39 90 00 02 F4 23 91 53 00 00
+EA 3F 0C 43 6A 41 B9 43 00 1E 28 93 0F 24 B9 40
+FF 0F 02 1E 09 11 8A 10 09 5A 5A 41 01 00 0A 11
+09 10 82 4A 28 20 82 49 26 20 07 3C 09 11 C2 49
+26 20 C2 4A 27 20 82 43 28 20 3A 41 82 4A 2A 20
+30 41 0A 12 1A 52 08 20 B0 12 8C 5E 3A 41 1A 52
+0C 20 30 40 8C 5E F2 B0 40 00 A2 04 29 20 F2 B0
+10 00 A2 04 FC 27 5A 42 B0 04 4A 11 59 42 B4 04
+F2 40 20 00 C0 04 D2 42 B1 04 C8 04 1A 52 E4 04
+D2 42 B5 04 C8 04 19 52 E4 04 D2 42 B2 04 C0 04
+B2 40 00 08 C8 04 1A 52 E4 04 92 42 B6 04 C0 04
+B2 80 BC 07 C0 04 B2 40 00 02 C8 04 19 52 E4 04
+30 41 22 2A 2B 2C 2F 3A 3B 3C 3D 3E 3F 5B 5C 5D
+7C 2E 29 92 06 38 39 80 03 00 B0 12 72 64 39 40
+03 00 7A 4B C8 4A 00 1E 82 9B 36 20 12 28 0D 12
+3D 40 0F 00 3C 40 22 64 7A 9C F3 27 1D 83 FC 23
+3D 41 6A 9C E6 27 3A 80 21 00 EB 3B 18 53 19 83
+E8 23 09 93 06 24 F8 40 20 00 00 1E 18 53 19 83
+FA 23 30 41 2A 93 D9 20 2C 93 0E 24 0C 93 A8 24
+0D 12 87 12 2E 40 0C 3C 20 57 72 69 74 65 45 72
+72 6F 72 00 48 40 E2 5E B0 12 3A 63 92 42 26 20
+22 20 92 42 28 20 24 20 B0 12 B2 63 B0 12 06 60
+18 42 30 20 F8 40 20 00 0B 1E B0 12 C6 63 88 43
+0C 1E 88 4A 0E 1E 88 49 10 1E 88 49 12 1E 98 42
+24 20 14 1E 98 42 22 20 1A 1E 88 43 1C 1E 88 43
+1E 1E 1C 43 1B 42 34 20 82 9B 36 20 C9 27 FB 90
+2E 00 00 00 C5 27 39 40 0B 00 B0 12 42 64 B0 12
+60 65 2A 43 B0 12 10 60 0C 93 BA 23 30 4D 1A 4B
+04 00 19 4B 06 00 B0 12 52 5E B0 12 C6 63 18 4B
+08 00 88 49 12 1E 88 4A 16 1E 88 49 18 1E 98 4B
+12 00 1C 1E 98 4B 14 00 1E 1E 1A 4B 04 00 19 4B
+06 00 30 40 8E 5E 9B 52 1E 20 12 00 8B 63 14 00
+1A 42 1A 20 19 42 1C 20 30 40 8E 5E B2 40 00 02
+1E 20 1B 42 32 20 B0 12 56 65 82 43 1E 20 DB 53
+03 00 DB 92 12 20 03 00 22 20 CB 43 03 00 B0 12
+F8 5E 08 12 0A 12 B0 12 3A 63 2A 91 05 24 B0 12
+B2 63 2A 41 B0 12 4C 5E 3A 41 38 41 98 42 26 20
+00 1E 92 93 02 20 03 24 98 42 28 20 02 1E B0 12
+B2 63 9B 42 26 20 0E 00 9B 42 28 20 10 00 30 40
+66 5F 4C 61 05 57 52 49 54 45 B0 12 6C 65 30 4D
+58 4B 13 00 59 4B 14 00 89 10 09 58 58 4B 15 00
+5B 42 12 20 0A 43 3C 42 08 11 09 10 4A 10 1C 83
+0B 11 FA 2B 0A 11 1C 83 FD 37 1B 42 32 20 19 5B
+0A 00 18 6B 0C 00 8B 49 0E 00 8B 48 10 00 CB 4A
+03 00 1A 4B 12 00 BB C0 FF 01 12 00 3A F0 FF 01
+82 4A 1E 20 B0 12 02 60 30 4D 0C 93 38 20 38 90
+E0 01 03 2C C8 93 20 1E 02 24 7C 40 E5 00 C8 4C
+00 1E B0 12 60 65 B0 12 04 5F 82 4A 2A 20 0B 4A
+B0 12 4C 5E 1A 48 00 1E 88 43 00 1E 92 93 02 20
+09 24 19 48 02 1E 88 43 02 1E 39 F0 FF 0F 39 90
+FF 0F 02 20 3A 93 0E 24 82 4A 22 20 82 49 24 20
+B0 12 04 5F 0B 9A E6 27 0A 12 0A 4B B0 12 B2 63
+3A 41 DD 3F 0A 4B B0 12 B2 63 B0 12 F8 60 30 4D
+C0 43 08 54 45 52 4D 32 53 44 22 00 0D 12 87 12
+60 61 24 40 02 00 CE 4A C0 46 B0 61 CE 66 3D 41
+92 C3 DC 05 08 43 B0 12 06 41 92 B3 DC 05 FD 27
+59 42 CC 05 69 92 0D 24 C8 49 00 1E 18 53 38 90
+FF 01 F3 2B 03 24 B0 12 6C 65 EC 3F B0 12 18 41
+EC 3F B0 12 18 41 82 48 1E 20 B0 12 F8 60 30 4D
@FFFE
-F6 50
+C2 4E
q
@1800
-10 00 08 00 A1 F7 80 3E 05 00 18 00 AA 61 D4 50
-2D 01 6F B0 B6 46 C8 46
+10 00 08 00 A1 F7 80 3E 05 00 18 00 2E 58 88 4E
+2E 01 6B B0 06 45 18 45 D4 4F
@4400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 44
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 44
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 44
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 44 02 3E 52 00 0E 12 3E 4F 30 4D 70 44 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 44 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 44 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 44
-01 21 BE 4F 00 00 3E 4F 30 4D CC 44 02 30 3D 00
-1E 83 0E 7E 30 4D FC 44 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 45 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 44 B0 12 06 45 12 D2 0A 18 F9 3F 39 40
+3A 00 29 83 B9 40 6E 50 C6 FF FB 23 B2 40 68 45
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 44 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 45 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 45 02 23 53 00 87 12 88 45 C0 45
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 45
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 44 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 45 34 44 86 44 D4 44 BA 45
-92 44 F8 45 D4 45 D6 47 42 4B 82 47 2A 44 22 45
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 45 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 46 18 42 EC 05 2F 83 8F 4E
-00 00 B0 12 B6 46 92 B3 FC 05 FD 27 1E 42 EC 05
-B0 12 C8 46 30 4D A2 B3 FC 05 FD 27 B2 40 11 00
-EE 05 D2 C3 22 02 30 41 B2 40 13 00 EE 05 D2 D3
-22 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 46
-B0 12 B6 46 12 D2 0A 18 F9 3F F0 44 06 41 43 43
-45 50 54 00 3C 40 64 47 3B 40 2E 47 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 47
-92 B3 FC 05 05 24 18 42 EC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 EC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 FC 05
-FD 27 82 48 EE 05 30 4D 5A 47 2D 83 92 B3 FC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 44 04 45 4D 49
-54 00 30 40 86 47 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C 47 04 45 43 48 4F 00 B2 40 82 48
-52 47 82 43 DE 1D 30 4D 32 46 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 47 92 43 DE 1D 30 4D 20 46
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 47
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 47 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 45
-02 43 52 00 30 40 08 48 87 12 1E 48 02 0D 0A 00
-D6 47 2A 44 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 45 82 53 22 00 82 43 B4 1D 87 12 14 48
-1E 48 B0 4A 14 48 22 00 80 48 4C 48 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA 47 82 2E 22 00 87 12 38 48 14 48 D6 47
-B0 4A 2A 44 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 44 34 40 00 44 30 4D 82 44 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 49 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 49 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 45 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 46 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 44 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC 46 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 47 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 4A 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 48 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 48 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 4B 42 4B 80 48 50 4B
-3D 40 58 4B CC 22 82 3E 5A 4B 0A 4E 3E 4F 3D 40
-70 4B 23 27 3D 40 4A 4B 1A E2 BE 1D A1 27 B5 23
-72 4B 3E 4F 3D 40 4A 4B B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 4E CB 3F D2 4A
+12 D3 F5 3F 34 40 EC 44 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 FC 05 FD 27 B2 40 11 00
+EE 05 D2 C3 22 02 30 41 A2 B3 FC 05 FD 27 B2 40
+13 00 EE 05 D2 D3 22 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 45 3B 40 70 45 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 45
+92 B3 FC 05 05 24 18 42 EC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 44 21 52 3A 17 58 42 EC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+FC 05 FD 27 82 48 EE 05 30 4D 9C 45 2D 83 92 B3
+FC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 45 08 4E 3E 4F E0 3F BE 45
+04 45 43 48 4F 00 B2 40 82 48 94 45 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 45 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 46 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 46 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 46 0D 12 87 12 2E 44 02 0D 0A 00 00 46 26 47
+00 00 03 4B 45 59 30 40 4A 46 18 42 EC 05 2F 83
+8F 4E 00 00 B0 12 06 45 92 B3 FC 05 FD 27 1E 42
+EC 05 B0 12 18 45 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A 46
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 44 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 46
+02 23 53 00 0D 12 87 12 E2 46 1C 47 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 47 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 45 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 46 14 47 9C 46 54 47 30 47
+00 46 70 4A C4 45 26 47 E4 45 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 47 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 44 2E 44 F8 49 24 44 22 00 F2 47 C0 47
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A 47 82 2E 22 00 0D 12 87 12
+AA 47 24 44 00 46 F8 49 26 47 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 44 34 40 EC 44 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 49 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 49 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 44
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C 45 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 49
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 44 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 47 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 44 70 4A F2 47 80 4A
+3D 40 88 4A E2 22 A4 26 8A 4A 0A 4E 3E 4F 3D 40
+A0 4A 39 27 3D 40 7A 4A 1A E2 BE 1D BD 23 AC 27
+A2 4A 3E 4F 3D 40 7A 4A BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 4D D2 3F D0 45
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 44 46 4B AE 4B B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 45 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A 44
-04 48 8C 47 42 4B 82 47 46 4B A4 44 0C 45 1E 48
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 4C
-14 48 30 FF A0 4A 26 45 1E 48 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 4C 3C 46 E0 4B C2 4A 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E 4C 86 41 42 4F
-52 54 22 00 87 12 38 48 14 48 40 4C B0 4A 2A 44
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 CC 51
-B0 12 B6 46 92 C3 FC 05 38 40 A0 AA 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 FC 05 F3 23 87 12
-46 51 14 48 DE 1D EA 44 AC 47 1E 48 04 1B 5B 37
-6D 00 D6 47 58 44 40 46 9A 4C 04 48 1E 48 05 6C
-69 6E 65 3A D6 47 D0 44 24 46 D6 47 1E 48 04 1B
-5B 30 6D 00 D6 47 24 4C 00 00 83 5B 27 5D 87 12
-C0 4C 14 48 14 48 B0 4A B0 4A 2A 44 E8 48 01 27
-87 12 42 4B 80 48 EE 48 40 46 CE 4C 2A 44 7A 4B
-32 45 81 5C 92 42 C0 1D C4 1D 30 4D AA 4C 81 5B
-82 43 BE 1D 30 4D D2 4C 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 4A 82 49 53 00 87 12
-BE 4B EA 44 40 46 12 4D AE 4C 14 48 F0 4C B0 4A
-2A 44 C0 4C F0 4C 2A 44 FA 4C 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 4B 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 4B
-80 48 EE 48 58 44 40 46 CE 4C 0C 45 40 46 5C 4D
-14 48 14 48 B0 4A B0 4A 14 48 B0 4A B0 4A 2A 44
-DE 4C 81 3B 82 93 BE 1D B5 27 87 12 14 48 2A 44
-B0 4A FA 4D E0 4C 2A 44 62 4D 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 4D 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A 4D 01 3A 30 12 A0 4D 92 B3 C6 1D A2 63 C6 1D
-87 12 42 4B 80 48 C8 4D 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 48 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 4C 90 4B 05 44 45 46 45 52
-B0 12 B8 4D BA 40 30 40 FC FF BA 40 AE 4D FE FF
-E3 3F 1E 4B 06 43 52 45 41 54 45 00 B0 12 B8 4D
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 4E 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 49 05 3E 42 4F 44 59 2E 52
-30 4D 44 4E 04 43 4F 44 45 00 B0 12 B8 4D 82 43
-6E 61 A2 82 C6 1D 87 12 D6 50 B0 50 2A 44 84 4E
-07 43 4F 44 45 4E 4E 4D B0 12 86 4D F0 3F 00 00
-07 45 4E 44 43 4F 44 45 87 12 E4 50 FA 4D 2A 44
-2C 4C 03 41 53 4D B2 40 B4 50 DA 1D DE 3F B0 4E
-06 45 4E 44 41 53 4D 00 87 12 B8 4E F8 50 2A 44
-00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12
-00 00 A2 53 C6 1D B2 43 BE 1D 30 40 E4 50 00 00
-05 4C 4F 32 48 49 1A 42 C6 1D BA 40 B0 12 00 00
-BA 40 2A 44 02 00 A2 52 C6 1D ED 3F 1A 4D 85 48
-49 32 4C 4F 87 12 A0 4A 4E 4F B0 4A E0 4C D6 50
-B0 50 2A 44 1E 4F 82 49 46 00 2F 83 8F 4E 00 00
-1E 42 C6 1D A2 52 C6 1D BE 40 40 46 00 00 2E 53
-30 4D 5E 4E 84 45 4C 53 45 00 A2 52 C6 1D 1A 42
-C6 1D BA 40 3C 46 FC FF 8E 4A 00 00 2A 83 0E 4A
-30 4D D0 47 84 54 48 45 4E 00 9E 42 C6 1D 00 00
-3E 4F 30 4D A0 4E 85 42 45 47 49 4E 30 40 A0 4A
-74 4F 85 55 4E 54 49 4C 39 40 40 46 A2 52 C6 1D
-1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D
-C2 4E 85 41 47 41 49 4E 39 40 3C 46 EF 3F 7A 48
-85 57 48 49 4C 45 87 12 3A 4F 76 44 2A 44 34 48
-86 52 45 50 45 41 54 00 87 12 B8 4F 7A 4F 2A 44
-54 4F 82 44 4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D
-1E 42 C6 1D BE 40 54 46 FE FF A2 53 00 1C 1A 42
-00 1C 8A 43 00 00 30 4D E2 4A 84 4C 4F 4F 50 00
-39 40 76 46 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF
-8A 4E FE FF 1E 42 00 1C A2 83 00 1C 2E 4E 0E 93
-03 24 8E 4A 00 00 F6 3F 3E 4F 30 4D 90 46 85 2B
-4C 4F 4F 50 39 40 64 46 E5 3F 0A 50 04 4D 4F 56
-45 00 0A 4E 38 4F 39 4F 3E 4F 0A 93 11 24 08 99
-0F 24 06 2C F8 49 00 00 18 53 1A 83 FB 23 30 4D
-08 5A 09 5A 19 83 18 83 E8 49 00 00 1A 83 FA 23
-30 4D 14 48 CA 1D F2 44 2A 44 84 12 82 50 B2 4F
-7A 53 E2 4F BE 4C 36 4F 3E 50 8E 54 64 48 6A 51
-84 51 92 4F 04 52 00 00 60 54 E8 4C 78 4E 00 00
-84 12 82 50 38 60 D0 5F 34 5F F8 5A 9C 59 00 00
-FC 5D 00 00 5E 61 72 61 F4 59 32 5A 04 60 00 00
-00 00 D4 5A AE 50 3A 40 0C 00 39 40 CA 1D 38 40
-CC 1D C6 3F 3A 40 0E 00 39 40 CC 1D 38 40 CA 1D
-B9 3F 82 43 CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D
-8A 50 F2 50 F8 50 08 51 3A 4E 82 4A C8 1D 2E 4E
-82 4E C6 1D 3D 40 10 00 09 4A 08 49 29 83 18 48
-FE FF 0E 98 FC 2B 89 48 00 00 1D 83 F6 23 2A 4A
-0A 93 F0 23 3E 4F 3D 41 30 4D 32 4D 09 50 57 52
-5F 53 54 41 54 45 84 12 00 51 D4 50 AA 61 D0 4F
-09 52 53 54 5F 53 54 41 54 45 92 42 0E 18 4A 51
-92 42 0C 18 4C 51 EF 3F 3C 51 08 50 57 52 5F 48
-45 52 45 00 92 42 C8 1D 4A 51 92 42 C6 1D 4C 51
-30 4D 50 51 08 52 53 54 5F 48 45 52 45 00 92 42
-C8 1D 0E 18 92 42 C6 1D 0C 18 EC 3F C0 4F 04 57
-49 50 45 00 39 40 10 00 29 83 B9 43 80 FF FC 23
-B2 40 E0 46 DE 46 B2 40 0E 52 0C 52 B2 40 D4 50
-0E 18 B2 40 AA 61 0C 18 30 12 5A 51 B2 40 86 47
-84 47 B2 40 08 48 06 48 B2 40 98 46 96 46 B2 40
-18 00 0A 18 37 40 1A 44 36 40 92 44 35 40 0E 44
-34 40 00 44 B2 40 0A 00 DC 1D B2 40 20 00 B4 1D
-30 41 9E 51 04 57 41 52 4D 00 30 40 0E 52 3D 40
-44 52 92 C3 30 01 1E 42 08 18 0E 93 12 24 F2 B0
-10 00 20 02 02 20 3E E3 1E 53 F2 D0 30 00 2A 02
-3E 90 0A 00 B7 27 3E 90 16 00 B4 2F 2E 93 83 27
-8C 2F 30 4D 1E 48 06 0D 1B 5B 37 6D 23 00 D6 47
-34 46 1E 48 19 46 61 73 74 46 6F 72 74 68 20 C2
-A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 D6 47
-14 48 30 FF A0 4A B8 44 24 46 1E 48 0A 62 79 74
-65 73 20 66 72 65 65 00 3C 46 9A 4C 86 4F 04 43
-4F 4C 44 00 92 B3 EA 05 FD 23 B2 40 04 A5 20 01
-44 52 B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3
+3B 49 3A 49 3D 15 87 12 74 4A DC 4A B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E 46 D4 44
+70 4A C4 45 74 4A 8C 46 BC 46 2E 44 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 4B 24 44 40 FF
+2A 4E C4 46 2E 44 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 4B 48 44 0C 4B 0A 4A 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A 4B 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 47 24 44 6E 4B F8 49 26 47 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 4F B0 12
+06 45 92 C3 FC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 FC 05 F3 23 0D 12 87 12
+10 4F 24 44 DE 1D 02 45 D6 45 2E 44 04 1B 5B 37
+6D 00 00 46 7C 46 4C 44 C8 4B 2E 46 2E 44 05 6C
+69 6E 65 3A 00 46 66 47 00 46 2E 44 04 1B 5B 30
+6D 00 00 46 50 4B 00 00 83 5B 27 5D 0D 12 87 12
+F0 4B 24 44 24 44 F8 49 F8 49 26 47 44 48 01 27
+0D 12 87 12 70 4A F2 47 4A 48 4C 44 00 4C 26 47
+AA 4A D2 46 81 5C 92 42 C0 1D C4 1D 30 4D D8 4B
+81 5B 82 43 BE 1D 30 4D 04 4C 01 5D B2 43 BE 1D
+30 4D F2 4A 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 4A F2 47 4A 48 7C 46 4C 44 00 4C BC 46
+4C 44 50 4C 24 44 24 44 F8 49 F8 49 24 44 F8 49
+F8 49 26 47 40 47 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 4C 01 3A
+30 12 B8 4C 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 4A F2 47 86 4C 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E 4C 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 4C 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 44
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 4B CC 4C 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 44 26 47 F8 49 F2 4C 12 4C 26 47 5C 4A 06 43
+52 45 41 54 45 00 B0 12 74 4C BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 4A 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 4D 04 43 4F 44 45 00 B0 12 74 4C A2 82 C6 1D
+0D 12 87 12 8A 4E 64 4E 26 47 72 4D 07 43 4F 44
+45 4E 4E 4D 30 12 7C 4D 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 4C A4 4E 26 47 58 4B
+03 41 53 4D B2 40 68 4E DA 1D DE 3F 9C 4D 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 4D C2 4E 26 47
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 4E 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 4C 85 48 49 32 4C 4F 0D 12
+87 12 2A 4E 1E 4E F8 49 12 4C 80 4D 26 47 2E 53
+30 4D 8C 4D 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 44 CA 1D AE 46 26 47 84 12
+36 4E B0 4D 5C 50 58 4D EE 4B 08 4E 42 46 20 4A
+D8 47 34 4F 4E 4F 62 47 CE 4F 00 00 0E 52 1A 4C
+AA 48 00 00 84 12 36 4E 40 57 A6 57 F4 56 F6 57
+BA 56 00 00 EA 53 00 00 B0 56 62 57 12 57 50 57
+FA 54 00 00 00 00 12 58 62 4E 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E 4E BC 4E C2 4E
+D2 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 4C 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 4E 88 4E 2E 58 A6 47 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 4F 92 42 0C 18 16 4F
+EF 3F 06 4F 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 4F 92 42 C6 1D 16 4F 30 4D 1A 4F 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC 47 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 44 02 44
+B2 40 D8 4F D6 4F B2 40 88 4E 0E 18 B2 40 2E 58
+0C 18 30 12 24 4F B2 40 C8 45 C6 45 B2 40 32 46
+30 46 B2 40 4A 46 48 46 B2 40 18 00 0A 18 37 40
+26 47 36 40 9C 46 35 40 FA 44 34 40 EC 44 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 4F 04 57
+41 52 4D 00 30 40 D8 4F 3D 40 12 50 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 20 02 02 20
+3E E3 1E 53 F2 D0 30 00 2A 02 92 D3 FA 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E 44 07 0D 0A 1B 5B 37 6D 23 00 46 9C 47
+2E 44 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 46 24 44
+40 FF 2A 4E A6 46 66 47 2E 44 0A 62 79 74 65 73
+20 66 72 65 65 00 48 44 C8 4B 24 4E 04 43 4F 4C
+44 00 92 B3 EA 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 1C B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3
06 02 B2 43 26 02 B2 43 22 02 D2 D3 24 02 B2 43
42 02 B2 43 46 02 B2 43 62 02 B2 43 66 02 B2 40
7F FF 82 02 B2 43 86 02 F2 43 22 03 F2 43 26 03
39 40 00 01 B2 40 33 00 64 01 D2 43 61 01 92 D2
9E 01 08 18 38 40 59 14 18 83 FE 23 19 83 FA 23
B2 42 B0 01 F2 D0 10 00 2A 03 F2 C0 40 00 A2 04
-39 40 00 08 29 83 89 43 00 1C FC 23 39 40 3A 00
-29 83 B9 40 A2 52 C6 FF FB 23 B2 40 26 47 E4 FF
+39 40 00 08 29 83 89 43 00 1C FC 23 B0 12 0E 44
B2 40 81 00 E0 05 92 42 02 18 E6 05 92 42 04 18
-E8 05 92 C3 E0 05 92 D3 FA 05 3F 40 80 1C 31 40
-E0 1C 30 12 0A 52 33 3F 8E 52 07 43 4F 4D 50 41
-52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24
-1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF F5 27
-02 2C 3E 43 30 4D 1E 43 30 4D B2 4D 86 5B 54 48
-45 4E 5D 00 30 4D AC 53 86 5B 45 4C 53 45 5D 00
-87 12 14 48 00 00 C6 44 42 4B 80 48 24 4B 34 44
-40 46 22 54 44 44 1E 48 06 5B 54 48 45 4E 5D 00
-82 53 4A 46 F2 53 F8 47 D0 44 58 44 4A 46 C8 53
-2A 44 44 44 1E 48 06 5B 45 4C 53 45 5D 00 82 53
-4A 46 10 54 F8 47 D0 44 58 44 4A 46 C6 53 2A 44
-1E 48 04 5B 49 46 5D 00 82 53 4A 46 C8 53 3C 46
-C6 53 F8 47 1E 48 05 0D 0A 6B 6F 20 D6 47 8C 47
-32 4B 3C 46 C8 53 B8 53 84 5B 49 46 5D 00 0E 93
-3E 4F BE 27 30 4D 38 54 89 5B 44 45 46 49 4E 45
-44 5D 87 12 42 4B 80 48 EE 48 6A 44 2A 44 48 54
-8B 5B 55 4E 44 45 46 49 4E 45 44 5D 87 12 42 4B
-80 48 EE 48 6A 44 00 45 2A 44 7C 54 3D 41 B2 4E
-0E 18 A2 4E 0C 18 3E 4F 30 40 5A 51 4C 50 06 4D
-41 52 4B 45 52 00 B0 12 B8 4D BA 40 84 12 FC FF
-BA 40 7A 54 FE FF 9A 42 C8 1D 00 00 28 83 8A 48
-02 00 A2 52 C6 1D 30 40 00 4E 1C 15 B0 12 2A 44
-80 48 EE 48 4A 46 D0 54 AA 49 40 46 CE 4C EA 54
-D2 54 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
-04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 32 B0
-00 02 01 24 3E 4F 30 41 3E 40 28 00 B0 12 BA 54
-B0 12 EE 54 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
-3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D B0 12
-2A 44 80 48 AA 49 40 46 36 55 2C 55 21 53 3E 90
-10 00 81 2D DA 2B 38 55 B2 41 C4 1D D6 3F 87 12
-42 4B 74 48 46 55 0C 43 1B 42 C6 1D A2 53 C6 1D
-6A 4E 3E 4F 7A 90 23 00 29 20 92 53 C4 1D B0 12
-BA 54 B0 12 EE 54 3C 40 00 03 0E 93 1C 24 3C 40
-10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40
-20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40
-30 03 3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53
-C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00
-09 20 3C 40 10 02 92 53 C4 1D B0 12 BA 54 B0 12
-EE 54 EB 3F 7A 90 40 00 16 20 3C 40 20 00 92 53
-C4 1D B0 12 14 55 0C 20 3C 50 10 00 3E 40 2B 00
-B0 12 14 55 92 92 C0 1D C4 1D 02 24 92 53 C4 1D
-8E 10 0C 5E D8 3F B0 12 14 55 FA 23 3C 50 10 00
-B0 12 F8 54 EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D
-87 12 42 4B 74 48 18 56 FE 90 26 00 00 00 3E 40
-20 00 03 20 3C 50 82 00 C6 3F B0 12 14 55 E1 23
-3C 50 80 00 B0 12 F8 54 DC 3F D6 46 04 52 45 54
-49 00 87 12 14 48 00 13 B0 4A 2A 44 14 48 2C 00
-3E 55 10 56 56 56 09 4B 2E 4E 0E DC A2 3F 00 4F
-03 4D 4F 56 84 12 4C 56 00 40 60 56 05 4D 4F 56
-2E 42 84 12 4C 56 40 40 00 00 03 41 44 44 84 12
-4C 56 00 50 7A 56 05 41 44 44 2E 42 84 12 4C 56
-40 50 86 56 04 41 44 44 43 00 84 12 4C 56 00 60
-94 56 06 41 44 44 43 2E 42 00 84 12 4C 56 40 60
-3C 56 04 53 55 42 43 00 84 12 4C 56 00 70 B2 56
-06 53 55 42 43 2E 42 00 84 12 4C 56 40 70 C0 56
-03 53 55 42 84 12 4C 56 00 80 D0 56 05 53 55 42
-2E 42 84 12 4C 56 40 80 E2 4E 03 43 4D 50 84 12
-4C 56 00 90 EA 56 05 43 4D 50 2E 42 84 12 4C 56
-40 90 D0 4E 04 44 41 44 44 00 84 12 4C 56 00 A0
-04 57 06 44 41 44 44 2E 42 00 84 12 4C 56 40 A0
-F6 56 03 42 49 54 84 12 4C 56 00 B0 22 57 05 42
-49 54 2E 42 84 12 4C 56 40 B0 2E 57 03 42 49 43
-84 12 4C 56 00 C0 3C 57 05 42 49 43 2E 42 84 12
-4C 56 40 C0 48 57 03 42 49 53 84 12 4C 56 00 D0
-56 57 05 42 49 53 2E 42 84 12 4C 56 40 D0 00 00
-03 58 4F 52 84 12 4C 56 00 E0 70 57 05 58 4F 52
-2E 42 84 12 4C 56 40 E0 A2 56 03 41 4E 44 84 12
-4C 56 00 F0 8A 57 05 41 4E 44 2E 42 84 12 4C 56
-40 F0 42 4B 3E 55 A8 57 0A 4C 3C F0 70 00 8A 10
-3A F0 0F 00 0C DA 4F 3F DC 56 03 52 52 43 84 12
-A2 57 00 10 BA 57 05 52 52 43 2E 42 84 12 A2 57
-40 10 C6 57 04 53 57 50 42 00 84 12 A2 57 80 10
-D4 57 03 52 52 41 84 12 A2 57 00 11 E2 57 05 52
-52 41 2E 42 84 12 A2 57 40 11 EE 57 03 53 58 54
-84 12 A2 57 80 11 00 00 04 50 55 53 48 00 84 12
-A2 57 00 12 08 58 06 50 55 53 48 2E 42 00 84 12
-A2 57 40 12 62 57 04 43 41 4C 4C 00 84 12 A2 57
-80 12 1A 53 0E 4A 87 12 34 46 1E 48 0D 6F 75 74
-20 6F 66 20 62 6F 75 6E 64 73 4C 4C 42 4B 74 48
-52 58 92 53 C4 1D 3E 40 2C 00 B0 12 2A 44 80 48
-AA 49 40 46 CE 4C 06 56 6A 58 0A 4E 3E 4F 1A 83
-E0 33 29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A
-08 8A 38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F
-8A 10 5A 06 8F 3F FC 57 06 52 52 43 4D 2E 41 00
-84 12 4C 58 40 00 98 58 04 52 52 43 4D 00 84 12
-4C 58 50 00 A8 58 06 52 52 41 4D 2E 41 00 84 12
-4C 58 40 01 B6 58 04 52 52 41 4D 00 84 12 4C 58
-50 01 C6 58 06 52 4C 41 4D 2E 41 00 84 12 4C 58
-40 02 D4 58 04 52 4C 41 4D 00 84 12 4C 58 50 02
-E4 58 06 52 52 55 4D 2E 41 00 84 12 4C 58 40 03
-F2 58 04 52 52 55 4D 00 84 12 4C 58 50 03 16 58
-07 50 55 53 48 4D 2E 41 84 12 4C 58 00 14 10 59
-05 50 55 53 48 4D 84 12 4C 58 00 15 20 59 06 50
-4F 50 4D 2E 41 00 84 12 4C 58 00 16 2E 59 04 50
-4F 50 4D 00 84 12 4C 58 00 17 02 59 03 53 3E 3D
-85 12 00 38 4C 59 02 53 3C 00 85 12 00 34 3E 59
-03 30 3E 3D 85 12 00 30 60 59 02 30 3C 00 85 12
-00 30 00 00 02 55 3C 00 85 12 00 2C 74 59 03 55
-3E 3D 85 12 00 28 6A 59 03 30 3C 3E 85 12 00 24
-88 59 02 30 3D 00 85 12 00 20 00 00 02 49 46 00
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D
-7E 59 04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F
-09 48 29 53 0A 89 0A 11 3A 90 00 02 33 2F 88 DA
-00 00 30 4D 12 57 04 45 4C 53 45 00 1A 42 C6 1D
-BA 40 00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00
-E3 3F B2 59 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F
-19 42 C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 12 3B
-3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D
-96 57 05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F
-00 00 05 57 48 49 4C 45 87 12 A0 59 76 44 2A 44
-56 59 06 52 45 50 45 41 54 00 87 12 28 5A B8 59
-2A 44 54 5A 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D
-CD 2F 98 42 C6 1D 00 00 30 4D 26 58 03 42 57 31
-84 12 52 5A 00 00 6C 5A 03 42 57 32 84 12 52 5A
-00 00 78 5A 03 42 57 33 84 12 52 5A 00 00 90 5A
-3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 90 2B BA 4F
-00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00
-03 46 57 31 84 12 8E 5A 00 00 B0 5A 03 46 57 32
-84 12 8E 5A 00 00 BC 5A 03 46 57 33 84 12 8E 5A
-00 00 00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24
-3E E0 00 04 3E B0 00 10 02 24 3E E0 00 08 87 12
-C0 4C DA 4A 2A 44 C8 5A 04 47 4F 54 4F 00 2F 83
-8F 4E 00 00 3E 40 00 3C F2 3F 87 12 42 4B 74 48
-12 5B 69 4E 3E 4F 3C 4F 2C 4C 1B 42 C6 1D A2 53
-C6 1D 79 90 52 00 0A 20 B0 12 14 55 5E 0E 5E 0E
-0E DC 8B 4E 00 00 0E 4B 3D 41 30 4D 79 90 23 00
-0D 20 3C C0 40 00 92 53 C4 1D A2 53 C6 1D B0 12
-BA 54 BB 4F 02 00 3E F0 0F 00 E8 3F 79 90 26 00
-03 20 3C E0 E0 00 EF 3F 3C C0 F0 00 79 90 40 00
-12 20 92 53 C4 1D B0 12 14 55 D8 23 3C D0 10 00
-3E 40 2B 00 B0 12 14 55 92 92 C0 1D C4 1D CE 27
-92 53 C4 1D CB 3F 3C D0 30 00 A2 53 C6 1D 3E 40
-28 00 B0 12 BA 54 BB 4F 02 00 3E 40 29 00 EA 3F
-87 12 42 4B 74 48 B8 5B 3B 4F 2C 4B 69 4E 7E 40
-20 00 79 90 52 00 03 20 B0 12 14 55 B1 3F 3C C0
-F0 00 A2 53 C6 1D 79 90 26 00 09 20 3C D0 60 00
-92 53 C4 1D B0 12 BA 54 BB 4F 02 00 A1 3F 3C D0
-70 00 3E 40 28 00 B0 12 BA 54 BB 4F 02 00 3E 40
-29 00 E2 3F 14 48 2C 00 0A 5B B0 5B 66 44 2A 44
-6C 56 04 4D 4F 56 41 00 84 12 04 5C C0 00 84 5A
-04 43 4D 50 41 00 84 12 04 5C D0 00 22 5A 04 41
-44 44 41 00 84 12 04 5C E0 00 42 5A 04 53 55 42
-41 00 84 12 04 5C F0 00 20 5C 05 43 41 4C 4C 41
-87 12 42 4B 74 48 58 5C 1B 42 C6 1D A2 53 C6 1D
-6E 4E 3C 40 34 01 7E 90 52 00 0B 20 7E 40 20 00
-B0 12 14 55 5C 0E 0C DE 8B 4C 00 00 3E 4F 3D 41
-30 4D 2C 53 7E 90 40 00 0B 20 92 53 C4 1D 7E 40
-20 00 B0 12 14 55 EE 23 1C 53 3E 40 2B 00 E8 3F
-A2 53 C6 1D 7E 90 23 00 09 20 3C 40 3B 01 92 53
-C4 1D B0 12 BA 54 BB 4F 02 00 DC 3F 7E 90 26 00
-02 20 2C 53 F4 3F 7E 40 28 00 1C 83 B0 12 BA 54
-BB 4F 02 00 3E 40 29 00 CB 3F 87 12 42 4B 74 48
-E2 5C 69 4E 3E 4F 3C 40 00 18 79 90 52 00 05 20
-B0 12 14 55 0E 4C 3D 41 30 4D 82 43 6E 61 79 90
-23 00 0B 20 92 53 C4 1D B0 12 BA 54 2F 53 3E F0
-0F 00 5E 0A 5E 0E 0C DE ED 3F 79 90 26 00 F2 27
-79 90 40 00 12 20 92 53 C4 1D B0 12 14 55 E2 23
-3E 40 2B 00 92 53 C4 1D B0 12 14 55 92 92 C0 1D
-C4 1D D8 27 92 53 C4 1D D5 3F 3E 40 28 00 B0 12
-BA 54 8F 4E 00 00 3E 40 29 00 B0 12 14 55 3E 4F
-3E F0 0F 00 0C DE EA 3F 87 12 42 4B 74 48 70 5D
-3C 4F 69 4E 3E 40 20 00 79 90 52 00 BB 27 82 43
-6E 61 79 90 26 00 08 20 92 53 C4 1D B0 12 BA 54
-2F 53 3E F0 0F 00 BF 3F 3E 40 28 00 B0 12 BA 54
-F7 3F 1B 42 C6 1D A2 53 C6 1D 0C 4E 3E 4F 1C D2
-6E 61 82 43 6E 61 3C DE 8B 4C 00 00 B2 41 C4 1D
-30 4D 14 48 C4 1D EA 44 86 44 14 48 2C 00 DA 5C
-68 5D A2 5D 3C 46 4C 56 12 5C 04 4D 4F 56 58 00
-84 12 C2 5D 40 00 00 40 DA 5D 06 4D 4F 56 58 2E
-41 00 84 12 C2 5D 00 00 40 40 EA 5D 06 4D 4F 56
-58 2E 42 00 84 12 C2 5D 40 00 40 40 2E 5C 04 41
-44 44 58 00 84 12 C2 5D 40 00 00 50 0E 5E 06 41
-44 44 58 2E 41 00 84 12 C2 5D 00 00 40 50 1E 5E
-06 41 44 44 58 2E 42 00 84 12 C2 5D 40 00 40 50
-30 5E 05 41 44 44 43 58 84 12 C2 5D 40 00 00 60
-42 5E 07 41 44 44 43 58 2E 41 84 12 C2 5D 00 00
-40 60 52 5E 07 41 44 44 43 58 2E 42 84 12 C2 5D
-40 00 40 60 3C 5C 05 53 55 42 43 58 84 12 C2 5D
-40 00 00 70 76 5E 07 53 55 42 43 58 2E 41 84 12
-C2 5D 00 00 40 70 86 5E 07 53 55 42 43 58 2E 42
-84 12 C2 5D 40 00 40 70 98 5E 04 53 55 42 58 00
-84 12 C2 5D 40 00 00 80 AA 5E 06 53 55 42 58 2E
-41 00 84 12 C2 5D 00 00 40 80 BA 5E 06 53 55 42
-58 2E 42 00 84 12 C2 5D 40 00 40 80 4A 5C 04 43
-4D 50 58 00 84 12 C2 5D 40 00 00 90 DE 5E 06 43
-4D 50 58 2E 41 00 84 12 C2 5D 00 00 40 90 EE 5E
-06 43 4D 50 58 2E 42 00 84 12 C2 5D 40 00 40 90
-D6 59 05 44 41 44 44 58 84 12 C2 5D 40 00 00 A0
-12 5F 07 44 41 44 44 58 2E 41 84 12 C2 5D 00 00
-40 A0 22 5F 07 44 41 44 44 58 2E 42 84 12 C2 5D
-40 00 40 A0 00 5F 04 42 49 54 58 00 84 12 C2 5D
-40 00 00 B0 46 5F 06 42 49 54 58 2E 41 00 84 12
-C2 5D 00 00 40 B0 56 5F 06 42 49 54 58 2E 42 00
-84 12 C2 5D 40 00 40 B0 68 5F 04 42 49 43 58 00
-84 12 C2 5D 40 00 00 C0 7A 5F 06 42 49 43 58 2E
-41 00 84 12 C2 5D 00 00 40 C0 8A 5F 06 42 49 43
-58 2E 42 00 84 12 C2 5D 40 00 40 C0 9C 5F 04 42
-49 53 58 00 84 12 C2 5D 40 00 00 D0 AE 5F 06 42
-49 53 58 2E 41 00 84 12 C2 5D 00 00 40 D0 BE 5F
-06 42 49 53 58 2E 42 00 84 12 C2 5D 40 00 40 D0
-7C 57 04 58 4F 52 58 00 84 12 C2 5D 40 00 00 E0
-E2 5F 06 58 4F 52 58 2E 41 00 84 12 C2 5D 00 00
-40 E0 F2 5F 06 58 4F 52 58 2E 42 00 84 12 C2 5D
-40 00 40 E0 64 5E 04 41 4E 44 58 00 84 12 C2 5D
-40 00 00 F0 16 60 06 41 4E 44 58 2E 41 00 84 12
-C2 5D 00 00 40 F0 26 60 06 41 4E 44 58 2E 42 00
-84 12 C2 5D 40 00 40 F0 14 48 C4 1D EA 44 86 44
-42 4B DA 5C A2 5D 3C 46 A2 57 CC 5E 04 52 52 43
-58 00 84 12 48 60 40 00 00 10 5C 60 06 52 52 43
-58 2E 41 00 84 12 48 60 00 00 40 10 6C 60 06 52
-52 43 58 2E 42 00 84 12 48 60 40 00 40 10 7E 60
-04 52 52 55 58 00 84 12 48 60 40 01 00 10 90 60
-06 52 52 55 58 2E 41 00 84 12 48 60 00 01 40 10
-A0 60 06 52 52 55 58 2E 42 00 84 12 48 60 40 01
-40 10 B2 60 05 53 57 50 42 58 84 12 48 60 40 00
-80 10 C4 60 07 53 57 50 42 58 2E 41 84 12 48 60
-00 00 80 10 D4 60 04 52 52 41 58 00 84 12 48 60
-40 00 00 11 E6 60 06 52 52 41 58 2E 41 00 84 12
-48 60 00 00 40 11 F6 60 06 52 52 41 58 2E 42 00
-84 12 48 60 40 00 40 11 08 61 04 53 58 54 58 00
-84 12 48 60 40 00 80 11 1A 61 06 53 58 54 58 2E
-41 00 84 12 48 60 00 00 80 11 92 59 05 50 55 53
-48 58 84 12 48 60 40 00 00 12 3C 61 07 50 55 53
-48 58 2E 41 84 12 48 60 00 00 40 12 4C 61 07 50
-55 53 48 58 2E 42 84 12 48 60 40 00 40 12 00 00
-2A 61 03 52 50 54 87 12 42 4B 74 48 7E 61 29 4E
-7E 40 20 00 79 90 52 00 06 20 B0 12 14 55 03 24
-3E D0 80 00 05 3C B0 12 BA 54 1E 83 3E F0 0F 00
-82 4E 6E 61 3E 4F 3D 41 30 4D
+E8 05 92 C3 E0 05 3F 40 80 1C 30 12 D4 4F 3C 3F
+24 4D 86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F
+3B 4F 39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83
+04 30 19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D
+2F 53 9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 32 51
+86 5B 45 4C 53 45 5D 00 0D 12 87 12 24 44 00 00
+AA 46 70 4A F2 47 62 4A 68 46 4C 44 CA 51 70 46
+2E 44 06 5B 54 48 45 4E 5D 00 3C 51 A4 51 60 51
+82 51 26 47 70 46 2E 44 06 5B 45 4C 53 45 5D 00
+3C 51 BA 51 60 51 80 51 26 47 2E 44 04 5B 49 46
+5D 00 3C 51 82 51 48 44 80 51 22 46 2E 44 05 0D
+0A 6B 6F 20 00 46 D4 44 C4 44 48 44 82 51 70 51
+84 5B 49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53
+30 4D E0 51 89 5B 44 45 46 49 4E 45 44 5D 0D 12
+87 12 70 4A F2 47 4A 48 EE 51 26 47 F4 51 8B 5B
+55 4E 44 45 46 49 4E 45 44 5D 0D 12 87 12 FE 51
+22 52 3D 41 30 40 B6 46 38 40 C0 1D 0A 4E 39 48
+2E 48 09 5E 1E 52 C4 1D 09 9E 03 24 7A 9E FC 27
+1E 83 0A 4E 2A 88 82 4A C4 1D 30 4D 1C 15 87 12
+F2 47 4A 48 42 44 60 52 06 49 4C 44 00 4C 7A 52
+62 52 39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E
+04 3C 2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40
+28 00 B0 12 4C 52 19 42 C6 1D A2 53 C6 1D 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D
+87 12 F2 47 06 49 4C 44 B6 52 AC 52 21 53 3E 90
+10 00 80 2D E2 2B B8 52 B2 41 C4 1D DE 3F 0D 12
+87 12 70 4A 28 52 C8 52 0C 43 1B 42 C6 1D A2 53
+C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 1D
+B0 12 4C 52 3C 40 00 03 0E 93 1C 24 3C 40 10 03
+1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
+2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
+3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
+89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20
+3C 40 10 02 92 53 C4 1D B0 12 4C 52 ED 3F 7A 90
+40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 96 52
+0C 20 3C 50 10 00 3E 40 2B 00 B0 12 96 52 92 92
+C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E DA 3F
+B0 12 96 52 FA 23 3C 50 10 00 B0 12 7E 52 EF 3F
+0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 70 4A
+28 52 94 53 FE 90 26 00 00 00 3E 40 20 00 03 20
+3C 50 82 00 C7 3F B0 12 96 52 E0 23 3C 50 80 00
+B0 12 7E 52 DB 3F 00 00 04 52 45 54 49 00 0D 12
+87 12 24 44 00 13 F8 49 26 47 24 44 2C 00 BE 52
+8A 53 D4 53 09 4B 2E 4E 0E DC A2 3F F6 4D 03 4D
+4F 56 84 12 CA 53 00 40 DE 53 05 4D 4F 56 2E 42
+84 12 CA 53 40 40 00 00 03 41 44 44 84 12 CA 53
+00 50 F8 53 05 41 44 44 2E 42 84 12 CA 53 40 50
+04 54 04 41 44 44 43 00 84 12 CA 53 00 60 12 54
+06 41 44 44 43 2E 42 00 84 12 CA 53 40 60 B8 53
+04 53 55 42 43 00 84 12 CA 53 00 70 30 54 06 53
+55 42 43 2E 42 00 84 12 CA 53 40 70 3E 54 03 53
+55 42 84 12 CA 53 00 80 4E 54 05 53 55 42 2E 42
+84 12 CA 53 40 80 D2 4D 03 43 4D 50 84 12 CA 53
+00 90 68 54 05 43 4D 50 2E 42 84 12 CA 53 40 90
+BE 4D 04 44 41 44 44 00 84 12 CA 53 00 A0 82 54
+06 44 41 44 44 2E 42 00 84 12 CA 53 40 A0 74 54
+03 42 49 54 84 12 CA 53 00 B0 A0 54 05 42 49 54
+2E 42 84 12 CA 53 40 B0 AC 54 03 42 49 43 84 12
+CA 53 00 C0 BA 54 05 42 49 43 2E 42 84 12 CA 53
+40 C0 C6 54 03 42 49 53 84 12 CA 53 00 D0 D4 54
+05 42 49 53 2E 42 84 12 CA 53 40 D0 00 00 03 58
+4F 52 84 12 CA 53 00 E0 EE 54 05 58 4F 52 2E 42
+84 12 CA 53 40 E0 20 54 03 41 4E 44 84 12 CA 53
+00 F0 08 55 05 41 4E 44 2E 42 84 12 CA 53 40 F0
+70 4A BE 52 26 55 0A 4C 3C F0 70 00 8A 10 3A F0
+0F 00 0C DA 4F 3F 5A 54 03 52 52 43 84 12 20 55
+00 10 38 55 05 52 52 43 2E 42 84 12 20 55 40 10
+44 55 04 53 57 50 42 00 84 12 20 55 80 10 52 55
+03 52 52 41 84 12 20 55 00 11 60 55 05 52 52 41
+2E 42 84 12 20 55 40 11 6C 55 03 53 58 54 84 12
+20 55 80 11 00 00 04 50 55 53 48 00 84 12 20 55
+00 12 86 55 06 50 55 53 48 2E 42 00 84 12 20 55
+40 12 E0 54 04 43 41 4C 4C 00 84 12 20 55 80 12
+1A 53 0E 4A 0D 12 87 12 9C 47 2E 44 0D 6F 75 74
+20 6F 66 20 62 6F 75 6E 64 73 7A 4B 70 4A 28 52
+D2 55 92 53 C4 1D 3E 40 2C 00 87 12 F2 47 06 49
+4C 44 00 4C 80 53 E8 55 0A 4E 3E 4F 1A 83 E0 33
+29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
+38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
+5A 06 8F 3F 7A 55 04 52 52 43 4D 00 84 12 CC 55
+50 00 16 56 04 52 52 41 4D 00 84 12 CC 55 50 01
+24 56 04 52 4C 41 4D 00 84 12 CC 55 50 02 32 56
+04 52 52 55 4D 00 84 12 CC 55 50 03 94 55 05 50
+55 53 48 4D 84 12 CC 55 00 15 4E 56 04 50 4F 50
+4D 00 84 12 CC 55 00 17 40 56 03 53 3E 3D 85 12
+00 38 6A 56 02 53 3C 00 85 12 00 34 5C 56 03 30
+3E 3D 85 12 00 30 7E 56 02 30 3C 00 85 12 00 30
+00 00 02 55 3C 00 85 12 00 2C 92 56 03 55 3E 3D
+85 12 00 28 88 56 03 30 3C 3E 85 12 00 24 A6 56
+02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
+C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 9C 56
+04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
+29 53 0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00
+30 4D 90 54 04 45 4C 53 45 00 1A 42 C6 1D BA 40
+00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
+D0 56 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
+C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0
+FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D 14 55
+05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
+05 57 48 49 4C 45 0D 12 87 12 BE 56 82 46 26 47
+74 56 06 52 45 50 45 41 54 00 0D 12 87 12 46 57
+D6 56 26 47 76 57 3D 41 08 4E 3E 4F 2A 48 B2 92
+C4 1D CB 2F 98 42 C6 1D 00 00 30 4D A4 55 03 42
+57 31 84 12 74 57 00 00 8E 57 03 42 57 32 84 12
+74 57 00 00 9A 57 03 42 57 33 84 12 74 57 00 00
+B2 57 3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B
+BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D
+00 00 03 46 57 31 84 12 B0 57 00 00 D2 57 03 46
+57 32 84 12 B0 57 00 00 DE 57 03 46 57 33 84 12
+B0 57 00 00 EA 57 04 47 4F 54 4F 00 2F 83 8F 4E
+00 00 3E 40 00 3C 0D 12 87 12 F0 4B 18 4A 26 47
+00 00 05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0
+00 04 3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-A2 52
+6E 50
q
@1800
-10 00 08 00 00 D6 E8 03 05 00 18 00 98 61 D4 50
-2D 01 6F B0 B6 46 C8 46
+10 00 08 00 00 D6 E8 03 05 00 18 00 1C 58 88 4E
+2E 01 6B B0 06 45 18 45 D4 4F
@4400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 44
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 44
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 44
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 44 02 3E 52 00 0E 12 3E 4F 30 4D 70 44 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 44 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 44 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 44
-01 21 BE 4F 00 00 3E 4F 30 4D CC 44 02 30 3D 00
-1E 83 0E 7E 30 4D FC 44 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 45 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 44 B0 12 06 45 12 D2 0A 18 F9 3F 39 40
+3A 00 29 83 B9 40 6E 50 C6 FF FB 23 B2 40 68 45
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 44 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 45 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 45 02 23 53 00 87 12 88 45 C0 45
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 45
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 44 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 45 34 44 86 44 D4 44 BA 45
-92 44 F8 45 D4 45 D6 47 42 4B 82 47 2A 44 22 45
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 45 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 46 18 42 EC 05 2F 83 8F 4E
-00 00 B0 12 B6 46 92 B3 FC 05 FD 27 1E 42 EC 05
-B0 12 C8 46 30 4D A2 B3 FC 05 FD 27 B2 40 11 00
-EE 05 D2 C3 22 02 30 41 B2 40 13 00 EE 05 D2 D3
-22 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 46
-B0 12 B6 46 12 D2 0A 18 F9 3F F0 44 06 41 43 43
-45 50 54 00 3C 40 64 47 3B 40 2E 47 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 47
-92 B3 FC 05 05 24 18 42 EC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 EC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 FC 05
-FD 27 82 48 EE 05 30 4D 5A 47 2D 83 92 B3 FC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 44 04 45 4D 49
-54 00 30 40 86 47 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C 47 04 45 43 48 4F 00 B2 40 82 48
-52 47 82 43 DE 1D 30 4D 32 46 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 47 92 43 DE 1D 30 4D 20 46
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 47
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 47 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 45
-02 43 52 00 30 40 08 48 87 12 1E 48 02 0D 0A 00
-D6 47 2A 44 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 45 82 53 22 00 82 43 B4 1D 87 12 14 48
-1E 48 B0 4A 14 48 22 00 80 48 4C 48 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA 47 82 2E 22 00 87 12 38 48 14 48 D6 47
-B0 4A 2A 44 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 44 34 40 00 44 30 4D 82 44 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 49 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 49 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 45 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 46 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 44 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC 46 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 47 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 4A 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 48 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 48 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 4B 42 4B 80 48 50 4B
-3D 40 58 4B CC 22 82 3E 5A 4B 0A 4E 3E 4F 3D 40
-70 4B 23 27 3D 40 4A 4B 1A E2 BE 1D A1 27 B5 23
-72 4B 3E 4F 3D 40 4A 4B B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 4E CB 3F D2 4A
+12 D3 F5 3F 34 40 EC 44 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 FC 05 FD 27 B2 40 11 00
+EE 05 D2 C3 22 02 30 41 A2 B3 FC 05 FD 27 B2 40
+13 00 EE 05 D2 D3 22 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 45 3B 40 70 45 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 45
+92 B3 FC 05 05 24 18 42 EC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 44 21 52 3A 17 58 42 EC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+FC 05 FD 27 82 48 EE 05 30 4D 9C 45 2D 83 92 B3
+FC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 45 08 4E 3E 4F E0 3F BE 45
+04 45 43 48 4F 00 B2 40 82 48 94 45 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 45 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 46 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 46 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 46 0D 12 87 12 2E 44 02 0D 0A 00 00 46 26 47
+00 00 03 4B 45 59 30 40 4A 46 18 42 EC 05 2F 83
+8F 4E 00 00 B0 12 06 45 92 B3 FC 05 FD 27 1E 42
+EC 05 B0 12 18 45 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A 46
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 44 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 46
+02 23 53 00 0D 12 87 12 E2 46 1C 47 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 47 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 45 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 46 14 47 9C 46 54 47 30 47
+00 46 70 4A C4 45 26 47 E4 45 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 47 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 44 2E 44 F8 49 24 44 22 00 F2 47 C0 47
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A 47 82 2E 22 00 0D 12 87 12
+AA 47 24 44 00 46 F8 49 26 47 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 44 34 40 EC 44 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 49 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 49 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 44
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C 45 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 49
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 44 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 47 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 44 70 4A F2 47 80 4A
+3D 40 88 4A E2 22 A4 26 8A 4A 0A 4E 3E 4F 3D 40
+A0 4A 39 27 3D 40 7A 4A 1A E2 BE 1D BD 23 AC 27
+A2 4A 3E 4F 3D 40 7A 4A BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 4D D2 3F D0 45
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 44 46 4B AE 4B B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 45 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A 44
-04 48 8C 47 42 4B 82 47 46 4B A4 44 0C 45 1E 48
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 4C
-14 48 30 FF A0 4A 26 45 1E 48 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 4C 3C 46 E0 4B C2 4A 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E 4C 86 41 42 4F
-52 54 22 00 87 12 38 48 14 48 40 4C B0 4A 2A 44
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 CC 51
-B0 12 B6 46 92 C3 FC 05 38 40 AA 0A 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 FC 05 F3 23 87 12
-46 51 14 48 DE 1D EA 44 AC 47 1E 48 04 1B 5B 37
-6D 00 D6 47 58 44 40 46 9A 4C 04 48 1E 48 05 6C
-69 6E 65 3A D6 47 D0 44 24 46 D6 47 1E 48 04 1B
-5B 30 6D 00 D6 47 24 4C 00 00 83 5B 27 5D 87 12
-C0 4C 14 48 14 48 B0 4A B0 4A 2A 44 E8 48 01 27
-87 12 42 4B 80 48 EE 48 40 46 CE 4C 2A 44 7A 4B
-32 45 81 5C 92 42 C0 1D C4 1D 30 4D AA 4C 81 5B
-82 43 BE 1D 30 4D D2 4C 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 4A 82 49 53 00 87 12
-BE 4B EA 44 40 46 12 4D AE 4C 14 48 F0 4C B0 4A
-2A 44 C0 4C F0 4C 2A 44 FA 4C 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 4B 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 4B
-80 48 EE 48 58 44 40 46 CE 4C 0C 45 40 46 5C 4D
-14 48 14 48 B0 4A B0 4A 14 48 B0 4A B0 4A 2A 44
-DE 4C 81 3B 82 93 BE 1D B5 27 87 12 14 48 2A 44
-B0 4A FA 4D E0 4C 2A 44 62 4D 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 4D 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A 4D 01 3A 30 12 A0 4D 92 B3 C6 1D A2 63 C6 1D
-87 12 42 4B 80 48 C8 4D 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 48 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 4C 90 4B 05 44 45 46 45 52
-B0 12 B8 4D BA 40 30 40 FC FF BA 40 AE 4D FE FF
-E3 3F 1E 4B 06 43 52 45 41 54 45 00 B0 12 B8 4D
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 4E 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 49 05 3E 42 4F 44 59 2E 52
-30 4D 44 4E 04 43 4F 44 45 00 B0 12 B8 4D 82 43
-5C 61 A2 82 C6 1D 87 12 D6 50 B0 50 2A 44 84 4E
-07 43 4F 44 45 4E 4E 4D B0 12 86 4D F0 3F 00 00
-07 45 4E 44 43 4F 44 45 87 12 E4 50 FA 4D 2A 44
-2C 4C 03 41 53 4D B2 40 B4 50 DA 1D DE 3F B0 4E
-06 45 4E 44 41 53 4D 00 87 12 B8 4E F8 50 2A 44
-00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12
-00 00 A2 53 C6 1D B2 43 BE 1D 30 40 E4 50 00 00
-05 4C 4F 32 48 49 1A 42 C6 1D BA 40 B0 12 00 00
-BA 40 2A 44 02 00 A2 52 C6 1D ED 3F 1A 4D 85 48
-49 32 4C 4F 87 12 A0 4A 4E 4F B0 4A E0 4C D6 50
-B0 50 2A 44 1E 4F 82 49 46 00 2F 83 8F 4E 00 00
-1E 42 C6 1D A2 52 C6 1D BE 40 40 46 00 00 2E 53
-30 4D 5E 4E 84 45 4C 53 45 00 A2 52 C6 1D 1A 42
-C6 1D BA 40 3C 46 FC FF 8E 4A 00 00 2A 83 0E 4A
-30 4D D0 47 84 54 48 45 4E 00 9E 42 C6 1D 00 00
-3E 4F 30 4D A0 4E 85 42 45 47 49 4E 30 40 A0 4A
-74 4F 85 55 4E 54 49 4C 39 40 40 46 A2 52 C6 1D
-1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D
-C2 4E 85 41 47 41 49 4E 39 40 3C 46 EF 3F 7A 48
-85 57 48 49 4C 45 87 12 3A 4F 76 44 2A 44 34 48
-86 52 45 50 45 41 54 00 87 12 B8 4F 7A 4F 2A 44
-54 4F 82 44 4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D
-1E 42 C6 1D BE 40 54 46 FE FF A2 53 00 1C 1A 42
-00 1C 8A 43 00 00 30 4D E2 4A 84 4C 4F 4F 50 00
-39 40 76 46 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF
-8A 4E FE FF 1E 42 00 1C A2 83 00 1C 2E 4E 0E 93
-03 24 8E 4A 00 00 F6 3F 3E 4F 30 4D 90 46 85 2B
-4C 4F 4F 50 39 40 64 46 E5 3F 0A 50 04 4D 4F 56
-45 00 0A 4E 38 4F 39 4F 3E 4F 0A 93 11 24 08 99
-0F 24 06 2C F8 49 00 00 18 53 1A 83 FB 23 30 4D
-08 5A 09 5A 19 83 18 83 E8 49 00 00 1A 83 FA 23
-30 4D 14 48 CA 1D F2 44 2A 44 84 12 82 50 B2 4F
-68 53 E2 4F BE 4C 36 4F 3E 50 7C 54 64 48 6A 51
-84 51 92 4F 04 52 00 00 4E 54 E8 4C 78 4E 00 00
-84 12 82 50 26 60 BE 5F 22 5F E6 5A 8A 59 00 00
-EA 5D 00 00 4C 61 60 61 E2 59 20 5A F2 5F 00 00
-00 00 C2 5A AE 50 3A 40 0C 00 39 40 CA 1D 38 40
-CC 1D C6 3F 3A 40 0E 00 39 40 CC 1D 38 40 CA 1D
-B9 3F 82 43 CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D
-8A 50 F2 50 F8 50 08 51 3A 4E 82 4A C8 1D 2E 4E
-82 4E C6 1D 3D 40 10 00 09 4A 08 49 29 83 18 48
-FE FF 0E 98 FC 2B 89 48 00 00 1D 83 F6 23 2A 4A
-0A 93 F0 23 3E 4F 3D 41 30 4D 32 4D 09 50 57 52
-5F 53 54 41 54 45 84 12 00 51 D4 50 98 61 D0 4F
-09 52 53 54 5F 53 54 41 54 45 92 42 0E 18 4A 51
-92 42 0C 18 4C 51 EF 3F 3C 51 08 50 57 52 5F 48
-45 52 45 00 92 42 C8 1D 4A 51 92 42 C6 1D 4C 51
-30 4D 50 51 08 52 53 54 5F 48 45 52 45 00 92 42
-C8 1D 0E 18 92 42 C6 1D 0C 18 EC 3F C0 4F 04 57
-49 50 45 00 39 40 10 00 29 83 B9 43 80 FF FC 23
-B2 40 E0 46 DE 46 B2 40 0E 52 0C 52 B2 40 D4 50
-0E 18 B2 40 98 61 0C 18 30 12 5A 51 B2 40 86 47
-84 47 B2 40 08 48 06 48 B2 40 98 46 96 46 B2 40
-18 00 0A 18 37 40 1A 44 36 40 92 44 35 40 0E 44
-34 40 00 44 B2 40 0A 00 DC 1D B2 40 20 00 B4 1D
-30 41 9E 51 04 57 41 52 4D 00 30 40 0E 52 3D 40
-44 52 92 C3 30 01 1E 42 08 18 0E 93 12 24 F2 B0
-10 00 20 02 02 20 3E E3 1E 53 F2 D0 30 00 2A 02
-3E 90 0A 00 B7 27 3E 90 16 00 B4 2F 2E 93 83 27
-8C 2F 30 4D 1E 48 06 0D 1B 5B 37 6D 23 00 D6 47
-34 46 1E 48 19 46 61 73 74 46 6F 72 74 68 20 C2
-A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 D6 47
-14 48 30 FF A0 4A B8 44 24 46 1E 48 0A 62 79 74
-65 73 20 66 72 65 65 00 3C 46 9A 4C 86 4F 04 43
-4F 4C 44 00 92 B3 EA 05 FD 23 B2 40 04 A5 20 01
-44 52 B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3
+3B 49 3A 49 3D 15 87 12 74 4A DC 4A B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E 46 D4 44
+70 4A C4 45 74 4A 8C 46 BC 46 2E 44 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 4B 24 44 40 FF
+2A 4E C4 46 2E 44 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 4B 48 44 0C 4B 0A 4A 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A 4B 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 47 24 44 6E 4B F8 49 26 47 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 4F B0 12
+06 45 92 C3 FC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 FC 05 F3 23 0D 12 87 12
+10 4F 24 44 DE 1D 02 45 D6 45 2E 44 04 1B 5B 37
+6D 00 00 46 7C 46 4C 44 C8 4B 2E 46 2E 44 05 6C
+69 6E 65 3A 00 46 66 47 00 46 2E 44 04 1B 5B 30
+6D 00 00 46 50 4B 00 00 83 5B 27 5D 0D 12 87 12
+F0 4B 24 44 24 44 F8 49 F8 49 26 47 44 48 01 27
+0D 12 87 12 70 4A F2 47 4A 48 4C 44 00 4C 26 47
+AA 4A D2 46 81 5C 92 42 C0 1D C4 1D 30 4D D8 4B
+81 5B 82 43 BE 1D 30 4D 04 4C 01 5D B2 43 BE 1D
+30 4D F2 4A 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 4A F2 47 4A 48 7C 46 4C 44 00 4C BC 46
+4C 44 50 4C 24 44 24 44 F8 49 F8 49 24 44 F8 49
+F8 49 26 47 40 47 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 4C 01 3A
+30 12 B8 4C 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 4A F2 47 86 4C 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E 4C 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 4C 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 44
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 4B CC 4C 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 44 26 47 F8 49 F2 4C 12 4C 26 47 5C 4A 06 43
+52 45 41 54 45 00 B0 12 74 4C BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 4A 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 4D 04 43 4F 44 45 00 B0 12 74 4C A2 82 C6 1D
+0D 12 87 12 8A 4E 64 4E 26 47 72 4D 07 43 4F 44
+45 4E 4E 4D 30 12 7C 4D 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 4C A4 4E 26 47 58 4B
+03 41 53 4D B2 40 68 4E DA 1D DE 3F 9C 4D 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 4D C2 4E 26 47
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 4E 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 4C 85 48 49 32 4C 4F 0D 12
+87 12 2A 4E 1E 4E F8 49 12 4C 80 4D 26 47 2E 53
+30 4D 8C 4D 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 44 CA 1D AE 46 26 47 84 12
+36 4E B0 4D 5C 50 58 4D EE 4B 08 4E 42 46 20 4A
+D8 47 34 4F 4E 4F 62 47 CE 4F 00 00 FC 51 1A 4C
+AA 48 00 00 84 12 36 4E 2E 57 94 57 E2 56 E4 57
+A8 56 00 00 D8 53 00 00 9E 56 50 57 00 57 3E 57
+E8 54 00 00 00 00 00 58 62 4E 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E 4E BC 4E C2 4E
+D2 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 4C 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 4E 88 4E 1C 58 A6 47 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 4F 92 42 0C 18 16 4F
+EF 3F 06 4F 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 4F 92 42 C6 1D 16 4F 30 4D 1A 4F 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC 47 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 44 02 44
+B2 40 D8 4F D6 4F B2 40 88 4E 0E 18 B2 40 1C 58
+0C 18 30 12 24 4F B2 40 C8 45 C6 45 B2 40 32 46
+30 46 B2 40 4A 46 48 46 B2 40 18 00 0A 18 37 40
+26 47 36 40 9C 46 35 40 FA 44 34 40 EC 44 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 4F 04 57
+41 52 4D 00 30 40 D8 4F 3D 40 12 50 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 20 02 02 20
+3E E3 1E 53 F2 D0 30 00 2A 02 92 D3 FA 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E 44 07 0D 0A 1B 5B 37 6D 23 00 46 9C 47
+2E 44 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 46 24 44
+40 FF 2A 4E A6 46 66 47 2E 44 0A 62 79 74 65 73
+20 66 72 65 65 00 48 44 C8 4B 24 4E 04 43 4F 4C
+44 00 92 B3 EA 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 1C B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3
06 02 B2 43 26 02 B2 43 22 02 D2 D3 24 02 B2 43
42 02 B2 43 46 02 B2 43 62 02 B2 43 66 02 B2 40
7F FF 82 02 B2 43 86 02 F2 43 22 03 F2 43 26 03
10 00 B2 40 33 00 64 01 D2 43 61 01 92 D2 9E 01
08 18 38 40 59 14 18 83 FE 23 19 83 FA 23 B2 42
B0 01 F2 D0 10 00 2A 03 F2 C0 40 00 A2 04 39 40
-00 08 29 83 89 43 00 1C FC 23 39 40 3A 00 29 83
-B9 40 A2 52 C6 FF FB 23 B2 40 26 47 E4 FF B2 40
+00 08 29 83 89 43 00 1C FC 23 B0 12 0E 44 B2 40
81 00 E0 05 92 42 02 18 E6 05 92 42 04 18 E8 05
-92 C3 E0 05 92 D3 FA 05 3F 40 80 1C 31 40 E0 1C
-30 12 0A 52 3C 3F 8E 52 07 43 4F 4D 50 41 52 45
-0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83
-07 30 1C 83 07 30 19 53 F9 98 FF FF F5 27 02 2C
-3E 43 30 4D 1E 43 30 4D B2 4D 86 5B 54 48 45 4E
-5D 00 30 4D 9A 53 86 5B 45 4C 53 45 5D 00 87 12
-14 48 00 00 C6 44 42 4B 80 48 24 4B 34 44 40 46
-10 54 44 44 1E 48 06 5B 54 48 45 4E 5D 00 70 53
-4A 46 E0 53 F8 47 D0 44 58 44 4A 46 B6 53 2A 44
-44 44 1E 48 06 5B 45 4C 53 45 5D 00 70 53 4A 46
-FE 53 F8 47 D0 44 58 44 4A 46 B4 53 2A 44 1E 48
-04 5B 49 46 5D 00 70 53 4A 46 B6 53 3C 46 B4 53
-F8 47 1E 48 05 0D 0A 6B 6F 20 D6 47 8C 47 32 4B
-3C 46 B6 53 A6 53 84 5B 49 46 5D 00 0E 93 3E 4F
-BE 27 30 4D 26 54 89 5B 44 45 46 49 4E 45 44 5D
-87 12 42 4B 80 48 EE 48 6A 44 2A 44 36 54 8B 5B
-55 4E 44 45 46 49 4E 45 44 5D 87 12 42 4B 80 48
-EE 48 6A 44 00 45 2A 44 6A 54 3D 41 B2 4E 0E 18
-A2 4E 0C 18 3E 4F 30 40 5A 51 4C 50 06 4D 41 52
-4B 45 52 00 B0 12 B8 4D BA 40 84 12 FC FF BA 40
-68 54 FE FF 9A 42 C8 1D 00 00 28 83 8A 48 02 00
-A2 52 C6 1D 30 40 00 4E 1C 15 B0 12 2A 44 80 48
-EE 48 4A 46 BE 54 AA 49 40 46 CE 4C D8 54 C0 54
+92 C3 E0 05 3F 40 80 1C 30 12 D4 4F 45 3F 24 4D
+86 5B 54 48 45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F
+39 4F 0E 4B 0E 5C 10 24 1B 83 06 30 1C 83 04 30
+19 53 F9 98 FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53
+9F 83 00 00 F9 23 2F 53 2D 53 F7 3F 20 51 86 5B
+45 4C 53 45 5D 00 0D 12 87 12 24 44 00 00 AA 46
+70 4A F2 47 62 4A 68 46 4C 44 B8 51 70 46 2E 44
+06 5B 54 48 45 4E 5D 00 2A 51 92 51 4E 51 70 51
+26 47 70 46 2E 44 06 5B 45 4C 53 45 5D 00 2A 51
+A8 51 4E 51 6E 51 26 47 2E 44 04 5B 49 46 5D 00
+2A 51 70 51 48 44 6E 51 22 46 2E 44 05 0D 0A 6B
+6F 20 00 46 D4 44 C4 44 48 44 70 51 5E 51 84 5B
+49 46 5D 00 0E 93 3E 4F C6 27 30 4D 2F 53 30 4D
+CE 51 89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12
+70 4A F2 47 4A 48 DC 51 26 47 E2 51 8B 5B 55 4E
+44 45 46 49 4E 45 44 5D 0D 12 87 12 EC 51 10 52
+3D 41 30 40 B6 46 38 40 C0 1D 0A 4E 39 48 2E 48
+09 5E 1E 52 C4 1D 09 9E 03 24 7A 9E FC 27 1E 83
+0A 4E 2A 88 82 4A C4 1D 30 4D 1C 15 87 12 F2 47
+4A 48 42 44 4E 52 06 49 4C 44 00 4C 68 52 50 52
39 4E 39 80 86 12 08 24 19 53 02 20 2E 4E 04 3C
-2E 53 19 53 01 24 2E 82 1B 17 30 41 32 B0 00 02
-01 24 3E 4F 30 41 3E 40 28 00 B0 12 A8 54 B0 12
-DC 54 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40
-29 00 1C 15 12 12 C4 1D 92 53 C4 1D B0 12 2A 44
-80 48 AA 49 40 46 24 55 1A 55 21 53 3E 90 10 00
-81 2D DA 2B 26 55 B2 41 C4 1D D6 3F 87 12 42 4B
-74 48 34 55 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E
-3E 4F 7A 90 23 00 29 20 92 53 C4 1D B0 12 A8 54
-B0 12 DC 54 3C 40 00 03 0E 93 1C 24 3C 40 10 03
-1E 93 18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02
-2E 92 10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03
-3E 93 08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
-89 4E 00 00 3E 4F 3D 41 30 4D 7A 90 26 00 09 20
-3C 40 10 02 92 53 C4 1D B0 12 A8 54 B0 12 DC 54
-EB 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 1D
-B0 12 02 55 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-02 55 92 92 C0 1D C4 1D 02 24 92 53 C4 1D 8E 10
-0C 5E D8 3F B0 12 02 55 FA 23 3C 50 10 00 B0 12
-E6 54 EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D 87 12
-42 4B 74 48 06 56 FE 90 26 00 00 00 3E 40 20 00
-03 20 3C 50 82 00 C6 3F B0 12 02 55 E1 23 3C 50
-80 00 B0 12 E6 54 DC 3F D6 46 04 52 45 54 49 00
-87 12 14 48 00 13 B0 4A 2A 44 14 48 2C 00 2C 55
-FE 55 44 56 09 4B 2E 4E 0E DC A2 3F 00 4F 03 4D
-4F 56 84 12 3A 56 00 40 4E 56 05 4D 4F 56 2E 42
-84 12 3A 56 40 40 00 00 03 41 44 44 84 12 3A 56
-00 50 68 56 05 41 44 44 2E 42 84 12 3A 56 40 50
-74 56 04 41 44 44 43 00 84 12 3A 56 00 60 82 56
-06 41 44 44 43 2E 42 00 84 12 3A 56 40 60 2A 56
-04 53 55 42 43 00 84 12 3A 56 00 70 A0 56 06 53
-55 42 43 2E 42 00 84 12 3A 56 40 70 AE 56 03 53
-55 42 84 12 3A 56 00 80 BE 56 05 53 55 42 2E 42
-84 12 3A 56 40 80 E2 4E 03 43 4D 50 84 12 3A 56
-00 90 D8 56 05 43 4D 50 2E 42 84 12 3A 56 40 90
-D0 4E 04 44 41 44 44 00 84 12 3A 56 00 A0 F2 56
-06 44 41 44 44 2E 42 00 84 12 3A 56 40 A0 E4 56
-03 42 49 54 84 12 3A 56 00 B0 10 57 05 42 49 54
-2E 42 84 12 3A 56 40 B0 1C 57 03 42 49 43 84 12
-3A 56 00 C0 2A 57 05 42 49 43 2E 42 84 12 3A 56
-40 C0 36 57 03 42 49 53 84 12 3A 56 00 D0 44 57
-05 42 49 53 2E 42 84 12 3A 56 40 D0 00 00 03 58
-4F 52 84 12 3A 56 00 E0 5E 57 05 58 4F 52 2E 42
-84 12 3A 56 40 E0 90 56 03 41 4E 44 84 12 3A 56
-00 F0 78 57 05 41 4E 44 2E 42 84 12 3A 56 40 F0
-42 4B 2C 55 96 57 0A 4C 3C F0 70 00 8A 10 3A F0
-0F 00 0C DA 4F 3F CA 56 03 52 52 43 84 12 90 57
-00 10 A8 57 05 52 52 43 2E 42 84 12 90 57 40 10
-B4 57 04 53 57 50 42 00 84 12 90 57 80 10 C2 57
-03 52 52 41 84 12 90 57 00 11 D0 57 05 52 52 41
-2E 42 84 12 90 57 40 11 DC 57 03 53 58 54 84 12
-90 57 80 11 00 00 04 50 55 53 48 00 84 12 90 57
-00 12 F6 57 06 50 55 53 48 2E 42 00 84 12 90 57
-40 12 50 57 04 43 41 4C 4C 00 84 12 90 57 80 12
-1A 53 0E 4A 87 12 34 46 1E 48 0D 6F 75 74 20 6F
-66 20 62 6F 75 6E 64 73 4C 4C 42 4B 74 48 40 58
-92 53 C4 1D 3E 40 2C 00 B0 12 2A 44 80 48 AA 49
-40 46 CE 4C F4 55 58 58 0A 4E 3E 4F 1A 83 E0 33
-29 4E 59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A
-38 90 10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10
-5A 06 8F 3F EA 57 06 52 52 43 4D 2E 41 00 84 12
-3A 58 40 00 86 58 04 52 52 43 4D 00 84 12 3A 58
-50 00 96 58 06 52 52 41 4D 2E 41 00 84 12 3A 58
-40 01 A4 58 04 52 52 41 4D 00 84 12 3A 58 50 01
-B4 58 06 52 4C 41 4D 2E 41 00 84 12 3A 58 40 02
-C2 58 04 52 4C 41 4D 00 84 12 3A 58 50 02 D2 58
-06 52 52 55 4D 2E 41 00 84 12 3A 58 40 03 E0 58
-04 52 52 55 4D 00 84 12 3A 58 50 03 04 58 07 50
-55 53 48 4D 2E 41 84 12 3A 58 00 14 FE 58 05 50
-55 53 48 4D 84 12 3A 58 00 15 0E 59 06 50 4F 50
-4D 2E 41 00 84 12 3A 58 00 16 1C 59 04 50 4F 50
-4D 00 84 12 3A 58 00 17 F0 58 03 53 3E 3D 85 12
-00 38 3A 59 02 53 3C 00 85 12 00 34 2C 59 03 30
-3E 3D 85 12 00 30 4E 59 02 30 3C 00 85 12 00 30
-00 00 02 55 3C 00 85 12 00 2C 62 59 03 55 3E 3D
-85 12 00 28 58 59 03 30 3C 3E 85 12 00 24 76 59
-02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
-C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 6C 59
-04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
-29 53 0A 89 0A 11 3A 90 00 02 33 2F 88 DA 00 00
-30 4D 00 57 04 45 4C 53 45 00 1A 42 C6 1D BA 40
-00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
-A0 59 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
-C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 12 3B 3A F0
-FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D 84 57
-05 41 47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00
-05 57 48 49 4C 45 87 12 8E 59 76 44 2A 44 44 59
-06 52 45 50 45 41 54 00 87 12 16 5A A6 59 2A 44
-42 5A 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D CD 2F
-98 42 C6 1D 00 00 30 4D 14 58 03 42 57 31 84 12
-40 5A 00 00 5A 5A 03 42 57 32 84 12 40 5A 00 00
-66 5A 03 42 57 33 84 12 40 5A 00 00 7E 5A 3D 41
-1A 42 C6 1D 28 4E B2 92 C4 1D 90 2B BA 4F 00 00
-A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
-57 31 84 12 7C 5A 00 00 9E 5A 03 46 57 32 84 12
-7C 5A 00 00 AA 5A 03 46 57 33 84 12 7C 5A 00 00
-00 00 05 3F 47 4F 54 4F 3E 90 00 30 07 24 3E E0
-00 04 3E B0 00 10 02 24 3E E0 00 08 87 12 C0 4C
-DA 4A 2A 44 B6 5A 04 47 4F 54 4F 00 2F 83 8F 4E
-00 00 3E 40 00 3C F2 3F 87 12 42 4B 74 48 00 5B
-69 4E 3E 4F 3C 4F 2C 4C 1B 42 C6 1D A2 53 C6 1D
-79 90 52 00 0A 20 B0 12 02 55 5E 0E 5E 0E 0E DC
-8B 4E 00 00 0E 4B 3D 41 30 4D 79 90 23 00 0D 20
-3C C0 40 00 92 53 C4 1D A2 53 C6 1D B0 12 A8 54
-BB 4F 02 00 3E F0 0F 00 E8 3F 79 90 26 00 03 20
-3C E0 E0 00 EF 3F 3C C0 F0 00 79 90 40 00 12 20
-92 53 C4 1D B0 12 02 55 D8 23 3C D0 10 00 3E 40
-2B 00 B0 12 02 55 92 92 C0 1D C4 1D CE 27 92 53
-C4 1D CB 3F 3C D0 30 00 A2 53 C6 1D 3E 40 28 00
-B0 12 A8 54 BB 4F 02 00 3E 40 29 00 EA 3F 87 12
-42 4B 74 48 A6 5B 3B 4F 2C 4B 69 4E 7E 40 20 00
-79 90 52 00 03 20 B0 12 02 55 B1 3F 3C C0 F0 00
-A2 53 C6 1D 79 90 26 00 09 20 3C D0 60 00 92 53
-C4 1D B0 12 A8 54 BB 4F 02 00 A1 3F 3C D0 70 00
-3E 40 28 00 B0 12 A8 54 BB 4F 02 00 3E 40 29 00
-E2 3F 14 48 2C 00 F8 5A 9E 5B 66 44 2A 44 5A 56
-04 4D 4F 56 41 00 84 12 F2 5B C0 00 72 5A 04 43
-4D 50 41 00 84 12 F2 5B D0 00 10 5A 04 41 44 44
-41 00 84 12 F2 5B E0 00 30 5A 04 53 55 42 41 00
-84 12 F2 5B F0 00 0E 5C 05 43 41 4C 4C 41 87 12
-42 4B 74 48 46 5C 1B 42 C6 1D A2 53 C6 1D 6E 4E
-3C 40 34 01 7E 90 52 00 0B 20 7E 40 20 00 B0 12
-02 55 5C 0E 0C DE 8B 4C 00 00 3E 4F 3D 41 30 4D
-2C 53 7E 90 40 00 0B 20 92 53 C4 1D 7E 40 20 00
-B0 12 02 55 EE 23 1C 53 3E 40 2B 00 E8 3F A2 53
-C6 1D 7E 90 23 00 09 20 3C 40 3B 01 92 53 C4 1D
-B0 12 A8 54 BB 4F 02 00 DC 3F 7E 90 26 00 02 20
-2C 53 F4 3F 7E 40 28 00 1C 83 B0 12 A8 54 BB 4F
-02 00 3E 40 29 00 CB 3F 87 12 42 4B 74 48 D0 5C
-69 4E 3E 4F 3C 40 00 18 79 90 52 00 05 20 B0 12
-02 55 0E 4C 3D 41 30 4D 82 43 5C 61 79 90 23 00
-0B 20 92 53 C4 1D B0 12 A8 54 2F 53 3E F0 0F 00
-5E 0A 5E 0E 0C DE ED 3F 79 90 26 00 F2 27 79 90
-40 00 12 20 92 53 C4 1D B0 12 02 55 E2 23 3E 40
-2B 00 92 53 C4 1D B0 12 02 55 92 92 C0 1D C4 1D
-D8 27 92 53 C4 1D D5 3F 3E 40 28 00 B0 12 A8 54
-8F 4E 00 00 3E 40 29 00 B0 12 02 55 3E 4F 3E F0
-0F 00 0C DE EA 3F 87 12 42 4B 74 48 5E 5D 3C 4F
-69 4E 3E 40 20 00 79 90 52 00 BB 27 82 43 5C 61
-79 90 26 00 08 20 92 53 C4 1D B0 12 A8 54 2F 53
-3E F0 0F 00 BF 3F 3E 40 28 00 B0 12 A8 54 F7 3F
-1B 42 C6 1D A2 53 C6 1D 0C 4E 3E 4F 1C D2 5C 61
-82 43 5C 61 3C DE 8B 4C 00 00 B2 41 C4 1D 30 4D
-14 48 C4 1D EA 44 86 44 14 48 2C 00 C8 5C 56 5D
-90 5D 3C 46 3A 56 00 5C 04 4D 4F 56 58 00 84 12
-B0 5D 40 00 00 40 C8 5D 06 4D 4F 56 58 2E 41 00
-84 12 B0 5D 00 00 40 40 D8 5D 06 4D 4F 56 58 2E
-42 00 84 12 B0 5D 40 00 40 40 1C 5C 04 41 44 44
-58 00 84 12 B0 5D 40 00 00 50 FC 5D 06 41 44 44
-58 2E 41 00 84 12 B0 5D 00 00 40 50 0C 5E 06 41
-44 44 58 2E 42 00 84 12 B0 5D 40 00 40 50 1E 5E
-05 41 44 44 43 58 84 12 B0 5D 40 00 00 60 30 5E
-07 41 44 44 43 58 2E 41 84 12 B0 5D 00 00 40 60
-40 5E 07 41 44 44 43 58 2E 42 84 12 B0 5D 40 00
-40 60 2A 5C 05 53 55 42 43 58 84 12 B0 5D 40 00
-00 70 64 5E 07 53 55 42 43 58 2E 41 84 12 B0 5D
-00 00 40 70 74 5E 07 53 55 42 43 58 2E 42 84 12
-B0 5D 40 00 40 70 86 5E 04 53 55 42 58 00 84 12
-B0 5D 40 00 00 80 98 5E 06 53 55 42 58 2E 41 00
-84 12 B0 5D 00 00 40 80 A8 5E 06 53 55 42 58 2E
-42 00 84 12 B0 5D 40 00 40 80 38 5C 04 43 4D 50
-58 00 84 12 B0 5D 40 00 00 90 CC 5E 06 43 4D 50
-58 2E 41 00 84 12 B0 5D 00 00 40 90 DC 5E 06 43
-4D 50 58 2E 42 00 84 12 B0 5D 40 00 40 90 C4 59
-05 44 41 44 44 58 84 12 B0 5D 40 00 00 A0 00 5F
-07 44 41 44 44 58 2E 41 84 12 B0 5D 00 00 40 A0
-10 5F 07 44 41 44 44 58 2E 42 84 12 B0 5D 40 00
-40 A0 EE 5E 04 42 49 54 58 00 84 12 B0 5D 40 00
-00 B0 34 5F 06 42 49 54 58 2E 41 00 84 12 B0 5D
-00 00 40 B0 44 5F 06 42 49 54 58 2E 42 00 84 12
-B0 5D 40 00 40 B0 56 5F 04 42 49 43 58 00 84 12
-B0 5D 40 00 00 C0 68 5F 06 42 49 43 58 2E 41 00
-84 12 B0 5D 00 00 40 C0 78 5F 06 42 49 43 58 2E
-42 00 84 12 B0 5D 40 00 40 C0 8A 5F 04 42 49 53
-58 00 84 12 B0 5D 40 00 00 D0 9C 5F 06 42 49 53
-58 2E 41 00 84 12 B0 5D 00 00 40 D0 AC 5F 06 42
-49 53 58 2E 42 00 84 12 B0 5D 40 00 40 D0 6A 57
-04 58 4F 52 58 00 84 12 B0 5D 40 00 00 E0 D0 5F
-06 58 4F 52 58 2E 41 00 84 12 B0 5D 00 00 40 E0
-E0 5F 06 58 4F 52 58 2E 42 00 84 12 B0 5D 40 00
-40 E0 52 5E 04 41 4E 44 58 00 84 12 B0 5D 40 00
-00 F0 04 60 06 41 4E 44 58 2E 41 00 84 12 B0 5D
-00 00 40 F0 14 60 06 41 4E 44 58 2E 42 00 84 12
-B0 5D 40 00 40 F0 14 48 C4 1D EA 44 86 44 42 4B
-C8 5C 90 5D 3C 46 90 57 BA 5E 04 52 52 43 58 00
-84 12 36 60 40 00 00 10 4A 60 06 52 52 43 58 2E
-41 00 84 12 36 60 00 00 40 10 5A 60 06 52 52 43
-58 2E 42 00 84 12 36 60 40 00 40 10 6C 60 04 52
-52 55 58 00 84 12 36 60 40 01 00 10 7E 60 06 52
-52 55 58 2E 41 00 84 12 36 60 00 01 40 10 8E 60
-06 52 52 55 58 2E 42 00 84 12 36 60 40 01 40 10
-A0 60 05 53 57 50 42 58 84 12 36 60 40 00 80 10
-B2 60 07 53 57 50 42 58 2E 41 84 12 36 60 00 00
-80 10 C2 60 04 52 52 41 58 00 84 12 36 60 40 00
-00 11 D4 60 06 52 52 41 58 2E 41 00 84 12 36 60
-00 00 40 11 E4 60 06 52 52 41 58 2E 42 00 84 12
-36 60 40 00 40 11 F6 60 04 53 58 54 58 00 84 12
-36 60 40 00 80 11 08 61 06 53 58 54 58 2E 41 00
-84 12 36 60 00 00 80 11 80 59 05 50 55 53 48 58
-84 12 36 60 40 00 00 12 2A 61 07 50 55 53 48 58
-2E 41 84 12 36 60 00 00 40 12 3A 61 07 50 55 53
-48 58 2E 42 84 12 36 60 40 00 40 12 00 00 18 61
-03 52 50 54 87 12 42 4B 74 48 6C 61 29 4E 7E 40
-20 00 79 90 52 00 06 20 B0 12 02 55 03 24 3E D0
-80 00 05 3C B0 12 A8 54 1E 83 3E F0 0F 00 82 4E
-5C 61 3E 4F 3D 41 30 4D
+2E 53 19 53 01 24 2E 82 1B 17 30 41 3E 40 28 00
+B0 12 3A 52 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
+3E 40 29 00 1C 15 12 12 C4 1D 92 53 C4 1D 87 12
+F2 47 06 49 4C 44 A4 52 9A 52 21 53 3E 90 10 00
+80 2D E2 2B A6 52 B2 41 C4 1D DE 3F 0D 12 87 12
+70 4A 16 52 B6 52 0C 43 1B 42 C6 1D A2 53 C6 1D
+6A 4E 3E 4F 7A 90 23 00 27 20 92 53 C4 1D B0 12
+3A 52 3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93
+18 24 3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92
+10 24 3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93
+08 24 3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E
+00 00 3E 4F 3D 41 30 4D 7A 90 26 00 07 20 3C 40
+10 02 92 53 C4 1D B0 12 3A 52 ED 3F 7A 90 40 00
+16 20 3C 40 20 00 92 53 C4 1D B0 12 84 52 0C 20
+3C 50 10 00 3E 40 2B 00 B0 12 84 52 92 92 C0 1D
+C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E DA 3F B0 12
+84 52 FA 23 3C 50 10 00 B0 12 6C 52 EF 3F 0C 43
+1B 42 C6 1D A2 53 C6 1D 0D 12 87 12 70 4A 16 52
+82 53 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
+82 00 C7 3F B0 12 84 52 E0 23 3C 50 80 00 B0 12
+6C 52 DB 3F 00 00 04 52 45 54 49 00 0D 12 87 12
+24 44 00 13 F8 49 26 47 24 44 2C 00 AC 52 78 53
+C2 53 09 4B 2E 4E 0E DC A2 3F F6 4D 03 4D 4F 56
+84 12 B8 53 00 40 CC 53 05 4D 4F 56 2E 42 84 12
+B8 53 40 40 00 00 03 41 44 44 84 12 B8 53 00 50
+E6 53 05 41 44 44 2E 42 84 12 B8 53 40 50 F2 53
+04 41 44 44 43 00 84 12 B8 53 00 60 00 54 06 41
+44 44 43 2E 42 00 84 12 B8 53 40 60 A6 53 04 53
+55 42 43 00 84 12 B8 53 00 70 1E 54 06 53 55 42
+43 2E 42 00 84 12 B8 53 40 70 2C 54 03 53 55 42
+84 12 B8 53 00 80 3C 54 05 53 55 42 2E 42 84 12
+B8 53 40 80 D2 4D 03 43 4D 50 84 12 B8 53 00 90
+56 54 05 43 4D 50 2E 42 84 12 B8 53 40 90 BE 4D
+04 44 41 44 44 00 84 12 B8 53 00 A0 70 54 06 44
+41 44 44 2E 42 00 84 12 B8 53 40 A0 62 54 03 42
+49 54 84 12 B8 53 00 B0 8E 54 05 42 49 54 2E 42
+84 12 B8 53 40 B0 9A 54 03 42 49 43 84 12 B8 53
+00 C0 A8 54 05 42 49 43 2E 42 84 12 B8 53 40 C0
+B4 54 03 42 49 53 84 12 B8 53 00 D0 C2 54 05 42
+49 53 2E 42 84 12 B8 53 40 D0 00 00 03 58 4F 52
+84 12 B8 53 00 E0 DC 54 05 58 4F 52 2E 42 84 12
+B8 53 40 E0 0E 54 03 41 4E 44 84 12 B8 53 00 F0
+F6 54 05 41 4E 44 2E 42 84 12 B8 53 40 F0 70 4A
+AC 52 14 55 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00
+0C DA 4F 3F 48 54 03 52 52 43 84 12 0E 55 00 10
+26 55 05 52 52 43 2E 42 84 12 0E 55 40 10 32 55
+04 53 57 50 42 00 84 12 0E 55 80 10 40 55 03 52
+52 41 84 12 0E 55 00 11 4E 55 05 52 52 41 2E 42
+84 12 0E 55 40 11 5A 55 03 53 58 54 84 12 0E 55
+80 11 00 00 04 50 55 53 48 00 84 12 0E 55 00 12
+74 55 06 50 55 53 48 2E 42 00 84 12 0E 55 40 12
+CE 54 04 43 41 4C 4C 00 84 12 0E 55 80 12 1A 53
+0E 4A 0D 12 87 12 9C 47 2E 44 0D 6F 75 74 20 6F
+66 20 62 6F 75 6E 64 73 7A 4B 70 4A 16 52 C0 55
+92 53 C4 1D 3E 40 2C 00 87 12 F2 47 06 49 4C 44
+00 4C 6E 53 D6 55 0A 4E 3E 4F 1A 83 E0 33 29 4E
+59 0E 0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90
+10 00 D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06
+8F 3F 68 55 04 52 52 43 4D 00 84 12 BA 55 50 00
+04 56 04 52 52 41 4D 00 84 12 BA 55 50 01 12 56
+04 52 4C 41 4D 00 84 12 BA 55 50 02 20 56 04 52
+52 55 4D 00 84 12 BA 55 50 03 82 55 05 50 55 53
+48 4D 84 12 BA 55 00 15 3C 56 04 50 4F 50 4D 00
+84 12 BA 55 00 17 2E 56 03 53 3E 3D 85 12 00 38
+58 56 02 53 3C 00 85 12 00 34 4A 56 03 30 3E 3D
+85 12 00 30 6C 56 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 80 56 03 55 3E 3D 85 12
+00 28 76 56 03 30 3C 3E 85 12 00 24 94 56 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D
+8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 8A 56 04 54
+48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 63 2F 88 DA 00 00 30 4D
+7E 54 04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C
+00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F BE 56
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D
+2A 83 0A 89 0A 11 3A 90 00 FE 42 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 1D 30 4D 02 55 05 41
+47 41 49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57
+48 49 4C 45 0D 12 87 12 AC 56 82 46 26 47 62 56
+06 52 45 50 45 41 54 00 0D 12 87 12 34 57 C4 56
+26 47 64 57 3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D
+CB 2F 98 42 C6 1D 00 00 30 4D 92 55 03 42 57 31
+84 12 62 57 00 00 7C 57 03 42 57 32 84 12 62 57
+00 00 88 57 03 42 57 33 84 12 62 57 00 00 A0 57
+3D 41 1A 42 C6 1D 28 4E B2 92 C4 1D 8E 2B BA 4F
+00 00 A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00
+03 46 57 31 84 12 9E 57 00 00 C0 57 03 46 57 32
+84 12 9E 57 00 00 CC 57 03 46 57 33 84 12 9E 57
+00 00 D8 57 04 47 4F 54 4F 00 2F 83 8F 4E 00 00
+3E 40 00 3C 0D 12 87 12 F0 4B 18 4A 26 47 00 00
+05 3F 47 4F 54 4F 3E 90 00 30 F4 27 3E E0 00 04
+3E B0 00 10 EF 27 3E E0 00 08 EC 3F
@FFFE
-A2 52
+6E 50
q
@1800
-10 00 04 00 51 55 40 1F 05 00 18 00 94 61 D4 50
-2D 01 6F B0 B6 46 C8 46
+10 00 04 00 51 55 40 1F 05 00 18 00 18 58 88 4E
+2E 01 6B B0 06 45 18 45 D4 4F
@4400
-2F 83 8F 4E 00 00 3E 41 0D 12 3D 4E 30 4D 2F 83
-8F 4E 00 00 3E 41 2E 4E 30 4D 3A 41 0D 12 0D 4A
-30 4D 00 00 04 45 58 49 54 00 3D 41 30 4D 24 44
-03 44 55 50 2F 83 8F 4E 00 00 30 4D 00 00 04 32
-44 55 50 00 8F 4E FE FF AF 4F FC FF 2F 82 30 4D
-00 00 04 3F 44 55 50 00 0E 93 EC 23 30 4D 30 44
-04 44 52 4F 50 00 3E 4F 30 4D 2F 53 30 4D 3E 44
-04 53 57 41 50 00 2A 4F 8F 4E 00 00 0E 4A 30 4D
-52 44 02 3E 52 00 0E 12 3E 4F 30 4D 70 44 02 52
-3E 00 2F 83 8F 4E 00 00 3E 41 30 4D 60 44 05 44
-45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F 0E 11
-2F 83 30 4D 00 00 01 2D 3E 8F 3E E3 1E 53 30 4D
-00 00 02 31 2B 00 1E 53 30 4D C2 44 02 31 2D 00
-1E 83 30 4D 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 00 00 01 40 2E 4E 30 4D E8 44
-01 21 BE 4F 00 00 3E 4F 30 4D CC 44 02 30 3D 00
-1E 83 0E 7E 30 4D FC 44 02 30 3C 00 0E 5E 0E 7E
-3E E3 30 4D 00 00 01 3D 3E 8F FA 27 0E F3 30 4D
-00 00 02 55 3C 00 3E 8F F9 2B 01 24 3E 43 30 4D
-16 45 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 0B 4E
+30 40 04 44 B0 12 06 45 12 D2 0A 18 F9 3F 39 40
+3A 00 29 83 B9 40 6E 50 C6 FF FB 23 B2 40 68 45
+E4 FF 30 41 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
+8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
+30 4D 0E 93 3E 4F 05 24 2D 4D 30 4D 0E 93 3E 4F
+FB 27 2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F
+08 59 19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01
+EB 27 21 52 2D 53 30 4D 91 53 00 00 F7 3F 0B 4E
1C 4F 02 00 2E 4F 0A 43 34 40 20 00 0E 93 04 20
04 11 0E 4C 0C 43 09 43 0A 9B 01 28 0A 8B 09 69
08 68 14 83 07 30 0C 5C 0E 6E 0A 6A F5 2B 0A 8B
-12 D3 F5 3F 34 40 00 44 8F 4A 02 00 8F 49 00 00
-0E 48 30 41 00 00 01 23 1B 42 DC 1D 2C 4F 2F 83
-B0 12 46 45 BF 4F 00 00 7A 90 0A 00 02 28 7A 50
-07 00 7A 50 30 00 92 83 B2 1D 18 42 B2 1D C8 4A
-00 00 30 4D 86 45 02 23 53 00 87 12 88 45 C0 45
-2D 83 09 93 E3 23 0E 93 E1 23 3D 41 30 4D B6 45
-02 23 3E 00 9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F
-30 4D 00 00 04 48 4F 4C 44 00 0A 4E 3E 4F DB 3F
-8E 44 04 53 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00
-D2 33 30 4D 87 12 36 45 34 44 86 44 D4 44 BA 45
-92 44 F8 45 D4 45 D6 47 42 4B 82 47 2A 44 22 45
-02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48 EA 3F
-00 00 01 2E 0E 93 F6 37 38 43 F5 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 0E 93 3E 4F F6 23
-2D 53 30 4D 39 40 00 80 39 8F 08 4E 3E 4F 08 59
-19 15 30 4D 81 5E 00 00 3E 4F 32 B0 00 01 E6 27
-2D 53 21 52 30 4D 91 53 00 00 F7 3F E4 45 01 49
-2F 83 8F 4E 00 00 2E 41 1E 81 02 00 30 4D 00 00
-03 4B 45 59 30 40 98 46 18 42 EC 05 2F 83 8F 4E
-00 00 B0 12 B6 46 92 B3 FC 05 FD 27 1E 42 EC 05
-B0 12 C8 46 30 4D A2 B3 FC 05 FD 27 B2 40 11 00
-EE 05 D2 C3 22 02 30 41 B2 40 13 00 EE 05 D2 D3
-22 02 30 41 00 00 05 53 4C 45 45 50 30 40 E0 46
-B0 12 B6 46 12 D2 0A 18 F9 3F F0 44 06 41 43 43
-45 50 54 00 3C 40 64 47 3B 40 2E 47 2D 15 0A 4E
-2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 58 47
-92 B3 FC 05 05 24 18 42 EC 05 38 90 0A 00 CB 23
-21 53 3D 15 DB 3F 21 52 3A 17 58 42 EC 05 48 9C
-08 2C 48 9B C9 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 FC 05
-FD 27 82 48 EE 05 30 4D 5A 47 2D 83 92 B3 FC 05
-E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 B2 40 18 00 0A 18 30 4D 9E 44 04 45 4D 49
-54 00 30 40 86 47 08 4E 3E 4F E0 3F 3F 80 06 00
-8F 4E 04 00 3E 40 54 00 BF 40 3C 1D 00 00 AF 4F
-02 00 A8 3F 7C 47 04 45 43 48 4F 00 B2 40 82 48
-52 47 82 43 DE 1D 30 4D 32 46 06 4E 4F 45 43 48
-4F 00 B2 40 30 4D 52 47 92 43 DE 1D 30 4D 20 46
-04 54 59 50 45 00 0E 93 0F 24 1E 15 3D 40 EC 47
-28 4F 7E 48 8F 48 00 00 2F 83 CB 3F EE 47 2D 83
-91 83 02 00 F5 23 1D 17 2F 53 3E 4F 30 4D D0 45
-02 43 52 00 30 40 08 48 87 12 1E 48 02 0D 0A 00
-D6 47 2A 44 2F 83 8F 4E 00 00 3E 4D 30 4D 2F 82
-8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3 0D 63
-30 4D F2 45 82 53 22 00 82 43 B4 1D 87 12 14 48
-1E 48 B0 4A 14 48 22 00 80 48 4C 48 B2 40 20 00
-B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D 3D 41 3E 4F
-30 4D BA 47 82 2E 22 00 87 12 38 48 14 48 D6 47
-B0 4A 2A 44 48 43 05 3C 00 00 04 57 4F 52 44 00
-48 4E 19 42 C0 1D 1A 42 C2 1D 09 5A 1A 52 C4 1D
-09 9A 03 24 7E 9A FC 27 1A 83 4E F8 06 20 0E 4A
-1A 82 C2 1D 82 4A C4 1D 30 4D 18 42 C6 1D 3B 40
-60 00 C8 4C 00 00 09 9A 0C 24 7C 4A 4E 9C 09 24
-18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D
-F0 3F 1A 82 C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E
-CE 48 00 00 30 4D 00 00 04 46 49 4E 44 00 2F 83
-0C 4E 65 4C 74 40 80 00 3B 40 CA 1D 3E 4B 0E 93
-1E 24 58 4C 01 00 78 F0 1E 00 0E 58 2E 53 1E 4E
-FE FF 0E 93 F3 27 09 4E 78 49 48 C4 48 95 F7 23
-0A 4C FA 99 01 00 F3 23 1A 53 58 83 FA 23 19 B3
-09 63 0C 49 6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C
-00 00 35 40 0E 44 34 40 00 44 30 4D 82 44 07 3E
-4E 55 4D 42 45 52 3C 4F 38 4F 29 4F 2F 82 1B 42
-DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00 05 28 7A 80
-07 00 7A 90 0A 00 12 28 0A 9B 22 C3 0F 2C 82 49
-D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04 18 42
-E6 04 09 5A 08 63 1C 53 1E 83 E3 23 8F 4C 00 00
-8F 48 02 00 8F 49 04 00 30 4D 32 C0 00 02 1B 42
-DC 1D 0C 43 2D 15 3D 40 F4 49 09 43 08 43 3F 82
-8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28
-C9 23 B1 43 02 00 DF 3F 2B 43 7A 80 25 00 07 24
-3B 52 6A 53 04 24 3B 40 10 00 5A 83 BA 23 1C 53
-1E 83 EA 3F F6 49 2F 24 2D 83 7A 90 28 00 CB 27
-32 D0 00 02 7A 90 F7 00 C6 27 7A 90 F5 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 3E 45 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 06 24
-32 C0 00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F
-02 00 04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3
-02 00 BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0
-00 02 01 20 2F 53 30 4D 7E 46 04 48 45 52 45 00
-2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D B6 44 01 2C
-1A 42 C6 1D 8A 4E 00 00 A2 53 C6 1D 3E 4F 30 4D
-EC 46 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-A6 47 07 45 58 45 43 55 54 45 0A 4E 3E 4F 00 4A
-AE 4A 87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24
-1A 42 C6 1D A2 52 C6 1D BA 40 14 48 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A
-02 00 8A 4E 02 00 0E 49 EB 3F 30 4D 00 48 05 43
-4F 55 4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF
-30 4D 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43 C4 1D
-30 4D 85 12 20 00 87 12 32 4B 42 4B 80 48 50 4B
-3D 40 58 4B CC 22 82 3E 5A 4B 0A 4E 3E 4F 3D 40
-70 4B 23 27 3D 40 4A 4B 1A E2 BE 1D A1 27 B5 23
-72 4B 3E 4F 3D 40 4A 4B B8 23 DE 53 00 00 68 4E
-08 5E F8 40 3F 00 00 00 3D 40 26 4E CB 3F D2 4A
+12 D3 F5 3F 34 40 EC 44 8F 4A 02 00 8F 49 00 00
+0E 48 30 41 82 4E C0 1D B2 4F C2 1D 3E 4F 82 43
+C4 1D 30 4D 3F 80 06 00 8F 4E 04 00 3E 40 54 00
+BF 40 3C 1D 00 00 AF 4F 02 00 24 3C 2F 83 8F 4E
+00 00 3E 41 0D 12 3D 4E 30 4D 2F 83 8F 4E 00 00
+3E 41 2E 4E 30 4D A2 B3 FC 05 FD 27 B2 40 11 00
+EE 05 D2 C3 22 02 30 41 A2 B3 FC 05 FD 27 B2 40
+13 00 EE 05 D2 D3 22 02 30 41 00 00 06 41 43 43
+45 50 54 00 3C 40 A6 45 3B 40 70 45 2D 15 0A 4E
+2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00 3D 40 9A 45
+92 B3 FC 05 05 24 18 42 EC 05 38 90 0A 00 D3 23
+21 53 3D 15 30 40 00 44 21 52 3A 17 58 42 EC 05
+48 9C 08 2C 48 9B D0 27 78 92 11 20 2E 9F 0F 24
+1E 83 05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3
+FC 05 FD 27 82 48 EE 05 30 4D 9C 45 2D 83 92 B3
+FC 05 E4 23 FC 27 82 93 DE 1D 02 24 92 53 DE 1D
+3E 8F 3D 41 B2 40 18 00 0A 18 30 4D 00 00 04 45
+4D 49 54 00 30 40 C8 45 08 4E 3E 4F E0 3F BE 45
+04 45 43 48 4F 00 B2 40 82 48 94 45 82 43 DE 1D
+30 4D 00 00 06 4E 4F 45 43 48 4F 00 B2 40 30 4D
+94 45 92 43 DE 1D 30 4D 00 00 04 54 59 50 45 00
+0E 93 0F 24 1E 15 3D 40 16 46 28 4F 7E 48 8F 48
+00 00 2F 83 D7 3F 18 46 2D 83 91 83 02 00 F5 23
+1D 17 2F 53 3E 4F 30 4D 00 00 02 43 52 00 30 40
+32 46 0D 12 87 12 2E 44 02 0D 0A 00 00 46 26 47
+00 00 03 4B 45 59 30 40 4A 46 18 42 EC 05 2F 83
+8F 4E 00 00 B0 12 06 45 92 B3 FC 05 FD 27 1E 42
+EC 05 B0 12 18 45 30 4D 2F 83 8F 4E 00 00 30 4D
+8F 4E FE FF AF 4F FC FF 2F 82 30 4D 0E 93 F4 23
+30 4D 2A 4F 8F 4E 00 00 0E 4A 30 4D 8F 4E FE FF
+3E 40 80 1C 0E 8F 0E 11 2F 83 30 4D 2F 83 8F 4E
+00 00 3E 41 30 4D 3E 8F 3E E3 1E 53 30 4D BE 4F
+00 00 3E 4F 30 4D 1E 83 0E 7E 30 4D 0E 5E 0E 7E
+3E E3 30 4D 3E 8F 03 24 3E 43 01 2C 0E F3 30 4D
+00 00 02 3C 23 00 B2 40 B2 1D B2 1D 30 4D 2A 46
+01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 86 44 BF 4F
+00 00 7A 90 0A 00 02 28 7A 50 07 00 7A 50 30 00
+92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D E0 46
+02 23 53 00 0D 12 87 12 E2 46 1C 47 2D 83 09 93
+E2 23 0E 93 E0 23 3D 41 30 4D 10 47 02 23 3E 00
+9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D 00 00
+04 48 4F 4C 44 00 4A 4E 3E 4F DA 3F 00 00 04 53
+49 47 4E 00 0E 93 3E 4F 7A 40 2D 00 D1 33 30 4D
+FA 45 02 55 2E 00 08 43 2F 83 8F 4E 00 00 0E 48
+0D 12 0E 12 3E F3 06 34 BF E3 00 00 3E E3 9F 53
+00 00 0E 63 87 12 D6 46 14 47 9C 46 54 47 30 47
+00 46 70 4A C4 45 26 47 E4 45 01 2E 0E 93 E3 37
+38 43 E2 3F 4E 47 82 53 22 00 82 43 B4 1D 0D 12
+87 12 24 44 2E 44 F8 49 24 44 22 00 F2 47 C0 47
+B2 40 20 00 B4 1D 6E 4E 1E 53 1E B3 82 6E C6 1D
+3D 41 3E 4F 30 4D 9A 47 82 2E 22 00 0D 12 87 12
+AA 47 24 44 00 46 F8 49 26 47 00 00 04 57 4F 52
+44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C 28 4C
+09 9A 15 24 7E 9A FC 27 1A 83 3B 40 60 00 C8 4C
+00 00 09 9A 0C 24 7C 4A 4E 9C 09 24 18 53 4B 9C
+F6 2F 7C 90 7B 00 F3 2F 5C 82 B4 1D F0 3F 1A 82
+C2 1D 82 4A C4 1D 1E 42 C6 1D 08 8E CE 48 00 00
+30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
+74 40 80 00 3B 40 CA 1D 3E 4B 0E 93 1E 24 58 4C
+01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
+F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C FA 99
+01 00 F3 23 1A 53 58 83 FA 23 19 B3 09 63 0C 49
+6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
+FA 44 34 40 EC 44 30 4D 00 00 07 3E 4E 55 4D 42
+45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 DC 1D 6A 4C
+7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
+0A 00 12 28 0A 9B 22 C3 0F 2C 82 49 D0 04 82 48
+D2 04 82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A
+08 63 1C 53 1E 83 E3 23 8F 4C 00 00 8F 48 02 00
+8F 49 04 00 30 4D 32 C0 00 02 1B 42 DC 1D 0C 43
+2D 15 3D 40 50 49 09 43 08 43 3F 82 8F 4E 06 00
+0C 4E 7E 4C 6A 4C 7A 90 2D 00 04 28 C9 23 B1 43
+02 00 0B 3C 2B 43 7A 80 25 00 07 24 3B 52 6A 53
+04 24 3B 40 10 00 5A 83 BA 23 1C 53 1E 83 EA 3F
+52 49 2F 24 2D 83 7A 90 28 00 CB 27 32 D0 00 02
+7A 90 F7 00 C6 27 7A 90 F5 00 23 20 0A 4E 09 43
+8F 49 02 00 5A 83 09 4A 09 5C 69 49 79 80 30 00
+79 90 0A 00 05 28 79 80 07 00 79 90 0A 00 0A 28
+09 9B 08 2C 8F 49 00 00 0E 4B 2C 15 B0 12 7E 44
+2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F 04 00 0E 4A
+4E 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0 00 02
+3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
+BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
+00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
+2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 3E 4F 30 4D 2C 45 05 41 4C 4C 4F 54
+82 5E C6 1D 3E 4F 30 4D 0A 4E 3E 4F 00 4A F6 49
+87 4C 49 54 45 52 41 4C 82 93 BE 1D 0C 24 1A 42
+C6 1D A2 52 C6 1D BA 40 24 44 00 00 8A 4E 02 00
+3E 4F 32 B0 00 02 32 C0 00 02 06 24 19 4A 02 00
+8A 4E 02 00 0E 49 EB 3F 30 4D 2C 47 05 43 4F 55
+4E 54 2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D
+85 12 20 00 0D 12 87 12 C4 44 70 4A F2 47 80 4A
+3D 40 88 4A E2 22 A4 26 8A 4A 0A 4E 3E 4F 3D 40
+A0 4A 39 27 3D 40 7A 4A 1A E2 BE 1D BD 23 AC 27
+A2 4A 3E 4F 3D 40 7A 4A BF 23 DE 53 00 00 68 4E
+08 5E F8 40 3F 00 00 00 3D 40 20 4D D2 3F D0 45
08 45 56 41 4C 55 41 54 45 00 39 40 C0 1D 3C 49
-3B 49 3A 49 3D 15 B0 12 2A 44 46 4B AE 4B B2 41
-C4 1D B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12
-BE 1D 08 45 04 51 55 49 54 00 82 43 08 18 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D B0 12 2A 44
-04 48 8C 47 42 4B 82 47 46 4B A4 44 0C 45 1E 48
-0C 73 74 61 63 6B 20 65 6D 70 74 79 21 00 40 4C
-14 48 30 FF A0 4A 26 45 1E 48 0A 46 52 41 4D 20
-66 75 6C 6C 21 00 40 4C 3C 46 E0 4B C2 4A 05 41
-42 4F 52 54 3F 40 80 1C D0 3F 1E 4C 86 41 42 4F
-52 54 22 00 87 12 38 48 14 48 40 4C B0 4A 2A 44
-8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 CC 51
-B0 12 B6 46 92 C3 FC 05 38 40 50 55 39 42 03 43
-19 83 FD 23 18 83 FA 23 92 B3 FC 05 F3 23 87 12
-46 51 14 48 DE 1D EA 44 AC 47 1E 48 04 1B 5B 37
-6D 00 D6 47 58 44 40 46 9A 4C 04 48 1E 48 05 6C
-69 6E 65 3A D6 47 D0 44 24 46 D6 47 1E 48 04 1B
-5B 30 6D 00 D6 47 24 4C 00 00 83 5B 27 5D 87 12
-C0 4C 14 48 14 48 B0 4A B0 4A 2A 44 E8 48 01 27
-87 12 42 4B 80 48 EE 48 40 46 CE 4C 2A 44 7A 4B
-32 45 81 5C 92 42 C0 1D C4 1D 30 4D AA 4C 81 5B
-82 43 BE 1D 30 4D D2 4C 01 5D B2 43 BE 1D 30 4D
-BE 4F 02 00 3E 4F 30 4D 9A 4A 82 49 53 00 87 12
-BE 4B EA 44 40 46 12 4D AE 4C 14 48 F0 4C B0 4A
-2A 44 C0 4C F0 4C 2A 44 FA 4C 09 49 4D 4D 45 44
-49 41 54 45 1A 42 B6 1D FA D0 80 00 00 00 30 4D
-C4 4B 88 50 4F 53 54 50 4F 4E 45 00 87 12 42 4B
-80 48 EE 48 58 44 40 46 CE 4C 0C 45 40 46 5C 4D
-14 48 14 48 B0 4A B0 4A 14 48 B0 4A B0 4A 2A 44
-DE 4C 81 3B 82 93 BE 1D B5 27 87 12 14 48 2A 44
-B0 4A FA 4D E0 4C 2A 44 62 4D 07 3A 4E 4F 4E 41
-4D 45 30 12 A0 4D 2F 83 8F 4E 00 00 1E 42 C6 1D
-1E B3 0E 63 0A 4E 39 40 00 02 38 40 02 02 21 3C
-BA 40 87 12 FC FF A2 83 C6 1D B2 43 BE 1D 30 4D
-7A 4D 01 3A 30 12 A0 4D 92 B3 C6 1D A2 63 C6 1D
-87 12 42 4B 80 48 C8 4D 3D 41 08 4E 7A 4E 5A D3
-5A 53 0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E
-3E 4F 82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F
-BC 1D 2A 52 82 4A C6 1D 30 41 82 9F BC 1D 09 20
-18 42 B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00
-30 4D 87 12 1E 48 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 4C 4C 90 4B 05 44 45 46 45 52
-B0 12 B8 4D BA 40 30 40 FC FF BA 40 AE 4D FE FF
-E3 3F 1E 4B 06 43 52 45 41 54 45 00 B0 12 B8 4D
-BA 40 85 12 FC FF 8A 4A FE FF D6 3F 2A 4E 05 44
-4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00 8A 4D
-02 00 3D 41 30 4D 4E 49 05 3E 42 4F 44 59 2E 52
-30 4D 44 4E 04 43 4F 44 45 00 B0 12 B8 4D 82 43
-58 61 A2 82 C6 1D 87 12 D6 50 B0 50 2A 44 84 4E
-07 43 4F 44 45 4E 4E 4D B0 12 86 4D F0 3F 00 00
-07 45 4E 44 43 4F 44 45 87 12 E4 50 FA 4D 2A 44
-2C 4C 03 41 53 4D B2 40 B4 50 DA 1D DE 3F B0 4E
-06 45 4E 44 41 53 4D 00 87 12 B8 4E F8 50 2A 44
-00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 87 12
-00 00 A2 53 C6 1D B2 43 BE 1D 30 40 E4 50 00 00
-05 4C 4F 32 48 49 1A 42 C6 1D BA 40 B0 12 00 00
-BA 40 2A 44 02 00 A2 52 C6 1D ED 3F 1A 4D 85 48
-49 32 4C 4F 87 12 A0 4A 4E 4F B0 4A E0 4C D6 50
-B0 50 2A 44 1E 4F 82 49 46 00 2F 83 8F 4E 00 00
-1E 42 C6 1D A2 52 C6 1D BE 40 40 46 00 00 2E 53
-30 4D 5E 4E 84 45 4C 53 45 00 A2 52 C6 1D 1A 42
-C6 1D BA 40 3C 46 FC FF 8E 4A 00 00 2A 83 0E 4A
-30 4D D0 47 84 54 48 45 4E 00 9E 42 C6 1D 00 00
-3E 4F 30 4D A0 4E 85 42 45 47 49 4E 30 40 A0 4A
-74 4F 85 55 4E 54 49 4C 39 40 40 46 A2 52 C6 1D
-1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF 3E 4F 30 4D
-C2 4E 85 41 47 41 49 4E 39 40 3C 46 EF 3F 7A 48
-85 57 48 49 4C 45 87 12 3A 4F 76 44 2A 44 34 48
-86 52 45 50 45 41 54 00 87 12 B8 4F 7A 4F 2A 44
-54 4F 82 44 4F 00 2F 83 8F 4E 00 00 A2 53 C6 1D
-1E 42 C6 1D BE 40 54 46 FE FF A2 53 00 1C 1A 42
-00 1C 8A 43 00 00 30 4D E2 4A 84 4C 4F 4F 50 00
-39 40 76 46 A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF
-8A 4E FE FF 1E 42 00 1C A2 83 00 1C 2E 4E 0E 93
-03 24 8E 4A 00 00 F6 3F 3E 4F 30 4D 90 46 85 2B
-4C 4F 4F 50 39 40 64 46 E5 3F 0A 50 04 4D 4F 56
-45 00 0A 4E 38 4F 39 4F 3E 4F 0A 93 11 24 08 99
-0F 24 06 2C F8 49 00 00 18 53 1A 83 FB 23 30 4D
-08 5A 09 5A 19 83 18 83 E8 49 00 00 1A 83 FA 23
-30 4D 14 48 CA 1D F2 44 2A 44 84 12 82 50 B2 4F
-64 53 E2 4F BE 4C 36 4F 3E 50 78 54 64 48 6A 51
-84 51 92 4F 04 52 00 00 4A 54 E8 4C 78 4E 00 00
-84 12 82 50 22 60 BA 5F 1E 5F E2 5A 86 59 00 00
-E6 5D 00 00 48 61 5C 61 DE 59 1C 5A EE 5F 00 00
-00 00 BE 5A AE 50 3A 40 0C 00 39 40 CA 1D 38 40
-CC 1D C6 3F 3A 40 0E 00 39 40 CC 1D 38 40 CA 1D
-B9 3F 82 43 CC 1D 30 4D 92 42 CA 1D DA 1D 30 4D
-8A 50 F2 50 F8 50 08 51 3A 4E 82 4A C8 1D 2E 4E
-82 4E C6 1D 3D 40 10 00 09 4A 08 49 29 83 18 48
-FE FF 0E 98 FC 2B 89 48 00 00 1D 83 F6 23 2A 4A
-0A 93 F0 23 3E 4F 3D 41 30 4D 32 4D 09 50 57 52
-5F 53 54 41 54 45 84 12 00 51 D4 50 94 61 D0 4F
-09 52 53 54 5F 53 54 41 54 45 92 42 0E 18 4A 51
-92 42 0C 18 4C 51 EF 3F 3C 51 08 50 57 52 5F 48
-45 52 45 00 92 42 C8 1D 4A 51 92 42 C6 1D 4C 51
-30 4D 50 51 08 52 53 54 5F 48 45 52 45 00 92 42
-C8 1D 0E 18 92 42 C6 1D 0C 18 EC 3F C0 4F 04 57
-49 50 45 00 39 40 10 00 29 83 B9 43 80 FF FC 23
-B2 40 E0 46 DE 46 B2 40 0E 52 0C 52 B2 40 D4 50
-0E 18 B2 40 94 61 0C 18 30 12 5A 51 B2 40 86 47
-84 47 B2 40 08 48 06 48 B2 40 98 46 96 46 B2 40
-18 00 0A 18 37 40 1A 44 36 40 92 44 35 40 0E 44
-34 40 00 44 B2 40 0A 00 DC 1D B2 40 20 00 B4 1D
-30 41 9E 51 04 57 41 52 4D 00 30 40 0E 52 3D 40
-44 52 92 C3 30 01 1E 42 08 18 0E 93 12 24 F2 B0
-10 00 20 02 02 20 3E E3 1E 53 F2 D0 30 00 2A 02
-3E 90 0A 00 B7 27 3E 90 16 00 B4 2F 2E 93 83 27
-8C 2F 30 4D 1E 48 06 0D 1B 5B 37 6D 23 00 D6 47
-34 46 1E 48 19 46 61 73 74 46 6F 72 74 68 20 C2
-A9 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 D6 47
-14 48 30 FF A0 4A B8 44 24 46 1E 48 0A 62 79 74
-65 73 20 66 72 65 65 00 3C 46 9A 4C 86 4F 04 43
-4F 4C 44 00 92 B3 EA 05 FD 23 B2 40 04 A5 20 01
-44 52 B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3
+3B 49 3A 49 3D 15 87 12 74 4A DC 4A B2 41 C4 1D
+B2 41 C2 1D B2 41 C0 1D 3D 41 30 4D 85 12 BE 1D
+00 00 04 51 55 49 54 00 82 43 08 18 31 40 E0 1C
+B2 40 00 1C 00 1C 82 43 BE 1D 87 12 2E 46 D4 44
+70 4A C4 45 74 4A 8C 46 BC 46 2E 44 0C 73 74 61
+63 6B 20 65 6D 70 74 79 21 00 6E 4B 24 44 40 FF
+2A 4E C4 46 2E 44 0A 46 52 41 4D 20 66 75 6C 6C
+21 00 6E 4B 48 44 0C 4B 0A 4A 05 41 42 4F 52 54
+3F 40 80 1C D1 3F 4A 4B 86 41 42 4F 52 54 22 00
+0D 12 87 12 AA 47 24 44 6E 4B F8 49 26 47 8F 93
+02 00 03 20 2F 52 3E 4F 30 4D B0 12 96 4F B0 12
+06 45 92 C3 FC 05 18 42 06 18 39 40 20 00 19 83
+FE 23 18 83 FA 23 92 B3 FC 05 F3 23 0D 12 87 12
+10 4F 24 44 DE 1D 02 45 D6 45 2E 44 04 1B 5B 37
+6D 00 00 46 7C 46 4C 44 C8 4B 2E 46 2E 44 05 6C
+69 6E 65 3A 00 46 66 47 00 46 2E 44 04 1B 5B 30
+6D 00 00 46 50 4B 00 00 83 5B 27 5D 0D 12 87 12
+F0 4B 24 44 24 44 F8 49 F8 49 26 47 44 48 01 27
+0D 12 87 12 70 4A F2 47 4A 48 4C 44 00 4C 26 47
+AA 4A D2 46 81 5C 92 42 C0 1D C4 1D 30 4D D8 4B
+81 5B 82 43 BE 1D 30 4D 04 4C 01 5D B2 43 BE 1D
+30 4D F2 4A 88 50 4F 53 54 50 4F 4E 45 00 0D 12
+87 12 70 4A F2 47 4A 48 7C 46 4C 44 00 4C BC 46
+4C 44 50 4C 24 44 24 44 F8 49 F8 49 24 44 F8 49
+F8 49 26 47 40 47 09 49 4D 4D 45 44 49 41 54 45
+1A 42 B6 1D FA D0 80 00 00 00 30 4D 10 4C 01 3A
+30 12 B8 4C 92 B3 C6 1D A2 63 C6 1D 0D 12 87 12
+70 4A F2 47 86 4C 3D 41 08 4E 7A 4E 5A D3 5A 53
+0A 58 19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F
+82 48 B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D
+2A 52 82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40
+87 12 FE FF B2 43 BE 1D 30 4D 6E 4C 07 3A 4E 4F
+4E 41 4D 45 30 12 B8 4C 2F 83 8F 4E 00 00 1E 42
+C6 1D 1E B3 0E 63 0A 4E 39 40 10 02 38 40 12 02
+D7 3F 82 9F BC 1D 09 20 18 42 B6 1D 19 42 B8 1D
+A8 49 FE FF 89 48 00 00 30 4D 0D 12 87 12 2E 44
+0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21
+7A 4B CC 4C 81 3B 82 93 BE 1D 6D 27 0D 12 87 12
+24 44 26 47 F8 49 F2 4C 12 4C 26 47 5C 4A 06 43
+52 45 41 54 45 00 B0 12 74 4C BA 40 85 12 FC FF
+8A 4A FE FF D5 3F C0 4A 05 44 4F 45 53 3E 1A 42
+BA 1D BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
+3E 4D 04 43 4F 44 45 00 B0 12 74 4C A2 82 C6 1D
+0D 12 87 12 8A 4E 64 4E 26 47 72 4D 07 43 4F 44
+45 4E 4E 4D 30 12 7C 4D 9F 3F 00 00 07 45 4E 44
+43 4F 44 45 0D 12 87 12 F2 4C A4 4E 26 47 58 4B
+03 41 53 4D B2 40 68 4E DA 1D DE 3F 9C 4D 06 45
+4E 44 41 53 4D 00 0D 12 87 12 A4 4D C2 4E 26 47
+00 00 05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12
+00 00 BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D
+30 40 A4 4E 00 00 05 4C 4F 32 48 49 A2 83 C6 1D
+1A 42 C6 1D EE 3F 56 4C 85 48 49 32 4C 4F 0D 12
+87 12 2A 4E 1E 4E F8 49 12 4C 80 4D 26 47 2E 53
+30 4D 8C 4D 85 42 45 47 49 4E 2F 83 8F 4E 00 00
+1E 42 C6 1D 30 4D 24 44 CA 1D AE 46 26 47 84 12
+36 4E B0 4D 5C 50 58 4D EE 4B 08 4E 42 46 20 4A
+D8 47 34 4F 4E 4F 62 47 CE 4F 00 00 F8 51 1A 4C
+AA 48 00 00 84 12 36 4E 2A 57 90 57 DE 56 E0 57
+A4 56 00 00 D4 53 00 00 9A 56 4C 57 FC 56 3A 57
+E4 54 00 00 00 00 FC 57 62 4E 3A 40 0C 00 39 40
+D6 1D 08 49 28 53 19 83 18 83 E8 49 00 00 1A 83
+FA 23 30 4D 3A 40 0E 00 38 40 CA 1D 09 48 29 53
+F8 49 00 00 18 53 1A 83 FB 23 30 4D 82 43 CC 1D
+30 4D 92 42 CA 1D DA 1D 30 4D 3E 4E BC 4E C2 4E
+D2 4E 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
+10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
+89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
+3D 41 30 4D 24 4C 09 50 57 52 5F 53 54 41 54 45
+84 12 CA 4E 88 4E 18 58 A6 47 09 52 53 54 5F 53
+54 41 54 45 92 42 0E 18 14 4F 92 42 0C 18 16 4F
+EF 3F 06 4F 08 50 57 52 5F 48 45 52 45 00 92 42
+C8 1D 14 4F 92 42 C6 1D 16 4F 30 4D 1A 4F 08 52
+53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
+C6 1D 0C 18 EC 3F EC 47 04 57 49 50 45 00 39 40
+10 00 29 83 B9 43 80 FF FC 23 B2 40 04 44 02 44
+B2 40 D8 4F D6 4F B2 40 88 4E 0E 18 B2 40 18 58
+0C 18 30 12 24 4F B2 40 C8 45 C6 45 B2 40 32 46
+30 46 B2 40 4A 46 48 46 B2 40 18 00 0A 18 37 40
+26 47 36 40 9C 46 35 40 FA 44 34 40 EC 44 B2 40
+0A 00 DC 1D B2 40 20 00 B4 1D 30 41 68 4F 04 57
+41 52 4D 00 30 40 D8 4F 3D 40 12 50 92 C3 30 01
+1E 42 08 18 0E 93 14 24 F2 B0 10 00 20 02 02 20
+3E E3 1E 53 F2 D0 30 00 2A 02 92 D3 FA 05 3E 90
+0A 00 B5 27 3E 90 16 00 B2 2F 2E 93 81 27 8A 2F
+30 4D 2E 44 07 0D 0A 1B 5B 37 6D 23 00 46 9C 47
+2E 44 19 46 61 73 74 46 6F 72 74 68 20 C2 A9 4A
+2E 4D 2E 54 68 6F 6F 72 65 6E 73 20 00 46 24 44
+40 FF 2A 4E A6 46 66 47 2E 44 0A 62 79 74 65 73
+20 66 72 65 65 00 48 44 C8 4B 24 4E 04 43 4F 4C
+44 00 92 B3 EA 05 FD 23 B2 40 04 A5 20 01 31 40
+E0 1C B2 40 88 5A 5C 01 B2 40 FE FF 02 02 B2 D3
06 02 B2 43 26 02 B2 43 22 02 D2 D3 24 02 B2 43
42 02 B2 43 46 02 B2 43 62 02 B2 43 66 02 B2 40
7F FF 82 02 B2 43 86 02 F2 43 22 03 F2 43 26 03
33 00 64 01 D2 43 61 01 92 D2 9E 01 08 18 38 40
59 14 18 83 FE 23 19 83 FA 23 B2 42 B0 01 F2 D0
10 00 2A 03 F2 C0 40 00 A2 04 39 40 00 08 29 83
-89 43 00 1C FC 23 39 40 3A 00 29 83 B9 40 A2 52
-C6 FF FB 23 B2 40 26 47 E4 FF B2 40 81 00 E0 05
+89 43 00 1C FC 23 B0 12 0E 44 B2 40 81 00 E0 05
92 42 02 18 E6 05 92 42 04 18 E8 05 92 C3 E0 05
-92 D3 FA 05 3F 40 80 1C 31 40 E0 1C 30 12 0A 52
-3E 3F 8E 52 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D B2 4D 86 5B 54 48 45 4E 5D 00 30 4D
-96 53 86 5B 45 4C 53 45 5D 00 87 12 14 48 00 00
-C6 44 42 4B 80 48 24 4B 34 44 40 46 0C 54 44 44
-1E 48 06 5B 54 48 45 4E 5D 00 6C 53 4A 46 DC 53
-F8 47 D0 44 58 44 4A 46 B2 53 2A 44 44 44 1E 48
-06 5B 45 4C 53 45 5D 00 6C 53 4A 46 FA 53 F8 47
-D0 44 58 44 4A 46 B0 53 2A 44 1E 48 04 5B 49 46
-5D 00 6C 53 4A 46 B2 53 3C 46 B0 53 F8 47 1E 48
-05 0D 0A 6B 6F 20 D6 47 8C 47 32 4B 3C 46 B2 53
-A2 53 84 5B 49 46 5D 00 0E 93 3E 4F BE 27 30 4D
-22 54 89 5B 44 45 46 49 4E 45 44 5D 87 12 42 4B
-80 48 EE 48 6A 44 2A 44 32 54 8B 5B 55 4E 44 45
-46 49 4E 45 44 5D 87 12 42 4B 80 48 EE 48 6A 44
-00 45 2A 44 66 54 3D 41 B2 4E 0E 18 A2 4E 0C 18
-3E 4F 30 40 5A 51 4C 50 06 4D 41 52 4B 45 52 00
-B0 12 B8 4D BA 40 84 12 FC FF BA 40 64 54 FE FF
-9A 42 C8 1D 00 00 28 83 8A 48 02 00 A2 52 C6 1D
-30 40 00 4E 1C 15 B0 12 2A 44 80 48 EE 48 4A 46
-BA 54 AA 49 40 46 CE 4C D4 54 BC 54 39 4E 39 80
+3F 40 80 1C 30 12 D4 4F 47 3F 24 4D 86 5B 54 48
+45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
+0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
+FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
+F9 23 2F 53 2D 53 F7 3F 1C 51 86 5B 45 4C 53 45
+5D 00 0D 12 87 12 24 44 00 00 AA 46 70 4A F2 47
+62 4A 68 46 4C 44 B4 51 70 46 2E 44 06 5B 54 48
+45 4E 5D 00 26 51 8E 51 4A 51 6C 51 26 47 70 46
+2E 44 06 5B 45 4C 53 45 5D 00 26 51 A4 51 4A 51
+6A 51 26 47 2E 44 04 5B 49 46 5D 00 26 51 6C 51
+48 44 6A 51 22 46 2E 44 05 0D 0A 6B 6F 20 00 46
+D4 44 C4 44 48 44 6C 51 5A 51 84 5B 49 46 5D 00
+0E 93 3E 4F C6 27 30 4D 2F 53 30 4D CA 51 89 5B
+44 45 46 49 4E 45 44 5D 0D 12 87 12 70 4A F2 47
+4A 48 D8 51 26 47 DE 51 8B 5B 55 4E 44 45 46 49
+4E 45 44 5D 0D 12 87 12 E8 51 0C 52 3D 41 30 40
+B6 46 38 40 C0 1D 0A 4E 39 48 2E 48 09 5E 1E 52
+C4 1D 09 9E 03 24 7A 9E FC 27 1E 83 0A 4E 2A 88
+82 4A C4 1D 30 4D 1C 15 87 12 F2 47 4A 48 42 44
+4A 52 06 49 4C 44 00 4C 64 52 4C 52 39 4E 39 80
86 12 08 24 19 53 02 20 2E 4E 04 3C 2E 53 19 53
-01 24 2E 82 1B 17 30 41 32 B0 00 02 01 24 3E 4F
-30 41 3E 40 28 00 B0 12 A4 54 B0 12 D8 54 19 42
-C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00 1C 15
-12 12 C4 1D 92 53 C4 1D B0 12 2A 44 80 48 AA 49
-40 46 20 55 16 55 21 53 3E 90 10 00 81 2D DA 2B
-22 55 B2 41 C4 1D D6 3F 87 12 42 4B 74 48 30 55
-0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90
-23 00 29 20 92 53 C4 1D B0 12 A4 54 B0 12 D8 54
-3C 40 00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24
-3C 40 20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24
-3C 40 30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24
-3C 40 30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00
-3E 4F 3D 41 30 4D 7A 90 26 00 09 20 3C 40 10 02
-92 53 C4 1D B0 12 A4 54 B0 12 D8 54 EB 3F 7A 90
-40 00 16 20 3C 40 20 00 92 53 C4 1D B0 12 FE 54
-0C 20 3C 50 10 00 3E 40 2B 00 B0 12 FE 54 92 92
-C0 1D C4 1D 02 24 92 53 C4 1D 8E 10 0C 5E D8 3F
-B0 12 FE 54 FA 23 3C 50 10 00 B0 12 E2 54 EF 3F
-0C 43 1B 42 C6 1D A2 53 C6 1D 87 12 42 4B 74 48
-02 56 FE 90 26 00 00 00 3E 40 20 00 03 20 3C 50
-82 00 C6 3F B0 12 FE 54 E1 23 3C 50 80 00 B0 12
-E2 54 DC 3F D6 46 04 52 45 54 49 00 87 12 14 48
-00 13 B0 4A 2A 44 14 48 2C 00 28 55 FA 55 40 56
-09 4B 2E 4E 0E DC A2 3F 00 4F 03 4D 4F 56 84 12
-36 56 00 40 4A 56 05 4D 4F 56 2E 42 84 12 36 56
-40 40 00 00 03 41 44 44 84 12 36 56 00 50 64 56
-05 41 44 44 2E 42 84 12 36 56 40 50 70 56 04 41
-44 44 43 00 84 12 36 56 00 60 7E 56 06 41 44 44
-43 2E 42 00 84 12 36 56 40 60 26 56 04 53 55 42
-43 00 84 12 36 56 00 70 9C 56 06 53 55 42 43 2E
-42 00 84 12 36 56 40 70 AA 56 03 53 55 42 84 12
-36 56 00 80 BA 56 05 53 55 42 2E 42 84 12 36 56
-40 80 E2 4E 03 43 4D 50 84 12 36 56 00 90 D4 56
-05 43 4D 50 2E 42 84 12 36 56 40 90 D0 4E 04 44
-41 44 44 00 84 12 36 56 00 A0 EE 56 06 44 41 44
-44 2E 42 00 84 12 36 56 40 A0 E0 56 03 42 49 54
-84 12 36 56 00 B0 0C 57 05 42 49 54 2E 42 84 12
-36 56 40 B0 18 57 03 42 49 43 84 12 36 56 00 C0
-26 57 05 42 49 43 2E 42 84 12 36 56 40 C0 32 57
-03 42 49 53 84 12 36 56 00 D0 40 57 05 42 49 53
-2E 42 84 12 36 56 40 D0 00 00 03 58 4F 52 84 12
-36 56 00 E0 5A 57 05 58 4F 52 2E 42 84 12 36 56
-40 E0 8C 56 03 41 4E 44 84 12 36 56 00 F0 74 57
-05 41 4E 44 2E 42 84 12 36 56 40 F0 42 4B 28 55
-92 57 0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA
-4F 3F C6 56 03 52 52 43 84 12 8C 57 00 10 A4 57
-05 52 52 43 2E 42 84 12 8C 57 40 10 B0 57 04 53
-57 50 42 00 84 12 8C 57 80 10 BE 57 03 52 52 41
-84 12 8C 57 00 11 CC 57 05 52 52 41 2E 42 84 12
-8C 57 40 11 D8 57 03 53 58 54 84 12 8C 57 80 11
-00 00 04 50 55 53 48 00 84 12 8C 57 00 12 F2 57
-06 50 55 53 48 2E 42 00 84 12 8C 57 40 12 4C 57
-04 43 41 4C 4C 00 84 12 8C 57 80 12 1A 53 0E 4A
-87 12 34 46 1E 48 0D 6F 75 74 20 6F 66 20 62 6F
-75 6E 64 73 4C 4C 42 4B 74 48 3C 58 92 53 C4 1D
-3E 40 2C 00 B0 12 2A 44 80 48 AA 49 40 46 CE 4C
-F0 55 54 58 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E
-0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
-D5 2F 5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F
-E6 57 06 52 52 43 4D 2E 41 00 84 12 36 58 40 00
-82 58 04 52 52 43 4D 00 84 12 36 58 50 00 92 58
-06 52 52 41 4D 2E 41 00 84 12 36 58 40 01 A0 58
-04 52 52 41 4D 00 84 12 36 58 50 01 B0 58 06 52
-4C 41 4D 2E 41 00 84 12 36 58 40 02 BE 58 04 52
-4C 41 4D 00 84 12 36 58 50 02 CE 58 06 52 52 55
-4D 2E 41 00 84 12 36 58 40 03 DC 58 04 52 52 55
-4D 00 84 12 36 58 50 03 00 58 07 50 55 53 48 4D
-2E 41 84 12 36 58 00 14 FA 58 05 50 55 53 48 4D
-84 12 36 58 00 15 0A 59 06 50 4F 50 4D 2E 41 00
-84 12 36 58 00 16 18 59 04 50 4F 50 4D 00 84 12
-36 58 00 17 EC 58 03 53 3E 3D 85 12 00 38 36 59
-02 53 3C 00 85 12 00 34 28 59 03 30 3E 3D 85 12
-00 30 4A 59 02 30 3C 00 85 12 00 30 00 00 02 55
-3C 00 85 12 00 2C 5E 59 03 55 3E 3D 85 12 00 28
-54 59 03 30 3C 3E 85 12 00 24 72 59 02 30 3D 00
-85 12 00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E
-00 00 A2 53 C6 1D 0E 4A 30 4D 68 59 04 54 48 45
-4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89
-0A 11 3A 90 00 02 33 2F 88 DA 00 00 30 4D FC 56
-04 45 4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00
-A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F 9C 59 05 55
-4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83
-0A 89 0A 11 3A 90 00 FE 12 3B 3A F0 FF 03 08 DA
-89 48 00 00 A2 53 C6 1D 30 4D 80 57 05 41 47 41
-49 4E 0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49
-4C 45 87 12 8A 59 76 44 2A 44 40 59 06 52 45 50
-45 41 54 00 87 12 12 5A A2 59 2A 44 3E 5A 3D 41
-08 4E 3E 4F 2A 48 B2 92 C4 1D CD 2F 98 42 C6 1D
-00 00 30 4D 10 58 03 42 57 31 84 12 3C 5A 00 00
-56 5A 03 42 57 32 84 12 3C 5A 00 00 62 5A 03 42
-57 33 84 12 3C 5A 00 00 7A 5A 3D 41 1A 42 C6 1D
-28 4E B2 92 C4 1D 90 2B BA 4F 00 00 A2 53 C6 1D
-8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31 84 12
-78 5A 00 00 9A 5A 03 46 57 32 84 12 78 5A 00 00
-A6 5A 03 46 57 33 84 12 78 5A 00 00 00 00 05 3F
-47 4F 54 4F 3E 90 00 30 07 24 3E E0 00 04 3E B0
-00 10 02 24 3E E0 00 08 87 12 C0 4C DA 4A 2A 44
-B2 5A 04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40
-00 3C F2 3F 87 12 42 4B 74 48 FC 5A 69 4E 3E 4F
-3C 4F 2C 4C 1B 42 C6 1D A2 53 C6 1D 79 90 52 00
-0A 20 B0 12 FE 54 5E 0E 5E 0E 0E DC 8B 4E 00 00
-0E 4B 3D 41 30 4D 79 90 23 00 0D 20 3C C0 40 00
-92 53 C4 1D A2 53 C6 1D B0 12 A4 54 BB 4F 02 00
-3E F0 0F 00 E8 3F 79 90 26 00 03 20 3C E0 E0 00
-EF 3F 3C C0 F0 00 79 90 40 00 12 20 92 53 C4 1D
-B0 12 FE 54 D8 23 3C D0 10 00 3E 40 2B 00 B0 12
-FE 54 92 92 C0 1D C4 1D CE 27 92 53 C4 1D CB 3F
-3C D0 30 00 A2 53 C6 1D 3E 40 28 00 B0 12 A4 54
-BB 4F 02 00 3E 40 29 00 EA 3F 87 12 42 4B 74 48
-A2 5B 3B 4F 2C 4B 69 4E 7E 40 20 00 79 90 52 00
-03 20 B0 12 FE 54 B1 3F 3C C0 F0 00 A2 53 C6 1D
-79 90 26 00 09 20 3C D0 60 00 92 53 C4 1D B0 12
-A4 54 BB 4F 02 00 A1 3F 3C D0 70 00 3E 40 28 00
-B0 12 A4 54 BB 4F 02 00 3E 40 29 00 E2 3F 14 48
-2C 00 F4 5A 9A 5B 66 44 2A 44 56 56 04 4D 4F 56
-41 00 84 12 EE 5B C0 00 6E 5A 04 43 4D 50 41 00
-84 12 EE 5B D0 00 0C 5A 04 41 44 44 41 00 84 12
-EE 5B E0 00 2C 5A 04 53 55 42 41 00 84 12 EE 5B
-F0 00 0A 5C 05 43 41 4C 4C 41 87 12 42 4B 74 48
-42 5C 1B 42 C6 1D A2 53 C6 1D 6E 4E 3C 40 34 01
-7E 90 52 00 0B 20 7E 40 20 00 B0 12 FE 54 5C 0E
-0C DE 8B 4C 00 00 3E 4F 3D 41 30 4D 2C 53 7E 90
-40 00 0B 20 92 53 C4 1D 7E 40 20 00 B0 12 FE 54
-EE 23 1C 53 3E 40 2B 00 E8 3F A2 53 C6 1D 7E 90
-23 00 09 20 3C 40 3B 01 92 53 C4 1D B0 12 A4 54
-BB 4F 02 00 DC 3F 7E 90 26 00 02 20 2C 53 F4 3F
-7E 40 28 00 1C 83 B0 12 A4 54 BB 4F 02 00 3E 40
-29 00 CB 3F 87 12 42 4B 74 48 CC 5C 69 4E 3E 4F
-3C 40 00 18 79 90 52 00 05 20 B0 12 FE 54 0E 4C
-3D 41 30 4D 82 43 58 61 79 90 23 00 0B 20 92 53
-C4 1D B0 12 A4 54 2F 53 3E F0 0F 00 5E 0A 5E 0E
-0C DE ED 3F 79 90 26 00 F2 27 79 90 40 00 12 20
-92 53 C4 1D B0 12 FE 54 E2 23 3E 40 2B 00 92 53
-C4 1D B0 12 FE 54 92 92 C0 1D C4 1D D8 27 92 53
-C4 1D D5 3F 3E 40 28 00 B0 12 A4 54 8F 4E 00 00
-3E 40 29 00 B0 12 FE 54 3E 4F 3E F0 0F 00 0C DE
-EA 3F 87 12 42 4B 74 48 5A 5D 3C 4F 69 4E 3E 40
-20 00 79 90 52 00 BB 27 82 43 58 61 79 90 26 00
-08 20 92 53 C4 1D B0 12 A4 54 2F 53 3E F0 0F 00
-BF 3F 3E 40 28 00 B0 12 A4 54 F7 3F 1B 42 C6 1D
-A2 53 C6 1D 0C 4E 3E 4F 1C D2 58 61 82 43 58 61
-3C DE 8B 4C 00 00 B2 41 C4 1D 30 4D 14 48 C4 1D
-EA 44 86 44 14 48 2C 00 C4 5C 52 5D 8C 5D 3C 46
-36 56 FC 5B 04 4D 4F 56 58 00 84 12 AC 5D 40 00
-00 40 C4 5D 06 4D 4F 56 58 2E 41 00 84 12 AC 5D
-00 00 40 40 D4 5D 06 4D 4F 56 58 2E 42 00 84 12
-AC 5D 40 00 40 40 18 5C 04 41 44 44 58 00 84 12
-AC 5D 40 00 00 50 F8 5D 06 41 44 44 58 2E 41 00
-84 12 AC 5D 00 00 40 50 08 5E 06 41 44 44 58 2E
-42 00 84 12 AC 5D 40 00 40 50 1A 5E 05 41 44 44
-43 58 84 12 AC 5D 40 00 00 60 2C 5E 07 41 44 44
-43 58 2E 41 84 12 AC 5D 00 00 40 60 3C 5E 07 41
-44 44 43 58 2E 42 84 12 AC 5D 40 00 40 60 26 5C
-05 53 55 42 43 58 84 12 AC 5D 40 00 00 70 60 5E
-07 53 55 42 43 58 2E 41 84 12 AC 5D 00 00 40 70
-70 5E 07 53 55 42 43 58 2E 42 84 12 AC 5D 40 00
-40 70 82 5E 04 53 55 42 58 00 84 12 AC 5D 40 00
-00 80 94 5E 06 53 55 42 58 2E 41 00 84 12 AC 5D
-00 00 40 80 A4 5E 06 53 55 42 58 2E 42 00 84 12
-AC 5D 40 00 40 80 34 5C 04 43 4D 50 58 00 84 12
-AC 5D 40 00 00 90 C8 5E 06 43 4D 50 58 2E 41 00
-84 12 AC 5D 00 00 40 90 D8 5E 06 43 4D 50 58 2E
-42 00 84 12 AC 5D 40 00 40 90 C0 59 05 44 41 44
-44 58 84 12 AC 5D 40 00 00 A0 FC 5E 07 44 41 44
-44 58 2E 41 84 12 AC 5D 00 00 40 A0 0C 5F 07 44
-41 44 44 58 2E 42 84 12 AC 5D 40 00 40 A0 EA 5E
-04 42 49 54 58 00 84 12 AC 5D 40 00 00 B0 30 5F
-06 42 49 54 58 2E 41 00 84 12 AC 5D 00 00 40 B0
-40 5F 06 42 49 54 58 2E 42 00 84 12 AC 5D 40 00
-40 B0 52 5F 04 42 49 43 58 00 84 12 AC 5D 40 00
-00 C0 64 5F 06 42 49 43 58 2E 41 00 84 12 AC 5D
-00 00 40 C0 74 5F 06 42 49 43 58 2E 42 00 84 12
-AC 5D 40 00 40 C0 86 5F 04 42 49 53 58 00 84 12
-AC 5D 40 00 00 D0 98 5F 06 42 49 53 58 2E 41 00
-84 12 AC 5D 00 00 40 D0 A8 5F 06 42 49 53 58 2E
-42 00 84 12 AC 5D 40 00 40 D0 66 57 04 58 4F 52
-58 00 84 12 AC 5D 40 00 00 E0 CC 5F 06 58 4F 52
-58 2E 41 00 84 12 AC 5D 00 00 40 E0 DC 5F 06 58
-4F 52 58 2E 42 00 84 12 AC 5D 40 00 40 E0 4E 5E
-04 41 4E 44 58 00 84 12 AC 5D 40 00 00 F0 00 60
-06 41 4E 44 58 2E 41 00 84 12 AC 5D 00 00 40 F0
-10 60 06 41 4E 44 58 2E 42 00 84 12 AC 5D 40 00
-40 F0 14 48 C4 1D EA 44 86 44 42 4B C4 5C 8C 5D
-3C 46 8C 57 B6 5E 04 52 52 43 58 00 84 12 32 60
-40 00 00 10 46 60 06 52 52 43 58 2E 41 00 84 12
-32 60 00 00 40 10 56 60 06 52 52 43 58 2E 42 00
-84 12 32 60 40 00 40 10 68 60 04 52 52 55 58 00
-84 12 32 60 40 01 00 10 7A 60 06 52 52 55 58 2E
-41 00 84 12 32 60 00 01 40 10 8A 60 06 52 52 55
-58 2E 42 00 84 12 32 60 40 01 40 10 9C 60 05 53
-57 50 42 58 84 12 32 60 40 00 80 10 AE 60 07 53
-57 50 42 58 2E 41 84 12 32 60 00 00 80 10 BE 60
-04 52 52 41 58 00 84 12 32 60 40 00 00 11 D0 60
-06 52 52 41 58 2E 41 00 84 12 32 60 00 00 40 11
-E0 60 06 52 52 41 58 2E 42 00 84 12 32 60 40 00
-40 11 F2 60 04 53 58 54 58 00 84 12 32 60 40 00
-80 11 04 61 06 53 58 54 58 2E 41 00 84 12 32 60
-00 00 80 11 7C 59 05 50 55 53 48 58 84 12 32 60
-40 00 00 12 26 61 07 50 55 53 48 58 2E 41 84 12
-32 60 00 00 40 12 36 61 07 50 55 53 48 58 2E 42
-84 12 32 60 40 00 40 12 00 00 14 61 03 52 50 54
-87 12 42 4B 74 48 68 61 29 4E 7E 40 20 00 79 90
-52 00 06 20 B0 12 FE 54 03 24 3E D0 80 00 05 3C
-B0 12 A4 54 1E 83 3E F0 0F 00 82 4E 58 61 3E 4F
-3D 41 30 4D
+01 24 2E 82 1B 17 30 41 3E 40 28 00 B0 12 36 52
+19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00
+1C 15 12 12 C4 1D 92 53 C4 1D 87 12 F2 47 06 49
+4C 44 A0 52 96 52 21 53 3E 90 10 00 80 2D E2 2B
+A2 52 B2 41 C4 1D DE 3F 0D 12 87 12 70 4A 12 52
+B2 52 0C 43 1B 42 C6 1D A2 53 C6 1D 6A 4E 3E 4F
+7A 90 23 00 27 20 92 53 C4 1D B0 12 36 52 3C 40
+00 03 0E 93 1C 24 3C 40 10 03 1E 93 18 24 3C 40
+20 03 2E 93 14 24 3C 40 20 02 2E 92 10 24 3C 40
+30 02 3E 92 0C 24 3C 40 30 03 3E 93 08 24 3C 40
+30 00 19 42 C6 1D A2 53 C6 1D 89 4E 00 00 3E 4F
+3D 41 30 4D 7A 90 26 00 07 20 3C 40 10 02 92 53
+C4 1D B0 12 36 52 ED 3F 7A 90 40 00 16 20 3C 40
+20 00 92 53 C4 1D B0 12 80 52 0C 20 3C 50 10 00
+3E 40 2B 00 B0 12 80 52 92 92 C0 1D C4 1D 02 24
+92 53 C4 1D 8E 10 0C 5E DA 3F B0 12 80 52 FA 23
+3C 50 10 00 B0 12 68 52 EF 3F 0C 43 1B 42 C6 1D
+A2 53 C6 1D 0D 12 87 12 70 4A 12 52 7E 53 FE 90
+26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 C7 3F
+B0 12 80 52 E0 23 3C 50 80 00 B0 12 68 52 DB 3F
+00 00 04 52 45 54 49 00 0D 12 87 12 24 44 00 13
+F8 49 26 47 24 44 2C 00 A8 52 74 53 BE 53 09 4B
+2E 4E 0E DC A2 3F F6 4D 03 4D 4F 56 84 12 B4 53
+00 40 C8 53 05 4D 4F 56 2E 42 84 12 B4 53 40 40
+00 00 03 41 44 44 84 12 B4 53 00 50 E2 53 05 41
+44 44 2E 42 84 12 B4 53 40 50 EE 53 04 41 44 44
+43 00 84 12 B4 53 00 60 FC 53 06 41 44 44 43 2E
+42 00 84 12 B4 53 40 60 A2 53 04 53 55 42 43 00
+84 12 B4 53 00 70 1A 54 06 53 55 42 43 2E 42 00
+84 12 B4 53 40 70 28 54 03 53 55 42 84 12 B4 53
+00 80 38 54 05 53 55 42 2E 42 84 12 B4 53 40 80
+D2 4D 03 43 4D 50 84 12 B4 53 00 90 52 54 05 43
+4D 50 2E 42 84 12 B4 53 40 90 BE 4D 04 44 41 44
+44 00 84 12 B4 53 00 A0 6C 54 06 44 41 44 44 2E
+42 00 84 12 B4 53 40 A0 5E 54 03 42 49 54 84 12
+B4 53 00 B0 8A 54 05 42 49 54 2E 42 84 12 B4 53
+40 B0 96 54 03 42 49 43 84 12 B4 53 00 C0 A4 54
+05 42 49 43 2E 42 84 12 B4 53 40 C0 B0 54 03 42
+49 53 84 12 B4 53 00 D0 BE 54 05 42 49 53 2E 42
+84 12 B4 53 40 D0 00 00 03 58 4F 52 84 12 B4 53
+00 E0 D8 54 05 58 4F 52 2E 42 84 12 B4 53 40 E0
+0A 54 03 41 4E 44 84 12 B4 53 00 F0 F2 54 05 41
+4E 44 2E 42 84 12 B4 53 40 F0 70 4A A8 52 10 55
+0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F
+44 54 03 52 52 43 84 12 0A 55 00 10 22 55 05 52
+52 43 2E 42 84 12 0A 55 40 10 2E 55 04 53 57 50
+42 00 84 12 0A 55 80 10 3C 55 03 52 52 41 84 12
+0A 55 00 11 4A 55 05 52 52 41 2E 42 84 12 0A 55
+40 11 56 55 03 53 58 54 84 12 0A 55 80 11 00 00
+04 50 55 53 48 00 84 12 0A 55 00 12 70 55 06 50
+55 53 48 2E 42 00 84 12 0A 55 40 12 CA 54 04 43
+41 4C 4C 00 84 12 0A 55 80 12 1A 53 0E 4A 0D 12
+87 12 9C 47 2E 44 0D 6F 75 74 20 6F 66 20 62 6F
+75 6E 64 73 7A 4B 70 4A 12 52 BC 55 92 53 C4 1D
+3E 40 2C 00 87 12 F2 47 06 49 4C 44 00 4C 6A 53
+D2 55 0A 4E 3E 4F 1A 83 E0 33 29 4E 59 0E 0A 28
+08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00 D5 2F
+5A 0E 94 3F 2A 92 D1 2F 8A 10 5A 06 8F 3F 64 55
+04 52 52 43 4D 00 84 12 B6 55 50 00 00 56 04 52
+52 41 4D 00 84 12 B6 55 50 01 0E 56 04 52 4C 41
+4D 00 84 12 B6 55 50 02 1C 56 04 52 52 55 4D 00
+84 12 B6 55 50 03 7E 55 05 50 55 53 48 4D 84 12
+B6 55 00 15 38 56 04 50 4F 50 4D 00 84 12 B6 55
+00 17 2A 56 03 53 3E 3D 85 12 00 38 54 56 02 53
+3C 00 85 12 00 34 46 56 03 30 3E 3D 85 12 00 30
+68 56 02 30 3C 00 85 12 00 30 00 00 02 55 3C 00
+85 12 00 2C 7C 56 03 55 3E 3D 85 12 00 28 72 56
+03 30 3C 3E 85 12 00 24 90 56 02 30 3D 00 85 12
+00 20 00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00
+A2 53 C6 1D 0E 4A 30 4D 86 56 04 54 48 45 4E 00
+1A 42 C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11
+3A 90 00 02 63 2F 88 DA 00 00 30 4D 7A 54 04 45
+4C 53 45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53
+C6 1D 2F 83 8F 4A 00 00 E3 3F BA 56 05 55 4E 54
+49 4C 3A 4F 08 4E 3E 4F 19 42 C6 1D 2A 83 0A 89
+0A 11 3A 90 00 FE 42 3B 3A F0 FF 03 08 DA 89 48
+00 00 A2 53 C6 1D 30 4D FE 54 05 41 47 41 49 4E
+0A 4E 38 40 00 3C E7 3F 00 00 05 57 48 49 4C 45
+0D 12 87 12 A8 56 82 46 26 47 5E 56 06 52 45 50
+45 41 54 00 0D 12 87 12 30 57 C0 56 26 47 60 57
+3D 41 08 4E 3E 4F 2A 48 B2 92 C4 1D CB 2F 98 42
+C6 1D 00 00 30 4D 8E 55 03 42 57 31 84 12 5E 57
+00 00 78 57 03 42 57 32 84 12 5E 57 00 00 84 57
+03 42 57 33 84 12 5E 57 00 00 9C 57 3D 41 1A 42
+C6 1D 28 4E B2 92 C4 1D 8E 2B BA 4F 00 00 A2 53
+C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
+84 12 9A 57 00 00 BC 57 03 46 57 32 84 12 9A 57
+00 00 C8 57 03 46 57 33 84 12 9A 57 00 00 D4 57
+04 47 4F 54 4F 00 2F 83 8F 4E 00 00 3E 40 00 3C
+0D 12 87 12 F0 4B 18 4A 26 47 00 00 05 3F 47 4F
+54 4F 3E 90 00 30 F4 27 3E E0 00 04 3E B0 00 10
+EF 27 3E E0 00 08 EC 3F
@FFFE
-A2 52
+6E 50
q
;connect param3
testlink
-if result=0 connect param3
+if result<1 connect param3
inputbox 'Send this file to the MSP430FR target:' ' ' param2
+
+uptime varstart
+
+
+
+
+
strcompare param4 'NOECHO'
if result = 0 then
- sendln 'NOECHO PWR_STATE [DEFINED] STOP [IF] STOP [THEN]' ; set no echo from FastForth
+ send 'NOECHO [DEFINED] STOP [IF] STOP [THEN] ' ; set no echo from FastForth
setecho 0 ; suppr. echo from Teraterm
showtt 0
; clearscreen 1
strcompare param4 'HALF'
if result = 0 then
- sendln 'NOECHO PWR_STATE [DEFINED] STOP [IF] STOP [THEN]' ; set no echo from FastForth
+ send 'NOECHO [DEFINED] STOP [IF] STOP [THEN] ' ; set no echo from FastForth
+ setecho 1
showtt 0
; clearscreen 1
sendfile inputstr 0
setecho 1
+ send #4
showtt 1
goto end
endif
; default mode = ECHO
- sendln 'ECHO PWR_STATE [DEFINED] STOP [IF] STOP [THEN]'
+ send 'ECHO [DEFINED] STOP [IF] STOP [THEN] '
setecho 0 ; no echo from Teraterm
showtt 0
; clearscreen 1
showtt 1
:end
-end
+
+
+; do something...
+
+uptime varend
+diff = varend - varstart
+sprintf2 str "download and execute time: %d msec" diff
+messagebox str "teraterm.exe"
+
+unlink
+;end
; param1 = this macro
; param2 = file to send
; param3 = "/C"
; param4 = "ECHO" or "NOECHO" or "HALF" or nothing
+
+
; -*- coding: utf-8 -*-
; http://patorjk.com/software/taag/#p=display&f=Banner&t=Fast Forth
-; Fast Forth For Texas Instrument MSP430FRxxxx FRAM devices
-; Copyright (C) <2018> <J.M. THOORENS>
+; Fast Forth For Texas Instrument MSP430FRxxxx FRAM devices with UART TERMINAL
+; Copyright (C) <2019> <J.M. THOORENS>
;
; This program is free software: you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
-; ----------------------------------------------------------------------
-; compiled with MACROASSEMBLER AS (http://john.ccac.rwth-aachen.de:8000/as/)
-; ----------------------------------------------------------------------
-
;-------------------------------------------------------------------------------
; Vingt fois sur le métier remettez votre ouvrage,
; Polissez-le sans cesse, et le repolissez,
; Molière, Le Malade imaginaire ;-)
;-------------------------------------------------------------------------------
-;===============================================================================
-;===============================================================================
-; before assembling or programming you must set TARGET in param1 (SHIFT+F8)
-; according to the selected TARGET below
-;===============================================================================
-;===============================================================================
-
-VER .equ "V301" ; FORTH version
-
- macexp off ; uncomment to hide macros development in forthMSP430FR.lst
+;-------------------------------------------------------------------------------
+; Using SCITE editor: copy https://www.scintilla.org/Sc420.exe to \prog\scite.exe
+;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
-; TARGETS kernel ; sizes are for 8MHz, DTC=1, THREADS=1, 3WIRES (XON/XOFF)
+; Using MACRO ASSEMBLER AS
+; unzip http://john.ccac.rwth-aachen.de:8000/ftp/as/precompiled/i386-unknown-win32/aswcurr.zip to \prog\
;-------------------------------------------------------------------------------
-; ;INFO+VECTOR+ MAIN
-;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad ; 24 + 2 + 3434 bytes
-;MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad ; 24 + 2 + 3424 bytes
-MSP_EXP430FR5994 ;; compile for MSP-EXP430FR5994 launchpad ; 24 + 2 + 3444 bytes
-;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad ; 24 + 2 + 3448 bytes
-;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad ; 24 + 2 + 3484 bytes
-;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad ; 24 + 2 + 3416 bytes
-;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad ; 24 + 2 + 3408 bytes
-;LP_MSP430FR2476 ; compile for LP_MSP430FR2476 launchpad ; 24 + 2 + 3422 bytes
-;CHIPSTICK_FR2433 ; compile for "CHIPSTICK" of M. Ken BOAK ; 24 + 2 + 3414 bytes
-; choose DTC (Direct Threaded Code) model, if you don't know, choose 1
-DTC .equ 1 ; DTC model 1 : DOCOL = CALL rDOCOL 14 cycles 1 word shortest DTC model
- ; DTC model 2 : DOCOL = PUSH IP, CALL rEXIT 13 cycles 2 words good compromize for mix FORTH/ASM code
+VER .equ "V302" ; FORTH version
+
+;╔══════════════════════════════════════════════════════════════════════════════════╗
+;║ before assembling or programming you must set TARGET in scite param1 (SHIFT+F8) ║
+;║ according to the selected (uncommented) TARGET below ║
+;╚══════════════════════════════════════════════════════════════════════════════════╝
+
+;╔══════════════════════════════════════════════════════════════════════════════════╗
+;║ FAST FORTH has a minimalistic footprint to enable its use from 8k FRAM devices ║
+;║ kernel size below are for 8MHz, DTC=1, THREADS=1, 4WIRES (RTS) options ║
+;╚══════════════════════════════════════════════════════════════════════════════════╝
+; TARGET ; ;INFO+VECTOR+ MAIN bytes
+;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad ; 26 + 2 + 2854 bytes
+;MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad ; 26 + 2 + 2834 bytes
+;MSP_EXP430FR5994 ; compile for MSP-EXP430FR5994 launchpad ; 26 + 2 + 2864 bytes
+;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad ; 26 + 2 + 2870 bytes
+;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad ; 26 + 2 + 2904 bytes
+;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad ; 26 + 2 + 2842 bytes
+;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad ; 26 + 2 + 2828 bytes
+;LP_MSP430FR2476 ; compile for LP_MSP430FR2476 launchpad ; 26 + 2 + 2828 bytes
+CHIPSTICK_FR2433 ;; compile for "CHIPSTICK" of M. Ken BOAK ; 26 + 2 + 2834 bytes
+
+; choose DTC (Direct Threaded Code) model, if you don't know, choose 2, for DOxxx routines without scratch register use
+DTC .equ 2 ; DTC model 1 : DOCOL = CALL rDOCOL 14 cycles 1 word shortest DTC model
+ ; DTC model 2 : DOCOL = PUSH IP, CALL rEXIT 13 cycles 2 words best compromize to mix FORTH/ASM code
; DTC model 3 : inlined DOCOL 9 cycles 4 words fastest
THREADS .equ 16 ; 1, 2 , 4 , 8 , 16, 32 search entries in dictionnary.
- ; +0, +42, +54, +70, +104, +168 bytes, usefull to speed up compilation;
- ; choose 16 if FRAM > 15 kb, else 1.
+ ; +0, +28, +48, +56, +90, +154 bytes, usefull to speed up compilation;
+ ; the FORTH interpreter is accelerated by about a square root factor of THREADS.
-FREQUENCY .equ 16 ; fully tested at 1,2,4,8,16 MHz (+ 24 MHz for MSP430FR57xx,MSP430FR2355)
+FREQUENCY .equ 1 ; fully tested at 1,2,4,8,16 MHz (+ 24 MHz for MSP430FR57xx,MSP430FR2355)
+
+
+;╔══════════════════════════════════════════════════════════════════════════════════╗
+;║ MINIMAL ADDONS if you want a conventional FORTH: CONDCOMP + CORE_COMPLEMENT ║
+;╠══════════════════════════════════════════════════════════════════════════════════╣
+;║ MINIMAL ADDONS for FASTFORTH to learn by yourself: MSP430ASSEMBLER + CONDCOMP ║
+;╚══════════════════════════════════════════════════════════════════════════════════╝
;-------------------------------------------------------------------------------
-; KERNEL OPTIONS that can't be added later
+; KERNEL ADDONs that can't be added later
;-------------------------------------------------------------------------------
-CONDCOMP ;; + 320 bytes : adds conditionnal compilation : COMPARE [DEFINED] [UNDEFINED] [IF] [ELSE] [THEN] MARKER
-MSP430ASSEMBLER ;; + 1690 bytes : adds embedded assembler with TI syntax; without, you can do all but all much more slowly...
+MSP430ASSEMBLER ;; + 1698 bytes : adds embedded assembler with TI syntax; without, you can do all but bigger and slower...
+CONDCOMP ;; + 242 bytes : adds conditionnal compilation [IF] [ELSE] [THEN] [DEFINED] [UNDEFINED]
DOUBLE_INPUT ;; + 58 bytes : adds the interpretation input for double numbers (dot numbers)
-EXTENDED_MEM ;; + 318 bytes : adds to assembler the data access beyond $FFFF.
-EXTENDED_ASM ;; + 1488 bytes : adds extended assembler for programming beyond $FFFF.
-FIXPOINT_INPUT ;; + 128 bytes : adds the interpretation input for Q15.16 numbers, mandatory for FIXPOINT ADD-ON
-NONAME ;; + 56 bytes : adds :NONAME CODENNM (CODE No NaMe)
-SD_CARD_LOADER ;; + 1766 bytes : to LOAD source files from SD_card
-SD_CARD_READ_WRITE ;; + 1148 bytes : to read, create, write and del files + copy text files from PC to target SD_Card
-BOOTLOADER ;; + 74 bytes : includes to <reset> SD_CARD\BOOT.4TH as bootloader. To do: ' BOOT IS QUIT
-VOCABULARY_SET ;; + 106 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83)
+FIXPOINT_INPUT ;; + 128 bytes : adds the interpretation input for Q15.16 numbers, mandatory for FIXPOINT OPTION
+NONAME ;; + 56 bytes : adds :NONAME CODENNM (CODE_No_NaMe)
+;EXTENDED_MEM ; + 318 bytes : allows MSP430ASSEMBLER to read/write datas beyond $FFFF.
+;EXTENDED_ASM ; + 1488 bytes : adds extended assembler for programming beyond $FFFF.
+;SD_CARD_LOADER ; + 1766 bytes : to load source files from SD_card
+;SD_CARD_READ_WRITE ; + 1148 bytes : to read, create, write and del files + copy text files from PC to target SD_Card
+;BOOTLOADER ; + 128 bytes : includes in WARM the bootloader SD_CARD\BOOT.4TH. To do: ' BOOT IS QUIT and to undo: ' QUIT >BODY IS QUIT
+;VOCABULARY_SET ; + 106 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83)
;PROMPT ; + 22 bytes : to display prompt "ok "
+;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
-; OPTIONAL ADDITIONS that can be added later by downloading their source file >-----------------------+
-; however, added in kernel, they are protected against WIPE and Deep Reset... |
+; OPTIONS that can be added later by downloading their source file >-----------------------+
+; however, added here, they are protected against WIPE and Deep Reset. |
;------------------------------------------------------------------------------- v
-;ANS_CORE_COMPLEMENT ; + 1376 bytes : required to pass coretest.4th ANS_COMP.f
+;CORE_COMPLEMENT ; + 1814 bytes : MINIMAL OPTIONS if you want a conventional FORTH CORE_COMP.f
;FIXPOINT ; + 422/528 bytes add HOLDS F+ F- F/ F* F#S F. S>F 2@ 2CONSTANT FIXPOINT.f
;UTILITY ; + 434/524 bytes (1/16threads) : add .S .RS WORDS U.R DUMP ? UTILITY.f
-;SD_TOOLS ; + 142 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, adds UTILITY SD_TOOLS.f
+;SD_TOOLS ; + 142 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, (adds UTILITY) SD_TOOLS.f
;-------------------------------------------------------------------------------
; FAST FORTH TERMINAL configuration
;-------------------------------------------------------------------------------
;HALFDUPLEX ; to use FAST FORTH with half duplex terminal
TERMINALBAUDRATE .equ 115200 ; choose value considering the frequency and the UART2USB bridge, see explanations below.
-TERMINAL3WIRES ;; (18 bytes) enable 3 wires (GND,TX,RX) with XON/XOFF software flow control (PL2303TA/HXD, CP2102)
+TERMINAL3WIRES ;; + 18 bytes enable 3 wires (GND,TX,RX) with XON/XOFF software flow control (PL2303TA/HXD, CP2102)
TERMINAL4WIRES ;; + 12 bytes enable 4 wires with hardware flow control on RX with RTS (PL2303TA/HXD, FT232RL)
-; this RTS pin may be permanently wired on SBWTCK/TEST pin without disturbing SBW 2 wires programming
;TERMINAL5WIRES ; + 10 bytes enable 5 wires with hardware flow control on RX/TX with RTS/CTS (PL2303TA/HXD, FT232RL)...
;===============================================================================
; TX --> RX
; GND <-> GND
;
-; TERATERM config terminal : NewLine receive : AUTO,
-; NewLine transmit : CR+LF
-; Size : 128 chars x 49 lines (adjust lines to your display)
+; TERATERM config terminal: NewLine receive : AUTO,
+; NewLine transmit : CR+LF
+; Size : 128 chars x 49 lines (adjust lines according to your display)
;
-; TERATERM config serial port : TERMINALBAUDRATE value,
-; 8 bits, no parity, 1 Stop bit,
-; XON/XOFF flow control,
-; delay = 0ms/line, 0ms/char
+; TERATERM config serial port: TERMINALBAUDRATE value,
+; 8 bits, no parity, 1 Stop bit,
+; XON/XOFF flow control,
+; delay = 0ms/line, 0ms/char
;
; don't forget : save new TERATERM configuration !
; --------------------------------------------------------------------------------------------
; WARNING ! if you use PL2303TA/HXD cable as supply, open the box before to weld red wire on 3v3 pad !
; --------------------------------------------------------------------------------------------
-; 9600 up to 134400 Bds (500kHz)
-; + 201600,230400,268800 (1MHz)
-; + 403200,460800,614400 (2MHz)
-; + 806400,921600,1228800 (4MHz)
-; + 2457600 (8MHz,PL2303TA)
-; + 1843200,2457600 (8MHz,PL2303HXD)
-; + 3MBds (16MHz,PL2303TA)
-; + 3MBds,4MBds,5MBds (16MHz,PL2303HXD with shortened cable) 5MBds at 16MHz, not too lazy !:-)
-; + 6MBds (24MHz,MSP430FR57xx and MSP430FR2355 families, PL2303HXD with shortened cable)
+; up to 134400 Bds (500kHz,FR5xxx)
+; up to 268800 Bds (1MHz,FR5xxx)
+; up to 614400 Bds (2MHz,FR5xxx)
+; up to 1228800 Bds (4MHz,FR5xxx)
+; up to 2457600 Bds (8MHz,FR5xxx)
+; up to 3MBds (16MHz,FR5xxx,PL2303TA)
+; up to 5MBds (16MHz,FR5xxx,PL2303HXD with shortened cable) 5MBds at 16MHz, not too lazy !:-)
+; up to 6MBds (24MHz,FR57xx,PL2303HXD with shortened cable)
; UARTtoUSB module with Silabs CP2102 (supply current = 20 mA)
; ---------------------------------------------------------------------------------------------------
; RTS --> CTS (see launchpad.asm for RTS selected pin)
; GND <-> GND
+; RTS pin may be permanently wired on SBWTCK/TEST pin without disturbing SBW 2 wires programming
+
; TERATERM config terminal : NewLine receive : AUTO,
; NewLine transmit : CR+LF
; Size : 128 chars x 49 lines (adjust lines to your display)
; DTCforthMSP430FR5xxx RAM memory map:
;-------------------------------------------------------------------------------
-;-------------------------------------
+;---------------------------;---------
; name words ; comment
-;-------------------------------------
+;---------------------------;---------
;LSTACK = L0 = LEAVEPTR ; ----- RAM_ORG
; |
LSTACK_LEN .equ 16 ; | grows up
; |
;RSTACK=R0 ; ----- RAM_ORG + $E0
-;-------------------------------------
+;---------------------------;---------
; names bytes ; comments
-;-------------------------------------
+;---------------------------;---------
; PAD_I2CADR ; ----- RAM_ORG + $E0
; PAD_I2CCNT ;
;PAD ; ----- RAM_ORG + $E4
;
; ----- RAM_ORG + $1E0
;
- ; assembler variables
- ;
- ; ----- RAM_ORG + $1F0
- ;
- ; 12 bytes free
+ ; 28 bytes free
;
; SD_BUF_I2CADR ; ----- RAM_ORG + $1FC
; SD_BUF_I2CCNT ;
FREQ_KHZ .word FREQUENCY*1000 ; user use
.ENDIF
SAVE_SYSRSTIV .word 5 ;
-LPM_MODE .word CPUOFF+GIE ; LPM0 is the default mode
+LPM_MODE .word LPM0+GIE ; LPM0 is the default mode
;LPM_MODE .word CPUOFF+GIE+SCG0 ; LPM1 is the default mode (disable FLL)
INIDP .word ROMDICT ; define RST_STATE
INIVOC .word lastvoclink ; define RST_STATE
-FORTHVERSION .word VERSIO ;
+FORTHVERSION .word VAL(SUBSTR(VER,1,0));
FORTHADDON .word FADDON ;
.word RXON ; 1814h for user use: CALL &RXON
.word RXOFF ; 1816h for user use: CALL &RXOFF
.IFDEF SD_CARD_LOADER
- .word ReadSectorWX ; 1818h used by ADDON_SD_TOOLS.f
+ .word ReadSectorWX ; 1818h used by SD_TOOLS.f
.IFDEF SD_CARD_READ_WRITE
- .word WriteSectorWX ; 181Ah used by ADDON_SD_TOOLS.f
- .ENDIF ; SD_CARD_READ_WRITE
- .ENDIF ; SD_CARD_LOADER
+ .word WriteSectorWX ; 181Ah
+ .ELSE
+ .word WARM ;
+ .ENDIF
+ .ELSE
+ .word WARM ;
+ .ENDIF
; ---------------------------------------
; VARIABLES that should be in RAM
.ENDIF ; SD_CARD_LOADER
;-------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx program (FRAM) memory
-;-------------------------------------------------------------------------------
-
- .org MAIN_ORG
-
-;-------------------------------------------------------------------------------
; DEFINING EXECUTIVE WORDS - DTC model
;-------------------------------------------------------------------------------
; very nice FAST FORTH added feature:
RSP .reg R1 ; RSP = Return Stack Pointer (return stack)
-; DOxxx registers ; must be saved before use and restored after use
-rDODOES .reg r4
-rDOCON .reg r5
-rDOVAR .reg r6
+; DOxxx registers ; must be saved before use and restored after:
+rDODOES .reg r4 ; MOV #XDODOES,rDODOES
+rDOCON .reg r5 ; MOV #XDOCON,rDOCON
+rDOVAR .reg r6 ; MOV #XDOVAR,rDOVAR
rDOCOL .reg R7
R .reg r4 ; rDODOES alias
TOS .reg R14 ; first PSP cell
PSP .reg R15 ; PSP = Parameters Stack Pointer (stack data)
+;-------------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx program (FRAM) memory
+;-------------------------------------------------------------------------------
-mNEXT .MACRO ; return (inverted round trip) for low level words (written in assembler)
- MOV @IP+,PC ; 4 fetch code address into PC, IP=PFA
- .ENDM ; 4 cycles, 1word = ITC -2cycles -1 word
+ .org MAIN_ORG
-NEXT .equ 4D30h ; 4 MOV @IP+,PC
-FORTHtoASM .MACRO ; compiled by HI2LO
- .word $+2 ; 0 cycle
- .ENDM ; 0 cycle, 1 word
+; here we place maximum of primitives without associated word FORTH.
+; as their addresses are options independent, FORTH can access via declarations made in MSP430xxxx.pat
+;
-mSEMI .MACRO
- MOV @RSP+,IP
- MOV @IP+,PC
- .ENDM
+;###############################################################################################################
+;###############################################################################################################
+
+
+; Primitive SLEEP, user use
+; ----------------------------------;
+SLEEP MOV @PC+,PC ;3 Code Field Address (CFA) of SLEEP
+PFASLEEP .word BODYSLEEP ; Parameter Field Address (PFA) of SLEEP, with BODYSLEEP as default exec addr
+BODYSLEEP CALL #RXON ;4 enable UART_TERMINAL
+ BIS &LPM_MODE,SR ;3 enter in LPMx sleep mode with GIE=1
+; ----------------------------------; default FAST FORTH mode (for its input terminal use) : LPM0.
+
+; ### # # ####### ####### ###### ###### # # ###### ####### ##### # # ####### ###### #######
+; # ## # # # # # # # # # # # # # # # # # # # #
+; # # # # # # # # # # # # # # # # # # # # # #
+; # # # # # ##### ###### ###### # # ###### # ##### ####### ##### ###### #####
+; # # # # # # # # # # # # # # # # # # # # #
+; # # ## # # # # # # # # # # # # # # # # # #
+; ### # # # ####### # # # # ##### # # ##### # # ####### # # #######
+
+; here, FAST FORTH sleeps, waiting any interrupt.
+
+; And any interruption must interrupt FAST FORTH only here..
+
+; IP,S,T,W,X,Y registers (R13 to R8) are free for any interrupt routine...
+; ...and so PSP and RSP stacks with their rules of use.
+; remember: in any interrupt routine you must include : BIC #0xF8,0(RSP) before RETI to force SLEEP executing.
+; You can reuse UF9 UF10 UF11 SR flags saved in 0(RSP)
+; or simply (previous SR flags will be lost) : ADD #2 RSP, then RET instead of RETI
+
+; ==================================;
+ JMP SLEEP ;2 here is the return for any interrupts, else TERMINAL_INT :-)
+; ==================================;
+
+;###############################################################################################################
+;###############################################################################################################
+
+; Primitive INIT_VECT, user use
+INIT_VECT MOV #VECT_LEN,X ;2 length of vectors area
+VECTORLOOP SUB #2,X ;1
+ MOV #RESET,VECT_ORG(X) ;4 begin at end of area
+ JNZ VECTORLOOP ;2 endloop when VECT_ORG(X) = VECT_ORG
+ MOV #TERMINAL_INT,&TERM_VEC
+ MOV @RSP+,PC ; ret
+
+; ------------------------------------------------------------------------------
+; COMPILING OPERATORS
+; ------------------------------------------------------------------------------
+
+; Primitive LIT; compiled by LITERAL
+; lit -- x fetch inline literal to stack
+; This is the execution part of LITERAL.
+; FORTHWORD "LIT"
+LIT SUB #2,PSP ; 2 push old TOS..
+ MOV TOS,0(PSP) ; 3 ..onto stack
+ MOV @IP+,TOS ; 2 fetch new TOS value
+NEXT_ADR MOV @IP+,PC ; 4 NEXT
+
+; Primitive XSQUOTE; compiled by SQUOTE
+; (S") -- addr u run-time code to get address and length of a compiled string.
+XSQUOTE SUB #4,PSP ; 1 -- x x TOS ; push old TOS on stack
+ MOV TOS,2(PSP) ; 3 -- TOS x x ; and reserve one cell on stack
+ MOV.B @IP+,TOS ; 2 -- x u ; u = lenght of string
+ MOV IP,0(PSP) ; 3 -- addr u
+ ADD TOS,IP ; 1 -- addr u IP=addr+u=addr(end_of_string)
+ BIT #1,IP ; 1 -- addr u IP=addr+u Carry set/clear if odd/even
+ ADDC #0,IP ; 1 -- addr u IP=addr+u aligned
+ MOV @IP+,PC ; 4 16~
+
+;-------------------------------------------------------------------------------
+; BRANCH OPERATORS
+;-------------------------------------------------------------------------------
+
+; Primitive QTBRAN
+;Z ?TrueBranch x -- ; branch if TOS is true (TOS <> 0)
+QTBRAN CMP #0,TOS ; 1 test TOS value
+ MOV @PSP+,TOS ; 2 pop new TOS value (doesn't change flags)
+ JZ SKIPBRAN ; 2 if TOS was = 0, skip the branch
+; Primitive BRAN
+;Z branch -- ;
+BRAN MOV @IP,IP ; 2 take the branch destination
+ MOV @IP+,PC ; 4 ==> branch taken = 11 cycles
+
+; Primitive QFBRAN; compiled by IF UNTIL
+;Z ?FalseBranch x -- ; branch if TOS is FALSE (TOS = 0)
+QFBRAN CMP #0,TOS ; 1 test TOS value
+ MOV @PSP+,TOS ; 2 pop new TOS value (doesn't change flags)
+ JZ BRAN ; 2 if TOS was = 0, take the branch
+; Primitive SKIPBRAN
+;Z SkipBranch -- ;
+SKIPBRAN ADD #2,IP ; 1 skip the branch destination
+ MOV @IP+,PC ; 4 ==> branch not taken = 10 cycles
+
+;-------------------------------------------------------------------------------
+; LOOP OPERATORS
+;-------------------------------------------------------------------------------
+
+; Primitive XDO; compiled by DO
+;Z (do) n1|u1 n2|u2 -- R: -- sys1 sys2 run-time code for DO
+; n1|u1=limit, n2|u2=index
+XDO MOV #8000h,X ;2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X ;2
+ MOV TOS,Y ;1 loop ctr = index+fudge
+ MOV @PSP+,TOS ;2 pop new TOS
+ ADD X,Y ;1 Y = INDEX
+ PUSHM #2,X ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @IP+,PC ;4
+
+; Primitive XPLOOP; compiled by +LOOP
+;Z (+loop) n -- R: sys1 sys2 -- | sys1 sys2
+; run-time code for +LOOP
+; Add n to the loop index. If loop terminates, clean up the
+; return stack and skip the branch. Else take the inline branch.
+XPLOOP ADD TOS,0(RSP) ;4 increment INDEX by TOS value
+ MOV @PSP+,TOS ;2 get new TOS, doesn't change flags
+XLOOPNEXT BIT #100h,SR ;2 is overflow bit set?
+ JZ BRAN ;2 no overflow = loop
+ ADD #4,RSP ;1 empty RSP
+ ADD #2,IP ;1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC ;4 16~ taken or not taken xloop/loop
-; that is obviously faster than the same sized "BR #EXIT,PC" !
+; Primitive XLOOP; compiled by LOOP
+;Z (loop) R: sys1 sys2 -- | sys1 sys2
+; run-time code for LOOP
+; Add 1 to the loop index. If loop terminates, clean up the
+; return stack and skip the branch. Else take the inline branch.
+; Note that LOOP terminates when index=8000h.
+XLOOP ADD #1,0(RSP) ;4 increment INDEX
+ JMP XLOOPNEXT ;2
+; primitive MUSMOD; compiled by ?NUMBER UM/MOD
;-------------------------------------------------------------------------------
-; mDODOES leave on parameter stack the PFA of a CREATE definition and execute Master word
+; unsigned 32-BIT DiViDend : 16-BIT DIVisor --> 32-BIT QUOTient, 16-BIT REMainder
;-------------------------------------------------------------------------------
+; 2 times faster if DVDhi = 0 (it's the general case)
+
+; reg division MU/MOD NUM
+; -----------------------------------------
+; S = DVDlo (15-0) = ud1lo = ud1lo
+; TOS = DVDhi (31-16) = ud1hi = ud1hi
+; T = DIVlo = BASE
+; W = REMlo = REMlo = digit --> char --> -[HP]
+; X = QUOTlo = ud2lo = ud2lo
+; Y = QUOThi = ud2hi = ud2hi
+; rDODOES = count
+
+MUSMOD MOV TOS,T ;1 T = DIVlo
+ MOV 2(PSP),S ;3 S = DVDlo
+ MOV @PSP,TOS ;2 TOS = DVDhi
+MUSMOD1 MOV #0,W ;1 W = REMlo = 0
+ MOV #32,rDODOES ;2 init loop count
+ CMP #0,TOS ;1 DVDhi=0 ?
+ JNZ MDIV1 ;2 no
+; -----------------------------------------
+ RRA rDODOES ;1 yes:loop count / 2
+ MOV S,TOS ;1 DVDhi <-- DVDlo
+ MOV #0,S ;1 DVDlo <-- 0
+ MOV #0,X ;1 QUOTlo <-- 0 (to do QUOThi = 0 at the end of division)
+; -----------------------------------------
+MDIV1 CMP T,W ;1 REMlo U>= DIV ?
+ JNC MDIV2 ;2 no : carry is reset
+ SUB T,W ;1 yes: REMlo - DIV ; carry is set
+MDIV2 ADDC X,X ;1 RLC quotLO
+ ADDC Y,Y ;1 RLC quotHI
+ SUB #1,rDODOES ;1 Decrement loop counter
+ JN ENDMDIV ;2
+ ADD S,S ;1 RLA DVDlo
+ ADDC TOS,TOS ;1 RLC DVDhi
+ ADDC W,W ;1 RLC REMlo
+ JNC MDIV1 ;2
+ SUB T,W ;1 REMlo - DIV
+ BIS #1,SR ;1 SETC
+ JMP MDIV2 ;2
+ENDMDIV MOV #xdodoes,rDODOES;2 restore rDODOES
+ MOV W,2(PSP) ;3 REMlo in 2(PSP)
+ MOV X,0(PSP) ;3 QUOTlo in 0(PSP)
+ MOV Y,TOS ;1 QUOThi in TOS
+ MOV @RSP+,PC ;4 35 words, about 473 cycles, not FORTH executable !
+
+; : SETIB SOURCE 2! 0 >IN ! ;
+; SETIB org len -- set Input Buffer, shared by INTERPRET and [ELSE]
+SETIB MOV TOS,&SOURCE_LEN ; -- org len
+ MOV @PSP+,&SOURCE_ORG ; -- len
+ MOV @PSP+,TOS ; --
+ MOV #0,&TOIN ;
+ MOV @IP+,PC ;
-mDODOES .MACRO ; compiled by DOES>
- CALL rDODOES ; CALL xdodoes
- .ENDM ; 1 word, 19 cycles (ITC-2)
+; REFILL accept one line from input and leave org len of input buffer
+; : REFILL TIB DUP TIB_LEN ACCEPT ; -- TIB len shared by QUIT and [ELSE]
+REFILL SUB #6,PSP ;2 -- x x x x
+ MOV TOS,4(PSP) ;3 -- Saved_TOS x x TOS
+ MOV #TIB_LEN,TOS ;2 -- Saved_TOS x x TIB_LEN
+ .word 40BFh ; MOV #TIB_ORG,0(PSP)
+CIB_ADR .word TIB_ORG ; may be replaced by SDIB_ORG
+ .word 0 ; -- Saved_TOS x TIB TIB_LEN
+ MOV @PSP,2(PSP) ;4 -- Saved_TOS TIB TIB TIB_LEN
+ JMP ACCEPT ;2 -- TIB LEN
+
+;-------------------------------------------------------------------------------
+; DODOES leave on parameter stack the PFA of a CREATE definition and execute Master word
+;-------------------------------------------------------------------------------
-DODOES .equ 1284h ; 4 CALL rDODOES ; [rDODOES] is defind as xdodoes by COLD
+DODOES .equ 1284h ; 4 CALL rDODOES ; [rDODOES] is defined as xdodoes by COLD
-xdodoes ; -- a-addr ; 4 for CALL rDODOES
+XDODOES ; -- addr ; 4 for CALL rDODOES S-- BODY PFA R--
SUB #2,PSP ; 1
MOV TOS,0(PSP) ; 3 save TOS on parameters stack
- MOV @RSP+,TOS ; 2 TOS = CFA address of master word, i.e. address of its first cell after DOES>
+ MOV @RSP+,TOS ; 2 TOS = PFA address of master word, i.e. address of its first cell after DOES>
PUSH IP ; 3 save IP on return stack
MOV @TOS+,IP ; 2 IP = CFA of Master word, TOS = BODY address of created word
MOV @IP+,PC ; 4 Execute Master word
;-------------------------------------------------------------------------------
-; mDOCON leave on parameter stack the [PFA] of a CONSTANT definition
+; DOCON leave on parameter stack the [PFA] of a CONSTANT definition
;-------------------------------------------------------------------------------
-mDOCON .MACRO ; compiled by CONSTANT
- CALL rDOCON ; 1 word, 16 cycles (ITC+3)
- .ENDM ;
-
DOCON .equ 1285h ; 4 CALL rDOCON ; [rDOCON] is defined as xdocon by COLD
-xdocon ; -- constant ; 4 for CALL rDOCON
- SUB #2,PSP ; 1
+XDOCON ; 4 for CALL rDOCON S-- CTE PFA R--
+ SUB #2,PSP ; 1
MOV TOS,0(PSP) ; 3 save TOS on parameters stack
- MOV @RSP+,TOS ; 2 TOS = CFA address of master word CONSTANT
- MOV @TOS,TOS ; 2 TOS = CONSTANT value
+ MOV @RSP+,TOS ; 2 TOS = PFA address of master word CONSTANT
+FETCH MOV @TOS,TOS ; 2 TOS = CONSTANT value
MOV @IP+,PC ; 4 execute next word
; 16 = ITC (+4)
;-------------------------------------------------------------------------------
-; mDOVAR leave on parameter stack the PFA of a VARIABLE definition
+; DOVAR leave on parameter stack the PFA of a VARIABLE definition
;-------------------------------------------------------------------------------
-mDOVAR .MACRO ; compiled by VARIABLE
- CALL rDOVAR ; 1 word, 14 cycles (ITC+2)
- .ENDM ;
+DOVAR .equ 1286h ; 4 for CALL rDOVAR S-- VAR PFA R--
+ ; [rDOVAR] is defined as RFROM by COLD
+
+;-------------------------------------------------------------------------------
+; DOCOL starts high level words
+;-------------------------------------------------------------------------------
-DOVAR .equ 1286h ; CALL rDOVAR ; [rDOVAR] is defined as RFROM by COLD
+DOCOL .equ 1287h
.SWITCH DTC
;-------------------------------------------------------------------------------
- .CASE 1 ; DOCOL = CALL rDOCOL
+ .CASE 1 ; DOCOL = CALL rDOCOL, [rDOCOL] = xdocol
;-------------------------------------------------------------------------------
-xdocol MOV @RSP+,W ; 2
- PUSH IP ; 3 save old IP on return stack
- MOV W,IP ; 1 set new IP to PFA
- MOV @IP+,PC ; 4 = NEXT
- ; 10 cycles
+DOCOL1 .equ 1287h ; 4 CALL rDOCOL
ASMtoFORTH .MACRO ; compiled by LO2HI
CALL #EXIT ; 10 cycles
.ENDM ; 2 words, 10 cycles
+ ; LO2HI + HI2LO = 3 words, 10 cycles.
mDOCOL .MACRO ; compiled by : and by colon
CALL rDOCOL ; 10 [rDOCOL] = xdocol
- .ENDM ; 1 word, 14 cycles (CALL included) = ITC+4
+ .ENDM ; 1 word, 14 cycles (CALL included) (ITC+4)
+ ; COLON + SEMI = 2 words, 20 cycles (ITC+2)
-DOCOL1 .equ 1287h ; 4 CALL rDOCOL
+XDOCOL MOV @RSP+,W ; 2
+ PUSH IP ; 3 save old IP on return stack
+ MOV W,IP ; 1 set new IP to PFA
+ MOV @IP+,PC ; 4 = NEXT
+ ; 10 cycles
;-------------------------------------------------------------------------------
- .CASE 2 ; DOCOL = PUSH IP + CALL rDOCOL
+ .CASE 2 ; DOCOL = PUSH IP + CALL rDOCOL, [rDOCOL] = EXIT
;-------------------------------------------------------------------------------
+DOCOL1 .equ 120Dh ; 3 PUSH IP
+DOCOL2 .equ 1287h ; 4 CALL rDOCOL
+
ASMtoFORTH .MACRO ; compiled by LO2HI
CALL rDOCOL ; 10 [rDOCOL] = EXIT
- .ENDM ; 1 word, 10 cycles
+ .ENDM ; 1 word, 10 cycles.
+ ; LO2HI + HI2LO = 2 words, 10 cycles.
mDOCOL .MACRO ; compiled by : and by COLON
PUSH IP ; 3
CALL rDOCOL ; 10 [rDOCOL] = EXIT
- .ENDM ; 2 words, 13 cycles = ITC+3
-
-DOCOL1 .equ 120Dh ; 3 PUSH IP
-DOCOL2 .equ 1287h ; 4 CALL rDOCOL
+ .ENDM ; 2 words, 13 cycles (ITC+3)
+ ; COLON + SEMI = 3 words, 19 cycles (ITC+1)
;-------------------------------------------------------------------------------
.CASE 3 ; inlined DOCOL
;-------------------------------------------------------------------------------
+DOCOL1 .equ 120Dh ; 3 PUSH IP
+DOCOL2 .equ 400Dh ; 1 MOV PC,IP
+DOCOL3 .equ 522Dh ; 1 ADD #4,IP
+
ASMtoFORTH .MACRO ; compiled by LO2HI
MOV PC,IP ; 1
ADD #4,IP ; 1
MOV @IP+,PC ; 4 NEXT
.ENDM ; 6 cycles, 3 words
+ ; LO2HI + HI2LO = 4 words, 6 cycles.
mDOCOL .MACRO ; compiled by : and by COLON
PUSH IP ; 3
ADD #4,IP ; 1
MOV @IP+,PC ; 4 NEXT
.ENDM ; 4 words, 9 cycles (ITC-1)
-
-DOCOL1 .equ 120Dh ; 3 PUSH IP
-DOCOL2 .equ 400Dh ; 1 MOV PC,IP
-DOCOL3 .equ 522Dh ; 1 ADD #4,IP
+ ; COLON + SEMI = 5 words, 15 cycles (ITC-3)
.ENDCASE ; DTC
-;https://forth-standard.org/standard/core/EXIT
-;C EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
-; JMP #EXIT performs EXIT
+;-------------------------------------------------------------------------------
+; RETURN from low level, high level
+;-------------------------------------------------------------------------------
+
+;low level return
+NEXT .equ 4D30h ; 4 MOV @IP+,PC
+ ; jump from Asm word to NEXT Asm word: 1 word, 4 cycles (ITC-2)
+
+;high level return
+; https://forth-standard.org/standard/core/EXIT
+; EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
+; JMP #EXIT performs EXIT
+ .IFDEF CORE_COMPLEMENT
FORTHWORD "EXIT"
-EXIT MOV @RSP+,IP ; 2 pop previous IP (or next PC) from return stack
- MOV @IP+,PC ; 4 = NEXT
- ; 6 = ITC - 2
+ MOV @RSP+,IP ; 2 pop previous IP (or next PC) from return stack
+ MOV @IP+,PC ; 4 = NEXT
+ .ENDIF ; 6 (ITC-2)
;-------------------------------------------------------------------------------
-; STACK OPERATIONS
+; INTERPRETER INPUT, the kernel of kernel !
;-------------------------------------------------------------------------------
-;https://forth-standard.org/standard/core/DUP
-;C DUP x -- x x duplicate top of stack
- FORTHWORD "DUP"
-DUP SUB #2,PSP ; 2 push old TOS..
- MOV TOS,0(PSP) ; 3 ..onto stack
- mNEXT ; 4
-
-; https://forth-standard.org/standard/core/TwoDUP
-; 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
- FORTHWORD "2DUP"
-TWODUP MOV TOS,-2(PSP) ;3 -- x1 x2 x x2
- MOV @PSP,-4(PSP) ;4 -- x1 x2 x1 x2
- SUB #4,PSP ;1 -- x1 x x x2
- mNEXT
+; ----------------------------------;
+RXON ; Software and/or hardware flow control, to start Terminal UART communication
+; ----------------------------------;
+ .IFDEF TERMINAL3WIRES ; first software flow control
+RXON_LOOP BIT #UCTXIFG,&TERM_IFG ;3 wait the sending of last char, useless at high baudrates
+ JZ RXON_LOOP ;2
+ MOV #17,&TERM_TXBUF ;4 move char XON into TX_buf
+ .ENDIF ;
+ .IFDEF TERMINAL4WIRES ; and hardware flow control after
+ BIC.B #RTS,&HANDSHAKOUT ;3 set RTS low
+ .ENDIF ;
+ MOV @RSP+,PC ;4 to BACKGND (End of file download or quiet input) or AKEYREAD1 (get next line of file downloading)
+; ----------------------------------; ...or user defined
-;https://forth-standard.org/standard/core/qDUP
-;C ?DUP x -- 0 | x x DUP if nonzero
- FORTHWORD "?DUP"
-QDUP CMP #0,TOS ; 2 test for TOS nonzero
- JNZ DUP ; 2
- mNEXT ; 4
+; ----------------------------------;
+RXOFF ; Software and/or hardware flow control, to stop Terminal UART comunication
+; ----------------------------------;
+ .IFDEF TERMINAL3WIRES ; first software flow control
+RXOFF_LOOP BIT #UCTXIFG,&TERM_IFG ;3 wait the sending of last char
+ JZ RXOFF_LOOP ;2
+ MOV #19,&TERM_TXBUF ;4 move XOFF char into TX_buf
+ .ENDIF ;
+ .IFDEF TERMINAL4WIRES ; and hardware flow control after
+ BIS.B #RTS,&HANDSHAKOUT ;3 set RTS high
+ .ENDIF ;
+ MOV @RSP+,PC ;4 to ENDACCEPT, ...or user defined
+; ----------------------------------;
-;https://forth-standard.org/standard/core/DROP
-;C DROP x -- drop top of stack
- FORTHWORD "DROP"
-DROP MOV @PSP+,TOS ; 2
- mNEXT ; 4
-;https://forth-standard.org/standard/core/NIP
-;C NIP x1 x2 -- x2 Drop the first item below the top of stack
- .IFDEF ANS_CORE_COMPLEMENT
- FORTHWORD "NIP"
+ .IFDEF SD_CARD_LOADER
+ .include "forthMSP430FR_SD_ACCEPT.asm"
.ENDIF
-NIP ADD #2,PSP ; 1
- mNEXT ; 4
-
-;https://forth-standard.org/standard/core/SWAP
-;C SWAP x1 x2 -- x2 x1 swap top two items
- FORTHWORD "SWAP"
-SWAP MOV @PSP,W ; 2
- MOV TOS,0(PSP) ; 3
- MOV W,TOS ; 1
- mNEXT ; 4
-;https://forth-standard.org/standard/core/toR
-;C >R x -- R: -- x push to return stack
- FORTHWORD ">R"
-TOR PUSH TOS
- MOV @PSP+,TOS
- mNEXT
+; con speed of TERMINAL link, there are three bottlenecks :
+; 1- time to send XOFF/RTS_high on CR (CR+LF=EOL), first emergency.
+; 2- the char loop time,
+; 3- the time between sending XON/RTS_low and clearing UCRXIFG on first received char,
+; everything must be done to reduce these times, taking into account the necessity of switching to SLEEP (LPMx mode).
-;https://forth-standard.org/standard/core/Rfrom
-;C R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
- FORTHWORD "R>"
-RFROM SUB #2,PSP ; 1
- MOV TOS,0(PSP) ; 3
- MOV @RSP+,TOS ; 2
- mNEXT ; 4
+; three cases may occurs when entering in ACCEPT routine:
+; 1- UART RX interrupt is pending and received char in TERM_RXBUF is <> LF --> send RXON then goto ACCEPTNEXT
+; 2- UART RX interrupt is pending and received char in TERM_RXBUF is = LF --> send RXON then goto SLEEP
+; 3- no UART RX interrupt --> send RXON then goto SLEEP
+; Case 2 is normally the one expected after receiving the end of a line (CR+LF) followed by the emission of RXOFF.
+; But in fact, it's the case 1, the first char of next line is also sent by terminal.
+; by managing this three cases ACCEPT works very very well. If it doesn't work well, the problem is with the hardware...
-;https://forth-standard.org/standard/core/DEPTH
-;C DEPTH -- +n number of items on stack, must leave 0 if stack empty
- FORTHWORD "DEPTH"
-DEPTH MOV TOS,-2(PSP)
- MOV #PSTACK,TOS
- SUB PSP,TOS ; PSP-S0--> TOS
- RRA TOS ; TOS/2 --> TOS
-DECPSP SUB #2,PSP ; post decrement stack...
- mNEXT
+ .IFDEF DEFER_ACCEPT
-;-------------------------------------------------------------------------------
-; ARITHMETIC OPERATIONS
-;-------------------------------------------------------------------------------
+;https://forth-standard.org/standard/core/ACCEPT
+;C ACCEPT addr addr len -- addr len' get line at addr to interpret len' chars
+ FORTHWORD "ACCEPT"
+ACCEPT MOV @PC+,PC ;3 Code Field Address (CFA) of ACCEPT
+PFAACCEPT .word BODYACCEPT ; Parameter Field Address (PFA) of ACCEPT
+BODYACCEPT ; BODY of ACCEPT = default execution of ACCEPT
-;https://forth-standard.org/standard/core/Minus
-;C - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
- FORTHWORD "-"
-MINUS SUB @PSP+,TOS ;2 -- n2-n1
-NEGATE XOR #-1,TOS ;1
- ADD #1,TOS ;1 -- n3 = -(n2-n1) = n1-n2
- mNEXT
-
-;https://forth-standard.org/standard/core/OnePlus
-;C 1+ n1/u1 -- n2/u2 add 1 to TOS
- FORTHWORD "1+"
-ONEPLUS ADD #1,TOS
- mNEXT
-
-;https://forth-standard.org/standard/core/OneMinus
-;C 1- n1/u1 -- n2/u2 subtract 1 from TOS
- FORTHWORD "1-"
-ONEMINUS SUB #1,TOS
- mNEXT
-
-;https://forth-standard.org/standard/double/DABS
-;C DABS d1 -- |d1| absolute value
-; FORTHWORD "DABS"
-DABBS AND #-1,TOS ; clear V, set N
- JGE DABBSEND ; if positive
-DNEGATE XOR #-1,0(PSP)
- XOR #-1,TOS
- ADD #1,0(PSP)
- ADDC #0,TOS
-DABBSEND mNEXT
-
-;-------------------------------------------------------------------------------
-; MEMORY OPERATIONS
-;-------------------------------------------------------------------------------
-
-;https://forth-standard.org/standard/core/Fetch
-;C @ a-addr -- x fetch cell from memory
- FORTHWORD "@"
-FETCH MOV @TOS,TOS
- mNEXT
-
-;https://forth-standard.org/standard/core/Store
-;C ! x a-addr -- store cell in memory
- FORTHWORD "!"
-STORE MOV @PSP+,0(TOS) ;4
- MOV @PSP+,TOS ;2
- mNEXT ;4
-
-;-------------------------------------------------------------------------------
-; COMPARAISON OPERATIONS
-;-------------------------------------------------------------------------------
-
-;https://forth-standard.org/standard/core/ZeroEqual
-;C 0= n/u -- flag return true if TOS=0
- FORTHWORD "0="
-ZEROEQUAL SUB #1,TOS ; borrow (clear cy) if TOS was 0
- SUBC TOS,TOS ; TOS=-1 if borrow was set
- mNEXT
-
-;https://forth-standard.org/standard/core/Zeroless
-;C 0< n -- flag true if TOS negative
- FORTHWORD "0<"
-ZEROLESS ADD TOS,TOS ;1 set carry if TOS negative
- SUBC TOS,TOS ;1 TOS=-1 if carry was clear
-INVERT XOR #-1,TOS ;1 TOS=-1 if carry was set
- mNEXT
-
-;https://forth-standard.org/standard/core/Equal
-;C = x1 x2 -- flag test x1=x2
- FORTHWORD "="
-EQUAL SUB @PSP+,TOS ;2
- JZ INVERT ;2
-TOSFALSE AND #0,TOS ;1 flag Z = 1
- mNEXT ;4
-
-;https://forth-standard.org/standard/core/Uless
-;C U< u1 u2 -- flag test u1<u2, unsigned
- FORTHWORD "U<"
-ULESS SUB @PSP+,TOS ;2
- JNC TOSFALSE ;2 unsigned
- JZ ULESSEND ;2
- MOV #-1,TOS ;1 flag Z = 0
-ULESSEND mNEXT ;4
-
-;-------------------------------------------------------------------------------
-; ANS complement OPTION
-;-------------------------------------------------------------------------------
- .IFDEF ANS_CORE_COMPLEMENT
- .include "ADDON/ANS_COMPLEMENT.asm"
- .ENDIF ; ANS_COMPLEMENT
-
-;-------------------------------------------------------------------------------
-; NUMERIC OUTPUT
-;-------------------------------------------------------------------------------
-
-; Numeric conversion is done last digit first, so
-; the output buffer is built backwards in memory.
-
-;https://forth-standard.org/standard/core/num-start
-;C <# -- begin numeric conversion (initialize Hold Pointer)
- FORTHWORD "<#"
-LESSNUM MOV #HOLD_BASE,&HP
- mNEXT
-
-; unsigned 32-BIT DiViDend : 16-BIT DIVisor --> 32-BIT QUOTient, 16-BIT REMainder
-; 2 times faster if DVDhi = 0 (it's the general case)
-
-; reg division MU/MOD NUM
-; -----------------------------------------
-; S = DVDlo (15-0) = ud1lo = ud1lo
-; TOS = DVDhi (31-16) = ud1hi = ud1hi
-; T = DIVlo = BASE
-; W = REMlo = REMlo = digit --> char --> -[HP]
-; X = QUOTlo = ud2lo = ud2lo
-; Y = QUOThi = ud2hi = ud2hi
-; rDODOES = count
-
-MUSMOD MOV TOS,T ;1 T = DIVlo
- MOV 2(PSP),S ;3 S = DVDlo
- MOV @PSP,TOS ;2 TOS = DVDhi
-MUSMOD1 MOV #0,W ;1 W = REMlo = 0
- MOV #32,rDODOES ;2 init loop count
- CMP #0,TOS ;1 DVDhi=0 ?
- JNZ MDIV1 ;2 no
-; -----------------------------------------
- RRA rDODOES ;1 yes:loop count / 2
- MOV S,TOS ;1 DVDhi <-- DVDlo
- MOV #0,S ;1 DVDlo <-- 0
- MOV #0,X ;1 QUOTlo <-- 0 (to do QUOThi = 0 at the end of division)
-; -----------------------------------------
-MDIV1 CMP T,W ;1 REMlo U>= DIV ?
- JNC MDIV2 ;2 no : carry is reset
- SUB T,W ;1 yes: REMlo - DIV ; carry is set
-MDIV2 ADDC X,X ;1 RLC quotLO
- ADDC Y,Y ;1 RLC quotHI
- SUB #1,rDODOES ;1 Decrement loop counter
- JN ENDMDIV ;2
- ADD S,S ;1 RLA DVDlo
- ADDC TOS,TOS ;1 RLC DVDhi
- ADDC W,W ;1 RLC REMlo
- JNC MDIV1 ;2
- SUB T,W ;1 REMlo - DIV
- BIS #1,SR ;1 SETC
- JMP MDIV2 ;2
-ENDMDIV MOV #xdodoes,rDODOES;2 restore rDODOES
- MOV W,2(PSP) ;3 REMlo in 2(PSP)
- MOV X,0(PSP) ;3 QUOTlo in 0(PSP)
- MOV Y,TOS ;1 QUOThi in TOS
- RET ;4 35 words, about 473 cycles, not FORTH executable !
-
-;https://forth-standard.org/standard/core/num
-;C # ud1lo ud1hi -- ud2lo ud2hi convert 1 digit of output
- FORTHWORD "#"
-NUM MOV &BASE,T ;3 T = Divisor
-NUM1 MOV @PSP,S ;2 -- DVDlo DVDhi S = DVDlo
- SUB #2,PSP ;1 -- DVDlo x DVDhi TOS = DVDhi
- CALL #MUSMOD1 ;4 -- REMlo QUOTlo QUOThi
- MOV @PSP+,0(PSP) ;4 -- QUOTlo QUOThi
-TODIGIT CMP.B #10,W ;2 W = REMlo
- JLO TODIGIT1 ;2 U<
- ADD.B #7,W ;2
-TODIGIT1 ADD.B #30h,W ;2
-HOLDW SUB #1,&HP ;4 store W=char --> -[HP]
- MOV &HP,Y ;3
- MOV.B W,0(Y) ;3
- mNEXT ;4 26 words
-
-;https://forth-standard.org/standard/core/numS
-;C #S udlo udhi -- 0 0 convert remaining digits
- FORTHWORD "#S"
-NUMS mDOCOL
- .word NUM ; X=QUOTlo
- FORTHtoASM ;
- SUB #2,IP ;1 restore NUM return
- CMP #0,X ;1 test ud2lo first (generally <>0)
- JNZ NUM1 ;2
- CMP #0,TOS ;1 then test ud2hi (generally =0)
- JNZ NUM1 ;2
- mSEMI ;6 10 words, about 241/417 cycles/char
-
-;https://forth-standard.org/standard/core/num-end
-;C #> udlo:udhi -- c-addr u end conversion, get string
- FORTHWORD "#>"
-NUMGREATER MOV &HP,0(PSP)
- MOV #HOLD_BASE,TOS
- SUB @PSP,TOS
- mNEXT
-
-;https://forth-standard.org/standard/core/HOLD
-;C HOLD char -- add char to output string
- FORTHWORD "HOLD"
-HOLD MOV TOS,W ;1
- MOV @PSP+,TOS ;2
- JMP HOLDW ;15
-
-;https://forth-standard.org/standard/core/SIGN
-;C SIGN n -- add minus sign if n<0
- FORTHWORD "SIGN"
-SIGN CMP #0,TOS
- MOV @PSP+,TOS
- MOV #'-',W
- JN HOLDW ; 0<
- mNEXT
-
-;https://forth-standard.org/standard/double/Dd
-;C D. dlo dhi -- display d (signed)
-; FORTHWORD "D."
-DDOT mDOCOL
- .word LESSNUM,DUP,TOR,DABBS,NUMS
- .word RFROM,SIGN,NUMGREATER,TYPE
- .word FBLANK,EMIT,EXIT
-
-;https://forth-standard.org/standard/core/Ud
-;C U. u -- display u (unsigned)
- FORTHWORD "U."
-UDOT MOV #0,Y ; 1
-UDOT1 SUB #2,PSP ; 1 convert n|u to d|ud
- MOV TOS,0(PSP) ; 3
- MOV Y,TOS ; 1
- JMP DDOT ; 2
-
-;https://forth-standard.org/standard/core/d
-;C . n -- display n (signed)
- FORTHWORD "."
-DOT CMP #0,TOS ;
- JGE UDOT
- MOV #-1,Y
- JMP UDOT1
-
-;-------------------------------------------------------------------------------
-; BRANCH and LOOP OPERATORS
-;-------------------------------------------------------------------------------
-
-;Z branch -- branch always
-BRAN MOV @IP,IP ; 2
- mNEXT ; 4
-
-;Z ?FalseBranch x -- ; branch if TOS is FALSE (=zero)
-QFBRAN CMP #0,TOS ; 1 test TOS value
- MOV @PSP+,TOS ; 2 pop new TOS value (doesn't change flags)
- JZ BRAN ; 2 if TOS was = 0, take the branch = 11 cycles
- ADD #2,IP ; 1 else skip the branch destination
- mNEXT ; 4 ==> branch not taken = 10 cycles
-
-;Z ?TrueBranch x -- ; branch if TOS is true (<> zero)
-QTBRAN CMP #0,TOS ; 1 test TOS value
- MOV @PSP+,TOS ; 2 pop new TOS value (doesn't change flags)
- JNZ BRAN ; 2 if TOS was <> 0, take the branch = 11 cycles
- ADD #2,IP ; 1 else skip the branch destination
- mNEXT ; 4 ==> branch not taken = 10 cycles
-
-;Z (do) n1|u1 n2|u2 -- R: -- sys1 sys2 run-time code for DO
-; n1|u1=limit, n2|u2=index
-xdo MOV #8000h,X ;2 compute 8000h-limit "fudge factor"
- SUB @PSP+,X ;2
- MOV TOS,Y ;1 loop ctr = index+fudge
- MOV @PSP+,TOS ;2 pop new TOS
- ADD X,Y ;1
- PUSHM #2,X ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
- mNEXT ;4
-
-;Z (+loop) n -- R: sys1 sys2 -- | sys1 sys2
-; run-time code for +LOOP
-; Add n to the loop index. If loop terminates, clean up the
-; return stack and skip the branch. Else take the inline branch.
-xploop ADD TOS,0(RSP) ;4 increment INDEX by TOS value
- MOV @PSP+,TOS ;2 get new TOS, doesn't change flags
-xloopnext BIT #100h,SR ;2 is overflow bit set?
- JZ BRAN ;2 no overflow = loop
- ADD #2,IP ;1 overflow = loop done, skip branch ofs
- ADD #4,RSP ;1 empty RSP
- mNEXT ;4 16~ taken or not taken xloop/loop
-
-;Z (loop) R: sys1 sys2 -- | sys1 sys2
-; run-time code for LOOP
-; Add 1 to the loop index. If loop terminates, clean up the
-; return stack and skip the branch. Else take the inline branch.
-; Note that LOOP terminates when index=8000h.
-xloop ADD #1,0(RSP) ;4 increment INDEX
- JMP xloopnext ;2
-
-;https://forth-standard.org/standard/core/I
-;C I -- n R: sys1 sys2 -- sys1 sys2
-;C get the innermost loop index
- FORTHWORD "I"
-II SUB #2,PSP ;1 make room in TOS
- MOV TOS,0(PSP) ;3
- MOV @RSP,TOS ;2 index = loopctr - fudge
- SUB 2(RSP),TOS ;3
- mNEXT ;4 13~
-
-; ------------------------------------------------------------------------------
-; TERMINAL I/O, input part
-; ------------------------------------------------------------------------------
-
-;https://forth-standard.org/standard/core/KEY
-;C KEY -- c wait character from input device ; primary DEFERred word
- FORTHWORD "KEY"
-KEY MOV @PC+,PC ;3 Code Field Address (CFA) of KEY
-PFAKEY .word BODYKEY ; Parameter Field Address (PFA) of KEY, with default value
-BODYKEY MOV &TERM_RXBUF,Y ; empty buffer
- SUB #2,PSP ; 1 push old TOS..
- MOV TOS,0(PSP) ; 3 ..onto stack
- CALL #RXON
-KEYLOOP BIT #UCRXIFG,&TERM_IFG ; loop if bit0 = 0 in interupt flag register
- JZ KEYLOOP ;
- MOV &TERM_RXBUF,TOS ;
- CALL #RXOFF ;
- mNEXT
-
-;-------------------------------------------------------------------------------
-; INTERPRETER INPUT, the kernel of kernel !
-;-------------------------------------------------------------------------------
-
-; ----------------------------------;
-RXON ;
-; ----------------------------------;
- .IFDEF TERMINAL3WIRES ;
-RXON_LOOP BIT #UCTXIFG,&TERM_IFG ;3 wait the sending of last char, useless at high baudrates
- JZ RXON_LOOP ;2
- MOV #17,&TERM_TXBUF ;4 move char XON into TX_buf
- .ENDIF ;
- .IFDEF TERMINAL4WIRES ;
- BIC.B #RTS,&HANDSHAKOUT ;4 set RTS low
- .ENDIF ;
-; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
-; starts first and 3th stopwatches ;
-; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
- RET ;4 to BACKGND (End of file download or quiet input) or AKEYREAD1 (get next line of file downloading)
-; ----------------------------------; ...or user defined
-
-; ----------------------------------;
-RXOFF ;
-; ----------------------------------;
- .IFDEF TERMINAL3WIRES ;
- MOV #19,&TERM_TXBUF ;4 move XOFF char into TX_buf
- .ENDIF ;
- .IFDEF TERMINAL4WIRES ;
- BIS.B #RTS,&HANDSHAKOUT ;4 set RTS high
- .ENDIF ;
- RET ;4 to ENDACCEPT, ...or user defined
-; ----------------------------------;
-
-; ----------------------------------;
- ASMWORD "SLEEP" ; may be redirected
-SLEEP MOV @PC+,PC ;3 Code Field Address (CFA) of SLEEP
-PFASLEEP .word BODYSLEEP ; Parameter Field Address (PFA) of SLEEP, with default value
-BODYSLEEP CALL #RXON ;4
- BIS &LPM_MODE,SR ;3 enter in LPMx sleep mode with GIE=1
-; ----------------------------------; default FAST FORTH mode (for its input terminal use) : LPM0.
-
-;###############################################################################################################
-;###############################################################################################################
-
-; ### # # ####### ####### ###### ###### # # ###### ####### ##### # # ####### ###### #######
-; # ## # # # # # # # # # # # # # # # # # # # #
-; # # # # # # # # # # # # # # # # # # # # # #
-; # # # # # ##### ###### ###### # # ###### # ##### ####### ##### ###### #####
-; # # # # # # # # # # # # # # # # # # # # #
-; # # ## # # # # # # # # # # # # # # # # # #
-; ### # # # ####### # # # # ##### # # ##### # # ####### # # #######
-
-;###############################################################################################################
-;###############################################################################################################
-
-
-; here, Fast FORTH sleeps, waiting any interrupt.
-; IP,S,T,W,X,Y registers (R13 to R8) are free for any interrupt routine...
-; ...and so PSP and RSP stacks with their rules of use.
-; remember: in any interrupt routine you must include : BIC #0x78,0(RSP) before RETI
-; to force return to SLEEP.
-; or (bad idea ? previous SR flags are lost) simply : ADD #2 RSP, then RET instead of RETI
-
-; ==================================;
- JMP SLEEP ;2 here is the return for any interrupts, else TERMINAL_INT :-)
-; ==================================;
-
- .IFDEF SD_CARD_LOADER
- .include "forthMSP430FR_SD_ACCEPT.asm"
- .ENDIF
-
- .IFDEF DEFER_ACCEPT
-
-;https://forth-standard.org/standard/core/ACCEPT
-;C ACCEPT addr addr len -- addr len' get line at addr to interpret len' chars
- FORTHWORD "ACCEPT"
-ACCEPT MOV @PC+,PC ;3 Code Field Address (CFA) of ACCEPT
-PFAACCEPT .word BODYACCEPT ; Parameter Field Address (PFA) of ACCEPT
-BODYACCEPT ; BODY of ACCEPT = default execution of ACCEPT
-
- .ELSE
+ .ELSE
;https://forth-standard.org/standard/core/ACCEPT
;C ACCEPT addr addr len -- addr len' get line at addr to interpret len' chars
.IFDEF HALFDUPLEX ; to use FAST FORTH with half duplex input terminal (bluetooth or wifi connexion)
- .include "forthMSP430FR_HALFDUPLEX.asm"
+ .include "forthMSP430FR_HALFDUPLEX.asm"
.ELSE ; to use FAST FORTH with full duplex terminal (USBtoUART bridge)
-; con speed of TERMINAL link, there are three bottlenecks :
-; 1- time to send XOFF/RTS_high on CR (CR+LF=EOL), first emergency.
-; 2- the char loop time,
-; 3- the time between sending XON/RTS_low and clearing UCRXIFG on first received char,
-; everything must be done to reduce these times, taking into account the necessity of switching to SLEEP (LPMx mode).
; ----------------------------------;
; ACCEPT part I prepare TERMINAL_INT;
; ----------------------------------;
CMP #0Ah,Y ;2 received char = LF ? (end of downloading ?)
JNZ RXON ;2 no : send XON then RET to AKEYREAD1 to process this first char of new line.
; ----------------------------------;
-ACCEPTNEXT ADD #2,RSP ;1 replace XON_ret = AKEYREAD1 by XON_ret = SLEEP
- PUSHM #4,IP ;6 PUSH IP,S,T,W r-- ACCEPT_ret XOFF_ret YEMIT_ret 'BL' 'CR' bound XON_ret
- JMP SLEEP ;2 which calls RXON before falling down to LPMx mode
+ACCEPTNEXT ADD #2,RSP ;1 remove XON_ret
+ PUSHM #4,IP ;6 PUSH IP,S,T,W r-- ACCEPT_ret XOFF_ret YEMIT_ret 'BL' 'CR' bound
+ MOV #SLEEP,PC ;2 which calls RXON before falling down to LPMx mode
; ----------------------------------;
; stops the 3th stopwatch ; 3th bottleneck result : 17~ + LPMx wake_up time ( + 5~ XON loop if F/Bds<230400 )
; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
AKEYREAD1 CMP.B S,Y ;1 printable char ?
- JHS ASTORETEST ;2 yes
+ JC ASTORETEST ;2 yes
CMP.B T,Y ;1 CR ?
JZ RXOFF ;2 then RET to ENDACCEPT
; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;+ 4 to send RXOFF
JZ YEMIT1 ; 2 yes: send echo then loopback
MOV.B Y,0(TOS) ; 3 no: store char @ Ptr, send echo then loopback
ADD #1,TOS ; 1 increment Ptr
-YEMIT1 ;
- BIT #UCTXIFG,&TERM_IFG ; 3 wait the sending end of previous char, useless at high baudrates
+
+YEMIT1 BIT #UCTXIFG,&TERM_IFG ; 3 wait the sending end of previous char, useless at high baudrates
JZ YEMIT1 ; 2 but there's no point in wanting to save time here:
-YEMIT2 ;
+
.IFDEF TERMINAL5WIRES ;
- BIT.B #CTS,&HANDSHAKIN ; 3
+YEMIT2 BIT.B #CTS,&HANDSHAKIN ; 3
JNZ YEMIT2 ; 2
.ENDIF ;
-YEMIT ; hi7/4~ lo:12/9~ send/send_not echo to terminal
- .word 4882h ; 4882h = MOV Y,&<next_adr>
+YEMIT .word 4882h ; 4882h = MOV Y,&<next_adr>
.word TERM_TXBUF ; 3
- mNEXT ; 4
+ MOV @IP+,PC ; 4
; ----------------------------------;
-AYEMIT_RET FORTHtoASM ; 0 YEMII NEXT address
- SUB #2,IP ; 1 reset YEMIT NEXT address to AYEMIT_RET
+AYEMIT_RET .word $+2 ; 0 YEMII NEXT address
+ SUB #2,IP ; 1 restore AYEMIT_RET
WAITaKEY BIT #UCRXIFG,&TERM_IFG ; 3 new char in TERMRXBUF ?
JNZ AKEYREAD ; 2 yes
JZ WAITaKEY ; 2 no
; ----------------------------------;
MOV #LPM0+GIE,&LPM_MODE ; reset LPM_MODE to default mode LPM0 for next line of input stream
; ----------------------------------;
- mNEXT ; ...until next falling down to LPMx mode of (ACCEPT) part1,
+ MOV @IP+,PC ; ...until next falling down to LPMx mode of (ACCEPT) part1,
; **********************************; i.e. when the FORTH interpreter has no more to do.
; ------------------------------------------------------------------------------
; TERMINAL I/O, output part
; ------------------------------------------------------------------------------
-;https://forth-standard.org/standard/core/EMIT
-;C EMIT c -- output character to the selected output device ; primary DEFERred word
+; https://forth-standard.org/standard/core/EMIT
+; EMIT c -- output character to the selected output device ; primary DEFERred word
FORTHWORD "EMIT"
-EMIT MOV @PC+,PC ;3 Code Field Address (CFA) of EMIT
+EMIT MOV @PC+,PC ;4 Code Field Address (CFA) of EMIT
PFAEMIT .word BODYEMIT ; Parameter Field Address (PFA) of EMIT, with its default value
-BODYEMIT MOV TOS,Y ; output character to the default output: TERMINAL
- MOV @PSP+,TOS ; 2
- JMP YEMIT1 ;9 12~
+BODYEMIT MOV TOS,Y ;1 output character to the default output: TERMINAL
+ MOV @PSP+,TOS ;2
+ JMP YEMIT1 ;2 + 12~
.ENDIF ; HALFDUPLEX
- .IFDEF DEFER_ACCEPT
+;Z ECHO -- connect terminal output (default)
+ FORTHWORD "ECHO"
+ECHO MOV #4882h,&YEMIT ; 4882h = MOV Y,&<next_adr>
+ MOV #0,&LINE ;
+ MOV @IP+,PC
+
+;Z NOECHO -- disconnect terminal output
+ FORTHWORD "NOECHO"
+NOECHO MOV #NEXT,&YEMIT ; NEXT = 4030h = MOV @IP+,PC
+ MOV #1,&LINE ;
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/TYPE
+;C TYPE adr len -- type line to terminal
+ FORTHWORD "TYPE"
+TYPE CMP #0,TOS
+ JZ TWODROP ; abort fonction
+ PUSHM #2,TOS ;4 R-- len IP
+ MOV #TYPE_NEXT,IP ;
+TYPELOOP MOV @PSP,Y ;2 -- adr x 30~ char loop
+ MOV.B @Y+,TOS ;2 -- adr char
+ MOV Y,0(PSP) ;3 -- adr+1 char
+ SUB #2,PSP ;1 -- adr+1 x char emit consumes one cell
+ JMP EMIT ;15
+TYPE_NEXT .word $+2 ; -- adr+1 x
+ SUB #2,IP ;1
+ SUB #1,2(RSP) ;4 -- adr+1 x R-- len-1 IP
+ JNZ TYPELOOP ;2
+ POPM #2,TOS ;4 POPM IP,TOS
+TWODROP ADD #2,PSP ;
+DROP MOV @PSP+,TOS ; --
+ MOV @IP+,PC ;
+
+; https://forth-standard.org/standard/core/CR
+; CR -- send CR to the output device
+ FORTHWORD "CR"
+CR MOV @PC+,PC ;3 Code Field Address (CFA) of CR
+PFACR .word BODYCR ; Parameter Field Address (PFA) of CR, with its default value
+BODYCR mDOCOL ; send CR to the default output device
+ .word XSQUOTE
+ .byte 2,13,10
+ .word TYPE,EXIT
+
+; ------------------------------------------------------------------------------
+; TERMINAL I/O, input part
+; ------------------------------------------------------------------------------
+
+; https://forth-standard.org/standard/core/KEY
+; KEY -- c wait character from input device ; primary DEFERred word
+ FORTHWORD "KEY"
+KEY MOV @PC+,PC ;4 Code Field Address (CFA) of KEY
+PFAKEY .word BODYKEY ; Parameter Field Address (PFA) of KEY, with default value
+BODYKEY MOV &TERM_RXBUF,Y ;3 empty buffer
+ SUB #2,PSP ;1 push old TOS..
+ MOV TOS,0(PSP) ;3 ..onto stack
+ CALL #RXON
+KEYLOOP BIT #UCRXIFG,&TERM_IFG ; loop if bit0 = 0 in interupt flag register
+ JZ KEYLOOP ;
+ MOV &TERM_RXBUF,TOS ;
+ CALL #RXOFF ;
+ MOV @IP+,PC
+
+;-------------------------------------------------------------------------------
+; STACK OPERATIONS
+;-------------------------------------------------------------------------------
+
+; https://forth-standard.org/standard/core/DUP
+; DUP x -- x x duplicate top of stack
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "DUP"
+ .ENDIF
+DUP SUB #2,PSP ; 2 push old TOS..
+ MOV TOS,0(PSP) ; 3 ..onto stack
+ MOV @IP+,PC ; 4
+
+; https://forth-standard.org/standard/core/DROP
+; DROP x -- drop top of stack
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "DROP"
+ MOV @PSP+,TOS ; 2
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+; https://forth-standard.org/standard/core/NIP
+; NIP x1 x2 -- x2 Drop the first item below the top of stack
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "NIP"
+NIP ADD #2,PSP ; 1
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+; https://forth-standard.org/standard/core/TwoDUP
+; 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "2DUP"
+ .ENDIF
+TWODUP MOV TOS,-2(PSP) ; 3
+ MOV @PSP,-4(PSP); 4
+ SUB #4,PSP ; 1
+ MOV @IP+,PC ; 4
+
+; https://forth-standard.org/standard/core/qDUP
+; ?DUP x -- 0 | x x DUP if nonzero
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "?DUP"
+ .ENDIF
+QDUP CMP #0,TOS ; 2 test for TOS nonzero
+ JNZ DUP ; 2
+ MOV @IP+,PC ; 4
+
+; https://forth-standard.org/standard/core/SWAP
+; SWAP x1 x2 -- x2 x1 swap top two items
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "SWAP"
+ .ENDIF
+SWAP MOV @PSP,W ; 2
+ MOV TOS,0(PSP) ; 3
+ MOV W,TOS ; 1
+ MOV @IP+,PC ; 4
+
+;https://forth-standard.org/standard/core/OVER
+;C OVER x1 x2 -- x1 x2 x1
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "OVER"
+ MOV TOS,-2(PSP) ; 3 -- x1 (x2) x2
+ MOV @PSP,TOS ; 2 -- x1 (x2) x1
+ SUB #2,PSP ; 1 -- x1 x2 x1
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+;https://forth-standard.org/standard/core/ROT
+;C ROT x1 x2 x3 -- x2 x3 x1
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "ROT"
+ROT MOV @PSP,W ; 2 fetch x2
+ MOV TOS,0(PSP) ; 3 store x3
+ MOV 2(PSP),TOS ; 3 fetch x1
+ MOV W,2(PSP) ; 3 store x2
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+; https://forth-standard.org/standard/core/DEPTH
+; DEPTH -- +n number of items on stack, must leave 0 if stack empty
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "DEPTH"
+ .ENDIF
+DEPTH MOV TOS,-2(PSP)
+ MOV #PSTACK,TOS
+ SUB PSP,TOS ; PSP-S0--> TOS
+ RRA TOS ; TOS/2 --> TOS
+ SUB #2,PSP ; post decrement stack...
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/toR
+; >R x -- R: -- x push to return stack
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD ">R"
+TOR PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+; https://forth-standard.org/standard/core/Rfrom
+; R> -- x R: x -- pop from return stack
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "R>"
+ .ENDIF
+RFROM SUB #2,PSP ; 1
+ MOV TOS,0(PSP) ; 3
+ MOV @RSP+,TOS ; 2
+ MOV @IP+,PC ; 4
+
+
+;https://forth-standard.org/standard/core/RFetch
+;C R@ -- x R: x -- x fetch from rtn stk
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "R@"
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV @RSP,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+;-------------------------------------------------------------------------------
+; ARITHMETIC OPERATIONS
+;-------------------------------------------------------------------------------
+
+; https://forth-standard.org/standard/core/Minus
+; - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "-"
+ .ENDIF
+MINUS SUB @PSP+,TOS ;2 -- n2-n1
+NEGATE XOR #-1,TOS ;1
+ONEPLUS ADD #1,TOS ;1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/OneMinus
+; 1- n1/u1 -- n2/u2 subtract 1 from TOS
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "1-"
+ONEMINUS SUB #1,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+;https://forth-standard.org/standard/core/Plus
+;C + n1/u1 n2/u2 -- n3/u3 add n1+n2
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "+"
+PLUS ADD @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+; https://forth-standard.org/standard/core/OnePlus
+; 1+ n1/u1 -- n2/u2 add 1 to TOS
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "1+"
+ ADD #1,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+;-------------------------------------------------------------------------------
+; MEMORY OPERATIONS
+;-------------------------------------------------------------------------------
+
+; https://forth-standard.org/standard/core/Fetch
+; @ a-addr -- x fetch cell from memory
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "@"
+ MOV @TOS,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+; https://forth-standard.org/standard/core/Store
+; ! x a-addr -- store cell in memory
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "!"
+ .ENDIF
+STORE MOV @PSP+,0(TOS);4
+ MOV @PSP+,TOS ;2
+ MOV @IP+,PC ;4
+
+;-------------------------------------------------------------------------------
+; COMPARAISON OPERATIONS
+;-------------------------------------------------------------------------------
+
+; https://forth-standard.org/standard/core/ZeroEqual
+; 0= n/u -- flag return true if TOS=0
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "0="
+ .ENDIF
+ZEROEQUAL SUB #1,TOS ;1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS ;1 TOS=-1 if borrow was set
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/Zeroless
+; 0< n -- flag true if TOS negative
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "0<"
+ .ENDIF
+ZEROLESS ADD TOS,TOS ;1 set carry if TOS negative
+ SUBC TOS,TOS ;1 TOS=-1 if carry was clear
+INVERT XOR #-1,TOS ;1 TOS=-1 if carry was set
+ MOV @IP+,PC ;
+
+; https://forth-standard.org/standard/core/Uless
+; U< u1 u2 -- flag test u1<u2, unsigned
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "U<"
+ .ENDIF
+ULESS SUB @PSP+,TOS ;2
+ JZ ULESSEND ;2 flag
+ MOV #-1,TOS ;1 flag Z = 0
+ JC ULESSEND ;2 unsigned
+ AND #0,TOS ;1
+ULESSEND MOV @IP+,PC ;4
+
+; https://forth-standard.org/standard/core/Equal
+; = x1 x2 -- flag test x1=x2
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "="
+EQUAL SUB @PSP+,TOS ;2
+ JZ INVERT ;2 flag Z will be = 0
+ AND #0,TOS ;1 flag Z = 1
+ MOV @IP+,PC ;4
+ .ENDIF
+
+;https://forth-standard.org/standard/core/less
+;C < n1 n2 -- flag test n1<n2, signed
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD "<"
+LESS SUB @PSP+,TOS ;1 TOS=n2-n1
+ JZ LESSEND ;2
+ JL TOSFALSE ;2 signed
+TOSTRUE MOV #-1,TOS ;1 flag Z = 0
+LESSEND MOV @IP+,PC ;4
+ .ENDIF
+
+;https://forth-standard.org/standard/core/more
+;C > n1 n2 -- flag test n1>n2, signed
+ .IFDEF CORE_COMPLEMENT
+ FORTHWORD ">"
+GREATER SUB @PSP+,TOS ;2 TOS=n2-n1
+ JL TOSTRUE ;2 --> +5
+TOSFALSE AND #0,TOS ;1 flag Z = 1
+ MOV @IP+,PC ;4
+ .ENDIF
+
+;-------------------------------------------------------------------------------
+; CORE ANS94 complement OPTION
+;-------------------------------------------------------------------------------
+ .IFDEF CORE_COMPLEMENT
+ .include "ADDON/CORE_COMP.asm"
+ .ENDIF ; CORE_COMPLEMENT
+
+;-------------------------------------------------------------------------------
+; NUMERIC OUTPUT
+;-------------------------------------------------------------------------------
-; CIB -- addr of Current Input Buffer
-; FORTHWORD "CIB" ; constant, may be redirected as SDIB_ORG by OPEN.
-FCIB mDOCON ; Code Field Address (CFA) of FCIB
-PFACIB .WORD TIB_ORG ; Parameter Field Address (PFA) of FCIB
+; Numeric conversion is done last digit first, so
+; the output buffer is built backwards in memory.
-; REFILL accept one line from input and leave org len of input buffer
-; : REFILL CIB DUP TIB_LEN ACCEPT ; -- CIB len shared by QUIT and [ELSE]
-REFILL SUB #6,PSP ;2
- MOV TOS,4(PSP) ;3
- MOV #TIB_LEN,TOS ;2
- MOV &PFACIB,0(PSP) ;5
- MOV @PSP,2(PSP) ;4
- JMP ACCEPT ;2
+; https://forth-standard.org/standard/core/num-start
+; <# -- begin numeric conversion (initialize Hold Pointer)
+ FORTHWORD "<#"
+LESSNUM MOV #HOLD_BASE,&HP
+ MOV @IP+,PC
- .ELSE
+; https://forth-standard.org/standard/core/num
+; # ud1lo ud1hi -- ud2lo ud2hi convert 1 digit of output
+ FORTHWORD "#"
+NUM MOV &BASE,T ;3 T = Divisor
+NUM1 MOV @PSP,S ;2 -- DVDlo DVDhi S = DVDlo
+ SUB #2,PSP ;1 -- DVDlo x DVDhi TOS = DVDhi
+ CALL #MUSMOD1 ;4 -- REMlo QUOTlo QUOThi
+ MOV @PSP+,0(PSP) ;4 -- QUOTlo QUOThi
+TODIGIT CMP.B #10,W ;2 W = REMlo
+ JNC TODIGIT1 ;2 jump if U<
+ ADD.B #7,W ;2
+TODIGIT1 ADD.B #30h,W ;2
+HOLDW SUB #1,&HP ;4 store W=char --> -[HP]
+ MOV &HP,Y ;3
+ MOV.B W,0(Y) ;3
+ MOV @IP+,PC ;4 26 words
-; REFILL accept one line from input and leave org len of input buffer
-; : REFILL TIB DUP TIB_LEN ACCEPT ; -- TIB len shared by QUIT and [ELSE]
-REFILL SUB #6,PSP ;2 -- x x x x
- MOV TOS,4(PSP) ;3 -- Saved_TOS x x TOS
- MOV #TIB_LEN,TOS ;2 -- Saved_TOS x x TIB_LEN
- MOV #TIB_ORG,0(PSP) ;4 -- Saved_TOS x TIB TIB_LEN
- MOV @PSP,2(PSP) ;4 -- Saved_TOS TIB TIB TIB_LEN
- JMP ACCEPT ;2 -- TIB LEN
+; https://forth-standard.org/standard/core/numS
+; #S udlo udhi -- 0 0 convert remaining digits
+ FORTHWORD "#S"
+NUMS mDOCOL
+ .word NUM ; X=QUOTlo
+ .word $+2 ; next adr
+ SUB #2,IP ;1 restore NUM return
+ CMP #0,X ;1 test ud2lo first (generally <>0)
+ JNZ NUM1 ;2
+ CMP #0,TOS ;1 then test ud2hi (generally =0)
+ JNZ NUM1 ;2
+EXIT MOV @RSP+,IP
+ MOV @IP+,PC ;6 10 words, about 241/417 cycles/char
- .ENDIF
+; https://forth-standard.org/standard/core/num-end
+; #> udlo:udhi -- c-addr u end conversion, get string
+ FORTHWORD "#>"
+NUMGREATER MOV &HP,0(PSP)
+ MOV #HOLD_BASE,TOS
+ SUB @PSP,TOS
+ MOV @IP+,PC
-;Z ECHO -- connect terminal output (default)
- FORTHWORD "ECHO"
-ECHO MOV #4882h,&YEMIT ; 4882h = MOV Y,&<next_adr>
- MOV #0,&LINE ;
- mNEXT
+; https://forth-standard.org/standard/core/HOLD
+; HOLD char -- add char to output string
+ FORTHWORD "HOLD"
+HOLD MOV.B TOS,W ;1
+ MOV @PSP+,TOS ;2
+ JMP HOLDW ;15
-;Z NOECHO -- disconnect terminal output
- FORTHWORD "NOECHO"
-NOECHO MOV #NEXT,&YEMIT ; NEXT = 4030h = MOV @IP+,PC
- MOV #1,&LINE ;
- mNEXT
+; https://forth-standard.org/standard/core/SIGN
+; SIGN n -- add minus sign if n<0
+ FORTHWORD "SIGN"
+SIGN CMP #0,TOS
+ MOV @PSP+,TOS
+ MOV.B #'-',W
+ JN HOLDW ; jump if 0<
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/TYPE
-;C TYPE adr len -- type line to terminal
- FORTHWORD "TYPE"
-TYPE CMP #0,TOS
- JZ TWODROP ; abort fonction
- PUSHM #2,TOS ;4 R-- len IP
- MOV #TYPE_NEXT,IP ;
-TYPELOOP MOV @PSP,Y ;2 -- adr x 30~ char loop
- MOV.B @Y+,TOS ;2 -- adr char
- MOV Y,0(PSP) ;3 -- adr+1 char
- SUB #2,PSP ;1 -- adr+1 x char emit consumes one cell
- JMP EMIT ;15
-TYPE_NEXT FORTHtoASM ; -- adr+1 x
- SUB #2,IP ;1
- SUB #1,2(RSP) ;4 -- adr+1 x R-- len-1 IP
- JNZ TYPELOOP ;2
- POPM #2,TOS ;4 POPM IP,TOS
-TWODROP ADD #2,PSP ;
-ONEDROP MOV @PSP+,TOS ; --
- mNEXT ;
+; https://forth-standard.org/standard/core/Ud
+; U. u -- display u (unsigned)
+ FORTHWORD "U."
+UDOT MOV #0,Y ; 1
+DOTTODDOT SUB #2,PSP ; 1 convert n|u to d|ud with Y = -1|0
+ MOV TOS,0(PSP) ; 3
+ MOV Y,TOS ; 1
+DDOT PUSH IP ; paired with EXIT
+ PUSH TOS ; paired with RFROM
+DABS AND #-1,TOS ; clear V, set N
+ JGE DDOTNEXT ; if positive (N=0)
+ XOR #-1,0(PSP) ;4
+ XOR #-1,TOS ;1
+ ADD #1,0(PSP) ;4
+ ADDC #0,TOS ;1
+DDOTNEXT ASMTOFORTH ;10
+ .word LESSNUM,NUMS
+ .word RFROM,SIGN,NUMGREATER,TYPE
+ .word FBLANK,EMIT,EXIT
-;https://forth-standard.org/standard/core/CR
-;C CR -- send CR to the output device
- FORTHWORD "CR"
-CR MOV @PC+,PC ;3 Code Field Address (CFA) of CR
-PFACR .word BODYCR ; Parameter Field Address (PFA) of CR, with its default value
-BODYCR mDOCOL ; send CR to the default output device
- .word XSQUOTE
- .byte 2,13,10
- .word TYPE,EXIT
+; https://forth-standard.org/standard/core/d
+; . n -- display n (signed)
+ FORTHWORD "."
+DOT CMP #0,TOS
+ JGE UDOT
+ MOV #-1,Y
+ JMP DOTTODDOT
; ------------------------------------------------------------------------------
; STRINGS PROCESSING
; ------------------------------------------------------------------------------
-;Z lit -- x fetch inline literal to stack
-; This is the execution part of LITERAL.
-; FORTHWORD "LIT"
-lit SUB #2,PSP ; 2 push old TOS..
- MOV TOS,0(PSP) ; 3 ..onto stack
- MOV @IP+,TOS ; 2 fetch new TOS value
- MOV @IP+,PC ; 4 NEXT
-
-;Z (S") -- addr u run-time code for S"
-; get address and length of string.
-XSQUOTE SUB #4,PSP ; 1 -- x x TOS ; push old TOS on stack
- MOV TOS,2(PSP) ; 3 -- TOS x x ; and reserve one cell on stack
- MOV.B @IP+,TOS ; 2 -- x u ; u = lenght of string
- MOV IP,0(PSP) ; 3 -- addr u
- ADD TOS,IP ; 1 -- addr u IP=addr+u=addr(end_of_string)
- BIT #1,IP ; 1 -- addr u IP=addr+u Carry set/clear if odd/even
- ADDC #0,IP ; 1 -- addr u IP=addr+u aligned
- mNEXT ; 4 16~
-
-;https://forth-standard.org/standard/core/Sq
-;C S" -- compile in-line string
- FORTHWORDIMM "S\34" ; immediate
-SQUOTE MOV #0,&CAPS ; CAPS OFF
+; https://forth-standard.org/standard/core/Sq
+; S" -- compile in-line string
+ FORTHWORDIMM "S\34" ; immediate
+SQUOTE MOV #0,&CAPS ; CAPS OFF
mDOCOL
.word lit,XSQUOTE,COMMA
SQUOTE1 .word lit,'"',WORDD ; -- c-addr (= HERE)
- FORTHtoASM
- MOV #32,&CAPS ; CAPS ON
- MOV.B @TOS,TOS ; -- u
- ADD #1,TOS ; -- u+1
- BIT #1,TOS ;1 carry set if odd
+ .word $+2
+ MOV #32,&CAPS ; CAPS ON
+ MOV.B @TOS,TOS ; -- u
+ ADD #1,TOS ; -- u+1
+ BIT #1,TOS ;1 carry set if odd
ADDC TOS,&DDP
DROPEXIT MOV @RSP+,IP
MOV @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/Dotq
-;C ." -- compile string to print
- FORTHWORDIMM ".\34" ; immediate
+; https://forth-standard.org/standard/core/Dotq
+; ." -- compile string to print
+ FORTHWORDIMM ".\34" ; immediate
DOTQUOTE mDOCOL
.word SQUOTE
.word lit,TYPE,COMMA,EXIT
; INTERPRETER
;-------------------------------------------------------------------------------
- .IFNDEF MSP430ASSEMBLER
-
-;https://forth-standard.org/standard/core/WORD
-;C WORD char -- addr Z=1 if len=0
+; https://forth-standard.org/standard/core/WORD
+; WORD char -- addr Z=1 if len=0
; parse a word delimited by char separator; by default (CAPS=$20), this "word" is capitalized
; when used by S" (CAPS=0), this "word" will not be capitalized.
FORTHWORD "WORD"
-WORDD
-SKIPCHAR MOV #SOURCE_LEN,S ;2 -- separator
+WORDD MOV #SOURCE_LEN,S ;2 -- separator
MOV @S+,X ;2 X = str_len
MOV @S+,W ;2 W = str_org
ADD W,X ;1 W = str_org X = str_org + str_len = str_end
ADD @S+,W ;2 W = str_org + >IN = str_ptr X = str_end
- MOV @S,Y ;2 W = str_ptr X = str_end Y = HERE, as dst_ptr
+ MOV @S,Y ;2 Y = HERE, as dst_ptr
SKIPCHARLOO CMP W,X ;1 str_ptr = str_end ?
- JZ SCANWORDEND ;2 if yes : End Of Line !
+ JZ SKIPCHAREND ;2 if yes : End Of Line !
CMP.B @W+,TOS ;2 does char = separator ?
JZ SKIPCHARLOO ;2 if yes; 7~ loop
- SUB #1,W ;1
-SKIPCHARNXT
+ SUB #1,W ;1 move the (post incremented) pointer back one
SCANWORD MOV #96,T ;2 T = 96 = ascii(a)-1 (test value set in a register before SCANWORD loop)
SCANWORDLOO MOV.B S,0(Y) ;3 first time make room in dst for word length; next, put char @ dst.
CMP W,X ;1 str_ptr = str_end ?
CMP.B S,T ;1 char U< 'a' ? ('a'-1 U>= char) this condition is tested at each loop
JC SCANWORDLOO ;2 15~ upper case char loop
CMP.B #123,S ;2 char U>= 'z'+1 ?
- JC SCANWORDLOO ;2 if yes
- SUB.B &CAPS,S ;3 convert lowercase char to uppercase if CAPS ON (CAPS=32)
- JMP SCANWORDLOO ;2 24~ lower case char loop
-SCANWORDEND SUB &SOURCE_ORG,W ;3 -- separator W=str_ptr - str_org = new >IN (first char separator next)
- MOV W,&TOIN ;3 update >IN
- MOV &DDP,TOS ;3 -- c-addr
- SUB TOS,Y ;1 Y=Word_Length Z=1
- MOV.B Y,0(TOS) ;3
- mNEXT ;4 -- c-addr 40 words Z=1 <==> lenght=0 <==> EOL
-
- .ELSE
-
-;;Z SKIP char -- addr ; skip all occurring character 'char' in input stream
-SKIP MOV.B #0,Y ; used by assembler to parse input stream
- JMP SKIPCHAR
-
-;https://forth-standard.org/standard/core/WORD
-;C WORD char -- addr Z=1 if len=0
-; parse a word delimited by char separator; by default (CAPS=$20), this "word" is capitalized
-; when used by S" (CAPS=0), this "word" will not be capitalized.
- FORTHWORD "WORD"
-WORDD MOV.B TOS,Y ;1
-SKIPCHAR MOV &SOURCE_LEN,X ;3 -- separator
- MOV &SOURCE_ORG,W ;3 W = str_org
- ADD W,X ;1 W = str_org X = str_org + str_len = str_end
- ADD &TOIN,W ;3 W = str_org + >IN = str_ptr X = str_end
-SKIPCHARLOO CMP W,X ;1 str_ptr = str_end ?
- JZ SKIPCHARNXT ;2 if yes : End Of Line !
- CMP.B @W+,TOS ;2 does char = separator ?
- JZ SKIPCHARLOO ;2 if yes; 7~ loop
- SUB #1,W ;1
-SKIPCHARNXT AND.B Y,TOS ;1
- JNZ SCANWORD ;2
-SKIPEND: MOV W,TOS ;1 -- addr
- SUB &SOURCE_ORG,W ;3 -- addr W=Ptr-Org=Toin
- MOV W,&TOIN ;3
- mNEXT ;4
-
-SCANWORD MOV &DDP,Y ;3 Y = HERE, as dst_ptr
- MOV #96,T ;2 T = 96 = ascii(a)-1 (test value set in a register before SCANWORD loop)
-SCANWORDLOO MOV.B S,0(Y) ;3 first time make room in dst for word length; next, put char @ dst.
- CMP W,X ;1 str_ptr = str_end ?
- JZ SCANWORDEND ;2 if yes
- MOV.B @W+,S ;2
- CMP.B S,TOS ;1 does char = separator ?
- JZ SCANWORDEND ;2 if yes
- ADD #1,Y ;1 increment dst just before test loop
- CMP.B S,T ;1 char U< 'a' ? ('a'-1 U>= char) this condition is tested at each loop
- JC SCANWORDLOO ;2 15~ upper case char loop
- CMP.B #123,S ;2 char U>= 'z'+1 ?
- JC SCANWORDLOO ;2 if yes
- SUB.B &CAPS,S ;3 convert lowercase char to uppercase if CAPS ON (CAPS=32)
- JMP SCANWORDLOO ;2 24~ lower case char loop
-SCANWORDEND SUB &SOURCE_ORG,W ;3 -- separator W=str_ptr - str_org = new >IN (first char separator next)
+ JC SCANWORDLOO ;2 loopback if yes
+ SUB.B &CAPS,S ;4 convert lowercase char to uppercase if CAPS ON (CAPS=32)
+ JMP SCANWORDLOO ;2 26~ lower case char loop
+SCANWORDEND
+SKIPCHAREND SUB &SOURCE_ORG,W ;3 -- separator W=str_ptr - str_org = new >IN (first char separator next)
MOV W,&TOIN ;3 update >IN
MOV &DDP,TOS ;3 -- c-addr
- SUB TOS,Y ;1 Y=Word_Length Z=1
+ SUB TOS,Y ;1 Y=Word_Length
MOV.B Y,0(TOS) ;3
- mNEXT ;4 -- c-addr 40 words Z=1 <==> lenght=0 <==> EOL
- .ENDIF
+ MOV @IP+,PC ;4 -- c-addr 40 words Z=1 <==> lenght=0 <==> EOL
-;https://forth-standard.org/standard/core/FIND
-;C FIND c-addr -- c-addr 0 if not found ; flag Z=1
-;C CFA -1 if found ; flag Z=0
-;C CFA 1 if immediate ; flag Z=0
+; https://forth-standard.org/standard/core/FIND
+; FIND c-addr -- c-addr 0 if not found ; flag Z=1
+; CFA -1 if found ; flag Z=0
+; CFA 1 if immediate ; flag Z=0
; compare WORD at c-addr (HERE) with each of words in each of listed vocabularies in CONTEXT
; FIND to WORDLOOP : 14/20 cycles,
; mismatch word loop: 13 cycles on len, +7 cycles on first char,
; VOCLOOP : 12/18 cycles,
; WORDFOUND to end : 21 cycles.
; note: with 16 threads vocabularies, FIND takes about 75% of CORETEST.4th processing time
- FORTHWORD "FIND" ; -- c-addr
+ FORTHWORD "FIND" ; -- c-addr at transient RAM area (HERE)
FIND SUB #2,PSP ;1 -- ???? c-addr reserve one cell here, not at FINDEND because interacts with flag Z
MOV TOS,S ;1 S=c-addr
MOV.B @S,rDOCON ;2 R5= string count
.SWITCH THREADS
.CASE 1
.ELSECASE ; search thread add 6cycles 5words
-MAKETHREAD MOV.B 1(S),Y ;3 -- ???? VOC_PFA0 S=c-addr Y=CHAR0
+MAKETHREAD MOV.B 1(S),Y ;3 -- ???? VOC_PFA0 S=c-addr Y=first char of c-addr string
AND.B #(THREADS-1)*2,Y ;2 -- ???? VOC_PFA0 Y=thread offset
- ADD Y,TOS ;1 -- ???? VOC_PFAx
+ ADD Y,TOS ;1 -- ???? VOC_PFAx TOS = words set entry
.ENDCASE
ADD #2,TOS ;1 -- ???? VOC_PFA+2
WORDLOOP MOV -2(TOS),TOS ;3 -- ???? [VOC_PFA] [VOC_PFA] first, then [LFA]
FINDEND MOV S,0(PSP) ;3 not found: -- c-addr 0 flag Z=1
MOV #xdocon,rDOCON ;2 found: -- xt -1|+1 (not immediate|immediate) flag Z=0
MOV #xdodoes,rDODOES ;2
- mNEXT ;4 42/47 words
+ MOV @IP+,PC ;4 42/47 words
.IFDEF MPY_32
-;https://forth-standard.org/standard/core/toNUMBER
+; https://forth-standard.org/standard/core/toNUMBER
; ud2 is the unsigned result of converting the characters within the string specified by c-addr1 u1 into digits,
; using the number in BASE, and adding each into ud1 after multiplying ud1 by the number in BASE.
; Conversion continues left-to-right until a character that is not convertible, including '.', ',' or '_',
; or the first character past the end of the string if the string was entirely converted.
; u2 is the number of unconverted characters in the string.
; An ambiguous condition exists if ud2 overflows during the conversion.
-;C >NUMBER ud1lo ud1hi addr1 cnt1 -- ud2lo ud2hi addr2 cnt2
+; >NUMBER ud1lo ud1hi addr1 cnt1 -- ud2lo ud2hi addr2 cnt2
FORTHWORD ">NUMBER" ; 23 cycles + 32/34 cycles DEC/HEX char loop
TONUMBER MOV @PSP+,S ;2 -- ud1lo ud1hi cnt1 S = addr1
MOV @PSP+,Y ;2 -- ud1lo cnt1 Y = ud1hi
MOV &BASE,T ;3
TONUMLOOP MOV.B @S,W ;2 -- x x x cnt S=adr, T=base, W=char, X=udlo, Y=udhi
DDIGITQ SUB.B #30h,W ;2 skip all chars < '0'
- CMP.B #10,W ;2 char was U< 10 (U< ':') ?
- JLO DDIGITQNEXT ;2 no
+ CMP.B #10,W ;2 char was U< 58 (U< ':') ?
+ JNC DDIGITQNEXT ;2 no
SUB.B #7,W ;2
CMP.B #10,W ;2
- JLO TONUMEND ;2 -- x x x cnt exit if '9' < char < 'A'
+ JNC TONUMEND ;2 -- x x x cnt exit if '9' < char < 'A'
DDIGITQNEXT CMP T,W ;1 digit-base
BIC #Z,SR ;1 reset Z before jmp TONUMEND because...
- JHS TONUMEND ;2 ...QNUMBER conversion will be true if Z = 1 :-(
+ JC TONUMEND ;2 ...QNUMBER conversion will be true if Z = 1 :-(
UDSTAR MOV X,&MPY32L ;3 Load 1st operand (ud1lo)
MOV Y,&MPY32H ;3 Load 1st operand (ud1hi)
MOV T,&OP2 ;3 Load 2nd operand with BASE
TONUMEND MOV S,0(PSP) ;3 -- x x addr2 cnt2
MOV Y,2(PSP) ;3 -- x ud2hi addr2 cnt2
MOV X,4(PSP) ;3 -- ud2lo ud2hi addr2 cnt2
- mNEXT ;4 41 words
+ MOV @IP+,PC ;4 42 words
; ?NUMBER makes the interface between INTERPRET and >NUMBER; it's a subset of INTERPRET.
; convert a string to a signed number; FORTH 2012 prefixes $, %, # are recognized
MOV.B @S+,TOS ;2 -- addr x x x cnt TOS=count
QNUMLDCHAR MOV.B @S,W ;2 W=char
CMP.B #'-',W ;2
- JLO QBINARY ;2 jump if char < '-'
+ JNC QBINARY ;2 jump if char < '-'
JNZ DDIGITQ ;2 -- addr x x x cnt jump if char > '-'
MOV #-1,2(RSP) ;3 R-- IP sign base set sign flag
- JMP TONUMPLUS ;2
+; JMP TONUMPLUS ;2 issue: when I type '-' then CR, a number 0 is created!
+ JMP PREFIXED ;2
QBINARY MOV #2,T ;1 preset base 2
SUB.B #'%',W ;2 binary number ?
JZ PREFIXED ;2
SUB #1,TOS ;1 -- addr x x x cnt-1 S=adr+1 TOS=count-1
JMP QNUMLDCHAR ;2
; ----------------------------------;
-TONUMEXIT FORTHtoASM ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2
+TONUMEXIT .word $+2 ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2
; ----------------------------------;
JZ QNUMNEXT ;2 if conversion is ok
; ----------------------------------;
- SUB #2,IP ; redefines TONUMEXIT as >NUMBER return
+ SUB #2,IP ; redefines TONUMEXIT as >NUMBER return before loopback
CMP.B #28h,W ; rejected char by >NUMBER is a underscore ?
- JZ TONUMPLUS ; yes, skip it
+ JZ TONUMPLUS ; yes, loopback to >NUMBER with skip char
; ----------------------------------;
.IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
BIS #UF9,SR ;2 set double number flag
.ENDIF ;
.IFDEF DOUBLE_INPUT ;
CMP.B #0F7h,W ;2 rejected char by >NUMBER is a decimal point ?
- JZ TONUMPLUS ;2 yes, skip it
+ JZ TONUMPLUS ;2 yes, loopback to >NUMBER with skip char
.ENDIF ;
; ----------------------------------;
.IFDEF FIXPOINT_INPUT ;
CMP.B #0F5h,W ;2 rejected char by >NUMBER is a comma ?
- JNZ QNUMNEXT ;2 no, that will be followed by abort on conversion error
+ JNZ QNUMNEXT ;2 no, with Z=0, this jump will fall to QNUMKO
; ----------------------------------;
S15Q16 MOV TOS,W ;1 -- addr ud2lo x x x W=cnt2
MOV #0,X ;1 -- addr ud2lo x 0 x init X = ud2lo' = 0
MOV.B @X,X ;2 X = last char of string first (keep in mind: reverse conversion)
SUB.B #30h,X ;2 char --> digit conversion
CMP.B #10,X ;2
- JLO QS15Q16DIGI ;2
+ JNC QS15Q16DIGI ;2
SUB.B #7,X ;2
CMP.B #10,X ;2 to skip all chars between "9" and "A"
- JLO S15Q16EOC ;2 end of conversion on first rejected char (normally: ',')
+ JNC S15Q16EOC ;2 end of conversion on first rejected char (normally: ',')
QS15Q16DIGI CMP T,X ;1 R-- IP sign BASE is X a digit ?
- JHS S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if no goto QNUMNEXT (abort then)
+ JC S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if no goto QNUMNEXT (abort then)
MOV X,0(PSP) ;3 -- addr ud2lo ud2lo' digit x
MOV T,TOS ;1 -- addr ud2lo ud2lo' digit base R-- IP sign base
PUSHM #3,S ;6 PUSH S,T,W: R-- IP sign base addr2 base cnt2
.ENDIF
ADD #6,PSP ;1 -- addr sign
AND #0,TOS ;1 -- addr ff TOS=0 and Z=1 ==> conversion ko
- mNEXT ;4
+ MOV @IP+,PC ;4
; ----------------------------------;
- .IFDEF DOUBLE_NUMBERS
-QNUMOK ADD #2,PSP ;1 -- addr ud2lo-hi cnt2
+ .IFDEF DOUBLE_NUMBERS ; -- addr ud2lo-hi x sign
+QNUMOK ADD #2,PSP ;1 -- addr ud2lo-hi sign
MOV 2(PSP),4(PSP) ; -- udlo udlo udhi sign
MOV @PSP+,0(PSP) ;4 -- udlo udhi sign note : PSP is incremented before write back.
XOR #-1,TOS ;1 -- udlo udhi inv(sign)
XOR #-1,0(PSP) ;3 -- (dlo dhi)-1 tf
ADD #1,2(PSP) ;3
ADDC #0,0(PSP) ;3 -- dlo dhi tf
-QDOUBLE BIT #UF9,SR ;2 decimal point added ?
+QDOUBLE BIT #UF9,SR ;2 decimal point or comma fixpoint ?
JNZ QNUMEND ;2 leave double
ADD #2,PSP ;1 leave number
-QNUMEND mNEXT ;4 TOS<>0 and Z=0 ==> conversion ok
+QNUMEND MOV @IP+,PC ;4 TOS<>0 and Z=0 ==> conversion ok
.ELSE
QNUMOK ADD #4,PSP ;1 -- addr ud2lo sign
MOV @PSP+,0(PSP) ;4 -- udlo sign note : PSP is incremented before write back !!!
QNEGATE XOR #-1,0(PSP) ;3
ADD #1,0(PSP) ;3 -- n tf
XOR #-1,TOS ;1 -- udlo udhi tf TOS=-1 and Z=0
-QNUMEND mNEXT ;4 TOS=-1 and Z=0 ==> conversion ok
+QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
.ENDIF ; DOUBLE_NUMBERS
-; ----------------------------------;128 words
+; ----------------------------------;119 words
.ELSE ; no hardware MPY
; T.I. SIGNED MULTIPLY SUBROUTINE: U1 x U2 -> Ud
-;https://forth-standard.org/standard/core/UMTimes
-;C UM* u1 u2 -- ud unsigned 16x16->32 mult.
+; https://forth-standard.org/standard/core/UMTimes
+; UM* u1 u2 -- ud unsigned 16x16->32 mult.
FORTHWORD "UM*"
UMSTAR MOV @PSP,S ;2 MDlo
UMSTAR1 MOV #0,T ;1 MDhi=0
JNC UMSTARLOOP ;2 IF BIT IN CARRY: FINISHED 10~ loop
MOV X,0(PSP) ;3 low result on stack
MOV Y,TOS ;1 high result in TOS
- mNEXT ;4 17 words
+ MOV @IP+,PC ;4 17 words
-;https://forth-standard.org/standard/core/toNUMBER
+; https://forth-standard.org/standard/core/toNUMBER
; ud2 is the unsigned result of converting the characters within the string specified by c-addr1 u1 into digits,
; using the number in BASE, and adding each into ud1 after multiplying ud1 by the number in BASE.
; Conversion continues left-to-right until a character that is not convertible, including '.', ',' or '_',
; or the first character past the end of the string if the string was entirely converted.
; u2 is the number of unconverted characters in the string.
; An ambiguous condition exists if ud2 overflows during the conversion.
-;C >NUMBER ud1lo|ud1hi addr1 count1 -- ud2lo|ud2hi addr2 count2
+; >NUMBER ud1lo|ud1hi addr1 count1 -- ud2lo|ud2hi addr2 count2
FORTHWORD ">NUMBER"
TONUMBER MOV @PSP,S ;2 S=adr
MOV TOS,T ;1 T=count
TONUMLOOP MOV.B @S,Y ;2 -- ud1lo ud1hi x x S=adr, T=count, W=BASE, Y=char
DDIGITQ SUB.B #30h,Y ;2 skip all chars < '0'
CMP.B #10,Y ;2 char was > "9" ?
- JLO DDIGITQNEXT ;2 -- ud1lo ud1hi x x no: good end
+ JNC DDIGITQNEXT ;2 -- ud1lo ud1hi x x no: good end
SUB.B #07,Y ;2 skip all chars between "9" and "A"
CMP.B #10,Y ;2 char was < "A" ?
- JLO TONUMEND ;2 yes: for bad end
+ JNC TONUMEND ;2 yes: for bad end
DDIGITQNEXT CMP W,Y ;1 -- ud1lo ud1hi x x digit-base
BIC #Z,SR ;1 reset Z before jmp TONUMEND because...
- JHS TONUMEND ;2 ...QNUMBER conversion will be true if Z = 1 :-(
+ JC TONUMEND ;2 ...QNUMBER conversion will be true if Z = 1 :-(
UDSTAR PUSHM #6,IP ;8 -- ud1lo ud1hi x x r-- IP adr count base x digit
MOV 2(PSP),S ;3 -- ud1lo ud1hi x x S=ud1hi
MOV W,TOS ;1 -- ud1lo ud1hi x base
MOV #UMSTARNEXT1,IP ;2
UMSTARONE JMP UMSTAR1 ;2 ud1hi * base -- x ud3hi X=ud3lo
-UMSTARNEXT1 FORTHtoASM ; -- ud1lo ud1hi x ud3hi
+UMSTARNEXT1 .word $+2 ; -- ud1lo ud1hi x ud3hi
MOV X,2(RSP) ;3 r-- IP adr count base ud3lo digit
MOV 4(PSP),S ;3 -- ud1lo ud1hi x ud3hi S=ud1lo
MOV 4(RSP),TOS ;3 -- ud1lo ud1hi x base
MOV #UMSTARNEXT2,IP ;2
UMSTARTWO JMP UMSTAR1 ;2 -- ud1lo ud1hi x ud4hi X=ud4lo
-UMSTARNEXT2 FORTHtoASM ; -- ud1lo ud1hi x ud4hi
+UMSTARNEXT2 .word $+2 ; -- ud1lo ud1hi x ud4hi
MPLUS ADD @RSP+,X ;2 -- ud1lo ud1hi x ud4hi X=ud4lo+digit=ud2lo r-- IP adr count base ud3lo
ADDC @RSP+,TOS ;2 -- ud1lo ud1hi x ud2hi TOS=ud4hi+ud3lo+carry=ud2hi r-- IP adr count base
MOV X,4(PSP) ;3 -- ud2lo ud1hi x ud2hi
JNZ TONUMLOOP ;2 -- ud2lo ud2hi x x S=adr+1, T=count-1, W=base 68 cycles char loop
TONUMEND MOV S,0(PSP) ;3 -- ud2lo ud2hi adr2 count2
MOV T,TOS ;1 -- ud2lo ud2hi adr2 count2
- mNEXT ;4 50/82 words/cycles, W = BASE
+ MOV @IP+,PC ;4 50/82 words/cycles, W = BASE
; ?NUMBER makes the interface between >NUMBER and INTERPRET; it's a subset of INTERPRET.
; convert a string to a signed number; FORTH 2012 prefixes $, %, # are recognized
MOV.B @S+,T ;2 -- addr ud=0 x x S=adr, T=count
QNUMLDCHAR MOV.B @S,Y ;2 Y=char
CMP.B #'-',Y ;2
- JLO QBINARY ;2 if char < '-'
+ JNC QBINARY ;2 if char < '-'
JNZ DDIGITQ ;2 if char > '-'
MOV #-1,2(RSP) ;3 R-- IP sign base
- JMP TONUMPLUS ;2
+ JMP PREFIXED ;2
QBINARY MOV #2,W ;1 preset base 2
SUB.B #'%',Y ;2 binary number ?
JZ PREFIXED ;2
SUB #1,T ;1 -- addr ud=0 x x S=adr+1 T=count-1
JMP QNUMLDCHAR ;
; ----------------------------------;42
-TONUMEXIT FORTHtoASM ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2,T=cnt2
+TONUMEXIT .word $+2 ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2,T=cnt2
; ----------------------------------;
JZ QNUMNEXT ;2 if conversion is ok
SUB #2,IP
MOV.B @X,X ;2 X = last char of string, first...
SUB.B #30h,X ;2 char --> digit conversion
CMP.B #10,X ;2
- JLO QS15Q16DIGI ;2
+ JNC QS15Q16DIGI ;2
SUB.B #7,X ;2
CMP.B #10,X ;2
- JLO S15Q16EOC ;2
+ JNC S15Q16EOC ;2
QS15Q16DIGI CMP W,X ;1 R-- IP sign BASE, W=BASE, is X a digit ?
- JHS S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if no
+ JC S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if no
MOV X,0(PSP) ;3 -- addr ud2lo ud2lo' digit x
MOV W,TOS ;1 -- addr ud2lo ud2lo' digit base R-- IP sign base
PUSHM #3,S ;5 PUSH S,T,W: R-- IP sign base addr2 cnt2 base
.ENDIF
ADD #6,PSP ;1 -- addr sign
AND #0,TOS ;1 -- addr ff TOS=0 and Z=1 ==> conversion ko
- mNEXT ;4
+ MOV @IP+,PC ;4
; ----------------------------------;
.IFDEF DOUBLE_NUMBERS
QNUMOK ADD #2,PSP ;1 -- addr ud2lo ud2hi sign
ADDC #0,0(PSP) ;3 -- dlo dhi tf
QDOUBLE BIT #UF9,SR ;2 -- dlo dhi tf decimal point added ?
JNZ QNUMEND ;2 -- dlo dhi tf leave double
- ADD #2,PSP ;1 -- dlo tf leave number, Z=0
-QNUMEND mNEXT ;4 TOS=-1 and Z=0 ==> conversion ok
+NIP ADD #2,PSP ;1 -- dlo tf leave number, Z=0
+QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
.ELSE
QNUMOK ADD #4,PSP ;1 -- addr ud2lo sign
MOV @PSP+,0(PSP) ;4 -- udlo sign note : PSP is incremented before write back !!!
QNEGATE XOR #-1,0(PSP) ;3
ADD #1,0(PSP) ;3 -- n tf
XOR #-1,TOS ;1 -- udlo udhi tf TOS=-1 and Z=0
-QNUMEND mNEXT ;4 TOS=-1 and Z=0 ==> conversion ok
+QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
.ENDIF ; DOUBLE_NUMBERS
; ----------------------------------;128 words
.ENDIF ; of Hardware/Software MPY
; DICTIONARY MANAGEMENT
;-------------------------------------------------------------------------------
-;https://forth-standard.org/standard/core/HERE
-;C HERE -- addr returns memory ptr
- FORTHWORD "HERE"
-HERE SUB #2,PSP
- MOV TOS,0(PSP)
- MOV &DDP,TOS
- mNEXT
-
-;https://forth-standard.org/standard/core/Comma
-;C , x -- append cell to dict
+; https://forth-standard.org/standard/core/Comma
+; , x -- append cell to dict
FORTHWORD ","
COMMA MOV &DDP,W ;3
MOV TOS,0(W) ;3
ADD #2,&DDP ;3
MOV @PSP+,TOS ;2
- mNEXT ;4 15~
+ MOV @IP+,PC ;4 15~
-;https://forth-standard.org/standard/core/ALLOT
-;C ALLOT n -- allocate n bytes
+; https://forth-standard.org/standard/core/ALLOT
+; ALLOT n -- allocate n bytes
FORTHWORD "ALLOT"
ALLOT ADD TOS,&DDP
MOV @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/EXECUTE
-;C EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+; https://forth-standard.org/standard/core/EXECUTE
+; EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+ .IFDEF CORE_COMPLEMENT
FORTHWORD "EXECUTE"
+ .ENDIF
EXECUTE MOV TOS,W ; 1 put word address into W
MOV @PSP+,TOS ; 2 fetch new TOS
MOV W,PC ; 3 fetch code address into PC
.IFDEF DOUBLE_NUMBERS ; are recognized
-;https://forth-standard.org/standard/core/LITERAL
-;C LITERAL n -- append single numeric literal if compiling state
-; d -- append double numeric literal if compiling state and if UF9<>0 (not ANS)
+; https://forth-standard.org/standard/core/LITERAL
+; LITERAL n -- append single numeric literal if compiling state
+; d -- append two numeric literals if compiling state and UF9<>0 (not ANS)
FORTHWORDIMM "LITERAL" ; immediate
LITERAL CMP #0,&STATE ;3
JZ LITERAL2 ;2 if not compiling state, clear UF9 flag then NEXT
BIT #UF9,SR ;2 double number ?
LITERAL2 BIC #UF9,SR ;2 in all case, clear UF9
JZ LITERALEND ;2 no
- MOV 2(W),X ;3 yes
+ MOV 2(W),X ;3 yes, invert literals
MOV TOS,2(W) ;3
MOV X,TOS ;1
JMP LITERAL1 ;2
-LITERALEND mNEXT ;4
+LITERALEND MOV @IP+,PC ;4
.ELSE
-;https://forth-standard.org/standard/core/LITERAL
-;C LITERAL n -- append single numeric literal if compiling state
+; https://forth-standard.org/standard/core/LITERAL
+; LITERAL n -- append single numeric literal if compiling state
FORTHWORDIMM "LITERAL" ; immediate
LITERAL CMP #0,&STATE ;3
JZ LITERALEND ;2 if not immediate, leave n|d on the stack
MOV #lit,0(W) ;4
MOV TOS,2(W) ;3
MOV @PSP+,TOS ;2
-LITERALEND mNEXT ;4
+LITERALEND MOV @IP+,PC ;4
.ENDIF
-;https://forth-standard.org/standard/core/COUNT
-;C COUNT c-addr1 -- adr len counted->adr/len
+; https://forth-standard.org/standard/core/COUNT
+; COUNT c-addr1 -- adr len counted->adr/len
FORTHWORD "COUNT"
COUNT SUB #2,PSP ;1
ADD #1,TOS ;1
MOV TOS,0(PSP) ;3
MOV.B -1(TOS),TOS ;3
- mNEXT ;4 15~
-
-; : SETIB SOURCE 2! 0 >IN ! ; ; org len -- set Input Buffer, shared by INTERPRET and [ELSE]
-SETIB MOV TOS,&SOURCE_LEN ; -- org len
- MOV @PSP+,&SOURCE_ORG ; -- len
- MOV @PSP+,TOS ; --
- MOV #0,&TOIN ;
- mNEXT ;
+ MOV @IP+,PC ;4 15~
-;https://forth-standard.org/standard/core/BL
-;C BL -- char an ASCII space
- .IFDEF ANS_CORE_COMPLEMENT
+; https://forth-standard.org/standard/core/BL
+; BL -- char an ASCII space
+ .IFDEF CORE_COMPLEMENT
FORTHWORD "BL"
.ENDIF
-FBLANK mDOCON
- .word 32
+FBLANK CALL rDOCON
+ .word 20h
-;C INTERPRET i*x addr u -- j*x interpret given buffer
+; INTERPRET i*x addr u -- j*x interpret given buffer
; This is the common factor of EVALUATE and QUIT.
; set addr u as input buffer then parse it word by word
INTERPRET mDOCOL ;
.word SETIB
INTLOOP .word FBLANK,WORDD ; -- c-addr Z = End Of Line
- FORTHtoASM ;
+ .word $+2 ;
MOV #INTFINDNEXT,IP ;2 define INTFINDNEXT as FIND return
JNZ FIND ;2 Z=0, EOL not reached
- JMP DROPEXIT ; Z=1, EOL reached
+ JZ DROPEXIT ; Z=1, EOL reached
-INTFINDNEXT FORTHtoASM ; -- c-addr fl Z = not found
+INTFINDNEXT .word $+2 ; -- c-addr fl Z = not found
MOV TOS,W ; W = flag =(-1|0|+1) as (normal|not_found|immediate)
MOV @PSP+,TOS ; -- c-addr
MOV #INTQNUMNEXT,IP ;2 define QNUMBER return
JZ QNUMBER ;2 c-addr -- Z=1, not found, search a number
MOV #INTLOOP,IP ;2 define (EXECUTE | COMMA) return
XOR &STATE,W ;3
- JZ COMMA ;2 c-addr -- if W xor STATE = 0 compile xt then loop back to INTLOOP
JNZ EXECUTE ;2 c-addr -- if W xor STATE <>0 execute xt then loop back to INTLOOP
+ JZ COMMA ;2 c-addr -- if W xor STATE = 0 compile xt then loop back to INTLOOP
-INTQNUMNEXT FORTHtoASM ; -- n|c-addr fl Z = not a number, SR(UF9) double number request
+INTQNUMNEXT .word $+2 ; -- n|c-addr fl Z = not a number, SR(UF9) double number request
MOV @PSP+,TOS ;2
MOV #INTLOOP,IP ;2 -- n|c-addr define LITERAL return
JNZ LITERAL ;2 n -- Z=0, is a number, execute LITERAL then loop back to INTLOOP
MOV #FQABORTYES,IP ;2 define the return of COUNT
JMP COUNT ;2 -- addr len 35 words
-;https://forth-standard.org/standard/core/EVALUATE
+; https://forth-standard.org/standard/core/EVALUATE
; EVALUATE \ i*x c-addr u -- j*x interpret string
FORTHWORD "EVALUATE"
EVALUATE MOV #SOURCE_LEN,X ;2
PUSHM #4,IP ;6 PUSHM IP,S,T,W
ASMtoFORTH
.word INTERPRET
- FORTHtoASM
+ .word $+2
MOV @RSP+,&TOIN ;4
MOV @RSP+,&SOURCE_ORG ;4
MOV @RSP+,&SOURCE_LEN ;4
- mSEMI
+ MOV @RSP+,IP
+ MOV @IP+,PC
;https://forth-standard.org/standard/core/STATE
;C STATE -- a-addr holds compiler state
- .IFDEF ANS_CORE_COMPLEMENT
+ .IFDEF CORE_COMPLEMENT
FORTHWORD "STATE"
.ENDIF
-FSTATE mDOCON
+FSTATE CALL rDOCON
.word STATE ; VARIABLE address in RAM space
.IFDEF DEFER_QUIT ; defined in ThingsInFirst.inc
MOV #RSTACK,RSP ; ANS mandatory for QUIT
MOV #LSTACK,&LEAVEPTR ;
MOV #0,&STATE ; ANS mandatory for QUIT
- mNEXT
+ MOV @IP+,PC
;c BOOT -- load BOOT.4th file from SD_Card then loop to QUIT1
FORTHWORD "BOOT"
.word BRAN,QUIT4 ; to interpret this string
; ----------------------------------;
-;https://forth-standard.org/standard/core/QUIT
-;c QUIT -- interpret line by line the input stream, primary DEFERred word
+; https://forth-standard.org/standard/core/QUIT
+; QUIT -- interpret line by line the input stream, primary DEFERred word
; to enable bootstrap type: ' BOOT IS QUIT
; to disable bootstrap type: ' QUIT >BODY IS QUIT
.ELSE ; if no BOOTLOADER, QUIT is not DEFERred
-;https://forth-standard.org/standard/core/QUIT
-;c QUIT -- interpret line by line the input stream
+; https://forth-standard.org/standard/core/QUIT
+; QUIT -- interpret line by line the input stream
FORTHWORD "QUIT"
QUIT
QUIT0 MOV #0,&SAVE_SYSRSTIV ; clear SAVE_SYSRSTIV, usefull for next ABORT...
.ENDIF
.word BRAN,QUIT2
-;https://forth-standard.org/standard/core/ABORT
-;C ABORT i*x -- R: j*x -- clear stack & QUIT
+; https://forth-standard.org/standard/core/ABORT
+; ABORT i*x -- R: j*x -- clear stack & QUIT
FORTHWORD "ABORT"
ABORT MOV #PSTACK,PSP
JMP QUIT
-;https://forth-standard.org/standard/core/ABORTq
-;C ABORT" i*x flag -- i*x R: j*x -- j*x flag=0
-;C i*x flag -- R: j*x -- flag<>0
+; https://forth-standard.org/standard/core/ABORTq
+; ABORT" i*x flag -- i*x R: j*x -- j*x flag=0
+; i*x flag -- R: j*x -- flag<>0
FORTHWORDIMM "ABORT\34" ; immediate
ABORTQUOTE mDOCOL ; ABORT address + 10
.word SQUOTE
JNZ QABORTYES ;
THREEDROP ADD #4,PSP ;
MOV @PSP+,TOS ;
- mNEXT ;
+ MOV @IP+,PC ;
; ----------------------------------; QABORTYES = QABORT + 14
QABORTYES CALL #QAB_DEFER ; init some variables, common part with WIPE, see WIPE
; ----------------------------------;
QABORT_TERM CALL #RXON ; resume downloading source file then wait the end of downloading.
QABORTLOOP BIC #UCRXIFG,&TERM_IFG ; clear UCRXIFG
- MOV #int(frequency*2730),Y ; 2730*frequency ==> 65520 @ 24MHz
-QABUSBLOOPJ MOV #8,X ; 1~ <-------+ windows 10 seems very slow... ==> ((8*4)+4)*2730) = 98ms delay
-QABUSBLOOPI NOP ; 1~ <---+ |
- SUB #1,X ; 1~ | | the QABUSBLOOPJ delay must be longer than this of OS of TERMINAL
- JNZ QABUSBLOOPI ; 2~ 4~ loop ---+ | to refill its USB buffer
+ MOV &FREQ_KHZ,Y ; 1000, 2000, 4000, 8000, 16000, 240000
+QABUSBLOOPJ MOV #32,X ; 2~ <-------+ windows 10 seems very slow... ==> ((32*3)+5)*1000 = 101ms delay
+QABUSBLOOPI SUB #1,X ; 1~ <---+ |
+ JNZ QABUSBLOOPI ; 2~ 3~ loop ---+ | to refill its USB buffer
SUB #1,Y ; 1~ |
- JNZ QABUSBLOOPJ ; 2~ 36~ loop ------+
-; QABUSBLOOPJ MOV #20,X ; 2~ <-------+ linux with minicom seems very very slow... ==> ((20*4)+5)*2730 = 232ms delay
-; QABUSBLOOPI NOP ; 1~ <---+ |
-; SUB #1,X ; 1~ | | the QABUSBLOOPJ delay must be longer than this of OS of TERMINAL
-; JNZ QABUSBLOOPI ; 2~ 4~ loop ---+ | to refill its USB buffer
+ JNZ QABUSBLOOPJ ; 2~ 101~ loop -----+
+; QABUSBLOOPJ MOV #65,X ; 2~ <-------+ linux with minicom seems very very slow... ==> ((65*3)+5)*1000 = 200ms delay
+; QABUSBLOOPI SUB #1,X ; 1~ <---+ |
+; JNZ QABUSBLOOPI ; 2~ 3~ loop ---+ | to refill its USB buffer
; SUB #1,Y ; 1~ |
-; JNZ QABUSBLOOPJ ; 2~ 85~ loop ------+
+; JNZ QABUSBLOOPJ ; 2~ 200~ loop -----+
BIT #UCRXIFG,&TERM_IFG ; 4 new char in TERMRXBUF after QABUSBLOOPJ delay ?
JNZ QABORTLOOP ; 2 yes, the input stream is still active: loop back
; ----------------------------------;
mDOCOL ;
- .word PWR_STATE ; remove all words beyond PWR_HERE, including a definition leading to an error
- .word lit,LINE,FETCH ; fetch line number before set ECHO !
- .word ECHO ; to see abort message
- .word XSQUOTE ; -- c-addr u c-addr1 u1
- .byte 4,27,"[7m" ; type ESC[7m (set reverse video)
- .word TYPE ; -- c-addr u
- .word QDUP ;
- .word QFBRAN,ERRLINE_END; if LINE = 0
+ .word PWR_STATE ; remove all words beyond PWR_HERE, including the definition leading to an error
+ .word lit,LINE,FETCH ; -- c-addr line fetch line number before set ECHO !
+ .word ECHO ; to see abort message
+ .word XSQUOTE ; -- c-addr u line c-addr1 u1
+ .byte 4,27,"[7m" ; type ESC[7m (set reverse video)
+ .word TYPE ; -- c-addr u line
+ .word QDUP,QFBRAN ; if LINE = 0
+ .word QAB_DISPLAY ;
; ----------------------------------;
-; Display error line:xxx ; if LINE <> 0 (if NOECHO state before calling ABORT")
+; Display error line:xxx ; if LINE <> 0 (if NOECHO state before calling to ABORT")
; ----------------------------------;
.word CR ;
- .word XSQUOTE ; displays the line where error occured
+ .word XSQUOTE ; -- c-addr u line c-addr1 u1 displays the line where error occured
.byte 5,"line:" ;
- .word TYPE ;
- .word ONEMINUS ;
- .word UDOT ;
-ERRLINE_END ; -- c-addr u
+ .word TYPE ; -- c-addr u line
+ .word UDOT ; -- c-addr u
; ----------------------------------;
; Display ABORT" message ; <== WARM jumps here
; ----------------------------------;
-QABORT_DISPLAY ;
- .word TYPE ; -- type abort message
+QAB_DISPLAY .word TYPE ; -- type abort message
.word XSQUOTE ; -- c-addr u
.byte 4,27,"[0m" ;
.word TYPE ; -- set normal video
; COMPILER
;-------------------------------------------------------------------------------
-;https://forth-standard.org/standard/core/BracketTick
-;C ['] <name> -- find word & compile it as literal
+; https://forth-standard.org/standard/core/BracketTick
+; ['] <name> -- find word & compile it as literal
FORTHWORDIMM "[']" ; immediate word, i.e. word executed during compilation
BRACTICK mDOCOL
.word TICK ; get xt of <name>
.word lit,lit,COMMA ; append LIT action
.word COMMA,EXIT ; append xt literal
-;https://forth-standard.org/standard/core/Tick
-;C ' -- xt find word in dictionary and leave on stack its execution address
+; https://forth-standard.org/standard/core/Tick
+; ' -- xt find word in dictionary and leave on stack its execution address
FORTHWORD "'"
-TICK mDOCOL ; separator -- xt
+TICK mDOCOL
.word FBLANK,WORDD,FIND
.word QFBRAN,NotFound
.word EXIT
NotFound .word NotFoundExe ; see INTERPRET
-;https://forth-standard.org/standard/block/bs
+; https://forth-standard.org/standard/block/bs
; \ -- backslash
; everything up to the end of the current line is a comment.
FORTHWORDIMM "\\" ; immediate
BACKSLASH MOV &SOURCE_LEN,&TOIN ;
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/Bracket
-;C [ -- enter interpretative state
+; https://forth-standard.org/standard/core/Bracket
+; [ -- enter interpretative state
FORTHWORDIMM "[" ; immediate
LEFTBRACKET MOV #0,&STATE
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/right-bracket
-;C ] -- enter compiling state
+; https://forth-standard.org/standard/core/right-bracket
+; ] -- enter compiling state
FORTHWORD "]"
RIGHTBRACKET MOV #-1,&STATE
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/DEFERStore
-;C DEFER! xt CFA_DEFER -- ; store xt into the PFA of DEFERed word
-; FORTHWORD "DEFER!"
-DEFERSTORE MOV @PSP+,2(TOS) ; -- CFA_DEFER xt --> [CFA_DEFER+2]
- MOV @PSP+,TOS ; --
- mNEXT
-
-;https://forth-standard.org/standard/core/IS
-;C IS <name> xt --
-; used as is :
-; DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-; inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-; or in a definition : ... ['] U. IS DISPLAY ...
-; KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-
-; as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
- FORTHWORDIMM "IS" ; immediate
-IS mDOCOL
- .word FSTATE,FETCH ; STATE @
- .word QFBRAN,IS_EXEC ; if = 0
-IS_COMPILE .word BRACTICK ; find the word, compile its CFA as literal
- .word lit,DEFERSTORE ;
- .word COMMA ; compile DEFERSTORE
- .word EXIT ;
-IS_EXEC .word TICK,DEFERSTORE ; find the word, leave its CFA on the stack and
- .word EXIT ; put it into PFA of DEFERed word, then exit.
-
-;https://forth-standard.org/standard/core/IMMEDIATE
-;C IMMEDIATE -- make last definition immediate
- FORTHWORD "IMMEDIATE"
-IMMEDIATE MOV &LAST_NFA,W
- BIS.B #80h,0(W)
- mNEXT
-
-;https://forth-standard.org/standard/core/POSTPONE
+; https://forth-standard.org/standard/core/POSTPONE
FORTHWORDIMM "POSTPONE" ; immediate
POSTPONE mDOCOL
.word FBLANK,WORDD,FIND,QDUP
.word lit,COMMA ; CFA of COMMA
POST1 .word COMMA,EXIT ; then compile: if immediate xt of word found else CFA of COMMA
-;https://forth-standard.org/standard/core/Semi
-;C ; -- end a colon definition
- FORTHWORDIMM ";" ; immediate
-SEMICOLON CMP #0,&STATE ; if interpret mode, semicolon becomes a comment separator
- JZ BACKSLASH ; tip: ";" is transparent to the preprocessor, so semicolon comments are kept in file.4th
- mDOCOL ; compile mode
- .word lit,EXIT,COMMA
- .word QREVEAL,LEFTBRACKET,EXIT
-
- .IFDEF NONAME
-;https://forth-standard.org/standard/core/ColonNONAME
-; :NONAME -- xt
- FORTHWORD ":NONAME"
- PUSH #COLONNEXT ; define COLONNEXT as the next of HEADERLESS
-HEADERLESS SUB #2,PSP ; common part of :NONAME and CODENNM
- MOV TOS,0(PSP)
- MOV &DDP,TOS ; -- HERE
- BIT #1,TOS ;
- ADDC #0,TOS ; -- xt aligned CFA of this NONAME or CODENNM word
- MOV TOS,W ; W=CFA
- MOV #PAIN,X ;2 MOV Y,0(X) writes to PAIN read only register = first lure for semicolon REVEAL...
- MOV #PAOUT,Y ;2 MOV @X,-2(Y) also writes to PAIN register = 2th lure for semicolon REVEAL...
- JMP HEADEREND ; ...because we don't want to write a preamble of this :NONAME definition in dictionnary!
- .ENDIF ; NONAME
-
-COLONNEXT ; common part of :NONAME and :
- .SWITCH DTC
- .CASE 1
- MOV #DOCOL1,-4(W) ; compile CALL rDOCOL
- SUB #2,&DDP
- .CASE 2
- MOV #DOCOL1,-4(W) ; compile PUSH IP 3~
- MOV #DOCOL2,-2(W) ; compile CALL rEXIT
- .CASE 3 ; inlined DOCOL
- MOV #DOCOL1,-4(W) ; compile PUSH IP 3~
- MOV #DOCOL2,-2(W) ; compile MOV PC,IP 1~
- MOV #DOCOL3,0(W) ; compile ADD #4,IP 1~
- MOV #NEXT,+2(W) ; compile MOV @IP+,PC 4~
- ADD #4,&DDP
- .ENDCASE ; of DTC
- MOV #-1,&STATE ; enter compiling state
-NEXT_ADR mNEXT
-
+; https://forth-standard.org/standard/core/IMMEDIATE
+; IMMEDIATE -- make last definition immediate
+ FORTHWORD "IMMEDIATE"
+IMMEDIATE MOV &LAST_NFA,W
+ BIS.B #80h,0(W)
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/Colon
-;C : <name> -- begin a colon definition
+; https://forth-standard.org/standard/core/Colon
+; : <name> -- begin a colon definition
+; HEADER is CALLed by all compiling words
FORTHWORD ":"
-COLON PUSH #COLONNEXT ; define COLONNEXT as the next of HEADER
-
-; HEADER create an header for a new word. Max count of chars = 126
-; common code for DEFER, VARIABLE, CONSTANT, CREATE, :, MARKER, CODE, ASM.
-; doesn't link the created word in vocabulary.
-HEADER BIT #1,&DDP ;3 carry set if odd
- ADDC #2,&DDP ;4 (DP+2|DP+3) bytes
- mDOCOL
+COLON PUSH #COLONNEXT ;3 define COLONNEXT as HEADER RET
+;-----------------------------------;
+HEADER BIT #1,&DDP ;3 carry set if odd
+ ADDC #2,&DDP ;4 (DP+2|DP+3) bytes, make room for LFA
+ mDOCOL ;
.word FBLANK,WORDD ;
- FORTHtoASM ; -- HERE HERE is the NFA of this new word
- MOV @RSP+,IP
+ .word $+2 ; -- HERE HERE is the NFA of this new word
+ MOV @RSP+,IP ;
MOV TOS,Y ; -- NFA Y=NFA
MOV.B @TOS+,W ; -- NFA+1 W=Count_of_chars
BIS.B #1,W ; W=count is always odd
ADD.B #1,W ; W=add one byte for length
ADD Y,W ; W=Aligned_CFA
MOV &CURRENT,X ; X=VOC_BODY of CURRENT
- .SWITCH THREADS
+ .SWITCH THREADS ;
.CASE 1 ; nothing to do
.ELSECASE ; multithreading add 5~ 4words
MOV.B @TOS,TOS ; -- char TOS=first CHAR of new word
AND #(THREADS-1)*2,TOS ; -- offset TOS= Thread offset
ADD TOS,X ; X=VOC_PFAx = thread x of VOC_PFA of CURRENT
- .ENDCASE
+ .ENDCASE ;
MOV @PSP+,TOS ; --
HEADEREND MOV Y,&LAST_NFA ; NFA --> LAST_NFA used by QREVEAL, IMMEDIATE, MARKER
MOV PSP,&LAST_PSP ; save PSP for check compiling, used by QREVEAL
ADD #4,W ; by default make room for two words...
MOV W,&DDP ;
- RET ; 33 words, W is the new DDP value )
- ; X is LAST_THREAD > used by VARIABLE, CONSTANT, CREATE, DEFER and :
- ; Y is NFA )
+ MOV @RSP+,PC ; RET W is the new DP value )
+ ; X is LAST_THREAD > used by compiling words: CREATE, DEFER, :...
+ ; Y is NFA )
+COLONNEXT ;
+ .SWITCH DTC ; Direct Threaded Code select
+ .CASE 1 ;
+ MOV #DOCOL1,-4(W) ; compile CALL rDOCOL, with [rDOCOL] = xdocol
+ SUB #2,&DDP ;
+ .CASE 2 ;
+ MOV #DOCOL1,-4(W) ; compile PUSH IP 3~
+ MOV #DOCOL2,-2(W) ; compile CALL rDOCOL, with [rDOCOL] = EXIT
+ .CASE 3 ;
+ MOV #DOCOL1,-4(W) ; compile PUSH IP 3~
+ MOV #DOCOL2,-2(W) ; compile MOV PC,IP 1~
+ MOV #DOCOL3,0(W) ; compile ADD #4,IP 1~
+ MOV #NEXT,+2(W) ; compile MOV @IP+,PC 4~
+ ADD #4,&DDP ;
+ .ENDCASE ;
+ MOV #-1,&STATE ; enter compiling state
+ MOV @IP+,PC ;
+;-----------------------------------;
+
+ .IFDEF NONAME
+; https://forth-standard.org/standard/core/ColonNONAME
+; :NONAME -- xt
+ FORTHWORD ":NONAME"
+ PUSH #COLONNEXT ; define COLONNEXT as HEADERLESS RET
+HEADERLESS SUB #2,PSP ; common part of :NONAME and CODENNM
+ MOV TOS,0(PSP) ;
+ MOV &DDP,TOS ; -- HERE
+ BIT #1,TOS ;
+ ADDC #0,TOS ; -- xt aligned CFA of this NONAME or CODENNM word
+ MOV TOS,W ; W=CFA
+ MOV #210h,X ;2 MOV Y,0(X) will write to a unused register = first lure for semicolon REVEAL...
+ MOV #212h,Y ;2 MOV @X,-2(Y) also writes to same register = 2th lure for semicolon REVEAL...
+ JMP HEADEREND ; ...because we don't want to write a preamble of this :NONAME definition in dictionnary!
+ .ENDIF ; NONAME
;;Z ?REVEAL -- if no stack mismatch, link this new word in the CURRENT vocabulary
QREVEAL CMP PSP,&LAST_PSP ; Check SP with its saved value by :, :NONAME, CODE...
JNZ BAD_CSP ; if no stack mismatch.
GOOD_CSP MOV &LAST_NFA,Y ; GOOD_CSP is the end of word MARKER
MOV &LAST_THREAD,X ;
-REVEAL MOV @X,-2(Y) ; [LAST_THREAD] --> LFA (for NONAME: [LAST_THREAD] --> PAIN)
+REVEAL MOV @X,-2(Y) ; [LAST_THREAD] --> LFA (for NONAME: [LAST_THREAD] --> PAIN)
MOV Y,0(X) ; LAST_NFA --> [LAST_THREAD] (for NONAME: LAST_NFA --> PAIN)
- mNEXT
-
+ MOV @IP+,PC
BAD_CSP mDOCOL
.word XSQUOTE
.byte 15,"stack mismatch!"
FQABORTYES .word QABORTYES
-;https://forth-standard.org/standard/core/DEFER
-;C DEFER "<spaces>name" --
-;Skip leading space delimiters. Parse name delimited by a space.
-;Create a definition for name with the execution semantics defined below.
-
-;name Execution: --
-;Execute the xt that name is set to execute, i.e. NEXT (nothing),
-;until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
-
- FORTHWORD "DEFER"
-DEFER CALL #HEADER ; -- W = DDP
- MOV #4030h,-4(W) ; by default, HEADER create a DEFERred word: CFA = MOV @PC+,PC = BR mNEXT
- MOV #NEXT_ADR,-2(W) ; by default, HEADER create a DEFERred word: PFA = address of mNEXT to do nothing.
- JMP REVEAL ; to link created VARIABLE in vocabulary
+; https://forth-standard.org/standard/core/Semi
+; ; -- end a colon definition
+ FORTHWORDIMM ";" ; immediate
+SEMICOLON CMP #0,&STATE ; if interpret mode, semicolon becomes a comment identifier
+ JZ BACKSLASH ; tip: ";" is transparent to the preprocessor, so semicolon comments are kept in file.4th
+ mDOCOL ; compile mode
+ .word lit,EXIT,COMMA
+ .word QREVEAL,LEFTBRACKET,EXIT
-;https://forth-standard.org/standard/core/CREATE
-;C CREATE <name> -- define a CONSTANT with its next address
+; https://forth-standard.org/standard/core/CREATE
+; CREATE <name> -- define a CONSTANT with its next address
; Execution: ( -- a-addr ) ; a-addr is the address of name's data field
; ; the execution semantics of name may be extended by using DOES>
FORTHWORD "CREATE"
CREATE CALL #HEADER ; -- W = DDP
- MOV #DOCON,-4(W) ;4 -4(W) = CFA = DOCON
- MOV W,-2(W) ;3 -2(W) = PFA = W = next address
- JMP REVEAL ; to link created VARIABLE in vocabulary
+ MOV #DOCON,-4(W) ;4 -4(W) = CFA = DOCON
+ MOV W,-2(W) ;3 -2(W) = PFA = W = next address
+ JMP REVEAL ; to link created VARIABLE in vocabulary
-;https://forth-standard.org/standard/core/DOES
-;C DOES> -- set action for the latest CREATEd definition
+; https://forth-standard.org/standard/core/DOES
+; DOES> -- set action for the latest CREATEd definition
FORTHWORD "DOES>"
-DOES MOV &LAST_CFA,W ; W = CFA of CREATEd word
- MOV #DODOES,0(W) ; replace CFA (DOCON) by new CFA (DODOES)
- MOV IP,2(W) ; replace PFA by the address after DOES> as execution address
- mSEMI ; exit of the new created word
+DOES MOV &LAST_CFA,W ; W = CFA of CREATEd word
+ MOV #DODOES,0(W) ; replace CFA (DOCON) by new CFA (DODOES)
+ MOV IP,2(W) ; replace PFA by the address after DOES> as execution address
+ MOV @RSP+,IP ;
+ MOV @IP+,PC ; exit of the new created word
+
+ .IFDEF CORE_COMPLEMENT
+
+;https://forth-standard.org/standard/core/VARIABLE
+;C VARIABLE <name> -- define a Forth VARIABLE
+ FORTHWORD "VARIABLE"
+VARIABLE CALL #HEADER ; W = DDP = CFA + 2 words
+ MOV #DOVAR,-4(W) ; CFA = DOVAR, PFA is undefined
+ JMP REVEAL ; to link created VARIABLE in vocabulary
+
+;https://forth-standard.org/standard/core/CONSTANT
+;C CONSTANT <name> n -- define a Forth CONSTANT
+ FORTHWORD "CONSTANT"
+CONSTANT CALL #HEADER ; W = DDP = CFA + 2 words
+ MOV #DOCON,-4(W) ; CFA = DOCON
+ MOV TOS,-2(W) ; PFA = n
+ MOV @PSP+,TOS
+ JMP REVEAL ; to link created VARIABLE in vocabulary
-;https://forth-standard.org/standard/core/toBODY
-; >BODY -- addr leave BODY of a CREATEd word
- FORTHWORD ">BODY"
- ADD #4,TOS
- mNEXT
+ .ENDIF
.IFDEF MSP430ASSEMBLER
- FORTHWORD "CODE" ; a CODE word must be finished with ENDCODE
-ASMCODE CALL #HEADER ; (that makes room for CFA and PFA)
-ASMCODE1
+ FORTHWORD "CODE" ; a CODE word must be finished with ENDCODE
+ASMCODE CALL #HEADER ; (that makes room for CFA and PFA)
+ASMCODE1 SUB #4,&DDP ; remove default room for CFA and PFA
+ASMCODE2
.IFDEF EXTENDED_ASM
- MOV #0,&RPT_WORD ; clear RPT instruction
+ MOV #0,&RPT_WORD ; clear RPT instruction
.ENDIF
- SUB #4,&DDP ; remove this room
mDOCOL
.word ALSO,ASSEMBLER
.word EXIT
.IFDEF NONAME
- FORTHWORD "CODENNM" ; CODENoNaMe is the assembly counterpart of :NONAME
-CODENNM CALL #HEADERLESS ; (that makes room for CFA and PFA)
- JMP ASMCODE1
+ FORTHWORD "CODENNM" ; CODENoNaMe is the assembly counterpart of :NONAME
+CODENNM PUSH #ASMCODE1 ; define HEADERLESS return
+ JMP HEADERLESS ; that makes room for CFA and PFA
.ENDIF
- asmword "ENDCODE" ; restore previous context and test PSP balancing
+ asmword "ENDCODE" ; test PSP balancing then restore previous context
ENDCODE mDOCOL
- .word PREVIOUS,QREVEAL
+ .word QREVEAL,PREVIOUS
.word EXIT
; ASM and ENDASM are used to define an assembler word which is not executable by FORTH interpreter
; prohibited because it doesn't restore CURRENT.
FORTHWORD "ASM"
- MOV #BODYASSEMBLER,&CURRENT
- JMP ASMCODE
+ MOV #BODYASSEMBLER,&CURRENT ; select ASSEMBLER word set to link this ASM word
+ JMP ASMCODE
- asmword "ENDASM" ; end of an ASM word
+ asmword "ENDASM" ; end of an ASM word
mDOCOL
- .WORD ENDCODE,DEFINITIONS,EXIT
-
+ .WORD ENDCODE,DEFINITIONS ; select PREVIOUS word set as CURRENT word set
+ .word EXIT
; here are words used to switch from/to FORTH to/from ASSEMBLER
- asmword "COLON" ; compile DOCOL, remove ASSEMBLER from CONTEXT, switch to compilation state
+ asmword "COLON" ; compile DOCOL, remove ASSEMBLER from CONTEXT, switch to compilation state
MOV &DDP,W
.SWITCH DTC
.CASE 1
- MOV #DOCOL1,0(W) ; compile CALL xDOCOL
+ MOV #DOCOL1,0(W) ; compile CALL xDOCOL
ADD #2,&DDP
.CASE 2
- MOV #DOCOL1,0(W) ; compile PUSH IP
-COLON1 MOV #DOCOL2,2(W) ; compile CALL rEXIT
+ MOV #DOCOL1,0(W) ; compile PUSH IP
+COLON1 MOV #DOCOL2,2(W) ; compile CALL rEXIT
ADD #4,&DDP
.CASE 3 ; inlined DOCOL
- MOV #DOCOL1,0(W) ; compile PUSH IP
-COLON1 MOV #DOCOL2,2(W) ; compile MOV PC,IP
- MOV #DOCOL3,4(W) ; compile ADD #4,IP
- MOV #NEXT,6(W) ; compile MOV @IP+,PC
- ADD #8,&DDP ;
+ MOV #DOCOL1,0(W) ; compile PUSH IP
+COLON1 MOV #DOCOL2,2(W) ; compile MOV PC,IP
+ MOV #DOCOL3,4(W) ; compile ADD #4,IP
+ MOV #NEXT,6(W) ; compile MOV @IP+,PC
+ ADD #8,&DDP ;
.ENDCASE ; DTC
-COLON2 MOV #-1,&STATE ; enter in compile state
- MOV #PREVIOUS,PC ; restore previous state of CONTEXT
-
+COLON2 MOV #-1,&STATE ; enter in compile state
+ MOV #PREVIOUS,PC ; restore previous state of CONTEXT
- asmword "LO2HI" ; same as COLON but without saving IP
+ asmword "LO2HI" ; same as COLON but without saving IP
.SWITCH DTC
- .CASE 1 ; compile 2 words
+ .CASE 1 ; compile 2 words
MOV &DDP,W
- MOV #12B0h,0(W) ; compile CALL #EXIT, 2 words 4+6=10~
+ MOV #12B0h,0(W) ; compile CALL #EXIT, 2 words 4+6=10~
MOV #EXIT,2(W)
ADD #4,&DDP
JMP COLON2
- .ELSECASE ; CASE 2 : compile 1 word, CASE 3 : compile 3 words
- SUB #2,&DDP ; to skip PUSH IP
+ .ELSECASE ; CASE 2 : compile 1 word, CASE 3 : compile 3 words
+ SUB #2,&DDP ; to skip PUSH IP
MOV &DDP,W
JMP COLON1
.ENDCASE
- FORTHWORDIMM "HI2LO" ; immediate, switch to low level, set interpretation state, add ASSEMBLER context
+ FORTHWORDIMM "HI2LO" ; immediate, switch to low level, set interpretation state, add ASSEMBLER context
mDOCOL
HI2LO .word HERE,CELLPLUS,COMMA
.word LEFTBRACKET
- .word ALSO,ASSEMBLER
+ .word ASMCODE2
.word EXIT
.ENDIF ; MSP430ASSEMBLER
; IF, ELSE, AGAIN, UNTIL, WHILE, REPEAT, LOOP & +LOOP compile two words
; LEAVE compile three words
-;https://forth-standard.org/standard/core/IF
-;C IF -- IFadr initialize conditional forward branch
+ .IFDEF CORE_COMPLEMENT
+
+; https://forth-standard.org/standard/core/IF
+; IF -- IFadr initialize conditional forward branch
FORTHWORDIMM "IF" ; immediate
IFF SUB #2,PSP ;
MOV TOS,0(PSP) ;
MOV &DDP,TOS ; -- HERE
ADD #4,&DDP ; compile one word, reserve one word
MOV #QFBRAN,0(TOS) ; -- HERE compile QFBRAN
+ .ENDIF ; CORE_COMPLEMENT
CELLPLUS ADD #2,TOS ; -- HERE+2=IFadr
- mNEXT
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/BEGIN
+; BEGIN -- BEGINadr initialize backward branch
+ FORTHWORDIMM "BEGIN" ; immediate
+HERE
+BEGIN SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &DDP,TOS
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/ELSE
-;C ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ .IFDEF CORE_COMPLEMENT
+; https://forth-standard.org/standard/core/ELSE
+; ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
FORTHWORDIMM "ELSE" ; immediate
ELSS ADD #4,&DDP ; make room to compile two words
MOV &DDP,W ; W=HERE+4
- MOV #bran,-4(W)
+ MOV #BRAN,-4(W)
MOV W,0(TOS) ; HERE+4 ==> [IFadr]
SUB #2,W ; HERE+2
MOV W,TOS ; -- ELSEadr
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/THEN
-;C THEN IFadr -- resolve forward branch
+; https://forth-standard.org/standard/core/THEN
+; THEN IFadr -- resolve forward branch
FORTHWORDIMM "THEN" ; immediate
THEN MOV &DDP,0(TOS) ; -- IFadr
MOV @PSP+,TOS ; --
- mNEXT
-
-;https://forth-standard.org/standard/core/BEGIN
-;C BEGIN -- BEGINadr initialize backward branch
- FORTHWORDIMM "BEGIN" ; immediate
-BEGIN MOV #HERE,PC ; BR HERE
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/UNTIL
-;C UNTIL BEGINadr -- resolve conditional backward branch
+; https://forth-standard.org/standard/core/UNTIL
+; UNTIL BEGINadr -- resolve conditional backward branch
FORTHWORDIMM "UNTIL" ; immediate
UNTIL MOV #QFBRAN,X
UNTIL1 ADD #4,&DDP ; compile two words
MOV X,-4(W) ; compile Bran or QFBRAN at HERE
MOV TOS,-2(W) ; compile bakcward adr at HERE+2
MOV @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/AGAIN
+; https://forth-standard.org/standard/core/AGAIN
;X AGAIN BEGINadr -- resolve uncondionnal backward branch
FORTHWORDIMM "AGAIN" ; immediate
-AGAIN MOV #bran,X
+AGAIN MOV #BRAN,X
JMP UNTIL1
-;https://forth-standard.org/standard/core/WHILE
-;C WHILE BEGINadr -- WHILEadr BEGINadr
+; https://forth-standard.org/standard/core/WHILE
+; WHILE BEGINadr -- WHILEadr BEGINadr
FORTHWORDIMM "WHILE" ; immediate
WHILE mDOCOL
.word IFF,SWAP,EXIT
-;https://forth-standard.org/standard/core/REPEAT
-;C REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+; https://forth-standard.org/standard/core/REPEAT
+; REPEAT WHILEadr BEGINadr -- resolve WHILE loop
FORTHWORDIMM "REPEAT" ; immediate
REPEAT mDOCOL
.word AGAIN,THEN,EXIT
-;https://forth-standard.org/standard/core/DO
-;C DO -- DOadr L: -- 0
+; https://forth-standard.org/standard/core/DO
+; DO -- DOadr L: -- 0
FORTHWORDIMM "DO" ; immediate
DO SUB #2,PSP ;
MOV TOS,0(PSP) ;
ADD #2,&LEAVEPTR ; -- HERE+2 LEAVEPTR+2
MOV &LEAVEPTR,W ;
MOV #0,0(W) ; -- HERE+2 L-- 0
- mNEXT
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/I
+; I -- n R: sys1 sys2 -- sys1 sys2
+; get the innermost loop index
+ FORTHWORD "I"
+II SUB #2,PSP ;1 make room in TOS
+ MOV TOS,0(PSP) ;3
+ MOV @RSP,TOS ;2 index = loopctr - fudge
+ SUB 2(RSP),TOS ;3
+ MOV @IP+,PC ;4 13~
-;https://forth-standard.org/standard/core/LOOP
-;C LOOP DOadr -- L-- an an-1 .. a1 0
+; https://forth-standard.org/standard/core/LOOP
+; LOOP DOadr -- L-- an an-1 .. a1 0
FORTHWORDIMM "LOOP" ; immediate
LOO MOV #xloop,X
LOOPNEXT ADD #4,&DDP ; make room to compile two words
MOV W,0(TOS) ; move adr after loop as UNLOOP adr
JMP LEAVELOOP
LOOPEND MOV @PSP+,TOS
- mNEXT
+ MOV @IP+,PC
-;https://forth-standard.org/standard/core/PlusLOOP
-;C +LOOP adrs -- L-- an an-1 .. a1 0
+; https://forth-standard.org/standard/core/PlusLOOP
+; +LOOP adrs -- L-- an an-1 .. a1 0
FORTHWORDIMM "+LOOP" ; immediate
PLUSLOOP MOV #xploop,X
JMP LOOPNEXT
-;https://forth-standard.org/standard/core/MOVE
-;C MOVE addr1 addr2 u -- smart move
-; VERSION FOR 1 ADDRESS UNIT = 1 CHAR
- FORTHWORD "MOVE"
-MOVE MOV TOS,W ; W = cnt
- MOV @PSP+,Y ; Y = addr2 = dst
- MOV @PSP+,X ; X = addr1 = src
- MOV @PSP+,TOS ; pop new TOS
- CMP #0,W
- JZ MOVE_X ; already done !
- CMP X,Y ; Y-X ; dst - src
- JZ MOVE_X ; already done !
- JC MOVEUP ; U>= if dst > src
-MOVEDOWN MOV.B @X+,0(Y) ; if X=src > Y=dst copy W bytes
- ADD #1,Y
- SUB #1,W
- JNZ MOVEDOWN
- mNEXT
-
-MOVEUP ADD W,Y
- ADD W,X
-MOVUP1 SUB #1,X
- SUB #1,Y
-MOVUP2 MOV.B @X,0(Y) ; if X=src < Y=dst copy W bytes beginning with the end
- SUB #1,W
- JNZ MOVUP1
-MOVE_X mNEXT
-
+ .ENDIF ; CORE_COMPLEMENT
;-------------------------------------------------------------------------------
; WORDS SET for VOCABULARY, not ANS compliant
;-------------------------------------------------------------------------------
+ .IFDEF USE_MOVE
+; https://forth-standard.org/standard/core/MOVE
+; MOVE addr1 addr2 u -- smart move
+; VERSION FOR 1 ADDRESS UNIT = 1 CHAR
+ FORTHWORD "MOVE"
+MOVE MOV TOS,W ; W = cnt
+ MOV @PSP+,Y ; Y = addr2 = dst
+ MOV @PSP+,X ; X = addr1 = src
+ MOV @PSP+,TOS ; pop new TOS
+ CMP #0,W ; count = 0 ?
+ JZ MOVEND ; already done ! see ALSO
+ CMP X,Y ; Y-X ; dst - src
+ JZ MOVEND ; already done !
+ JNC MOVEDOWN ; see PREVIOUS
+ ADD W,Y ; move beginning with the end
+ ADD W,X ;
+ JMP MOVEUP ; see ALSO
+ .ENDIF
+
;X VOCABULARY -- create a vocabulary, up to 7 vocabularies in CONTEXT
.IFDEF VOCABULARY_SET
.word CREATE
.SWITCH THREADS
.CASE 1
- .word lit,0,COMMA ; will keep the NFA of the last word of the future created vocabularies
+ .word lit,0,COMMA ; will keep the NFA of the last word of the future created vocabularies
.ELSECASE
.word lit,THREADS,lit,0,xdo
VOCABULOOP .word lit,0,COMMA
.word xloop,VOCABULOOP
.ENDCASE
- .word HERE ; link via LASTVOC the future created vocabulary
+ .word HERE ; link via LASTVOC the future created vocabulary
.word LIT,LASTVOC,DUP
- .word FETCH,COMMA ; compile [LASTVOC] to HERE+
- .word STORE ; store (HERE - CELL) to LASTVOC
- .word DOES ; compile CFA and PFA for the future defined vocabulary
+ .word FETCH,COMMA ; compile [LASTVOC] to HERE+
+ .word STORE ; store (HERE - CELL) to LASTVOC
+ .word DOES ; compile CFA and PFA for the future defined vocabulary
.ENDIF ; VOCABULARY_SET
VOCDOES .word LIT,CONTEXT,STORE
.word EXIT
-;X FORTH -- ; set FORTH the first context vocabulary; FORTH is and must be the first vocabulary
+;X FORTH -- ; set FORTH the first context vocabulary; FORTH is and must be the first vocabulary
.IFDEF VOCABULARY_SET
FORTHWORD "FORTH"
.ENDIF ; VOCABULARY_SET
-FORTH ; leave BODYFORTH on the stack and run VOCDOES
- mDODOES ; Code Field Address (CFA) of FORTH
-PFAFORTH .word VOCDOES ; Parameter Field Address (PFA) of FORTH
-BODYFORTH ; BODY of FORTH
+FORTH ; leave BODYFORTH on the stack and run VOCDOES
+ CALL rDODOES ; Code Field Address (CFA) of FORTH
+PFAFORTH .word VOCDOES ; Parameter Field Address (PFA) of FORTH
+BODYFORTH ; BODY of FORTH
.word lastforthword
.SWITCH THREADS
.CASE 2
.IFDEF VOCABULARY_SET
FORTHWORD "ASSEMBLER"
.ENDIF ; VOCABULARY_SET
-ASSEMBLER mDODOES ; leave BODYASSEMBLER on the stack and run VOCDOES
+ASSEMBLER CALL rDODOES ; leave BODYASSEMBLER on the stack and run VOCDOES
.word VOCDOES
BODYASSEMBLER .word lastasmword ; here is the structure created by VOCABULARY
.SWITCH THREADS
FORTHWORD "ALSO"
.ENDIF ; VOCABULARY_SET
ALSO MOV #12,W ; -- move up 6 words, 8th word of CONTEXT area must remain to 0
- MOV #CONTEXT,X ; X=src
- MOV #CONTEXT+2,Y ; Y=dst
- JMP MOVEUP ; src < dst
+ MOV #CONTEXT+12,X ; X=src
+ MOV X,Y
+ ADD #2,Y ; Y=dst
+MOVEUP SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y) ; if X=src < Y=dst copy W bytes beginning with the end
+ SUB #1,W
+ JNZ MOVEUP
+MOVEND MOV @IP+,PC
+
;X PREVIOUS -- pop last vocabulary out of context
.IFDEF VOCABULARY_SET
FORTHWORD "PREVIOUS"
.ENDIF ; VOCABULARY_SET
-PREVIOUS MOV #14,W ; move down 7 words, with recopy of the 8th word equal to 0
- MOV #CONTEXT+2,X ; X=src
+PREVIOUS MOV #14,W ; move down 7 words, first with the 8th word equal to 0
MOV #CONTEXT,Y ; Y=dst
- JMP MOVEDOWN ; src > dst
+ MOV Y,X
+ ADD #2,X ; X=src
+MOVEDOWN MOV.B @X+,0(Y) ; if X=src > Y=dst copy W bytes
+ ADD #1,Y
+ SUB #1,W
+ JNZ MOVEDOWN
+ MOV @IP+,PC
;X ONLY -- cut context list to access only first vocabulary, ex.: FORTH ONLY
.IFDEF VOCABULARY_SET
FORTHWORD "ONLY"
.ENDIF ; VOCABULARY_SET
ONLY MOV #0,&CONTEXT+2
- mNEXT
+ MOV @IP+,PC
;X DEFINITIONS -- set last context vocabulary as entry for further defining words
.IFDEF VOCABULARY_SET
FORTHWORD "DEFINITIONS"
.ENDIF ; VOCABULARY_SET
-DEFINITIONS MOV &CONTEXT,&CURRENT
- mNEXT
+DEFINITIONS MOV &CONTEXT,&CURRENT
+ MOV @IP+,PC
;-------------------------------------------------------------------------------
; IMPROVED ON/OFF AND RESET
STATE_DOES ; execution part of PWR_STATE ; sorry, doesn't restore search order pointers
.word FORTH,ONLY
.word DEFINITIONS
- FORTHtoASM ; -- BODY IP is free
+ .word $+2 ; -- BODY IP is free
MOV @TOS+,W ; -- BODY+2 W = old VOCLINK = VLK
MOV W,&LASTVOC ; restore LASTVOC
MOV @TOS,TOS ; -- OLD_DP
JNZ MARKALLVOC ; -- DP W=VLK no : loopback
.ENDCASE ; of THREADS ; -- DP
- MOV @PSP+,TOS ;
- MOV @RSP+,IP ;
- mNEXT ;
+ MOV @PSP+,TOS ;
+ MOV @RSP+,IP ;
+ MOV @IP+,PC ;
FORTHWORD "PWR_STATE" ; executed by power ON, reinitializes dictionary in state defined by PWR_HERE
-PWR_STATE mDODOES ; DOES part of MARKER : resets pointers DP, voclink and latest
+PWR_STATE CALL rDODOES ; DOES part of MARKER : resets pointers DP, voclink and latest
.word STATE_DOES ; execution vector of PWR_STATE
MARKVOC .word lastvoclink ; initialised by forthMSP430FR.asm as voclink value
MARKDP .word ROMDICT ; initialised by forthMSP430FR.asm as DP value
FORTHWORD "PWR_HERE" ; define dictionnary bound for power ON
PWR_HERE MOV &LASTVOC,&MARKVOC
MOV &DDP,&MARKDP
- mNEXT
+ MOV @IP+,PC
FORTHWORD "RST_HERE" ; define dictionnary bound for <reset>...
RST_HERE MOV &LASTVOC,&INIVOC
MOV #BODYKEY,&PFAKEY ;4 ' KEY >BODY IS KEY default KEY
.IFDEF DEFER_ACCEPT ; true if SD_CARD_LOADER
MOV #BODYACCEPT,&PFAACCEPT ;4 ' ACCEPT >BODY IS ACCEPT
- MOV #TIB_ORG,&PFACIB ;4 TIB_ORG TO CIB (Current Input Buffer)
+ MOV #TIB_ORG,&CIB_ADR ;4 TIB_ORG TO CIB (Current Input Buffer)
.ENDIF
.IFDEF SD_CARD_LOADER ; close all handles
MOV &CurrentHdl,T ;
JMP QAB_CLOSE ;
QAB_CLOSEND ;
.ENDIF ;
-; ----------------------------------;
;-----------------------------------;
; WIPE, QABORT, COLD common subrouti; <--- COLD, reset and PUC calls here
;-----------------------------------;
RST_INIT
- MOV #CPUOFF+GIE,&LPM_MODE ; set LPM0
+ MOV #LPM0+GIE,&LPM_MODE ; set LPM0
.SWITCH DTC
.CASE 1
MOV #xdocol,rDOCOL
MOV #xdodoes,rDODOES
MOV #10,&BASE ;4
MOV #32,&CAPS ; init CAPS ON
- RET
+ MOV @RSP+,PC ; RET
;-----------------------------------;
; --------------------------------------------------------------------------------
PFAWARM .word BODYWARM ; Parameter Field Address of WARM, may be redirected.
BODYWARM MOV @PC+,IP ; MOV [BODYWARM+2],IP
ENDOFWARM .word WARMTYPE ; define next step of WARM, examples: WARMTYPE, ABORT, BOOT...
- ;
;=================================================================================
; WARM 1: activates I/O: inputs and outputs are active only here (hiZ before here)
;=================================================================================
; RESET 7: test DEEP RESET before init TERMINAL I/O
;---------------------------------------------------------------------------------
RST_EVENT BIT.B #TXD,&TERM_IN ; TERM_TXD wired to GND via 4k7 resistor ?
- JNZ INITERMIO ; no
+ JNZ RST_EVENT_END ; no
XOR #-1,TOS ; yes : force DEEP_RST (RESET + WIPE)
ADD #1,TOS ; to display SAVE_SYSRSTIV as negative value
+RST_EVENT_END
;---------------------------------------------------------------------------------
; RESET 8: INIT TERMINAL I/O
;---------------------------------------------------------------------------------
-INITERMIO BIS.B #TERM_BUS,&TERM_SEL; Configure pins TXD & RXD for TERM_UART
+ BIS.B #TERM_BUS,&TERM_SEL ; Configure pins TXD & RXD for TERM_UART
+ BIS #UCRXIE,&TERM_IE ; ... then enable RX interrupt for wake up on terminal input
;---------------------------------------------------------------------------------
; RESET 9: INIT SD_Card
;---------------------------------------------------------------------------------
RST_SEL CMP #0Ah,TOS ; SYSRSTIV = security violation: access of protected areas.
JZ WIPE ; Add WIPE to this reset to do DEEP_RST
CMP #16h,TOS ; SYSRSTIV > software POR : failure or DEEP_RST request
- JHS WIPE ; yes, reset event adds WIPE to this reset to do DEEP_RST
+ JC WIPE ; yes, reset event adds WIPE to this reset to do DEEP_RST
CMP #2,TOS ; SYSRSTIV = BOR ?
- JZ PWR_STATE ; yes execute PWR_STATE, return to [BODYWARM+2]
- JHS RST_STATE ; if SYSRSTIV > BOR execute RST_STATE, return to [BODYWARM+2]
-RST_SEL_END mNEXT ; if SYSRSTIV = 1|0 return to [BODYWARM+2]
+ JZ PWR_STATE ; yes execute PWR_STATE, return to [ENDOFWARM]
+ JC RST_STATE ; if SYSRSTIV > BOR execute RST_STATE, return to [ENDOFWARM]
+RST_SEL_END MOV @IP+,PC ; if SYSRSTIV = 1|0 return to [ENDOFWARM]
;---------------------------------------------------------------------------------
; WARM 2: type message on console output (if ECHO)
;---------------------------------------------------------------------------------
WARMTYPE .word XSQUOTE ;
- .byte 6,13,1Bh,"[7m#" ; CR + cmd "reverse video" + #
+ .byte 7,13,10,27,"[7m#" ; CR + cmd "reverse video" + #
.word TYPE ;
.word DOT ; display signed SAVE_SYSRSTIV
.word XSQUOTE
.word LIT,FRAM_FULL,HERE,MINUS,UDOT
.word XSQUOTE ;
.byte 10,"bytes free" ;
- .word BRAN,QABORT_DISPLAY ;
+ .word BRAN,QAB_DISPLAY;
;Z COLD -- performs a software reset
FORTHWORD "COLD"
MOV #0A504h,&PMMCTL0 ; performs BOR (SYSRSTIV = #6)
; MOV #0A508h,&PMMCTL0 ; performs POR (SYSRSTIV = #20)
- .word WARMTYPE ; default value for ENDOFWARM
;---------------------------------------------------------------------------------
; RESET 1: Initialisation limited to FastForth usage : I/O, RAM, RTC
; all unused I/O are set as input with pullup resistor
;---------------------------------------------------------------------------------
-RESET .include "TargetInit.asm" ; include target specific FastForth init code
+RESET MOV #RSTACK,RSP ; init return stack
+ .include "TargetInit.asm"; include target specific FastForth init code
;---------------------------------------------------------------------------------
; RESET 2: init RAM
;---------------------------------------------------------------------------------
MOV #RAM_LEN,X
INITRAMLOOP SUB #2,X
MOV #0,RAM_ORG(X)
- JNZ INITRAMLOOP ; 6~ loop
+ JNZ INITRAMLOOP ; 6~ loop
;---------------------------------------------------------------------------------
; RESET 3: set all interrupt vectors
;---------------------------------------------------------------------------------
- MOV #VECT_LEN,X ;2 length of vectors area
-VECTORLOOP SUB #2,X ;1
- MOV #RESET,VECT_ORG(X) ;4 begin at end of area
- JNZ VECTORLOOP ;2 endloop when VECT_ORG(X) = VECT_ORG
- MOV #TERMINAL_INT,&TERM_VEC
+ CALL #INIT_VECT
;---------------------------------------------------------------------------------
; RESET 4: INIT TERM_UART UC
;---------------------------------------------------------------------------------
MOV &TERMBRW_RST,&TERM_BRW ; RST value in FRAM
MOV &TERMMCTLW_RST,&TERM_MCTLW ; RST value in FRAM
BIC #UCSWRST,&TERM_CTLW0 ; release from reset...
- BIS #UCRXIE,&TERM_IE ; ... then enable RX interrupt for wake up on terminal input
;-------------------------------------------------------------------------------
; RESET 5: optionnal INIT SD_CARD UC
;-------------------------------------------------------------------------------
; RESET 6: INIT FORTH machine
;---------------------------------------------------------------------------------
MOV #PSTACK,PSP ; init parameter stack
- MOV #RSTACK,RSP ; init return stack
PUSH #WARM ; return for RST_INIT
JMP RST_INIT
.IFDEF CONDCOMP
.include "forthMSP430FR_CONDCOMP.asm"
- ; compile COMPARE [THEN] [ELSE] [IF] [UNDEFINED] [DEFINED] MARKER
+ ; compile [THEN] [ELSE] [IF] [UNDEFINED] [DEFINED]
.ENDIF
;-------------------------------------------------------------------------------
;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
-
+; .include "MY_CODE.asm"
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
; example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
+
+;;Z SKIP char -- addr ; skip all occurring character 'char'
+; FORTHWORD "SKIP" ; used by assembler to parse input stream
+SKIP MOV #SOURCE_LEN,Y ;2
+ MOV TOS,W ; -- char W=char
+ MOV @Y+,X ;2 -- char W=char X=buf_length
+ MOV @Y,TOS ;2 -- Start_buf_adr W=char X=buf_length
+ ADD TOS,X ; -- Start_buf_adr W=char X=Start_buf_adr+buf_length=End_buf_addr
+ ADD &TOIN,TOS ; -- Parse_Adr W=char X=End_buf_addr
+SKIPLOOP CMP TOS,X ; -- Parse_Adr W=char X=End_buf_addr
+ JZ SKIPEND ; -- Parse_Adr if end of buffer
+ CMP.B @TOS+,W ; -- Parse_Adr does character match?
+ JZ SKIPLOOP ; -- Parse_Adr+1
+SKIPNEXT SUB #1,TOS ; -- addr
+SKIPEND MOV TOS,W ;
+ SUB @Y,W ; -- addr W=Parse_Addr-Start_buf_adr=Toin
+ MOV W,&TOIN ;
+ MOV @IP+,PC ; 4
+
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx", IP is free
; ----------------------------------------------------------------------
-;SearchARG ; separator -- n|d or abort" not found"
-;; Search ARG of "#xxxx," ; <== PARAM10
-;; Search ARG of "&xxxx," ; <== PARAM111
-;; Search ARG of "xxxx(REG)," ; <== PARAM130
-;; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM20
-;; Search ARG of ",xxxx(REG)" ; <== PARAM210
-; PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
-; ASMtoFORTH ; -- separator search word first
-; .word WORDD,FIND ; -- addr
-; .word QTBRAN,SearchARGW ; -- addr if word found
-; .word QNUMBER ;
-; .word QFBRAN,NotFound ; -- addr ABORT if not found
-;FSearchEnd .word SearchEnd ; -- value goto SearchEnd if number found
-;SearchARGW FORTHtoASM ; -- xt xt = CFA
-; MOV @TOS+,X ; -- PFA
-;QDODOES SUB #DODOES,X ; DODOES = 1284h
-; JNZ QDOCON ;
-; ADD #2,TOS ; -- BODY leave BODY address for DOES words
-; JMP SearchEnd ;
-;QDOCON CMP #1,X ; -- PFA DOCON = 1285h
-; JNZ QDOVAR ;
-; MOV @TOS,TOS ; -- cte replace PFA by [PFA] for CONSTANT and CREATE words
-; JMP SearchEnd ;
-;QDOVAR CMP #2,X ; -- PFA DOVAR = 1286h
-; JZ SearchEnd ; if DOVAR nothing to do
-; SUB #2,TOS ; -- CFA replace PFA by CFA for all other words
-;SearchEnd POPM #2,S ; POPM T,S
-; RET ;
-
SearchARG ; separator -- n|d or abort" not found"
; Search ARG of "#xxxx," ; <== PARAM10
; Search ARG of "&xxxx," ; <== PARAM111
PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
ASMtoFORTH ; -- separator search word first
.word WORDD,FIND ; -- addr
- .word QTBRAN,SearchARGW ; -- addr if word found
+ .word QTBRAN,ARGWORD ; -- addr if Word found
.word QNUMBER ;
.word QFBRAN,NotFound ; -- addr ABORT if not found
FSearchEnd .word SearchEnd ; -- value goto SearchEnd if number found
-SearchARGW FORTHtoASM ; -- xt xt = CFA
+ARGWORD .word $+2 ; -- xt xt = CFA
MOV @TOS+,X ; -- PFA
QDOVAR SUB #DOVAR,X ; DOVAR = 1286h
- JZ SearchEnd ;
- ADD #1,X ; -- PFA DOCON = 1285h
- JNZ QDODOES ;
- MOV @TOS,TOS ; -- cte
+ISDOVAR JZ SearchEnd ;
+QDOCON ADD #1,X ; -- PFA DOCON = 1285h
+ISNOTDOCON JNZ QDODOES ;
+ISDOCON MOV @TOS,TOS ; -- cte
JMP SearchEnd ;
QDODOES ADD #2,TOS ; -- BODY leave BODY address for DOES words
ADD #1,X ; DODOES = 1284h
- JZ SearchEnd ;
- SUB #4,TOS ; -- CFA
+ISDODOES JZ SearchEnd ;
+ISOTHER SUB #4,TOS ; -- CFA
SearchEnd POPM #2,S ; POPM T,S
- RET ;
+ MOV @RSP+,PC ; RET
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : search REG
; compute arg of "xxxx(REG)," ; <== PARAM130, sep=','
; compute arg of ",xxxx(REG)" ; <== PARAM210, sep=' '
-ComputeARGParenREG ; sep -- Rn
+ComputeARGpREG ; sep -- Rn
MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
CALL #SearchARG ; -- xxxx aborted if not found
MOV &DDP,X
ASMtoFORTH ; search xx of Rxx
.word WORDD,QNUMBER ;
.word QFBRAN,NOTaREG ; -- xxxx if Not a Number
- FORTHtoASM ; -- Rn number is found
+ .word $+2 ; -- Rn number is found
ADD #2,RSP ; remove >IN
CMP #16,TOS ; -- Rn
- JHS BOUNDERROR ; abort if Rn out of bounds
- JLO SearchEnd ; -- Rn Z=0 ==> found
+ JC BOUNDERROR ; abort if Rn out of bounds
+ JNC SearchEnd ; -- Rn
-NOTaREG FORTHtoASM ; -- addr Z=1
+NOTaREG .word $+2 ; -- addr Z=1
MOV @RSP+,&TOIN ; -- addr restore >IN
JMP SearchEnd ; -- addr Z=1 ==> not a register
; sep is comma for src and space for dst .
PARAM1 mDOCOL ; -- sep OPCODES types I|V sep = ',' OPCODES types II|VI sep = ' '
.word FBLANK,SKIP ; -- sep addr
- FORTHtoASM ; -- sep addr
+ .word $+2 ; -- sep addr
MOV #0,S ; -- sep addr reset OPCODE
MOV &DDP,T ; -- sep addr HERE --> OPCODEADR (opcode is preset to its address !)
ADD #2,&DDP ; -- sep addr cell allot for opcode
; endcase of all "REG"|"@REG"|"@REG+" <== PARAM124
PARAMENDOF MOV @PSP+,TOS ; --
MOV @RSP+,IP ;
- mNEXT ; -- S=OPCODE,T=OPCODEADR
+ MOV @IP+,PC ; -- S=OPCODE,T=OPCODEADR
; ----------------------------------;
PARAM11 CMP.B #'&',W ; -- sep
JNE PARAM12
JNZ PARAM123 ; -- 000R REG of "REG," found, S=OPCODE=0
; case of "xxxx(REG)," ; -- c-addr "REG," not found
PARAM130 ADD #0010h,S ; AS=0b01 for indexing address
- CALL #ComputeARGparenREG; compile xxxx and search REG of "(REG)"
+ CALL #ComputeARGpREG ; compile xxxx and search REG of "(REG)"
JMP PARAM122 ;
; ----------------------------------------------------------------------
; ----------------------------------;
PARAM2 mDOCOL ; parse input buffer until BL and compute this 2th operand
.word FBLANK,SKIP ; skip space(s) between "arg1," and "arg2" if any; use not S,T.
- FORTHtoASM ; -- c-addr search for '&' of "&xxxx
+ .word $+2 ; -- c-addr search for '&' of "&xxxx
CMP.B #'&',0(TOS) ;
MOV #20h,TOS ; -- ' ' as WORD separator to find xxxx of ",&xxxx"
JNE PARAM21 ; '&' not found
JNZ PARAM124 ; -- 000R REG of ",REG" found
; case of ",xxxx(REG) ; -- addr REG not found
PARAM210 ADD #0080h,S ; set AD=1
- CALL #ComputeARGparenREG; compile argument xxxx and search REG of "(REG)"
+ CALL #ComputeARGpREG ; compile argument xxxx and search REG of "(REG)"
JMP PARAM124 ; -- 000R REG of "(REG) found
; ----------------------------------------------------------------------
TYPE1DOES .word lit,',',PARAM1 ; -- BODYDOES
.word PARAM2 ; -- BODYDOES char separator (BL) included in PARAM2
- FORTHtoASM ;
+ .word $+2 ;
MAKEOPCODE MOV T,X ; -- opcode X= OPCODEADR to compile opcode
MOV @TOS,TOS ; -- opcode part of instruction
BIS S,TOS ; -- opcode opcode is complete
JMP StoreTOS ; -- then EXIT
asmword "MOV"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,4000h
asmword "MOV.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,4040h
asmword "ADD"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,5000h
asmword "ADD.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,5040h
asmword "ADDC"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,6000h
asmword "ADDC.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,6040h
asmword "SUBC"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,7000h
asmword "SUBC.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,7040h
asmword "SUB"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,8000h
asmword "SUB.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,8040h
asmword "CMP"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,9000h
asmword "CMP.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,9040h
asmword "DADD"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0A000h
asmword "DADD.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0A040h
asmword "BIT"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0B000h
asmword "BIT.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0B040h
asmword "BIC"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0C000h
asmword "BIC.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0C040h
asmword "BIS"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0D000h
asmword "BIS.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0D040h
asmword "XOR"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0E000h
asmword "XOR.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0E040h
asmword "AND"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0F000h
asmword "AND.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0F040h
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
TYPE2DOES .word FBLANK,PARAM1 ; -- BODYDOES
- FORTHtoASM ;
+ .word $+2 ;
MOV S,W ;
AND #0070h,S ; keep B/W & AS infos in OPCODE
SWPB W ; (REG org --> REG dst)
JMP MAKEOPCODE ; -- then end
asmword "RRC" ; Rotate Right through Carry ( word)
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1000h
asmword "RRC.B" ; Rotate Right through Carry ( byte)
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1040h
asmword "SWPB" ; Swap bytes
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1080h
asmword "RRA"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1100h
asmword "RRA.B"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1140h
asmword "SXT"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1180h
asmword "PUSH"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1200h
asmword "PUSH.B"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1240h
asmword "CALL"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1280h
BOUNDERRWM1 ADD #1,W ; <== RRAM|RRUM|RRCM|RLAM error
; RxxM syntax: RxxM #n,REG with 0 < n < 5
TYPE3DOES .word FBLANK,SKIP ; skip spaces if any
- FORTHtoASM ; -- BODYDOES c-addr
+ .word $+2 ; -- BODYDOES c-addr
ADD #1,&TOIN ; skip "#"
MOV #',',TOS ; -- BODYDOES ","
ASMtoFORTH
.word WORDD,QNUMBER
.word QFBRAN,NotFound ; ABORT
.word PARAM3 ; -- BODYDOES 0x000N S=OPCODE = 0x000R
- FORTHtoASM
+ .word $+2
MOV TOS,W ; -- BODYDOES n W = n
MOV @PSP+,TOS ; -- BODYDOES
SUB #1,W ; W = n floored to 0
POPMINSTRU SUB W,S ; to make POPM opcode, compute first REG to POP; TI is complicated....
PUSHMINSTRU SUB W,Y ; Y=REG-(n-1)
CMP #16,Y
- JHS BOUNDERRWM1 ; JC=JHS (U>=)
+ JC BOUNDERRWM1 ; JC=JHS (U>=)
RLAM #4,W ; W = n << 4
JMP BIS_ASMTYPE ; BODYDOES --
RxxMINSTRU CMP #4,W ;
- JHS BOUNDERRWM1 ; JC=JHS (U>=)
+ JC BOUNDERRWM1 ; JC=JHS (U>=)
SWPB W ; -- BODYDOES W = n << 8
RLAM #2,W ; W = N << 10
JMP BIS_ASMTYPE ; BODYDOES --
asmword "RRCM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0050h
asmword "RRAM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0150h
asmword "RLAM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0250h
asmword "RRUM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0350h
asmword "PUSHM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,1500h
asmword "POPM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,1700h
; ----------------------------------------------------------------------
; OPCODE(code) for TYPE JMP = 0x3Cxx + (offset AND 3FF)
asmword "S>=" ; if >= assertion (opposite of jump if < )
- mDOCON
+ CALL rDOCON
.word 3800h
asmword "S<" ; if < assertion
- mDOCON
+ CALL rDOCON
.word 3400h
asmword "0>=" ; if 0>= assertion ; use only with IF UNTIL WHILE !
- mDOCON
+ CALL rDOCON
.word 3000h
- asmword "0<" ; jump if 0< ; use only with ?JMP ?GOTO !
- mDOCON
+ asmword "0<" ; jump if 0< ; use only with ?GOTO !
+ CALL rDOCON
.word 3000h
asmword "U<" ; if U< assertion
- mDOCON
+ CALL rDOCON
.word 2C00h
asmword "U>=" ; if U>= assertion
- mDOCON
+ CALL rDOCON
.word 2800h
asmword "0<>" ; if <>0 assertion
- mDOCON
+ CALL rDOCON
.word 2400h
asmword "0=" ; if =0 assertion
- mDOCON
+ CALL rDOCON
.word 2000h
;ASM IF OPCODE -- @OPCODE1
MOV TOS,0(W) ; compile incomplete opcode
ADD #2,&DDP
MOV W,TOS
- mNEXT
+ MOV @IP+,PC
;ASM THEN @OPCODE -- resolve forward branch
asmword "THEN"
CMP #512,W
JC BOUNDERRORW ; (JHS) unsigned branch if u> 511
BIS W,0(Y) ; -- [@OPCODE]=OPCODE completed
- mNEXT
+ MOV @IP+,PC
;C ELSE @OPCODE1 -- @OPCODE2 branch for IF..ELSE
asmword "ELSE"
MOV W,0(PSP) ; -- @OPCODE2 @OPCODE1
JMP ASM_THEN ; -- @OPCODE2
-;C BEGIN -- @BEGIN same as FORTH counterpart
-
;C UNTIL @BEGIN OPCODE -- resolve conditional backward branch
asmword "UNTIL"
ASM_UNTIL MOV @PSP+,W ; -- OPCODE W=@BEGIN
BIS W,Y ; -- Y=OPCODE (completed)
MOV Y,0(X)
ADD #2,&DDP
- mNEXT
+ MOV @IP+,PC
;X AGAIN @BEGIN -- uncond'l backward branch
; unconditional backward branch
; FWx at the beginning of a line can resolve only one previous GOTO|?GOTO FWx.
; BWx at the beginning of a line can be resolved by any subsequent GOTO|?GOTO BWx.
-BACKWDOES FORTHtoASM
+;BACKWDOES FORTHtoASM
+; MOV @RSP+,IP
+; MOV @TOS,TOS
+; MOV TOS,Y ; Y = ASMBWx
+; MOV @PSP+,TOS ;
+; MOV @Y,W ; W = [ASMBWx]
+; CMP #8,&TOIN ; are we colon 8 or more ?
+;BACKWUSE JHS ASM_UNTIL1 ; yes, use this label
+;BACKWSET MOV &DDP,0(Y) ; no, set LABEL = DP
+; mNEXT
+
+;; backward label 1
+; asmword "BW1"
+; mdodoes
+; .word BACKWDOES
+; .word ASMBW1 ; in RAM
+
+BACKWDOES .word $+2
MOV @RSP+,IP ;
MOV TOS,Y ; -- PFA Y = ASMBWx addr
MOV @PSP+,TOS ; --
MOV @Y,W ; W = LABEL
CMP #8,&TOIN ; are we colon 8 or more ?
-BACKWUSE JHS ASM_UNTIL1 ; yes, use this label
+BACKWUSE JC ASM_UNTIL1 ; yes, use this label
BACKWSET MOV &DDP,0(Y) ; no, set LABEL = DP
- mNEXT
+ MOV @IP+,PC
; backward label 1
asmword "BW1"
- mdodoes
+ CALL rDODOES
.word BACKWDOES
.word 0
; backward label 2
asmword "BW2"
- mdodoes
+ CALL rDODOES
.word BACKWDOES
.word 0
; backward label 3
asmword "BW3"
- mdodoes
+ CALL rDODOES
.word BACKWDOES
.word 0
-FORWDOES FORTHtoASM
+;FORWDOES FORTHtoASM
+; MOV @RSP+,IP
+; MOV &DDP,W ;
+; MOV @TOS,TOS
+; MOV @TOS,Y ; Y=[ASMFWx]
+; CMP #8,&TOIN ; are we colon 8 or more ?
+;FORWUSE JLO ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
+;FORWSET MOV @PSP+,0(W) ; -- PFA compile incomplete opcode
+; ADD #2,&DDP ; increment DDP
+; MOV W,0(TOS) ; store @OPCODE into ASMFWx
+; MOV @PSP+,TOS ; --
+; mNEXT
+
+;; forward label 1
+; asmword "FW1"
+; mdodoes
+; .word FORWARDDOES
+; .word ASMFW1 ; in RAM
+
+FORWDOES .word $+2
MOV @RSP+,IP
MOV &DDP,W ;
- MOV @TOS,Y ; -- PFA Y=[ASMFWx]
+ MOV @TOS,Y ; -- PFA Y=[BODY]=ASMFWx
CMP #8,&TOIN ; are we colon 8 or more ?
-FORWUSE JLO ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
+FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
FORWSET MOV @PSP+,0(W) ; yes compile incomplete opcode
ADD #2,&DDP ; increment DDP
MOV W,0(TOS) ; store @OPCODE into ASMFWx
MOV @PSP+,TOS ; --
- mNEXT
+ MOV @IP+,PC
; forward label 1
asmword "FW1"
- mdodoes
- .word FORWDOES
- .word 0
+ CALL rDODOES ; CFA
+ .word FORWDOES ;
+ .word 0 ; BODY
; forward label 2
asmword "FW2"
- mdodoes
+ CALL rDODOES
.word FORWDOES
.word 0
; forward label 3
asmword "FW3"
- mdodoes
+ CALL rDODOES
.word FORWDOES
.word 0
+;ASM GOTO <label> -- unconditionnal branch to label
+ asmword "GOTO"
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV #3C00h,TOS ; -- JMP_OPCODE
+GOTONEXT mDOCOL
+ .word TICK ; -- OPCODE CFA<label>
+ .word EXECUTE,EXIT
+
;ASM <cond> ?GOTO <label> OPCODE -- conditionnal branch to label
asmword "?GOTO"
INVJMP CMP #3000h,TOS ; invert code jump process
BIT #1000h,TOS ; 3xxxh case ?
JZ GOTONEXT ; no
XOR #0800h,TOS ; complementary action for JL<-->JGE
-GOTONEXT mDOCOL
- .word TICK ; -- OPCODE CFA<label>
- .word EXECUTE,EXIT
-
-;ASM GOTO <label> -- unconditionnal branch to label
- asmword "GOTO"
- SUB #2,PSP
- MOV TOS,0(PSP)
- MOV #3C00h,TOS ; asmcode JMP
JMP GOTONEXT
-
-
-
- .IFDEF EXTENDED_MEM
-
; ===============================================================
; to allow data access beyond $FFFF
; ===============================================================
+ .IFDEF EXTENDED_MEM
+
; MOVA (#$x.xxxx|&$x.xxxx|$.xxxx(Rs)|Rs|@Rs|@Rs+ , &|Rd|$.xxxx(Rd))
; ADDA (#$x.xxxx|Rs , Rd)
; CMPA (#$x.xxxx|Rs , Rd)
;-----------------------------------;
ACMS1 mDOCOL ; -- BODYDOES ','
.word FBLANK,SKIP ; -- BODYDOES ',' addr
- FORTHtoASM ;
+ .word $+2 ;
MOV.B @TOS,X ; X=first char of opcode string
MOV @PSP+,TOS ; -- BODYDOES ','
MOV @PSP+,S ; -- ',' S=BODYDOES
;-----------------------------------;
ACMS2 mDOCOL ; -- OPCODE_addr
.word FBLANK,SKIP ; -- OPCODE_addr addr
- FORTHtoASM ;
+ .word $+2 ;
MOV @PSP+,T ; -- addr T=OPCODE_addr
MOV @T,S ; S=opcode
MOV.B @TOS,X ; -- addr X=first char of string instruction
.word DROP,EXIT
asmword "MOVA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00C0h
asmword "CMPA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00D0h
asmword "ADDA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00E0h
asmword "SUBA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00F0h
+; --------------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER: OPCODE TYPE III bis: CALLA (without extended word)
+; --------------------------------------------------------------------------------
+; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers with dot)
+; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers with dot)
+; --------------------------------------------------------------------------------
+; may be usefull to access ROM libraries beyond $FFFF
+; --------------------------------------------------------------------------------
-;; perhaps you also want to call ROM lib routines beyond $FFFF....
-;; --------------------------------------------------------------------------------
-;; DTCforthMSP430FR5xxx ASSEMBLER: OPCODE TYPE III bis: CALLA (without extended word)
-;; --------------------------------------------------------------------------------
-;; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
-;; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-;; --------------------------------------------------------------------------------
-;
-; asmword "CALLA"
-; mDOCOL
-; .word FBLANK,SKIP ; -- addr
-; FORTHtoASM
-; MOV &DDP,T ; T = DDP
-; ADD #2,&DDP ; make room for opcode
-; MOV.B @TOS,TOS ; -- char First char of opcode
-;CALLA0 MOV #134h,S ; 134h<<4 = 1340h = opcode for CALLA Rn
-; CMP.B #'R',TOS
-; JNZ CALLA1
-;CALLA01 MOV.B #' ',TOS ;
-;CALLA02 CALL #SearchREG ; -- Rn
-;CALLA03 RLAM #4,S ; (opcode>>4)<<4 = opcode
-; BIS TOS,S ; update opcode
-; MOV S,0(T) ; store opcode
-; MOV @PSP+,TOS
-; mSEMI
-;;-----------------------------------;
-;CALLA1 ADD #2,S ; 136h<<4 = opcode for CALLA @REG
-; CMP.B #'@',TOS ; -- char Search @REG
-; JNZ CALLA2 ;
-; ADD #1,&TOIN ; skip '@'
-; MOV.B #' ',TOS ; -- ' '
-; CALL #SearchREG ;
-; JNZ CALLA03 ; if REG found, update opcode
-;;-----------------------------------;
-; ADD #1,S ; 137h<<4 = opcode for CALLA @REG+
-; MOV #'+',TOS ; -- '+'
-; JMP CALLA02 ;
-;;-----------------------------------;
-;CALLA2 ADD #2,&DDP ; make room for xxxx of #$x.xxxx|&$x.xxxx|$0.xxxx(REG)
-; CMP.B #'#',TOS ;
-; JNZ CALLA3
-; MOV #13Bh,S ; 13Bh<<4 = opcode for CALLA #$x.xxxx
-;CALLA21 ADD #1,&TOIN ; skip '#'|'&'
-;CALLA22 CALL #SearchARG ; -- Lo Hi
-; MOV @PSP+,2(T) ; -- Hi store #$xxxx|&$xxxx
-; JMP CALLA03 ; update opcode with $x. and store opcode
-;;-----------------------------------;
-;CALLA3 CMP.B #'&',TOS
-; JNZ CALLA4 ;
-; ADD #2,S ; 138h<<4 = opcode for CALLA &$x.xxxx
-; JMP CALLA21
-;;-----------------------------------;
-;CALLA4 MOV.B #'(',TOS ; -- "("
-; SUB #1,S ; 135h<<4 = opcode for CALLA $0.xxxx(REG)
-;CALLA41 CALL #SearchARG ; -- Lo Hi
-; MOV @PSP+,2(T) ; -- Hi store $xxxx
-; MOV #')',TOS ; -- ')'
-; JMP CALLA02 ; search Rn and update opcode
+ asmword "CALLA"
+ mDOCOL
+ .word FBLANK,SKIP ; -- addr
+ .word $+2
+ MOV &DDP,T ; T = DDP
+ ADD #2,&DDP ; make room for opcode
+ MOV.B @TOS,TOS ; -- char First char of opcode
+CALLA0 MOV #134h,S ; 134h<<4 = 1340h = opcode for CALLA Rn
+ CMP.B #'R',TOS
+ JNZ CALLA1
+CALLA01 MOV.B #' ',TOS ;
+CALLA02 CALL #SearchREG ; -- Rn
+CALLA03 RLAM #4,S ; (opcode>>4)<<4 = opcode
+ BIS TOS,S ; update opcode
+ MOV S,0(T) ; store opcode
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+;-----------------------------------;
+CALLA1 ADD #2,S ; 136h<<4 = opcode for CALLA @REG
+ CMP.B #'@',TOS ; -- char Search @REG
+ JNZ CALLA2 ;
+ ADD #1,&TOIN ; skip '@'
+ MOV.B #' ',TOS ; -- ' '
+ CALL #SearchREG ;
+ JNZ CALLA03 ; if REG found, update opcode
+;-----------------------------------;
+ ADD #1,S ; 137h<<4 = opcode for CALLA @REG+
+ MOV #'+',TOS ; -- '+'
+ JMP CALLA02 ;
+;-----------------------------------;
+CALLA2 ADD #2,&DDP ; make room for xxxx of #$x.xxxx|&$x.xxxx|$0.xxxx(REG)
+ CMP.B #'#',TOS ;
+ JNZ CALLA3
+ MOV #13Bh,S ; 13Bh<<4 = opcode for CALLA #$x.xxxx
+CALLA21 ADD #1,&TOIN ; skip '#'|'&'
+CALLA22 CALL #SearchARG ; -- Lo Hi
+ MOV @PSP+,2(T) ; -- Hi store #$xxxx|&$xxxx
+ JMP CALLA03 ; update opcode with $x. and store opcode
+;-----------------------------------;
+CALLA3 CMP.B #'&',TOS
+ JNZ CALLA4 ;
+ ADD #2,S ; 138h<<4 = opcode for CALLA &$x.xxxx
+ JMP CALLA21
+;-----------------------------------;
+CALLA4 MOV.B #'(',TOS ; -- "("
+ SUB #1,S ; 135h<<4 = opcode for CALLA $0.xxxx(REG)
+CALLA41 CALL #SearchARG ; -- Lo Hi
+ MOV @PSP+,2(T) ; -- Hi store $xxxx
+ MOV #')',TOS ; -- ')'
+ JMP CALLA02 ; search Rn and update opcode
-
.ENDIF ; EXTENDED_MEM
-;COMPARE ( c-addr1 u1 c-addr2 u2 -- n )
-;https://forth-standard.org/standard/string/COMPARE
-;Compare the string specified by c-addr1 u1 to the string specified by c-addr2 u2.
-;The strings are compared, beginning at the given addresses, character by character,
-;up to the length of the shorter string or until a difference is found.
-;If the two strings are identical, n is zero.
-;If the two strings are identical up to the length of the shorter string,
-; n is minus-one (-1) if u1 is less than u2 and one (1) otherwise.
-;If the two strings are not identical up to the length of the shorter string,
-; n is minus-one (-1) if the first non-matching character in the string specified by c-addr1 u1
-; has a lesser numeric value than the corresponding character in the string specified by c-addr2 u2 and one (1) otherwise.
- FORTHWORD "COMPARE"
-COMPARE
+; https://forth-standard.org/standard/tools/BracketTHEN
+; [THEN]
+ FORTHWORDIMM "[THEN]" ; do nothing
+ MOV @IP+,PC
+
+; ; https://forth-standard.org/standard/string/COMPARE
+; ; COMPARE ( c-addr1 u1 c-addr2 u2 -- n )
+; ;Compare the string specified by c-addr1 u1 to the string specified by c-addr2 u2.
+; ;The strings are compared, beginning at the given addresses, character by character,
+; ;up to the length of the shorter string or until a difference is found.
+; ;If the two strings are identical, n is zero.
+; ;If the two strings are identical up to the length of the shorter string,
+; ; n is minus-one (-1) if u1 is less than u2 and one (1) otherwise.
+; ;If the two strings are not identical up to the length of the shorter string,
+; ; n is minus-one (-1) if the first non-matching character in the string specified by c-addr1 u1
+; ; has a lesser numeric value than the corresponding character in the string specified by c-addr2 u2 and one (1) otherwise.
+; FORTHWORD "COMPARE"
+; COMPARE
+; MOV TOS,S ;1 S = u2
+; MOV @PSP+,Y ;2 Y = addr2
+; MOV @PSP+,T ;2 T = u1
+; MOV @PSP+,X ;2 X = addr1
+; COMPAR1 MOV T,TOS ;1
+; ADD S,TOS ;1 TOS = u1+u2
+; JZ COMPEQUAL ;2 u1=u2=0, Z=1, end of all successfull comparisons
+; SUB #1,T ;1
+; JN COMPLESS ;2 u1<u2 if u1 < 0
+; SUB #1,S ;1
+; JN COMPGREATER ;2 u1>u2 if u2 < 0
+; ADD #1,X ;1
+; CMP.B @Y+,-1(X) ;4 char1-char2
+; JZ COMPAR1 ;2 char1=char2 17~ loop
+; JC COMPGREATER ;2 char1>char2
+; COMPLESS ; char1<char2
+; MOV #-1,TOS ;1 Z=0
+; MOV @IP+,PC ;4
+; COMPGREATER
+; MOV #1,TOS ;1 Z=0
+; COMPEQUAL
+; MOV @IP+,PC ;4 20 + 5 words def'n
+
+; ; https://forth-standard.org/standard/tools/BracketELSE
+; ; [ELSE] a few (smaller and faster) definition
+; ;Compilation:
+; ;Perform the execution semantics given below.
+; ;Execution:
+; ;( "<spaces>name ..." -- )
+; ;Skipping leading spaces, parse and discard space-delimited words from the parse area,
+; ;including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
+; ;until the word [THEN] has been parsed and discarded.
+; ;If the parse area becomes exhausted, it is refilled as with REFILL.
+; FORTHWORDIMM "[ELSE]" ; or [IF] if isnogood...
+; BRACKETELSE
+; mDOCOL
+; .word lit,0
+; BRACKETELSE0
+; .word ONEPLUS ;
+; BRACKETELSE1 ;
+; .word FBLANK,WORDD,COUNT ; -- addr u
+; .word DUP,QFBRAN,BRACKETELSE5 ; u = 0 if end of line --> refill buffer then loop back
+; .word TWODUP ;
+; .word XSQUOTE ;
+; .byte 6,"[THEN]" ;
+; .word COMPARE ;
+; .word QTBRAN,BRACKETELSE2 ; if bad comparaison, jump for next comparaison
+; .word TWODROP,ONEMINUS ; 2DROP, decrement count
+; .word QDUP,QTBRAN,BRACKETELSE1; loop back if count <> 0
+; .word EXIT ; else exit
+; BRACKETELSE2 ;
+; .word TWODUP ;
+; .word XSQUOTE ;
+; .byte 6,"[ELSE]" ;
+; .word COMPARE ;
+; .word QTBRAN,BRACKETELSE3 ; if bad comparaison, jump for next comparaison
+; .word TWODROP,ONEMINUS ; 2DROP, decrement count
+; .word QDUP,QTBRAN,BRACKETELSE0; if count <> 0 restore old count with loop back increment
+; .word EXIT ; else exit
+; BRACKETELSE3 ;
+; .word XSQUOTE ;
+; .byte 4,"[IF]" ;
+; .word COMPARE ;
+; .word QTBRAN,BRACKETELSE1 ; if bad comparaison, loop back
+; .word BRAN,BRACKETELSE0 ; else increment loop back
+; BRACKETELSE5 ;
+; .word TWODROP ;
+; ;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+; ; OPTION ; plus 5 words option
+; ;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
+; .word XSQUOTE ;
+; .byte 5,13,10,"ko " ;
+; .word TYPE ; CR+LF ." ko " to show false branch of conditionnal compilation
+; ;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+; .word REFILL ; REFILL Input Buffer with next line
+; .word SETIB ; SET Input Buffer pointers SOURCE_LEN, SOURCE_ORG and clear >IN
+; .word BRAN,BRACKETELSE1 ; then loop back 54 words without options
+
+BADCOMPBR ; branch if string compare is false; [COMPARE,QTBRAN] replacement
MOV TOS,S ;1 S = u2
MOV @PSP+,Y ;2 Y = addr2
MOV @PSP+,T ;2 T = u1
MOV @PSP+,X ;2 X = addr1
COMPAR1 MOV T,TOS ;1
ADD S,TOS ;1 TOS = u1+u2
- JZ COMPEQUAL ;2 u1=u2=0: end of all successfull comparisons
+ JZ COMPEQU ;2 u1=u2=0, Z=1, end of all successfull comparisons
SUB #1,T ;1
- JN COMPLESS ;2 u1<u2 if u1 < 0
+ JN COMPDIF ;2 u1<u2 if u1 < 0
SUB #1,S ;1
- JN COMPGREATER ;2 u1>u2 if u2 < 0
+ JN COMPDIF ;2 u1>u2 if u2 < 0
ADD #1,X ;1
CMP.B @Y+,-1(X) ;4 char1-char2
JZ COMPAR1 ;2 char1=char2 17~ loop
- JHS COMPGREATER ;2 char1>char2
-COMPLESS ; char1<char2
- MOV #-1,TOS ;1
+COMPDIF MOV @IP,IP ; take branch
+CMPEND MOV @PSP+,TOS
MOV @IP+,PC ;4
-COMPGREATER
- MOV #1,TOS ;1
-COMPEQUAL
- MOV @IP+,PC ;4 20 words
-;[THEN]
-;https://forth-standard.org/standard/tools/BracketTHEN
- FORTHWORDIMM "[THEN]" ; do nothing
- mNEXT
-
-;;[ELSE]
-;;https://forth-standard.org/standard/tools/BracketELSE
-;;Compilation:
-;;Perform the execution semantics given below.
-;;Execution:
-;;( "<spaces>name ..." -- )
-;;Skipping leading spaces, parse and discard space-delimited words from the parse area,
-;;including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
-;;until the word [THEN] has been parsed and discarded.
-;;If the parse area becomes exhausted, it is refilled as with REFILL.
-; FORTHWORDIMM "[ELSE]"
-;BRACKETELSE
-; mDOCOL
-; .word lit,1 ; 1
-;BRACKETELSE1 ; BEGIN
-;BRACKETELSE2 ; BEGIN
-; .word FBLANK,WORDD,COUNT ; BL WORD COUNT
-; .word DUP ; DUP
-; .word QFBRAN,BRACKETELSE10 ; WHILE
-; .word OVER,OVER ; 2DUP
-; .word XSQUOTE ; S" [IF]"
-; .byte 4,"[IF]" ;
-; .word COMPARE ; COMPARE
-; .word QTBRAN,BRACKETELSE3 ; 0= IF
-; .word TWODROP,ONEPLUS ; 2DROP 1+
-; .word BRAN,BRACKETELSE8 ; (ENDIF)
-;BRACKETELSE3 ; ELSE
-; .word OVER,OVER ; 2DUP
-; .word XSQUOTE ; S" [ELSE]"
-; .byte 6,"[ELSE]" ;
-; .word COMPARE ; COMPARE
-; .word QTBRAN,BRACKETELSE5 ; 0= IF
-; .word TWODROP,ONEMINUS ; 2DROP 1-
-; .word DUP,QFBRAN,BRACKETELSE4 ; DUP IF
-; .word ONEPLUS ; 1+
-;BRACKETELSE4 ; THEN
-; .word BRAN,BRACKETELSE7 ; (ENDIF)
-;BRACKETELSE5 ; ELSE
-; .word XSQUOTE ; S" [THEN]"
-; .byte 6,"[THEN]" ;
-; .word COMPARE ; COMPARE
-; .word QTBRAN,BRACKETELSE6 ; 0= IF
-; .word ONEMINUS ; 1-
-;BRACKETELSE6 ; THEN
-;BRACKETELSE7 ; THEN
-;BRACKETELSE8 ; THEN
-; .word QDUP ; ?DUP
-; .word QTBRAN,BRACKETELSE9 ; 0= IF
-; .word EXIT ; EXIT
-;BRACKETELSE9 ; THEN
-; .word BRAN,BRACKETELSE2 ; REPEAT
-;BRACKETELSE10 ;
-; .word TWODROP ; 2DROP
-; .word XSQUOTE ;
-; .byte 5,13,10,"ko " ;
-; .word TYPE ; CR+LF ." ko " to show false branch of conditionnal compilation
-; .word REFILL ; REFILL
-; .word SETIB ; SET Input Buffer pointers SOURCE_LEN, SOURCE_ORG and clear >IN
-; .word BRAN,BRACKETELSE1 ; AGAIN 65 words
+TOQTB ; [TWODROP,ONEMINUS,?DUP,QTBRAN] replacement
+ ADD #2,PSP ;1 -- savedTOS TOS
+ SUB #1,0(PSP) ;3 -- savedTOS-1 TOS
+ JNZ COMPDIF ;2 -- cnt take branch
+ ADD #2,PSP ;1 --
+COMPEQU ADD #2,IP ; skip branch
+ JMP CMPEND ; 25 words
-;
-;[ELSE] a few (smaller and faster) definition
-;https://forth-standard.org/standard/tools/BracketELSE
+; https://forth-standard.org/standard/tools/BracketELSE
+; [ELSE] a few (smaller and faster) definition
;Compilation:
;Perform the execution semantics given below.
;Execution:
;including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
;until the word [THEN] has been parsed and discarded.
;If the parse area becomes exhausted, it is refilled as with REFILL.
- FORTHWORDIMM "[ELSE]" ; or [IF] isnogood...
+ FORTHWORDIMM "[ELSE]" ; or [IF] if isnogood...
BRACKETELSE
mDOCOL
.word lit,0
BRACKETELSE0
.word ONEPLUS ;
BRACKETELSE1 ;
- .word FBLANK,WORDD,COUNT ;
- .word DUP,QFBRAN,BRACKETELSE5 ; if end of line refill buffer then loop back
+ .word FBLANK,WORDD,COUNT ; -- addr u
+ .word DUP,QFBRAN,BRACKETELSE5 ; u = 0 if end of line --> refill buffer then loop back
.word TWODUP ;
.word XSQUOTE ;
.byte 6,"[THEN]" ;
- .word COMPARE ;
- .word QTBRAN,BRACKETELSE2 ; if bad comparaison, jump for next comparaison
- .word TWODROP,ONEMINUS ; 2DROP, decrement count
- .word QDUP,QTBRAN,BRACKETELSE1; loop back if count <> 0
- .word EXIT ; else exit
+ .word BADCOMPBR,BRACKETELSE2 ; if bad string comparaison, jump for next comparaison
+ .word TOQTB,BRACKETELSE1 ; 2DROP, count-1, loop back if count <> 0, else DROP
+ .word EXIT ; then exit
BRACKETELSE2 ;
.word TWODUP ;
.word XSQUOTE ;
.byte 6,"[ELSE]" ;
- .word COMPARE ;
- .word QTBRAN,BRACKETELSE3 ; if bad comparaison, jump for next comparaison
- .word TWODROP,ONEMINUS ; 2DROP, decrement count
- .word QDUP,QTBRAN,BRACKETELSE0; if count <> 0 restore old count with loop back increment
- .word EXIT ; else exit
+ .word BADCOMPBR,BRACKETELSE3 ; if bad string comparaison, jump for next comparaison
+ .word TOQTB,BRACKETELSE0 ; 2DROP, count-1, loop back with count+1 if count <> 0, else DROP
+ .word EXIT ; then exit
BRACKETELSE3 ;
.word XSQUOTE ;
.byte 4,"[IF]" ;
- .word COMPARE ;
- .word QTBRAN,BRACKETELSE1 ; if bad comparaison, loop back
- .word BRAN,BRACKETELSE0 ; else increment loop back
+ .word BADCOMPBR,BRACKETELSE1 ; if bad string comparaison, loop back
+ .word BRAN,BRACKETELSE0 ; else loop back with count+1
BRACKETELSE5 ;
.word TWODROP ;
+;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+; OPTION ; plus 5 words option
+;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
.word XSQUOTE ;
.byte 5,13,10,"ko " ;
.word TYPE ; CR+LF ." ko " to show false branch of conditionnal compilation
- .word REFILL ; REFILL Input Buffer
+;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+ .word REFILL ; REFILL Input Buffer with next line
.word SETIB ; SET Input Buffer pointers SOURCE_LEN, SOURCE_ORG and clear >IN
- .word BRAN,BRACKETELSE1 ; then loop back 58 words
-
+ .word BRAN,BRACKETELSE1 ; then loop back 44 words without options
-;[IF]
-;https://forth-standard.org/standard/tools/BracketIF
+; https://forth-standard.org/standard/tools/BracketIF
+; [IF]
;Compilation:
;Perform the execution semantics given below.
;Execution: ;( flag | flag "<spaces>name ..." -- )
CMP #0,TOS
MOV @PSP+,TOS
JZ BRACKETELSE
- mNEXT
+ MOV @IP+,PC
-;[DEFINED]
-;https://forth-standard.org/standard/tools/BracketDEFINED
+; https://forth-standard.org/standard/core/NIP
+; NIP x1 x2 -- x2 Drop the first item below the top of stack
+ .IFNDEF NIP
+NIP ADD #2,PSP ; 1
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+; https://forth-standard.org/standard/tools/BracketDEFINED
+; [DEFINED]
;Compilation:
;Perform the execution semantics given below.
;Execution:
;otherwise return a false flag. [DEFINED] is an immediate word.
FORTHWORDIMM "[DEFINED]"
- mDOCOL
+DEFINED mDOCOL
.word FBLANK,WORDD,FIND,NIP,EXIT
-;[UNDEFINED]
-;https://forth-standard.org/standard/tools/BracketUNDEFINED
+; https://forth-standard.org/standard/tools/BracketUNDEFINED
+; [UNDEFINED]
;Compilation:
;Perform the execution semantics given below.
;Execution: ( "<spaces>name ..." -- flag )
;otherwise return a true flag.
FORTHWORDIMM "[UNDEFINED]"
mDOCOL
- .word FBLANK,WORDD,FIND,NIP,ZEROEQUAL,EXIT
-
-;; CORE EXT MARKER
-;;https://forth-standard.org/standard/core/MARKER
-;;( "<spaces>name" -- )
-;;Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
-;;with the execution semantics defined below.
-
-;;name Execution: ( -- )
-;;Restore all dictionary allocation and search order pointers to the state they had just prior to the
-;;definition of name. Remove the definition of name and all subsequent definitions. Restoration
-;;of any structures still existing that could refer to deleted definitions or deallocated data space is
-;;not necessarily provided. No other contextual information such as numeric base is affected
-
-MARKER_DOES FORTHtoASM ; execution part
- MOV @RSP+,IP ; -- PFA
- MOV @TOS+,&INIVOC ; set VOC_LINK value for RST_STATE
- MOV @TOS,&INIDP ; set DP value for RST_STATE
- MOV @PSP+,TOS ; --
- MOV #RST_STATE,PC ; execute RST_STATE, PWR_STATE then STATE_DOES
-
- FORTHWORD "MARKER" ; definition part
- CALL #HEADER ;4 W = DP+4
- MOV #DODOES,-4(W) ;4 CFA = DODOES
- MOV #MARKER_DOES,-2(W) ;4 PFA = MARKER_DOES
- MOV &LASTVOC,0(W) ;5 [BODY] = VOCLINK to be restored
- SUB #2,Y ;1 Y = LFA
- MOV Y,2(W) ;3 [BODY+2] = LFA = DP to be restored
- ADD #4,&DDP ;3
- MOV #GOOD_CSP,PC
+ .word DEFINED
+ .word $+2
+ MOV @RSP+,IP
+ MOV #ZEROEQUAL,PC
; example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
+;;Z SKIP char -- addr ; skip all occurring character 'char'
+; FORTHWORD "SKIP" ; used by assembler to parse input stream
+SKIP MOV #SOURCE_LEN,Y ;2
+ MOV TOS,W ; -- char W=char
+ MOV @Y+,X ;2 -- char W=char X=buf_length
+ MOV @Y,TOS ;2 -- Start_buf_adr W=char X=buf_length
+ ADD TOS,X ; -- Start_buf_adr W=char X=Start_buf_adr+buf_length=End_buf_addr
+ ADD &TOIN,TOS ; -- Parse_Adr W=char X=End_buf_addr
+SKIPLOOP CMP TOS,X ; -- Parse_Adr W=char X=End_buf_addr
+ JZ SKIPEND ; -- Parse_Adr if end of buffer
+ CMP.B @TOS+,W ; -- Parse_Adr does character match?
+ JZ SKIPLOOP ; -- Parse_Adr+1
+SKIPNEXT SUB #1,TOS ; -- addr
+SKIPEND MOV TOS,W ;
+ SUB @Y,W ; -- addr W=Parse_Addr-Start_buf_adr=Toin
+ MOV W,&TOIN ;
+ MOV @IP+,PC ; 4
+
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx", IP is free
; ----------------------------------------------------------------------
-;SearchARG ; separator -- n|d or abort" not found"
-;; Search ARG of "#xxxx," ; <== PARAM10
-;; Search ARG of "&xxxx," ; <== PARAM111
-;; Search ARG of "xxxx(REG)," ; <== PARAM130
-;; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM20
-;; Search ARG of ",xxxx(REG)" ; <== PARAM210
-; PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
-; ASMtoFORTH ; -- separator search word first
-; .word WORDD,FIND ; -- addr
-; .word QTBRAN,SearchARGW ; -- addr if word found
-; .word QNUMBER ;
-; .word QFBRAN,NotFound ; -- addr ABORT if not found
-;FSearchEnd .word SearchEnd ; -- value goto SearchEnd if number found
-;SearchARGW FORTHtoASM ; -- xt xt = CFA
-; MOV @TOS+,X ; -- PFA
-;QDODOES SUB #DODOES,X ; DODOES = 1284h
-; JNZ QDOCON ;
-; ADD #2,TOS ; -- BODY leave BODY address for DOES words
-; JMP SearchEnd ;
-;QDOCON CMP #1,X ; -- PFA DOCON = 1285h
-; JNZ QDOVAR ;
-; MOV @TOS,TOS ; -- cte replace PFA by [PFA] for CONSTANT and CREATE words
-; JMP SearchEnd ;
-;QDOVAR CMP #2,X ; -- PFA DOVAR = 1286h
-; JZ SearchEnd ; if DOVAR nothing to do
-; SUB #2,TOS ; -- CFA replace PFA by CFA for all other words
-;SearchEnd POPM #2,S ; POPM T,S
-; RET ;
-
SearchARG ; separator -- n|d or abort" not found"
; Search ARG of "#xxxx," ; <== PARAM10
; Search ARG of "&xxxx," ; <== PARAM111
PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
ASMtoFORTH ; -- separator search word first
.word WORDD,FIND ; -- addr
- .word QTBRAN,SearchARGW ; -- addr if word found
+ .word QTBRAN,ARGWORD ; -- addr if Word found
.word QNUMBER ;
.word QFBRAN,NotFound ; -- addr ABORT if not found
FSearchEnd .word SearchEnd ; -- value goto SearchEnd if number found
-SearchARGW FORTHtoASM ; -- xt xt = CFA
+ARGWORD .word $+2 ; -- xt xt = CFA
MOV @TOS+,X ; -- PFA
QDOVAR SUB #DOVAR,X ; DOVAR = 1286h
- JZ SearchEnd ;
- ADD #1,X ; -- PFA DOCON = 1285h
- JNZ QDODOES ;
- MOV @TOS,TOS ; -- cte
+ISDOVAR JZ SearchEnd ;
+QDOCON ADD #1,X ; -- PFA DOCON = 1285h
+ISNOTDOCON JNZ QDODOES ;
+ISDOCON MOV @TOS,TOS ; -- cte
JMP SearchEnd ;
QDODOES ADD #2,TOS ; -- BODY leave BODY address for DOES words
ADD #1,X ; DODOES = 1284h
- JZ SearchEnd ;
- SUB #4,TOS ; -- CFA
+ISDODOES JZ SearchEnd ;
+ISOTHER SUB #4,TOS ; -- CFA
SearchEnd POPM #2,S ; POPM T,S
- RET ;
+ MOV @RSP+,PC ; RET
; Arg_Double_to_single conversion needed only for OPCODE type V|VI, 2th pass.
ARGD2S BIT #UF9,SR ; -- Lo Hi
JZ ARGD2SEND
MOV @PSP+,TOS ; -- Lo skip hi
-ARGD2SEND RET
+ARGD2SEND MOV @RSP+,PC ;
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : search REG
ASMtoFORTH ; search xx of Rxx
.word WORDD,QNUMBER ;
.word QFBRAN,NOTaREG ; -- xxxx if Not a Number
- FORTHtoASM ; -- Rn number is found
+ .word $+2 ; -- Rn number is found
ADD #2,RSP ; remove >IN
CMP #16,TOS ; -- Rn
- JHS BOUNDERROR ; abort if Rn out of bounds
- JLO SearchEnd ; -- Rn Z=0 ==> found
+ JC BOUNDERROR ; abort if Rn out of bounds
+ JNC SearchEnd ; -- Rn Z=0 ==> found
-NOTaREG FORTHtoASM ; -- addr Z=1
+NOTaREG .word $+2 ; -- addr Z=1
MOV @RSP+,&TOIN ; -- addr restore >IN
JMP SearchEnd ; -- addr Z=1 ==> not a register
; sep is comma for src and space for dst .
PARAM1 mDOCOL ; -- sep OPCODES types I|V sep = ',' OPCODES types II|VI sep = ' '
.word FBLANK,SKIP ; -- sep addr
- FORTHtoASM ; -- sep addr
+ .word $+2 ; -- sep addr
MOV #0,S ; -- sep addr reset OPCODE
MOV &DDP,T ; -- sep addr HERE --> OPCODEADR (opcode is preset to its address !)
ADD #2,&DDP ; -- sep addr cell allot for opcode
; endcase of all "REG"|"@REG"|"@REG+" <== PARAM124
PARAMENDOF MOV @PSP+,TOS ; --
MOV @RSP+,IP ;
- mNEXT ; -- S=OPCODE,T=OPCODEADR
+ MOV @IP+,PC ; -- S=OPCODE,T=OPCODEADR
; ----------------------------------;
PARAM11 CMP.B #'&',W ; -- sep
JNE PARAM12
; ----------------------------------;
PARAM2 mDOCOL ; parse input buffer until BL and compute this 2th operand
.word FBLANK,SKIP ; skip space(s) between "arg1," and "arg2" if any; use not S,T.
- FORTHtoASM ; -- c-addr search for '&' of "&xxxx
+ .word $+2 ; -- c-addr search for '&' of "&xxxx
CMP.B #'&',0(TOS) ;
MOV #20h,TOS ; -- ' ' as WORD separator to find xxxx of ",&xxxx"
JNE PARAM21 ; '&' not found
; TYPE1DOES -- BODYDOES search and compute PARAM1 & PARAM2 as src and dst operands then compile instruction
TYPE1DOES .word lit,',',PARAM1 ; -- BODYDOES
.word PARAM2 ; -- BODYDOES char separator (BL) included in PARAM2
- FORTHtoASM ;
+ .word $+2 ;
MAKEOPCODE MOV T,X ; -- opcode X= OPCODEADR to compile opcode
MOV @TOS,TOS ; -- opcode part of instruction
BIS S,TOS ; -- opcode opcode is complete
JMP StoreTOS ; -- then EXIT
asmword "MOV"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,4000h
asmword "MOV.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,4040h
asmword "ADD"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,5000h
asmword "ADD.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,5040h
asmword "ADDC"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,6000h
asmword "ADDC.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,6040h
asmword "SUBC"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,7000h
asmword "SUBC.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,7040h
asmword "SUB"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,8000h
asmword "SUB.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,8040h
asmword "CMP"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,9000h
asmword "CMP.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,9040h
asmword "DADD"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0A000h
asmword "DADD.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0A040h
asmword "BIT"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0B000h
asmword "BIT.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0B040h
asmword "BIC"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0C000h
asmword "BIC.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0C040h
asmword "BIS"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0D000h
asmword "BIS.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0D040h
asmword "XOR"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0E000h
asmword "XOR.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0E040h
asmword "AND"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0F000h
asmword "AND.B"
- mDODOES
+ CALL rDODOES
.word TYPE1DOES,0F040h
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
TYPE2DOES .word FBLANK,PARAM1 ; -- BODYDOES
- FORTHtoASM ;
+ .word $+2 ;
MOV S,W ;
AND #0070h,S ; keep B/W & AS infos in OPCODE
SWPB W ; (REG org --> REG dst)
JMP MAKEOPCODE ; -- then end
asmword "RRC" ; Rotate Right through Carry ( word)
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1000h
asmword "RRC.B" ; Rotate Right through Carry ( byte)
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1040h
asmword "SWPB" ; Swap bytes
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1080h
asmword "RRA"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1100h
asmword "RRA.B"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1140h
asmword "SXT"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1180h
asmword "PUSH"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1200h
asmword "PUSH.B"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1240h
asmword "CALL"
- mDODOES
+ CALL rDODOES
.word TYPE2DOES,1280h
BOUNDERRWM1 ADD #1,W ; <== RRAM|RRUM|RRCM|RLAM error
; RxxM syntax: RxxM #n,REG with 0 < n < 5
TYPE3DOES .word FBLANK,SKIP ; skip spaces if any
- FORTHtoASM ; -- BODYDOES c-addr
+ .word $+2 ; -- BODYDOES c-addr
ADD #1,&TOIN ; skip "#"
MOV #',',TOS ; -- BODYDOES ","
ASMtoFORTH
.word WORDD,QNUMBER
.word QFBRAN,NotFound ; ABORT
.word PARAM3 ; -- BODYDOES 0x000N S=OPCODE = 0x000R
- FORTHtoASM
+ .word $+2
MOV TOS,W ; -- BODYDOES n W = n
MOV @PSP+,TOS ; -- BODYDOES
SUB #1,W ; W = n floored to 0
POPMINSTRU SUB W,S ; to make POPM opcode, compute first REG to POP; TI is complicated....
PUSHMINSTRU SUB W,Y ; Y=REG-(n-1)
CMP #16,Y
- JHS BOUNDERRWM1 ; JC=JHS (U>=)
+ JC BOUNDERRWM1 ; JC=JHS (U>=)
RLAM #4,W ; W = n << 4
JMP BIS_ASMTYPE ; BODYDOES --
RxxMINSTRU CMP #4,W ;
- JHS BOUNDERRWM1 ; JC=JHS (U>=)
+ JC BOUNDERRWM1 ; JC=JHS (U>=)
SWPB W ; -- BODYDOES W = n << 8
RLAM #2,W ; W = N << 10
JMP BIS_ASMTYPE ; BODYDOES --
asmword "RRCM.A"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0040h
asmword "RRCM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0050h
asmword "RRAM.A"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0140h
asmword "RRAM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0150h
asmword "RLAM.A"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0240h
asmword "RLAM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0250h
asmword "RRUM.A"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0340h
asmword "RRUM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,0350h
asmword "PUSHM.A"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,1400h
asmword "PUSHM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,1500h
asmword "POPM.A"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,1600h
asmword "POPM"
- mDODOES
+ CALL rDODOES
.word TYPE3DOES,1700h
; ----------------------------------------------------------------------
; OPCODE(code) for TYPE JMP = 0x3Cxx + (offset AND 3FF)
asmword "S>=" ; if >= assertion (opposite of jump if < )
- mDOCON
+ CALL rDOCON
.word 3800h
asmword "S<" ; if < assertion
- mDOCON
+ CALL rDOCON
.word 3400h
asmword "0>=" ; if 0>= assertion ; use only with IF UNTIL WHILE !
- mDOCON
+ CALL rDOCON
.word 3000h
asmword "0<" ; jump if 0< ; use only with ?JMP ?GOTO !
- mDOCON
+ CALL rDOCON
.word 3000h
asmword "U<" ; if U< assertion
- mDOCON
+ CALL rDOCON
.word 2C00h
asmword "U>=" ; if U>= assertion
- mDOCON
+ CALL rDOCON
.word 2800h
asmword "0<>" ; if <>0 assertion
- mDOCON
+ CALL rDOCON
.word 2400h
asmword "0=" ; if =0 assertion
- mDOCON
+ CALL rDOCON
.word 2000h
;ASM IF OPCODE -- @OPCODE1
MOV TOS,0(W) ; compile incomplete opcode
ADD #2,&DDP
MOV W,TOS
- mNEXT
+ MOV @IP+,PC
;ASM THEN @OPCODE -- resolve forward branch
asmword "THEN"
CMP #512,W
JC BOUNDERRORW ; (JHS) unsigned branch if u> 511
BIS W,0(Y) ; -- [@OPCODE]=OPCODE completed
- mNEXT
+ MOV @IP+,PC
;C ELSE @OPCODE1 -- @OPCODE2 branch for IF..ELSE
asmword "ELSE"
MOV W,0(PSP) ; -- @OPCODE2 @OPCODE1
JMP ASM_THEN ; -- @OPCODE2
-;C BEGIN -- @BEGIN same as FORTH counterpart
-
;C UNTIL @BEGIN OPCODE -- resolve conditional backward branch
asmword "UNTIL"
ASM_UNTIL MOV @PSP+,W ; -- OPCODE W=@BEGIN
BIS W,Y ; -- Y=OPCODE (completed)
MOV Y,0(X)
ADD #2,&DDP
- mNEXT
+ MOV @IP+,PC
;X AGAIN @BEGIN -- uncond'l backward branch
; unconditional backward branch
; FWx at the beginning of a line can resolve only one previous GOTO|?GOTO FWx.
; BWx at the beginning of a line can be resolved by any subsequent GOTO|?GOTO BWx.
-BACKWDOES FORTHtoASM
+BACKWDOES .word $+2
MOV @RSP+,IP ;
MOV TOS,Y ; -- PFA Y = ASMBWx addr
MOV @PSP+,TOS ; --
MOV @Y,W ; W = LABEL
CMP #8,&TOIN ; are we colon 8 or more ?
-BACKWUSE JHS ASM_UNTIL1 ; yes, use this label
+BACKWUSE JC ASM_UNTIL1 ; yes, use this label
BACKWSET MOV &DDP,0(Y) ; no, set LABEL = DP
- mNEXT
+ MOV @IP+,PC
; backward label 1
asmword "BW1"
- mdodoes
+ CALL rDODOES
.word BACKWDOES
.word 0
; backward label 2
asmword "BW2"
- mdodoes
+ CALL rDODOES
.word BACKWDOES
.word 0
; backward label 3
asmword "BW3"
- mdodoes
+ CALL rDODOES
.word BACKWDOES
.word 0
-FORWDOES FORTHtoASM
+FORWDOES .word $+2
MOV @RSP+,IP
MOV &DDP,W ;
MOV @TOS,Y ; -- PFA Y=[ASMFWx]
CMP #8,&TOIN ; are we colon 8 or more ?
-FORWUSE JLO ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
+FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
FORWSET MOV @PSP+,0(W) ; yes compile incomplete opcode
ADD #2,&DDP ; increment DDP
MOV W,0(TOS) ; store @OPCODE into ASMFWx
MOV @PSP+,TOS ; --
- mNEXT
+ MOV @IP+,PC
; forward label 1
asmword "FW1"
- mdodoes
+ CALL rDODOES
.word FORWDOES
.word 0
; forward label 2
asmword "FW2"
- mdodoes
+ CALL rDODOES
.word FORWDOES
.word 0
; forward label 3
asmword "FW3"
- mdodoes
+ CALL rDODOES
.word FORWDOES
.word 0
;-----------------------------------;
ACMS1 mDOCOL ; -- BODYDOES ','
.word FBLANK,SKIP ; -- BODYDOES ',' addr
- FORTHtoASM ;
+ .word $+2 ;
MOV.B @TOS,X ; X=first char of opcode string
MOV @PSP+,TOS ; -- BODYDOES ','
MOV @PSP+,S ; -- ',' S=BODYDOES
ACMS103 BIS S,TOS ; update opcode with src|dst
MOV TOS,0(T) ; save opcode
MOV T,TOS ; -- OPCODE_addr
- mSEMI ;
+ MOV @RSP+,IP
+ MOV @IP+,PC ;
;-----------------------------------;
ACMS11 CMP.B #'#',X ; -- ',' X=addr
JNE MOVA12 ;
;-----------------------------------;
ACMS2 mDOCOL ; -- OPCODE_addr
.word FBLANK,SKIP ; -- OPCODE_addr addr
- FORTHtoASM ;
+ .word $+2 ;
MOV @PSP+,T ; -- addr T=OPCODE_addr
MOV @T,S ; S=opcode
MOV.B @TOS,X ; -- addr X=first char of string instruction
.word DROP,EXIT
asmword "MOVA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00C0h
asmword "CMPA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00D0h
asmword "ADDA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00E0h
asmword "SUBA"
- mDODOES
+ CALL rDODOES
.word TYPE4DOES,00F0h
; --------------------------------------------------------------------------------
asmword "CALLA"
mDOCOL
.word FBLANK,SKIP ; -- addr
- FORTHtoASM
+ .word $+2
MOV &DDP,T ; T = DDP
ADD #2,&DDP ; make room for opcode
MOV.B @TOS,TOS ; -- char First char of opcode
BIS TOS,S ; update opcode
MOV S,0(T) ; store opcode
MOV @PSP+,TOS
- mSEMI
+ MOV @RSP+,IP
+ MOV @IP+,PC
;-----------------------------------;
CALLA1 ADD #2,S ; 136h<<4 = opcode for CALLA @REG
CMP.B #'@',TOS ; -- char Search @REG
PRMX1 mDOCOL ; -- sep OPCODES type V|VI separator = ','|' '
.word FBLANK,SKIP ; -- sep addr
- FORTHtoASM ;
+ .word $+2 ;
MOV.B @TOS,X ; -- sep addr X= first char of opcode string
MOV @PSP+,TOS ; -- sep
MOV #1800h,S ; init S=Extended word
JNZ PRMX11 ;
PRMX101 CALL #SearchREG ; -- Rn Rn of REG; call SearchREG only to update >IN
PRMX102 MOV S,TOS ; -- EW update Extended word
-PRMX103 mSEMI ; -- Ext_Word
+PRMX103 MOV @RSP+,IP
+ MOV @IP+,PC ; -- Ext_Word
;-----------------------------------;
PRMX11 MOV #0,&RPT_WORD ; clear RPT
CMP.B #'#',X ; -- sep
;-----------------------------------;
PRMX2 mDOCOL ; -- Extended_Word
.word FBLANK,SKIP ; -- Extended_Word addr
- FORTHtoASM ;
+ .word $+2 ;
MOV @PSP+,S ; -- addr S=Extended_Word
MOV.B @TOS,X ; -- addr X=first char of code instruction
MOV #' ',TOS ; -- ' '
CALL #SearchARG ; -- Lo Hi search x.xxxx of x.xxxx(REG)
JMP PRMX213
+;; UPDATE_eXtendedWord
+;;-----------------------------------;
+;UPDATE_XW ; BODYDOES Extended_Word -- BODYDOES+2 >IN R--
+; MOV &DDP,T ;
+; ADD #2,&DDP ; make room for extended word
+; MOV TOS,S ; S = Extended_Word
+; MOV @PSP+,TOS ; -- BODYDOES
+; BIS &RPT_WORD,S ; update Extended_word with RPT_WORD
+; MOV #0,&RPT_WORD ; clear RPT before next instruction
+; BIS @TOS+,S ; -- BODYDOES+2 update Extended_word with [BODYDOES] = A/L bit
+; MOV S,0(T) ; store extended word
+; MOV @RSP+,&TOIN ; >IN R-- restore >IN at the start of instruction string
+; MOV @IP+,PC ;
+;;-----------------------------------;
+
+;-----------------------------------;
; UPDATE_eXtendedWord
;-----------------------------------;
-UPDATE_XW ; BODYDOES Extended_Word -- BODYDOES+2 >IN R--
+UPDATE_XW ; BODYDOES >IN Extended_Word -- BODYDOES+2
+ MOV @PSP+,&TOIN ; -- BODYDOES EW restore >IN at the start of instruction string
MOV &DDP,T ;
ADD #2,&DDP ; make room for extended word
MOV TOS,S ; S = Extended_Word
- MOV @PSP+,TOS ; -- BODYDOES
+ MOV @PSP+,TOS ;
BIS &RPT_WORD,S ; update Extended_word with RPT_WORD
MOV #0,&RPT_WORD ; clear RPT before next instruction
BIS @TOS+,S ; -- BODYDOES+2 update Extended_word with [BODYDOES] = A/L bit
MOV S,0(T) ; store extended word
- MOV @RSP+,&TOIN ; >IN R-- restore >IN at the start of instruction string
- mNEXT ;
+ MOV @IP+,PC ;
;-----------------------------------;
; --------------------------------------------------------------------------------
; all numeric arguments must be written as DOUBLE numbers (including a point) : $x.xxxx
TYPE5DOES ; -- BODYDOES
- .word LIT,TOIN,FETCH,TOR ; R-- >IN save >IN for 2th pass
- .word lit,',' ; -- BODYDOES ',' char separator for PRMX1
- .word PRMX1,PRMX2 ; -- BODYDOES Extended_Word
+; .word LIT,TOIN,FETCH,TOR ; R-- >IN save >IN for 2th pass
+; .word lit,',' ; -- BODYDOES ',' char separator for PRMX1
+; .word PRMX1,PRMX2 ; -- BODYDOES Extended_Word
+; .word UPDATE_XW ; -- BODYDOES+2 >IN is restored ready for 2th pass
+; .word BRAN,TYPE1DOES ; -- BODYDOES+2 2th pass: completes instruction with opcode = [BODYDOES+2]
+ .word LIT,TOIN,FETCH ; -- BODYDOES >IN
+ .word lit,',' ; -- BODYDOES >IN ',' char separator for PRMX1
+ .word PRMX1,PRMX2 ; -- BODYDOES >IN Extended_Word
.word UPDATE_XW ; -- BODYDOES+2 >IN is restored ready for 2th pass
.word BRAN,TYPE1DOES ; -- BODYDOES+2 2th pass: completes instruction with opcode = [BODYDOES+2]
asmword "MOVX"
- mDODOES
- .word TYPE5DOES,40h,4000h ; [PFADOES]=TYPE5DOES, [BODYDOES]=A/L bit, [BODYDOES+2]=OPCODE,
+ CALL rDODOES
+ .word TYPE5DOES ; [PFADOES] = TYPE5DOES
+ .word 40h ; [BODYDOES] = A/L bit
+ .word 4000h ; [BODYDOES+2] = OPCODE
asmword "MOVX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,4040h
asmword "MOVX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,4040h
asmword "ADDX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,5000h
asmword "ADDX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,5040h
asmword "ADDX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,5040h
asmword "ADDCX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,6000h
asmword "ADDCX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,6040h
asmword "ADDCX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,6040h
asmword "SUBCX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,7000h
asmword "SUBCX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,7040h
asmword "SUBCX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,7040h
asmword "SUBX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,8000h
asmword "SUBX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,8040h
asmword "SUBX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,8040h
asmword "CMPX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,9000h
asmword "CMPX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,9040h
asmword "CMPX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,9040h
asmword "DADDX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0A000h
asmword "DADDX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0A040h
asmword "DADDX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0A040h
asmword "BITX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0B000h
asmword "BITX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0B040h
asmword "BITX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0B040h
asmword "BICX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0C000h
asmword "BICX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0C040h
asmword "BICX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0C040h
asmword "BISX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0D000h
asmword "BISX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0D040h
asmword "BISX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0D040h
asmword "XORX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0E000h
asmword "XORX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0E040h
asmword "XORX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0E040h
asmword "ANDX"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0F000h
asmword "ANDX.A"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0F040h
asmword "ANDX.B"
- mDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0F040h
; --------------------------------------------------------------------------------
; all numeric arguments must be written as DOUBLE numbers (including a point) : $x.xxxx
TYPE6DOES ; -- BODYDOES
- .word LIT,TOIN,FETCH,TOR ; save >IN for 2th pass
- .word FBLANK ; -- BODYDOES ' '
- .word PRMX1 ; -- BODYDOES Extended_Word
+; .word LIT,TOIN,FETCH,TOR ; R-- >IN save >IN for 2th pass
+; .word FBLANK ; -- BODYDOES ' '
+; .word PRMX1 ; -- BODYDOES Extended_Word
+; .word UPDATE_XW ; -- BODYDOES+2
+; .word BRAN,TYPE2DOES ; -- BODYDOES+2 pass 2: completes instruction with opcode = [BODYDOES+2]
+ .word LIT,TOIN,FETCH ; -- BODYDOES >IN
+ .word FBLANK ; -- BODYDOES >IN ' '
+ .word PRMX1 ; -- BODYDOES >IN Extended_Word
.word UPDATE_XW ; -- BODYDOES+2
.word BRAN,TYPE2DOES ; -- BODYDOES+2 pass 2: completes instruction with opcode = [BODYDOES+2]
asmword "RRCX" ; ZC=0; RRCX Rx,Rx may be repeated by prefix RPT #n|Rn
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1000h
asmword "RRCX.A" ; ZC=0; RRCX.A Rx may be repeated by prefix RPT #n|Rn
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1040h
asmword "RRCX.B" ; ZC=0; RRCX.B Rx may be repeated by prefix RPT #n|Rn
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1040h
asmword "RRUX" ; ZC=1; RRUX Rx may be repeated by prefix RPT #n|Rn
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,140h,1000h
asmword "RRUX.A" ; ZC=1; RRUX.A Rx may be repeated by prefix RPT #n|Rn
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,100h,1040h
asmword "RRUX.B" ; ZC=1; RRUX.B Rx may be repeated by prefix RPT #n|Rn
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,140h,1040h
asmword "SWPBX"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1080h
asmword "SWPBX.A"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1080h
asmword "RRAX"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1100h
asmword "RRAX.A"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1140h
asmword "RRAX.B"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1140h
asmword "SXTX"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1180h
asmword "SXTX.A"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1180h
asmword "PUSHX"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1200h
asmword "PUSHX.A"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1240h
asmword "PUSHX.B"
- mDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1240h
; ----------------------------------------------------------------------
asmword "RPT" ; RPT #n | RPT Rn repeat n | [Rn]+1 times modulo 16
mdocol
.word FBLANK,SKIP
- FORTHtoASM ; -- addr
+ .word $+2 ; -- addr
MOV @TOS,X ; X=char
MOV.B #' ',TOS ; -- ' ' as separator
CMP.B #'R',X
AND #0Fh,TOS ; -- $000x
RPT2 MOV TOS,&RPT_WORD
MOV @PSP+,TOS
- mSEMI
+ MOV @RSP+,IP
+ MOV @IP+,PC
; 2- the char loop time,
; 3- the time between sending XON/RTS_low and clearing UCRXIFG on first received char,
; everything must be done to reduce these times, taking into account the necessity of switching to SLEEP (LPMx mode).
+
+ FORTHWORD "ACCEPT" ; HalfDuplexACCEPT
; ----------------------------------;
; (ACCEPT) part I: prepare TERMINAL_INT ;
; ----------------------------------;
; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
AKEYREAD1 ; <--- XON RET address 2 ; first emergency: anticipate XOFF on CR as soon as possible
CMP.B T,Y ;1 char = CR ?
- JZ RXOFF ;2 then RET to ENDACCEPT
+ JZ RXOFF ;2 then RET to ENDACCEPT
; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;+ 4 to send RXOFF
; stops the first stopwatch ;= first bottleneck (empty line process), best case result: 20~ + LPMx wake_up time..
; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^; ...or 11~ in case of empty line
CMP.B S,Y ;1 printable char ?
- JHS ASTORETEST ;2 yes
+ JC ASTORETEST ;2 yes
CMP.B #8,Y ; char = BS ?
JNE WAITaKEY ; case of other control chars
; ----------------------------------;
; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
; stops the 2th stopwatch ; best case result: 23~ ==> 434 kBds/MHz
; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+
; ----------------------------------;
-ENDACCEPT ; <--- XOFF return address
-; ----------------------------------;
- MOV #LPM0+GIE,&LPM_MODE ; reset LPM_MODE to default mode LPM0 for next line of input stream
-; ----------------------------------;
- .IFDEF MEMORYPROTECT
- .IFDEF FR2_FAMILY ;
- MOV #0A500h,&SYSCFG0 ; enable write MAIN + INFO
- .ELSE
- MOV #0A500h,&MPUCTL0 ; clear MPU (Memory Protection Unit) enable bit
- .ENDIF ;
- .ENDIF
+ENDACCEPT ; --- Org Ptr r-- ACCEPT_ret
; ----------------------------------;
CMP #0,&LINE ; if LINE <> 0...
JZ ACCEPTEND ;
ADD #1,&LINE ; ...increment LINE
-ACCEPTEND SUB @PSP+,TOS ; Org Ptr -- len'
- MOV @RSP+,IP ; 2 and continue with INTERPRET with GIE=0.
- ; So FORTH machine is protected against any interrupt...
- mNEXT ; ...until next falling down to LPMx mode of (ACCEPT) part1,
+ACCEPTEND SUB @PSP+,TOS ; -- len'
+ MOV @RSP+,IP ; 2 return to INTERPRET with GIE=0: FORTH is protected against any interrupt...
+; ----------------------------------;
+ MOV #LPM0+GIE,&LPM_MODE ; reset LPM_MODE to default mode LPM0 for next line of input stream
+; ----------------------------------;
+ MOV @IP+,PC ; ...until next falling down to LPMx mode of (ACCEPT) part1,
; **********************************; i.e. when the FORTH interpreter has no more to do.
; ------------------------------------------------------------------------------
; TERMINAL I/O, output part
; ------------------------------------------------------------------------------
-
;https://forth-standard.org/standard/core/EMIT
;C EMIT c -- output character to the output device ; deferred word
- FORTHWORD "EMIT"
+ FORTHWORD "EMIT" ; HalfDuplexEMIT
EMIT MOV @PC+,PC ;3 15~
PFAEMIT .word BODYEMIT ; Parameter Field Address (PFA) of EMIT, with its default value
BODYEMIT MOV TOS,Y ; 1
.ENDIF
YEMIT .word 4882h ; hi7/4~ lo:12/4~ send/send_not echo to terminal
.word TERM_TXBUF ; 3 MOV Y,&TERMTXBUF
- mNEXT ; 4
-
+ MOV @IP+,PC ;
; ----------------------------------;
SDA_YEMIT_RET ;
; ----------------------------------;
- FORTHtoASM ;
+ .word $+2 ;
SUB #2,IP ; 1 restore YEMIT return
; ----------------------------------;
SDA_ComputeChar ; -- CIB cnt
; ----------------------------------;
CMP T,S ; 1 src_ptr >= src_len ?
- JHS SDA_GetFileNextSector ; 2 yes
+ JC SDA_GetFileNextSector ; 2 yes
MOV.B SD_BUF(S),Y ; 3 Y = char
ADD #1,S ; 1 increment input BufferPtr
CMP.B #32,Y ; 2 ascii printable char ?
- JHS SDA_MoveChar ; 2 yes
+ JC SDA_MoveChar ; 2 yes
CMP.B #10,Y ; 2 control char = 'LF' ?
JNZ SDA_ComputeChar ; 2 no
; ----------------------------------;
; ----------------------------------;
ClusterToFAT1sectWofstY ;WXY Input : Cluster ; Output: W = FATsector, Y = FAToffset
; ----------------------------------;
- MOV.B &ClusterL+1,W ;3 W = ClusterLoHI
- MOV.B &ClusterL,Y ;3 Y = ClusterLoLo
- CMP #1,&FATtype ;3 FAT16?
- JZ CTF1S_end ;2 yes
+ MOV.B &ClusterL+1,W ;3 W = ClusterLoHI
+ MOV.B &ClusterL,Y ;3 Y = ClusterLoLo
+ CMP #1,&FATtype ;3 FAT16?
+ JZ CTF1S_end ;2 yes
; input : Cluster n, max = 7FFFFF (SDcard up to 256 GB)
; ClusterLoLo*4 = displacement in 512 bytes sector ==> FAToffset
; ClusterHiLo&ClusterLoHi +C << 1 = relative FATsector + orgFAT1 ==> FATsector
; ----------------------------------;
- MOV.B &ClusterH,X ; X = 0:ClusterHiLo
- SWPB X ; X = ClusterHiLo:0
- ADD X,W ; W = ClusterHiLo:ClusterLoHi
+ MOV.B &ClusterH,X ; X = 0:ClusterHiLo
+ SWPB X ; X = ClusterHiLo:0
+ ADD X,W ; W = ClusterHiLo:ClusterLoHi
; ----------------------------------;
- SWPB Y ; Y = ClusterLoLo:0
- ADD Y,Y ;1 Y = ClusterLoLo:0 << 1 + carry for FATsector
- ADDC W,W ; W = ClusterHiLo:ClusterLoHi << 1 = ClusterHiLo:ClusterL / 128
- SWPB Y
+ SWPB Y ; Y = ClusterLoLo:0
+ ADD Y,Y ;1 Y = ClusterLoLo:0 << 1 + carry for FATsector
+ ADDC W,W ; W = ClusterHiLo:ClusterLoHi << 1 = ClusterHiLo:ClusterL / 128
+ SWPB Y
CTF1S_end
- ADD Y,Y ; Y = 0:ClusterLoLo << 1
- RET ;4
+ ADD Y,Y ; Y = 0:ClusterLoLo << 1
+ MOV @RSP+,PC ;4
; ----------------------------------;
.ENDIF ; MPY
; ----------------------------------;
CCFS_RET ;
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
; ----------------------------------;
ComputeHDLcurrentSector ; input: currentHandle, output: Cluster, Sector
; ----------------------------------;
- MOV HDLL_CurClust(T),&ClusterL;
- MOV HDLH_CurClust(T),&ClusterH;
- CALL #ComputeClusFrstSect ;
- MOV.B HDLB_ClustOfst(T),W ;
- ADD W,&SectorL ;
- ADDC #0,&SectorH ;
- RET ;
+ MOV HDLL_CurClust(T),&ClusterL ;
+ MOV HDLH_CurClust(T),&ClusterH ;
+ CALL #ComputeClusFrstSect ;
+ MOV.B HDLB_ClustOfst(T),W ;
+ ADD W,&SectorL ;
+ ADDC #0,&SectorH ;
+ MOV @RSP+,PC ;
; ----------------------------------;
SUB #1,X ;
JNZ ParseEntryNameSpacesLoop;
PENSL_END ;
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
SUBC #0,HDLH_CurSize(T) ;
ADD.B #1,HDLB_ClustOfst(T) ; current cluster offset is incremented
CMP.B &SecPerClus,HDLB_ClustOfst(T) ; Cluster Bound reached ?
- JLO SetBufLenAndLoadCurSector ; no
+ JNC SetBufLenAndLoadCurSector ; no
; ----------------------------------;
;SearchNextCluster ; yes
; ----------------------------------;
CMP #0,HDLH_CurSize(T) ; CurSize > 65535 ?
JNZ LoadHDLcurrentSector ; yes
CMP HDLL_CurSize(T),&BufferPtr ; BufferPtr >= CurSize ? (BufferPtr = 0 or see RestorePreviousLoadedBuffer)
- JHS CloseHandleT ; yes
+ JC CloseHandleT ; yes
CMP #bytsPerSec,HDLL_CurSize(T) ; CurSize >= 512 ?
- JHS LoadHDLcurrentSector ; yes
+ JC LoadHDLcurrentSector ; yes
MOV HDLL_CurSize(T),&BufferLen ; no: adjust BufferLen
; ==================================;
LoadHDLcurrentSector ; <=== OPEN_WRITE_APPEND
; ----------------------------------; input : Cluster, EntryOfst
GetFreeHandle ;STWXY init handle(HDLL_DIRsect,HDLW_DIRofst,HDLL_FirstClus = HDLL_CurClust,HDLL_CurSize)
; ----------------------------------; output : T = new CurrentHdl
- MOV #8,S ; prepare file already open error
- MOV #FirstHandle,T ;
- MOV #0,X ; X = init previous handle as 0
+ MOV #8,S ; prepare file already open error
+ MOV #FirstHandle,T ;
+ MOV #0,X ; X = init previous handle as 0
; ----------------------------------;
SearchHandleLoop ;
; ----------------------------------;
- CMP.B #0,HDLB_Token(T) ; free handle ?
- JZ FreeHandleFound ; yes
+ CMP.B #0,HDLB_Token(T) ; free handle ?
+ JZ FreeHandleFound ; yes
AlreadyOpenTest ; no
CMP &ClusterH,HDLH_FirstClus(T);
JNE SearchNextHandle ;
JNZ SearchHandleLoop ;
ADD S,S ; 16 = no more handle error, abort ===>
InitHandleRET ;
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
FreeHandleFound ; T = new handle, X = previous handle
; ----------------------------------;
; ----------------------------------;
ReplaceInputBuffer ;
; ----------------------------------;
- MOV #SDIB_ORG,&PFACIB ; set SD Input Buffer as Current Input Buffer before return to QUIT
- MOV #SD_ACCEPT,&PFAACCEPT ; redirect ACCEPT to SD_ACCEPT before return to QUIT
+ MOV #SDIB_ORG,&CIB_ADR ; set SD Input Buffer as Current Input Buffer before return to QUIT
+ MOV #SD_ACCEPT,&PFAACCEPT ; redirect ACCEPT to SD_ACCEPT before return to QUIT
; ----------------------------------;
SaveBufferContext ; (see CloseHandleT)
; ----------------------------------;
MOV &SOURCE_LEN,HDLW_PrevLEN(T) ; = CPL
- SUB &TOIN,HDLW_PrevLEN(T) ; PREVLEN = CPL - >IN
+ SUB &TOIN,HDLW_PrevLEN(T) ; PREVLEN = CPL - >IN
MOV &SOURCE_ORG,HDLW_PrevORG(T) ; = CIB
- ADD &TOIN,HDLW_PrevORG(T) ; PrevORG = CIB + >IN
+ ADD &TOIN,HDLW_PrevORG(T) ; PrevORG = CIB + >IN
JMP SetBufLenAndLoadCurSector ; then RET
; ----------------------------------;
; ----------------------------------;
CloseHandleHere ;
; ----------------------------------;
- MOV.B #0,HDLB_Token(T) ; release the handle
- MOV @T,T ; T = previous handle
- MOV T,&CurrentHdl ; becomes current handle
- CMP #0,T ;
+ MOV.B #0,HDLB_Token(T) ; release the handle
+ MOV @T,T ; T = previous handle
+ MOV T,&CurrentHdl ; becomes current handle
+ CMP #0,T ;
JZ CloseHandleRet ; if no more handle
; ----------------------------------;
RestorePreviousLoadedBuffer ;
BIC #Z,SR ;
; ----------------------------------;
CloseHandleRet ;
- RET ; Z = 1 if no more handle
+ MOV @RSP+,PC ; Z = 1 if no more handle
; ----------------------------------;
; ==================================;
CloseHandleT ; <== CLOSE, Read_File, TERM2SD", OPEN_DEL
; ==================================;
- MOV &CurrentHdl,T ;
- CMP #0,T ; no handle?
- JZ CloseHandleRet ; RET
+ MOV &CurrentHdl,T ;
+ CMP #0,T ; no handle?
+ JZ CloseHandleRet ; RET
; ----------------------------------;
.IFDEF SD_CARD_READ_WRITE
- CMP.B #2,HDLB_Token(T) ; opened as write (updated) file ?
- JNZ TestClosedToken ; no
- CALL #WriteBuffer ;SWXY
- CALL #OPWW_UpdateDirectory ;SWXY
+ CMP.B #2,HDLB_Token(T) ; opened as write (updated) file ?
+ JNZ TestClosedToken ; no
+ CALL #WriteBuffer ;SWXY
+ CALL #OPWW_UpdateDirectory ;SWXY
.ENDIF ;
; ----------------------------------;
TestClosedToken ;
; ----------------------------------;
- CMP.B #0,HDLB_Token(T) ;
+ CMP.B #0,HDLB_Token(T) ;
; ----------------------------------;
CaseOfAnyReadWriteDelFileIsClosed ; token >= 0
; ----------------------------------;
; ----------------------------------;
RestoreDefaultACCEPT ; if no more handle, first loaded file is closed...
; ----------------------------------;
- MOV #TIB_ORG,&PFACIB ; restore TIB as Current Input Buffer for next line (next QUIT)
+ MOV #TIB_ORG,&CIB_ADR ; restore TIB as Current Input Buffer for next line (next QUIT)
MOV #BODYACCEPT,&PFAACCEPT ; restore default ACCEPT for next line (next QUIT)
MOV #ECHO,PC ; -- org len if return to Terminal ACCEPT
; ----------------------------------;
FORTHWORD "CLOSE" ;
; ----------------------------------;
CALL #CloseHandleT ;
- mNEXT ;
+ MOV @IP+,PC ;
; ----------------------------------;
.ENDIF ; SD_CARD_READ_WRITE
OPEN_EXEC ;
mDOCOL ; if exec state
.word lit,'"',WORDD,COUNT ; -- open_type addr u
- FORTHtoASM ;
+ .word $+2 ;
MOV @RSP+,IP ;
; ----------------------------------;
ParenOpen ; -- open_type HERE HERE as pathname ptr
CMP.B #'\\',-1(rDOCON) ; FirstNotEqualChar of Pathname = "\" ?
JZ OPN_EntryFound ;
CMP rDOCON,TOS ; EOS exceeded ?
- JLO OPN_EntryFound ; yes
+ JNC OPN_EntryFound ; yes
; ----------------------------------;
OPN_DIRentryMismatch ;
; ----------------------------------;
JMP OPN_EntryFound ;
OPN_ExtNotEqualChar ;
CMP rDOCON,TOS ; EOS exceeded ?
- JHS OPN_DIRentryMismatch ; no, loop back
+ JC OPN_DIRentryMismatch ; no, loop back
CMP.B #'\\',-1(rDOCON) ; FirstNotEqualChar = "\" ?
JNZ OPN_DIRentryMismatch ;
CALL #ParseEntryNameSpaces ; parse X spaces, X{0,...,3}
MOV &FATtype,&ClusterL ; set cluster as RootDIR cluster
OPN_DIRfoundNext ;
CMP rDOCON,TOS ; EOS exceeded ?
- JHS OPN_EndOfStringTest ; no: (we presume that FirstNotEqualChar = "\") ==> loop back
+ JC OPN_EndOfStringTest ; no: (we presume that FirstNotEqualChar = "\") ==> loop back
; ----------------------------------;
OPN_SetCurrentDIR ; -- open_type ptr
; ----------------------------------;
CMP #0,S ; open file happy end ?
JNZ OPEN_Error ; no
OPEN_LOAD_END
- mNEXT ;
+ MOV @IP+,PC ;
; ----------------------------------;
; ----------------------------------;
FullSpeedSend ;
; NOP ;0 NOPx adjusted to avoid SD error
SUB.B #1,X ;1
- JHS Send_CMD_PUT ;2 U>= : don't skip SD_CMD_FRM(0) !
+ JC Send_CMD_PUT ;2 U>= : don't skip SD_CMD_FRM(0) !
; host must provide height clock cycles to complete operation
; here X=255, so wait for CMD return expected value with PUT FFh 256 times
CMP.B &SD_RXBUF,W ;3 return value = ExpectedValue ?
JNZ Wait_Command_Response ;2 16~ full speed loop
SPI_WAIT_RET ; flag Z = 1 <==> Returned value = expected value
- RET ; W = expected value, unchanged
+ MOV @RSP+,PC ; W = expected value, unchanged
; ----------------------------------;
SUB #1,X ;1
JNZ SPI_PUT ;2 12~ loop
SPI_PUT_END MOV.B &SD_RXBUF,W ;3
- RET ;4
+ MOV @RSP+,PC ;4
; ----------------------------------;
; ==================================;
; ----------------------------------;
BIC #3,S ; reset read and write errors
BIS.B #SD_CS,&SD_CSOUT ; SD_CS = high
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
.IFDEF SD_CARD_READ_WRITE
; ----------------------------------;
SD_QABORTYES ; <=== OPEN file errors from forthMSP430FR_SD_LOAD.asm
; ----------------------------------;
- FORTHtoASM ;
+ .word $+2 ;
SUB #2,PSP ;
MOV TOS,0(PSP) ;
MOV #10h,&BASE ; select hex
; ----------------------------------;
CMP #0,S ; open file happy end ?
JNZ OPEN_Error ; no
- mNEXT ;
+ MOV @IP+,PC ;
; ----------------------------------;
;Z READ -- f
CALL #Read_File ;SWX
READ_END
SUB &CurrentHdl,TOS ; -- fl if fl <>0 (if Z=0) handle is closed
- mNEXT ;
+ MOV @IP+,PC ;
; ----------------------------------;
; ----------------------------------;
MOV @RSP+,W ; W = FATsector
MOV W,&CurFATsector ; refresh CurrentFATsector
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
.ENDIF
.ENDIF
SD_RW_RET ;
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
; CMP #0,W ; end of stringZ ?
; JZ OPWC_CompleteWithSpaces ;
CMP T,&EndOfPath ; EOS < PTR ?
- JLO OPWC_CompleteWithSpaces ; yes
+ JNC OPWC_CompleteWithSpaces ; yes
; ----------------------------------;
SkipForbiddenChars ;
; ----------------------------------;
SUB #1,X ; dec countdown of chars space
JNZ OPWC_CompleteWithSpaceloop ;
OPWC_CWS_End ;
- RET ;
+ MOV @RSP+,PC ;
; ----------------------------------;
; ----------------------------------;
CMP #0,S ; no error ?
JNZ OPWC_NomoreHandle ; ==> abort with error 16
- mNEXT ; --
+ MOV @IP+,PC ; --
; ----------------------------------;
;-----------------------------------------------------------------------
; this subroutine is called by Write_File (bufferPtr=512) and CloseHandleT (0 =< BufferPtr =< 512)
; ==================================;
-WriteBuffer ;SWXY input: T = CurrentHDL
+WriteBuffer ;STWXY input: T = CurrentHDL
; ==================================;
ADD &BufferPtr,HDLL_CurSize(T) ; update handle CurrentSizeL
ADDC #0,HDLH_CurSize(T) ;
;Z WRITE --
; sequentially write the entire SD_BUF in a file opened by WRITE"
; ----------------------------------;
- FORTHWORD "WRITE" ;
+ FORTHWORD "WRITE" ; in assembly : CALL #WRITE,X CALL 2(X)
; ----------------------------------;
- CALL #Write_File ;
- mNEXT ;
+ CALL #Write_File ;
+ MOV @IP+,PC ;
; ----------------------------------;
; ----------------------------------;
; 3- load last sector in SD_BUF ;
; ----------------------------------;
- MOV HDLL_CurSize(T),W ; example : W = 1013
- BIC #01FFh,HDLL_CurSize(T) ; substract 13 from HDLL_CurSize, because loaded in buffer
- AND #01FFh,W ; W = 13
- MOV W,&BufferPtr ; init Buffer Pointer with 13
- CALL #LoadHDLcurrentSector ;SWX
- mNEXT ; BufferPtr = first free byte offset
+ MOV HDLL_CurSize(T),W ; example : W = 1013
+ BIC #01FFh,HDLL_CurSize(T) ; substract 13 from HDLL_CurSize, because loaded in buffer
+ AND #01FFh,W ; W = 13
+ MOV W,&BufferPtr ; init Buffer Pointer with 13
+ CALL #LoadHDLcurrentSector ;SWX
+ MOV @IP+,PC ; BufferPtr = first free byte offset
; ----------------------------------;
SelectFreeEntry ; nothing to do: S = 0 ready for free entry!
; ----------------------------------;
CMP #BytsPerSec-32,Y ; Entry >= last entry in DIRsector ?
- JHS SelectHideEntry ; yes: next DIR entry is out of sector
+ JC SelectHideEntry ; yes: next DIR entry is out of sector
CMP.B #0,SD_BUF+32(Y) ; no: next DIR entry in DIRsector is free?
JZ WriteDelEntry ; yes
; ----------------------------------;
CALL #CloseHandleT ;
; ----------------------------------;
DEL_END ;
- mNEXT ;4
+ MOV @IP+,PC ;4
; ----------------------------------;
.word lit,2 ; -- open_type
.word HERE,COUNT ; -- open_type addr cnt
.word PARENOPEN ; reopen same filepath but as write
- FORTHtoASM ;
+ .word $+2 ;
MOV @RSP+,IP ;
BIC #UCRXIFG,&TERM_IFG ; clean up UCRX buffer
; ----------------------------------;
MOV.B X,SD_BUF(Y) ;3
ADD #1,Y ;1
CMP #BytsPerSec-1,Y ;2
- JLO T2S_FillBufferLoop ;2 Y<511 21 cycles char loop
+ JNC T2S_FillBufferLoop ;2 Y<511 21 cycles char loop
JZ T2S_XOFF ;2 Y=511 send XOFF after RX 511th char
; ----------------------------------;
T2S_WriteFile ;2 Y>511
MOV Y,&BufferPtr ;3
CALL #CloseHandleT ;4
TERM2SD_END ;
- mNEXT ;4
+ MOV @IP+,PC ;4
; ----------------------------------;
; PORT3 usage
; P3.1 - LED1
+CTS .equ 1 ; P3.0
+RTS .equ 4 ; P3.2
+HANDSHAKOUT .equ P3OUT
+HANDSHAKIN .equ P3IN
+
; RTS output is wired to the CTS input of UART2USB bridge
; CTS is not used by FORTH terminal
; configure RTS as output high to disable RX TERM during start FORTH
.IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P3OUT
-HANDSHAKIN .equ P3IN
-RTS .equ 4 ; P3.2
BIS.B #RTS,&P3DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 1 ; P3.0
BIC.B #CTS,&P3OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
; ----------------------------------------------------------------------
; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
-; BIS #00003h,&PCDIR ; all pins 0 as input else P5.0 (LED2G) P5.1 (LED2R)
-; MOV #0FFFCh,&PCOUT ; all pins high else P5.0 (LED2G) P5.1 (LED2R)
-; BIS #0FFFCh,&PCREN ; all pins with pull resistors else P5.0 (LED2G) P5.1 (LED2R)
-
- BIS #-1,&PCREN ; all pins with pull up/down resistors
- MOV #0FFFCh,&PCOUT ; all pins with pull up resistors else P5.0 (LED2G) P5.1 (LED2R)
-
; PORT5 usage
; LED2R - J8 - P5.1 red LED
; PORT6 usage
+RTS .equ 2 ; P6.1
+CTS .equ 4 ; P6.2
+HANDSHAKOUT .equ P6OUT
+HANDSHAKIN .equ P6IN
+
+; BIS #00003h,&PCDIR ; all pins 0 as input else P5.0 (LED2G) P5.1 (LED2R)
+; MOV #0FFFCh,&PCOUT ; all pins high else P5.0 (LED2G) P5.1 (LED2R)
+; BIS #0FFFCh,&PCREN ; all pins with pull resistors else P5.0 (LED2G) P5.1 (LED2R)
+
+ BIS #-1,&PCREN ; all pins with pull up/down resistors
+ MOV #0FFFCh,&PCOUT ; all pins with pull up resistors else P5.0 (LED2G) P5.1 (LED2R)
+
.IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P6OUT
-HANDSHAKIN .equ P6IN
-RTS .equ 2 ; P6.1
BIS.B #RTS,&P6DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 4 ; P6.2
BIC.B #CTS,&P6OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
; BIS.B #4,&P2DIR
; result : REFO = xx.xx kHz
-; ======================================================================
-; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
-; (no problem with MSP430FR5xxx families without FLL).
-; ======================================================================
-; .IF FREQUENCY = 0.5
-;
-; MOV #0D6h,&CSCTL0 ; preset DCO = 0xD6 (measured value @ 0x180 ; to measure, type 0x180 @ U.)
-;
-; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
-;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-;; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
-; ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-;; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
-; ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
-; MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
-; ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
-;; =====================================
-; MOV #8,X
-;
-; .ELSEIF FREQUENCY = 1
-;
-; MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
-;
-; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
-;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-;; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
-; ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
-; MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
-; ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
-;; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
-; ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
-;; =====================================
-; MOV #16,X
-;
-; .ELSEIF FREQUENCY = 2
-;
-; MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
-;
-; MOV #0003h,&CSCTL1 ; Set 2MHZ DCORSEL,disable DCOFTRIM,Modulation
-;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-;; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
-; ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
-;; MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
-; ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
-; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
-; ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
-;; =====================================
-; MOV #32,X
-;
-; .ELSEIF FREQUENCY = 4
-;
-; MOV #00D2h,&CSCTL0 ; preset DCO = 0xD2 (measured value @ 0x180)
-;
-; MOV #0005h,&CSCTL1 ; Set 4MHZ DCORSEL,disable DCOFTRIM,Modulation
-;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-;; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
-; ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
-;
-; MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
-; ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
-;
-;; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
-; ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
-;; =====================================
-; MOV #64,X
-;
-; .ELSEIF FREQUENCY = 8
-;
-;
-; MOV #00F3h,&CSCTL0 ; preset DCO = 0xF2 (measured value @ 0x180)
-;
-; MOV #0007h,&CSCTL1 ; Set 8MHZ DCORSEL,disable DCOFTRIM,Modulation
-;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-;; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
-; ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
-;; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
-; ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
-; MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
-; ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
-;
-;; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
-; ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
-;
-;; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
-;; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
-;
-;; =====================================
-; MOV #128,X
-;
-; .ELSEIF FREQUENCY = 16
-;
-; MOV #0129h,&CSCTL0 ; preset DCO = 0x129 (measured value @ 0x180)
-;
-; MOV #000Bh,&CSCTL1 ; Set 16MHZ DCORSEL,disable DCOFTRIM,Modulation
-;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-;; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
-; ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
-;; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
-; ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
-;; MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
-; ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
-; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
-; ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
-;; =====================================
-; MOV #256,X
+ .IFDEF LF_XTAL
+; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
+ MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
+ .ELSE
+ BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
+; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
+
+ BIS.B #03,&P2SEL0 ; P2.0 as XOUT, P2.1 as XIN
+
+ .ENDIF
.IF FREQUENCY = 0.5
.error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
.ENDIF
- .IFDEF LF_XTAL
-; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
- MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
- .ELSE
- BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
-; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
- .ENDIF
-
BIS &SYSRSTIV,&SAVE_SYSRSTIV; store volatile SYSRSTIV preserving a pending request for DEEP_RST
ClockWaitX MOV #5209,Y ; wait 0.5s before starting after POR
SUB #1,X ; x 16 @ 1 MHZ = 250ms
JNZ ClockWaitX ; time to stabilize power source ( 500ms )
-;WAITFLL BIT #300h,&CSCTL7 ; wait FLL lock
-; JNZ WAITFLL
SSDA=\$10! P4.4
S_BUS=\$18!
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$580! USCI_B1 Control Word Register 0
+I2CM_CTLW1=\$582! USCI_B1 Control Word Register 1
+I2CM_BRW=\$586! USCI_B1 Baud Word Rate 0
+I2CM_STATW=\$588! USCI_B1 status word
+I2CM_TBCNT=\$58A! USCI_B1 byte counter threshold
+I2CM_RXBUF=\$58C! USCI_B1 Receive Buffer 8
+I2CM_TXBUF=\$58E! USCI_B1 Transmit Buffer 8
+I2CM_I2COA0=\$594! USCI_B1 I2C Own Address 0
+I2CM_ADDRX=\$59C! USCI_B1 Received Address Register
+I2CM_I2CSA=\$5A0! USCI_B1 I2C Slave Address
+I2CM_IE=\$5AA! USCI_B1 Interrupt Enable
+I2CM_IFG=\$5AC! USCI_B1 Interrupt Flags Register
+
+I2CS_CTLW0=\$580! USCI_B1 Control Word Register 0
+I2CS_CTLW1=\$582! USCI_B1 Control Word Register 1
+I2CS_BRW=\$586! USCI_B1 Baud Word Rate 0
+I2CS_STATW=\$588! USCI_B1 status word
+I2CS_TBCNT=\$58A! USCI_B1 byte counter threshold
+I2CS_RXBUF=\$58C! USCI_B1 Receive Buffer 8
+I2CS_TXBUF=\$58E! USCI_B1 Transmit Buffer 8
+I2CS_I2COA0=\$594! USCI_B1 I2C Own Address 0
+I2CS_ADDRX=\$59C! USCI_B1 Received Address Register
+I2CS_I2CSA=\$5A0! USCI_B1 I2C Slave Address
+I2CS_IE=\$5AA! USCI_B1 Interrupt Enable
+I2CS_IFG=\$5AC! USCI_B1 Interrupt Flags Register
!MSP430FR2355.pat
-! ----------------------------------------------
-! MSP430FR2355 MEMORY MAP
-! ----------------------------------------------
-! 0000-0005 = reserved
-! 0006-001F = tiny RAM
-! 0020-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL1 (2k)
-! 1800-19FF = information memory (FRAM 512 B)
-! 1A00-1A31 = TLV device descriptor info (FRAM 128 B)
-! 1A80-1FFF = unused
-! 2000-2FFF = RAM (4 KB)
-! 2800-7FFF = unused
-! 8000-FF7F = code memory (FRAM 15232 B)
-! FF80-FFFF = interrupt vectors (FRAM 128 B)
-! FFC00-FFFFF = BSL2 (2k)
-! ----------------------------------------------
-! MSP430FR2355 DEVICE ID
-! ----------------------------------------------
-! 1A04 = 0C, 1A05 = 83
-! ----------------------------------------------
-PAGESIZE=512! ; MPU unit
-! ----------------------------------------------
-! BSL
-! ----------------------------------------------
-BSL1=\$1000!
-BSL2=\$FFC00!
-! ----------------------------------------------
-! FRAM ! INFO B, TLV
-! ----------------------------------------------
-TINYRAM_ORG=\$6!
-TINYRAM_LEN=\$1A!
-INFO_ORG=\$1800!
-INFO_LEN=\$0200!
-TLV_ORG=\$1A00! ! Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0032! !
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$2000!
-RAM_LEN=\$1000!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$8000! Code space start
-xdodoes=\$8000! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$800E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$8020! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$802A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR2355
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ! reset by wipe and by S1+<reset>
-JTAG_SIG2=\$FF82! if JTAG_SIG <> |0xFFFFFFFF, 0x00000000|, SBW and JTAG are locked
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-BSL_CONF_SIG=\$FF88!
-BSL_CONF=\$FF8A!
-BSL_I2C_ADRE=\$FF8C!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFCE! FFCE-FFFF : 24 vectors + reset
-VECT_LEN=\$32!
-
-P4_Vec=\$FFCE!
-P3_Vec=\$FFD0!
-P2_Vec=\$FFD2!
-P1_Vec=\$FFD4!
-SAC1SAC3_Vec=\$FFD6!
-SAC0SAC2_Vec=\$FFD8!
-eCOMPx_Vec=\$FFDA!
-ADC10_Vec=\$FFDC!
-eUSCI_B1_Vec=\$FFDE!
-eUSCI_B0_Vec=\$FFE0!
-eUSCI_A1_Vec=\$FFE2!
-eUSCI_A0_Vec=\$FFE4!
-WDT_Vec=\$FFE6!
-RTC_Vec=\$FFE8!
-TB3_x_Vec=\$FFEA!
-TB3_0_Vec=\$FFEC!
-TB2_x_Vec=\$FFEE!
-TB2_0_Vec=\$FFF0!
-TB1_x_Vec=\$FFF2!
-TB1_0_Vec=\$FFF4!
-TB0_x_Vec=\$FFF6!
-TB0_0_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! = SR(LPM4+GIE)
+LPM3=\$D8! = SR(LPM3+GIE)
+LPM2=\$98! = SR(LPM2+GIE)
+LPM1=\$58! = SR(LPM1+GIE)
+LPM0=\$18! = SR(LPM0+GIE)
+
! ============================================
! PORTx, Reg bits :
! ============================================
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
-! ===========================================================
-! MSP430FR2xxx and FR4xxx DEVICES HAVE SPECIFIC RAM ADDRESSES
-! ===========================================================
+! ----------------------------------------------
+! MSP430FR2355 MEMORY MAP
+! ----------------------------------------------
+! 0000-0005 = reserved
+! 0006-001F = tiny RAM
+! 0020-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL1 (2k)
+! 1800-19FF = information memory (FRAM 512 B)
+! 1A00-1A31 = TLV device descriptor info (FRAM 128 B)
+! 1A80-1FFF = unused
+! 2000-2FFF = RAM (4 KB)
+! 2800-7FFF = unused
+! 8000-FF7F = code memory (FRAM 15232 B)
+! FF80-FFFF = interrupt vectors (FRAM 128 B)
+! FFC00-FFFFF = BSL2 (2k)
+! ----------------------------------------------
+! MSP430FR2355 DEVICE ID
+! ----------------------------------------------
+! 1A04 = 0C, 1A05 = 83
+! ----------------------------------------------
+PAGESIZE=512! ; MPU unit
+
+! ============================================
+! TINY RAM
+! ============================================
+TINYRAM_ORG=\$6!
+TINYRAM_LEN=\$1A!
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
+BSL2=\$FFC00!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
! ============================================
+TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0032!
+DEVICEID=\$1A04!
+! ============================================
+! RAM
+! ============================================
+RAM_ORG=\$2000!
+RAM_LEN=\$1000!
+
+! ----------------------------------------------
+! FORTH RAM areas :
+! ----------------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
+! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
-! ============================================
-
-
+! ----------------------------------------------
LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
LSATCK=\$2000! \ leave stack, grow up
PSTACK=\$2080! \ parameter stack, grow down
! ----------------------
! NOT SAVED VARIABLES
! ----------------------
-
HP=\$21B2! HOLD ptr
CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
LAST_NFA=\$21B6!
LAST_CFA=\$21BA!
LAST_PSP=\$21BC!
-STATEADR=\$21BE! Interpreter state
+STATEADR=\$21BE! Interpreter state
SOURCE_LEN=\$21C0! len of input stream
SOURCE_ORG=\$21C2! adr of input stream
BASEADR=\$21DC! numeric base, must be defined before first reset !
LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
! ---------------------------------------
-!21E0! 28 RAM bytes free conditionnaly
+!21E0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
SD_END=\$2570!
SD_LEN=\$16E!
+! ============================================
+! FRAM MAIN
+! ============================================
+MAIN_ORG=\$8000! Code space start
+
+SLEEP=\$8000!
+BODYSLEEP=\$8004!
+VECT_RESET=\$800E!
+LIT=\$8024!
+NEXT_ADR=\$802C!
+XSQUOTE=\$802E!
+QTBRAN=\$8042!
+BRAN=\$8048!
+QFBRAN=\$804C!
+SKIPBRAN=\$8052!
+XDO=\$8056!
+XPLOOP=\$8066!
+XLOOP=\$8078!
+MUSMOD=\$807E! unsigned 32/16 division
+SETIB=\$80C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$80D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$80E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$80EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$80FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$8106! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$8106!
+XDOCOL=\$8110! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR2355
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ! reset by wipe and by S1+<reset>
+JTAG_SIG2=\$FF82! if JTAG_SIG <> |0xFFFFFFFF, 0x00000000|, SBW and JTAG are locked
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+BSL_CONF_SIG=\$FF88!
+BSL_CONF=\$FF8A!
+BSL_I2C_ADRE=\$FF8C!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFCE! FFCE-FFFF : 24 vectors + reset
+VECT_LEN=\$32!
+
+P4_Vec=\$FFCE!
+P3_Vec=\$FFD0!
+P2_Vec=\$FFD2!
+P1_Vec=\$FFD4!
+SAC1SAC3_Vec=\$FFD6!
+SAC0SAC2_Vec=\$FFD8!
+eCOMPx_Vec=\$FFDA!
+ADC10_Vec=\$FFDC!
+eUSCI_B1_Vec=\$FFDE!
+eUSCI_B0_Vec=\$FFE0!
+eUSCI_A1_Vec=\$FFE2!
+eUSCI_A0_Vec=\$FFE4!
+WDT_Vec=\$FFE6!
+RTC_Vec=\$FFE8!
+TB3_x_Vec=\$FFEA!
+TB3_0_Vec=\$FFEC!
+TB2_x_Vec=\$FFEE!
+TB2_0_Vec=\$FFF0!
+TB1_x_Vec=\$FFF2!
+TB1_0_Vec=\$FFF4!
+TB0_x_Vec=\$FFF6!
+TB0_0_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
+
+
! ----------------------------------------------------------------------
! MSP430FR2355 Peripheral File Map
eUSCI_B0
; ----------------------------------------------------------------------
.IFDEF UCB0_TERM
-I2CTERM_CTLW0 .equ eUSCI_B0_SFR + 00h ; USCI_B0 Control Word Register 0
-I2CTERM_CTLW1 .equ eUSCI_B0_SFR + 02h ; USCI_B0 Control Word Register 1
-I2CTERM_BRW .equ eUSCI_B0_SFR + 06h ; USCI_B0 Baud Word Rate 0
-I2CTERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
-I2CTERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
-I2CTERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-I2CTERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
-I2CTERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
-I2CTERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
-I2CTERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
-I2CTERMVEC .equ 0FFE0h ; interrupt vector for eUSCI_B0
+TERM_CTLW0 .equ eUSCI_B0_SFR + 00h ; USCI_B0 Control Word Register 0
+TERM_CTLW1 .equ eUSCI_B0_SFR + 02h ; USCI_B0 Control Word Register 1
+TERM_BRW .equ eUSCI_B0_SFR + 06h ; USCI_B0 Baud Word Rate 0
+TERM_STATW .equ eUSCI_B0_SFR + 08h ; USCI_B0 Status Word
+TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
+TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
+TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
+TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
+TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
+TERM_VEC .equ 0FFE0h ; interrupt vector for eUSCI_B0
.ENDIF ;UCB0_TERM
.IFDEF UCB0_I2CM ; used by UART2MICC.asm
!MSP430FR2433.pat
-! ----------------------------------------------
-! MSP430FR2433 MEMORY MAP
-! ----------------------------------------------
-! 0000-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL1 (2k)
-! 1800-19FF = info B (FRAM 512 B)
-! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
-! 1A80-1FFF = unused
-! 2000-2FFF = RAM (4 KB)
-! 2800-C3FF = unused
-! C400-FF7F = code memory (FRAM 15232 B)
-! FF80-FFFF = interrupt vectors (FRAM 128 B)
-! FFC00-FFFFF = BSL2 (2k)
-! ----------------------------------------------
-!PAGESIZE .equ 512 ; MPU unit
-! ----------------------------------------------
-! BSL
-! ----------------------------------------------
-BSL1=\$1000!
-BSL2=\$FFC00!
-! ----------------------------------------------
-! FRAM ; INFO B, TLV
-! ----------------------------------------------
-INFO_ORG =\$1800!
-INFO_LEN=\$0200!
-TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0080!
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$2000!
-RAM_LEN=\$1000!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$C400! Code space start
-xdodoes=\$C400! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$C40E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$C420! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$C42A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR2433
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ; reset by wipe and by S1+<reset>
-JTAG_SIG2=\$FF82! if JTAG_SIG <> |\$FFFFFFFF, \$00000000|, SBW and JTAG are locked
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFDA! FFDA-FFFF
-VECT_LEN=\$26!
-! ----------------------------------------------
-
-
-P2_Vec=\$FFDA!
-P1_Vec=\$FFDC!
-ADC10_B_Vec=\$FFDE!
-eUSCI_B0_Vec=\$FFE0!
-eUSCI_A1_Vec=\$FFE2!
-eUSCI_A0_Vec=\$FFE4!
-WDT_Vec=\$FFE6!
-RTC_Vec=\$FFE8!
-TA3_x_Vec=\$FFEA!
-TA3_0_Vec=\$FFEC!
-TA2_x_Vec=\$FFEE!
-TA2_0_Vec=\$FFF0!
-TA1_x_Vec=\$FFF2!
-TA1_0_Vec=\$FFF4!
-TA0_x_Vec=\$FFF6!
-TA0_0_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
+
! ============================================
! PORTx, Reg bits :
! ============================================
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
-
-! ===========================================================
-! MSP430FR2xxx and FR4xxx DEVICES HAVE SPECIFIC RAM ADDRESSES
-! ===========================================================
+! ----------------------------------------------
+! MSP430FR2433 MEMORY MAP
+! ----------------------------------------------
+! 0000-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL1 (2k)
+! 1800-19FF = info B (FRAM 512 B)
+! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
+! 2000-2FFF = RAM (4 KB)
+! C400-FF7F = code memory (FRAM 15232 B)
+! FF80-FFFF = interrupt vectors (FRAM 128 B)
+! FFC00-FFFFF = BSL2 (2k)
+! ----------------------------------------------
+!PAGESIZE .equ 512 ; MPU unit
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
+BSL2=\$FFC00!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG =\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0080!
+DEVICEID=\$1A04!
+
+
+! ============================================
+! RAM
! ============================================
+RAM_ORG=\$2000!
+RAM_LEN=\$1000!
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
+! ---------------------------------------
! FastForth RAM memory map (>= 1k):
-! ============================================
-
-
+! ---------------------------------------
LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
LSATCK=\$2000! \ leave stack, grow up
PSTACK=\$2080! \ parameter stack, grow down
HOLDS_ORG=\$2190! \ a good address for HOLDS
HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-! ----------------------
+! ---------------------------------------
! NOT SAVED VARIABLES
-! ----------------------
-
+! ---------------------------------------
HP=\$21B2! HOLD ptr
CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
LAST_NFA=\$21B6!
SD_END=\$2570!
SD_LEN=\$16E!
+! ============================================
+! FRAM MAIN
+! ============================================
+MAIN_ORG=\$C400! Code space start
+
+SLEEP=\$C400!
+BODYSLEEP=\$C404!
+VECT_RESET=\$C40E!
+LIT=\$C424!
+NEXT_ADR=\$C42C!
+XSQUOTE=\$C42E!
+QTBRAN=\$C442!
+BRAN=\$C448!
+QFBRAN=\$C44C!
+SKIPBRAN=\$C452!
+XDO=\$C456!
+XPLOOP=\$C466!
+XLOOP=\$C478!
+MUSMOD=\$C47E! unsigned 32/16 division
+SETIB=\$C4C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$C4D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$C4E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$C4EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C4FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$C506! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$C506!
+XDOCOL=\$C510! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR2433
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ; reset by wipe and by S1+<reset>
+JTAG_SIG2=\$FF82! if JTAG_SIG <> |\$FFFFFFFF, \$00000000|, SBW and JTAG are locked
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFDA! FFDA-FFFF
+VECT_LEN=\$26!
+! ----------------------------------------------
+
+P2_Vec=\$FFDA!
+P1_Vec=\$FFDC!
+ADC10_B_Vec=\$FFDE!
+eUSCI_B0_Vec=\$FFE0!
+eUSCI_A1_Vec=\$FFE2!
+eUSCI_A0_Vec=\$FFE4!
+WDT_Vec=\$FFE6!
+RTC_Vec=\$FFE8!
+TA3_x_Vec=\$FFEA!
+TA3_0_Vec=\$FFEC!
+TA2_x_Vec=\$FFEE!
+TA2_0_Vec=\$FFF0!
+TA1_x_Vec=\$FFF2!
+TA1_0_Vec=\$FFF4!
+TA0_x_Vec=\$FFF6!
+TA0_0_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
+
+
+
+
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+
! ----------------------------------------------------------------------
!MSP430FR2476.pat
-! ----------------------------------------------
-! MSP430FR2476 MEMORY MAP
-! ----------------------------------------------
-! 0000-0005 = reserved
-! 0006-001F = TinyRAM
-! 0020-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL1 (2k)
-! 1800-19FF = info B (FRAM 512 B)
-! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
-! 1A80-1FFF = unused
-! 2000-3FFF = RAM (8 KB)
-! 4000-7FFF = unused
-! 8000-17FFF = code memory (FRAM 64 kB)
-! FF80-FFFF = interrupt vectors (FRAM 128 B)
-! C0000-C3FFF = CapTivate lib
-! FFC00-FFFFF = BSL2 (2k)
-! ----------------------------------------------
-!PAGESIZE .equ 512 ; MPU unit
-! ----------------------------------------------
-! BSL
-! ----------------------------------------------
-BSL1=\$1000! to $17FF (2k)
-BSL2=\$FFC00! to $FFFFFF (1k)
-! ----------------------------------------------
-! FRAM ; INFO B, TLV
-! ----------------------------------------------
-INFO_ORG =\$1800! to $19FF (512b)
-INFO_LEN=\$0200!
-TLV_ORG=\$1A00! to $1A31 Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0080!
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-TinyRAM_ORG=\$06!
-TinyRAM_LEN=\$1A!
-RAM_ORG=\$2000!
-RAM_LEN=\$2000!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$8000! Code space start
-xdodoes=\$8000! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$800E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$8020! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$802A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR2476
-! ----------------------------------------------
-FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ; reset by wipe and by S1+<reset>
-JTAG_SIG2=\$FF82! if JTAG_SIG <> |\$FFFFFFFF, \$00000000|, SBW and JTAG are locked
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFDA! FFDA-FFFF
-VECT_LEN=\$38!
-! ----------------------------------------------
-
-
-; .org INTVECT ; FFDA-FFFF 26 vectors + reset
-;
-; .word reset ; FFCAh - eCOMP0
-; .word reset ; FFCCh - P6
-; .word reset ; FFCEh - P5
-; .word reset ; FFD0h - P4
-; .word reset ; FFD2h - P3
-; .word reset ; FFD4h - P2
-; .word reset ; FFD6h - P1
-; .word reset ; FFD8h - ADC10
-; .word reset ; FFDAh - eUSCI_B1
-; .word reset ; FFDCh - eUSCI_B0
-; .word reset ; FFDEh - eUSCI_A1
-; .word reset ; FFE0h - eUSCI_A0
-; .word reset ; FFE2h - WDT
-; .word reset ; FFE4h - RTC
-; .word reset ; FFE6h - TB0_x
-; .word reset ; FFE8h - TB0_0
-; .word reset ; FFEAh - TA3_x
-; .word reset ; FFECh - TA3_0
-; .word reset ; FFEEh - TA2_x
-; .word reset ; FFF0h - TA2_0
-; .word reset ; FFF2h - TA1_x
-; .word reset ; FFF4h - TA1_0
-; .word reset ; FFF6h - TA0_x
-; .word reset ; FFF8h - TA0_0
-; .word reset ; FFFAh - UserNMI
-; .word reset ; FFFCh - SysNMI
-
-
-eCOMP0_Vec=\$FFCA!
-P6_Vec=\$FFCC!
-P5_Vec=\$FFCE!
-P4_Vec=\$FFD0!
-P3_Vec=\$FFD2!
-P2_Vec=\$FFD4!
-P1_Vec=\$FFD6!
-ADC10_B_Vec=\$FFD8!
-eUSCI_B1_Vec=\$FFDA!
-eUSCI_B0_Vec=\$FFDC!
-eUSCI_A1_Vec=\$FFDE!
-eUSCI_A0_Vec=\$FFE0!
-WDT_Vec=\$FFE2!
-RTC_Vec=\$FFE4!
-TB0_x_Vec=\$FFE6!
-TB0_0_Vec=\$FFE8!
-TA3_x_Vec=\$FFEA!
-TA3_0_Vec=\$FFEC!
-TA2_x_Vec=\$FFEE!
-TA2_0_Vec=\$FFF0!
-TA1_x_Vec=\$FFF2!
-TA1_0_Vec=\$FFF4!
-TA0_x_Vec=\$FFF6!
-TA0_0_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
+
! ============================================
! PORTx, Reg bits :
! ============================================
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
+! ----------------------------------------------
+! MSP430FR2476 MEMORY MAP
+! ----------------------------------------------
+! 0000-0005 = reserved
+! 0006-001F = TinyRAM
+! 0020-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL1 (2k)
+! 1800-19FF = info B (FRAM 512 B)
+! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
+! 1A80-1FFF = unused
+! 2000-3FFF = RAM (8 KB)
+! 4000-7FFF = unused
+! 8000-17FFF = code memory (FRAM 64 kB)
+! FF80-FFFF = interrupt vectors (FRAM 128 B)
+! C0000-C3FFF = CapTivate lib
+! FFC00-FFFFF = BSL2 (2k)
+! ----------------------------------------------
+!PAGESIZE .equ 512 ; MPU unit
-! ===========================================================
-! MSP430FR2xxx and FR4xxx DEVICES HAVE SPECIFIC RAM ADDRESSES
-! ===========================================================
+! ============================================
+! TINY RAM
+! ============================================
+TinyRAM_ORG=\$06!
+TinyRAM_LEN=\$1A!
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000! to $17FF (2k)
+BSL2=\$FFC00! to $FFFFFF (1k)
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO(DCBA) memory map (256 bytes):
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! to $1A31 Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0080!
+DEVICEID=\$1A04!
+
! ============================================
+! RAM
+! ============================================
+RAM_ORG=\$2000!
+RAM_LEN=\$2000!
+! ----------------------------------------------
+! FORTH RAM areas :
+! ----------------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
+! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
-! ============================================
-
-
+! ----------------------------------------------
LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
LSATCK=\$2000! \ leave stack, grow up
PSTACK=\$2080! \ parameter stack, grow down
BASEADR=\$21DC! numeric base, must be defined before first reset !
LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
! ---------------------------------------
-!21E0! 14 RAM bytes free conditionnaly
-! ---------------------------------------
-!ASMBW1=\$21E0 assembler backward reference 1
-!ASMBW2=\$21E2 assembler backward reference 2
-!ASMBW3=\$21E4 assembler backward reference 3
-!ASMFW1=\$21E6 assembler forward reference 1
-!ASMFW2=\$21E8 assembler forward reference 2
-!ASMFW3=\$21EA assembler forward reference 3
-!RPT_WORD=\$21EC!
-! ---------------------------------------
-!21EE! 14 RAM bytes free
+!21E0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
SD_END=\$2570!
SD_LEN=\$16E!
+! ============================================
+! FRAM MAIN
+! ============================================
+MAIN_ORG=\$8000! Code space start
+
+SLEEP=\$8000!
+BODYSLEEP=\$8004!
+VECT_RESET=\$800E!
+LIT=\$8024!
+NEXT_ADR=\$802C!
+XSQUOTE=\$802E!
+QTBRAN=\$8042!
+BRAN=\$8048!
+QFBRAN=\$804C!
+SKIPBRAN=\$8052!
+XDO=\$8056!
+XPLOOP=\$8066!
+XLOOP=\$8078!
+MUSMOD=\$807E! unsigned 32/16 division
+SETIB=\$80C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$80D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$80E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$80EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$80FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$8106! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$8106!
+XDOCOL=\$8110! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR2476
+! ----------------------------------------------
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ; reset by wipe and by S1+<reset>
+JTAG_SIG2=\$FF82! if JTAG_SIG <> |\$FFFFFFFF, \$00000000|, SBW and JTAG are locked
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFDA! FFDA-FFFF
+VECT_LEN=\$38!
+! ----------------------------------------------
+
+
+; .org INTVECT ; FFDA-FFFF 26 vectors + reset
+;
+; .word reset ; FFCAh - eCOMP0
+; .word reset ; FFCCh - P6
+; .word reset ; FFCEh - P5
+; .word reset ; FFD0h - P4
+; .word reset ; FFD2h - P3
+; .word reset ; FFD4h - P2
+; .word reset ; FFD6h - P1
+; .word reset ; FFD8h - ADC10
+; .word reset ; FFDAh - eUSCI_B1
+; .word reset ; FFDCh - eUSCI_B0
+; .word reset ; FFDEh - eUSCI_A1
+; .word reset ; FFE0h - eUSCI_A0
+; .word reset ; FFE2h - WDT
+; .word reset ; FFE4h - RTC
+; .word reset ; FFE6h - TB0_x
+; .word reset ; FFE8h - TB0_0
+; .word reset ; FFEAh - TA3_x
+; .word reset ; FFECh - TA3_0
+; .word reset ; FFEEh - TA2_x
+; .word reset ; FFF0h - TA2_0
+; .word reset ; FFF2h - TA1_x
+; .word reset ; FFF4h - TA1_0
+; .word reset ; FFF6h - TA0_x
+; .word reset ; FFF8h - TA0_0
+; .word reset ; FFFAh - UserNMI
+; .word reset ; FFFCh - SysNMI
+
+
+eCOMP0_Vec=\$FFCA!
+P6_Vec=\$FFCC!
+P5_Vec=\$FFCE!
+P4_Vec=\$FFD0!
+P3_Vec=\$FFD2!
+P2_Vec=\$FFD4!
+P1_Vec=\$FFD6!
+ADC10_B_Vec=\$FFD8!
+eUSCI_B1_Vec=\$FFDA!
+eUSCI_B0_Vec=\$FFDC!
+eUSCI_A1_Vec=\$FFDE!
+eUSCI_A0_Vec=\$FFE0!
+WDT_Vec=\$FFE2!
+RTC_Vec=\$FFE4!
+TB0_x_Vec=\$FFE6!
+TB0_0_Vec=\$FFE8!
+TA3_x_Vec=\$FFEA!
+TA3_0_Vec=\$FFEC!
+TA2_x_Vec=\$FFEE!
+TA2_0_Vec=\$FFF0!
+TA1_x_Vec=\$FFF2!
+TA1_0_Vec=\$FFF4!
+TA0_x_Vec=\$FFF6!
+TA0_0_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
+
+
+
! ----------------------------------------------------------------------
!MSP430FR2633.pat
-! ----------------------------------------------
-! MSP430FR2633 MEMORY MAP
-! ----------------------------------------------
-! 0000-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL1 (4x512 B)
-! 1800-187F = info B (FRAM 128 B)
-! 1880-18FF = info A (FRAM 128 B)
-! 1900-19FF = N/A (mirrored into info A/B)
-! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
-! 2000-2FFF = RAM (4 KB)
-! 4000-6FFF = ROM captivate (12 k)
-! C400-FF7F = code memory (FRAM 15232 B)
-! FF80-FFFF = interrupt vectors (FRAM 127 B)
-! ----------------------------------------------
-! ----------------------------------------------
-! FRAM ; INFO B, TLV
-! ----------------------------------------------
-INFO_ORG =\$1800!
-INFO_LEN=\$0200!
-TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0080!
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$2000!
-RAM_LEN=\$1000!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$C400! Code space start
-xdodoes=\$C400! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$C40E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$C420! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$C42A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR2633
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFD8! FFD8-FFFF
-VECT_LEN=\$28!
-
-
-CAPTIVATE_Vec=\$FFD8!
-P2_Vec=\$FFDA!
-P1_Vec=\$FFDC!
-ADC10_B_Vec=\$FFDE!
-eUSCI_B0_Vec=\$FFE0!
-eUSCI_A1_Vec=\$FFE2!
-eUSCI_A0_Vec=\$FFE4!
-WDT_Vec=\$FFE6!
-RTC_Vec=\$FFE8!
-TA3_x_Vec=\$FFEA!
-TA3_0_Vec=\$FFEC!
-TA2_x_Vec=\$FFEE!
-TA2_0_Vec=\$FFF0!
-TA1_x_Vec=\$FFF2!
-TA1_0_Vec=\$FFF4!
-TA0_x_Vec=\$FFF6!
-TA0_0_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-!MSP430FR2xxx.pat
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
+
! ============================================
! PORTx, Reg bits :
! ============================================
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
+! ----------------------------------------------
+! MSP430FR2633 MEMORY MAP
+! ----------------------------------------------
+! 0000-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL1 (4x512 B)
+! 1800-19FF = info B (FRAM 512 B)
+! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
+! 2000-2FFF = RAM (4 KB)
+! 4000-6FFF = ROM captivate (12 k)
+! C400-FF7F = code memory (FRAM 15232 B)
+! FF80-FFFF = interrupt vectors (FRAM 128 B)
+! FFC00-FFFFF = BSL2 (2k)
+! ----------------------------------------------
+!PAGESIZE .equ 512 ; MPU unit
-! ===========================================================
-! MSP430FR2xxx and FR4xxx DEVICES HAVE SPECIFIC RAM ADDRESSES
-! ===========================================================
-
-
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
+BSL2=\$FFC00!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG =\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0080!
+DEVICEID=\$1A04!
+
+! ============================================
+! RAM
! ============================================
+RAM_ORG=\$2000!
+RAM_LEN=\$1000!
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
+! ---------------------------------------
! FastForth RAM memory map (>= 1k):
-! ============================================
-
-
+! ---------------------------------------
LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
LSATCK=\$2000! \ leave stack, grow up
PSTACK=\$2080! \ parameter stack, grow down
HOLDS_ORG=\$2190! \ a good address for HOLDS
HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-! ----------------------
+! ---------------------------------------
! NOT SAVED VARIABLES
-! ----------------------
-
+! ---------------------------------------
HP=\$21B2! HOLD ptr
CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
LAST_NFA=\$21B6!
SD_LEN=\$16E!
! ============================================
-! Special Fonction Registers (SFR)
+! FRAM MAIN
! ============================================
+MAIN_ORG=\$C400! Code space start
+
+SLEEP=\$C400!
+BODYSLEEP=\$C404!
+VECT_RESET=\$C40E!
+LIT=\$C424!
+NEXT_ADR=\$C42C!
+XSQUOTE=\$C42E!
+QTBRAN=\$C442!
+BRAN=\$C448!
+QFBRAN=\$C44C!
+SKIPBRAN=\$C452!
+XDO=\$C456!
+XPLOOP=\$C466!
+XLOOP=\$C478!
+MUSMOD=\$C47E! unsigned 32/16 division
+SETIB=\$C4C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$C4D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$C4E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$C4EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C4FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$C506! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$C506!
+XDOCOL=\$C510! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR2633
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFD8! FFD8-FFFF
+VECT_LEN=\$28!
+CAPTIVATE_Vec=\$FFD8!
+P2_Vec=\$FFDA!
+P1_Vec=\$FFDC!
+ADC10_B_Vec=\$FFDE!
+eUSCI_B0_Vec=\$FFE0!
+eUSCI_A1_Vec=\$FFE2!
+eUSCI_A0_Vec=\$FFE4!
+WDT_Vec=\$FFE6!
+RTC_Vec=\$FFE8!
+TA3_x_Vec=\$FFEA!
+TA3_0_Vec=\$FFEC!
+TA2_x_Vec=\$FFEE!
+TA2_0_Vec=\$FFF0!
+TA1_x_Vec=\$FFF2!
+TA1_0_Vec=\$FFF4!
+TA0_x_Vec=\$FFF6!
+TA0_0_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
+! ============================================
+! Special Fonction Registers (SFR)
+! ============================================
SFRIE1=\$100! \ SFR enable register
SFRIFG1=\$102! \ SFR flag register
!MSP430FR4133.pat
-! ----------------------------------------------
-! MSP430FR5739 MEMORY MAP
-! ----------------------------------------------
-! 0000-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
-! 1800-187F = info B (FRAM 128 B)
-! 1880-18FF = info A (FRAM 128 B)
-! 1900-19FF = N/A (mirrored into info A/B)
-! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
-! 1A80-1BFF = unused (385 B)
-! 1C00-1FFF = RAM (1 KB)
-! 2000-C1FF = unused (41472 B)
-! C400-FF7F = code memory (FRAM 15232 B)
-! FF80-FFFF = interrupt vectors (FRAM 127 B)
-! ----------------------------------------------
-! ----------------------------------------------
-! FRAM ! INFO B, TLV
-! ----------------------------------------------
-INFO_ORG=\$1800!
-INFO_LEN=\$0200!
-TLV_ORG=\$1A00! ! Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0080! !
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$2000!
-RAM_LEN=\$0800!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$C400! Code space start
-xdodoes=\$C400! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$C40E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$C420! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$C42A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR4133
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFE2! FFE2-FFFF
-VECT_LEN=\$1E!
-
-
-LCD_Vec=\$FFE2!
-P2_Vec=\$FFE4!
-P1_Vec=\$FFE6!
-ADC10_B_Vec=\$FFE8!
-eUSCI_B0_Vec=\$FFEA!
-eUSCI_A0_Vec=\$FFEC!
-WDT_Vec=\$FFEE!
-RTC_Vec=\$FFF0!
-TA1_x_Vec=\$FFF2!
-TA1_0_Vec=\$FFF4!
-TA0_x_Vec=\$FFF6!
-TA0_0_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-
-
-!MSP430FR2xxx.pat
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
+
! ============================================
! PORTx, Reg bits :
! ============================================
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
+! ----------------------------------------------
+! MSP430FR4133 MEMORY MAP
+! ----------------------------------------------
+! 0000-0FFF = peripherals (4 KB)
+! 1000-13FF = ROM bootstrap loader BSL0.1 (2x512 B)
+! 1800-19FF = INFO 512 B
+! 1A00-1A23 = TLV device descriptor info (FRAM 35 B)
+! 2000-27FF = RAM (2 KB)
+! C400-FF7F = code memory (FRAM 15232 B)
+! FF80-FFFF = interrupt vectors (FRAM 127 B)
+! ----------------------------------------------
-! ===========================================================
-! MSP430FR2xxx and FR4xxx DEVICES HAVE SPECIFIC RAM ADDRESSES
-! ===========================================================
-
-
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG =\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! ! Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0080! !
+DEVICEID=\$1A04!
+
+! ============================================
+! RAM
! ============================================
+RAM_ORG=\$2000!
+RAM_LEN=\$0800!
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
+! ---------------------------------------
! FastForth RAM memory map (>= 1k):
-! ============================================
-
-
+! ---------------------------------------
LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
LSATCK=\$2000! \ leave stack, grow up
PSTACK=\$2080! \ parameter stack, grow down
HOLDS_ORG=\$2190! \ a good address for HOLDS
HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-! ----------------------
+! ---------------------------------------
! NOT SAVED VARIABLES
-! ----------------------
-
+! ---------------------------------------
HP=\$21B2! HOLD ptr
CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
LAST_NFA=\$21B6!
BASEADR=\$21DC! numeric base, must be defined before first reset !
LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
! ---------------------------------------
-!21E0! 28 RAM bytes free
+!21E0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
SD_END=\$2570!
SD_LEN=\$16E!
-
! ============================================
-! Special Fonction Registers (SFR)
+! FRAM MAIN
! ============================================
+MAIN_ORG=\$C400! Code space start
+
+SLEEP=\$C400!
+BODYSLEEP=\$C404!
+VECT_RESET=\$C40E!
+LIT=\$C424!
+NEXT_ADR=\$C42C!
+XSQUOTE=\$C42E!
+QTBRAN=\$C442!
+BRAN=\$C448!
+QFBRAN=\$C44C!
+SKIPBRAN=\$C452!
+XDO=\$C456!
+XPLOOP=\$C466!
+XLOOP=\$C478!
+MUSMOD=\$C47E! unsigned 32/16 division
+SETIB=\$C4C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$C4D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$C4E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$C4EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C4FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$C506! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$C506!
+XDOCOL=\$C510! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! code of CALL rDODOES
+DOCON=\$1285! code of CALL rDOCON
+DOVAR=\$1286! code of CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR4133
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFE2! FFE2-FFFF
+VECT_LEN=\$1E!
+LCD_Vec=\$FFE2!
+P2_Vec=\$FFE4!
+P1_Vec=\$FFE6!
+ADC10_B_Vec=\$FFE8!
+eUSCI_B0_Vec=\$FFEA!
+eUSCI_A0_Vec=\$FFEC!
+WDT_Vec=\$FFEE!
+RTC_Vec=\$FFF0!
+TA1_x_Vec=\$FFF2!
+TA1_0_Vec=\$FFF4!
+TA0_x_Vec=\$FFF6!
+TA0_0_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
+! ============================================
+! Special Fonction Registers (SFR)
+! ============================================
SFRIE1=\$100! \ SFR enable register
SFRIFG1=\$102! \ SFR flag register
!MSP430fr5738.pat
-! ----------------------------------------------
-! MSP430FR5738 MEMORY MAP
-! ----------------------------------------------
-! 0000-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
-! 1800-187F = info B (FRAM 128 B)
-! 1880-18FF = info A (FRAM 128 B)
-! 1900-19FF = N/A (mirrored into info A/B)
-! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
-! 1A80-1BFF = unused (385 B)
-! 1C00-1FFF = RAM (1 KB)
-! 2000-C1FF = unused (41472 B)
-! C200-FF7F = code memory (FRAM 15743 B)
-! FF80-FFFF = interrupt vectors (FRAM 127 B)
-! ----------------------------------------------
-! ----------------------------------------------
-! FRAM ! INFO B, TLV
-! ----------------------------------------------
-INFO_ORG=\$1800!
-INFO_LEN=\$0100!
-INFOB_ORG=\$1800!
-INFOB_LEN=\$0080!
-INFOA_ORG=\$1880!
-INFOA_LEN=\$0080!
-TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0080!
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$1C00!
-RAM_LEN=\$0400!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$C200! Code space start
-xdodoes=\$C200! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$C20E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$C220! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$C22A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR5738
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFCE! FFCE-FFFF
-VECT_LEN=\$32!
-
-
-RTC_Vec=\$FFCE!
-P4_Vec=\$FFD0!
-P3_Vec=\$FFD2!
-TB2_x_Vec=\$FFD4! All others
-TB2_0_Vec=\$FFD6! only CCIFG0
-P2_Vec=\$FFD8!
-TB1_x_Vec=\$FFDA! All others
-TB1_0_Vec=\$FFDC! only CCIFG0
-P1_Vec=\$FFDE!
-TA1_x_Vec=\$FFE0! All others
-TA1_0_Vec=\$FFE2! only CCIFG0
-DMA_Vec=\$FFE4!
-!eUSCI_A1_Vec=\$FFE6!
-TA0_x_Vec=\$FFE8! All others
-TA0_0_Vec=\$FFEA! only CCIFG0
-ADC10_B_Vec=\$FFEC!
-eUSCI_B0_Vec=\$FFEE!
-eUSCI_A0_Vec=\$FFF0!
-TERM_Vec=\$FFF0!
-WDT_Vec=\$FFF2!
-TB0_x_Vec=\$FFF4! All others
-TB0_0_Vec=\$FFF6! only CCIFG0
-COMP_D_Vec=\$FFF8!
-USER_NMI_Vec=\$FFFA!
-SYS_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
+
! ============================================
! PORTx, Reg bits :
! ============================================
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
-! =================================================
-! MSP430FR57xx DEVICES HAVE SPECIFIC RAM ADDRESSES!
-! =================================================
-
-
+! ----------------------------------------------
+! MSP430FR5738 MEMORY MAP
+! ----------------------------------------------
+! 0000-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
+! 1800-187F = info B (FRAM 128 B)
+! 1880-18FF = info A (FRAM 128 B)
+! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
+! 1C00-1FFF = RAM (1 KB)
+! C200-FF7F = code memory (FRAM 15743 B)
+! FF80-FFFF = interrupt vectors (FRAM 127 B)
+! ----------------------------------------------
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0100!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
HDLW_PrevLEN=24! previous LEN
HDLW_PrevORG=26! previous ORG
-
!OpenedFirstFile ; "openedFile" structure
HandleMax=5!
HandleLenght=28!
SDIB_I2CCNT=\$1CE2!
SDIB_ORG=\$1CE4!
+! ============================================
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0080!
+DEVICEID=\$1A04!
! ============================================
-! FORTH RAM areas :
+! RAM
! ============================================
+RAM_ORG=\$1C00!
+RAM_LEN=\$0400!
+
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
-! FastForth RAM memory map (= 1k):
-! ============================================
-
+! ---------------------------------------
+! FastForth RAM memory map (= 1k)
+! ---------------------------------------
LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
LSATCK=\$1C00! \ leave stack, grow up
PSTACK=\$1C80! \ parameter stack, grow down
BASEADR=\$1DDC! numeric base, must be defined before first reset !
LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
! ---------------------------------------
-!1DE0! 28 RAM bytes free
+!1DE0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
! ============================================
-! Special Fonction Registers (SFR)
+! FRAM MAIN
! ============================================
+MAIN_ORG=\$C200! Code space start
+
+SLEEP=\$C200!
+BODYSLEEP=\$C204! address of SLEEP by default
+INIT_VECT=\$C20E! default init for RST and INT vectors, comprizing default terminal INT
+LIT=\$C224!
+NEXT_ADR=\$C22C!
+XSQUOTE=\$C22E!
+QTBRAN=\$C242!
+BRAN=\$C248!
+QFBRAN=\$C24C!
+SKIPBRAN=\$C252!
+XDO=\$C256!
+XPLOOP=\$C266!
+XLOOP=\$C278!
+MUSMOD=\$C27E! unsigned 32/16 division
+SETIB=\$C2C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$C2D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$C2E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$C2EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C2FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOCOL=\$C306! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287! CALL rDOCOL only for DTC model = 1, 2
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR5738
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFCE! FFCE-FFFF
+VECT_LEN=\$32!
+RTC_Vec=\$FFCE!
+P4_Vec=\$FFD0!
+P3_Vec=\$FFD2!
+TB2_x_Vec=\$FFD4! All others
+TB2_0_Vec=\$FFD6! only CCIFG0
+P2_Vec=\$FFD8!
+TB1_x_Vec=\$FFDA! All others
+TB1_0_Vec=\$FFDC! only CCIFG0
+P1_Vec=\$FFDE!
+TA1_x_Vec=\$FFE0! All others
+TA1_0_Vec=\$FFE2! only CCIFG0
+DMA_Vec=\$FFE4!
+!eUSCI_A1_Vec=\$FFE6!
+TA0_x_Vec=\$FFE8! All others
+TA0_0_Vec=\$FFEA! only CCIFG0
+ADC10_B_Vec=\$FFEC!
+eUSCI_B0_Vec=\$FFEE!
+eUSCI_A0_Vec=\$FFF0!
+TERM_Vec=\$FFF0!
+WDT_Vec=\$FFF2!
+TB0_x_Vec=\$FFF4! All others
+TB0_0_Vec=\$FFF6! only CCIFG0
+COMP_D_Vec=\$FFF8!
+USER_NMI_Vec=\$FFFA!
+SYS_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
+
+! ============================================
+! Special Fonction Registers (SFR)
+! ============================================
SFRIE1=\$100! \ SFR enable register
SFRIFG1=\$102! \ SFR flag register
! FRAM
! ----------------------------------------------
MAIN_ORG=\$C200! Code space start
-xdodoes=\$C200! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$C20E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$C220! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$C22A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
+
+SLEEP=\$C200!
+BODYSLEEP=\$C204!
+VECT_RESET=\$C20E!
+LIT=\$C224!
+NEXT_ADR=\$C22C!
+XSQUOTE=\$C22E!
+QTBRAN=\$C242!
+BRAN=\$C248!
+QFBRAN=\$C24C!
+SKIPBRAN=\$C252!
+XDO=\$C256!
+XPLOOP=\$C266!
+XLOOP=\$C278!
+MUSMOD=\$C27E! unsigned 32/16 division
+SETIB=\$C2C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$C2D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$C2E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$C2EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C2FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$C306! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$C306!
+XDOCOL=\$C310! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
DODOES=\$1284! CALL rDODOES
DOCON=\$1285! CALL rDOCON
DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
!MSP430fr5948.pat
-! ----------------------------------------------
-! MSP430fr5948 MEMORY MAP
-! ----------------------------------------------
-! 0000-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
-! 1800-187F = info D (FRAM 128 B)
-! 1880-18FF = info C (FRAM 128 B)
-! 1900-197F = info B (FRAM 128 B)
-! 1980-19FF = info A (FRAM 128 B)
-! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
-! 1A80-1BFF = unused (385 B)
-! 1C00-23FF = RAM (2 KB)
-! 2000-43FF = unused
-! 4400-FF7F = code memory (FRAM)
-! FF80-FFFF = interrupt vectors (FRAM 128 B)
-! ----------------------------------------------
-! ----------------------------------------------
-! FRAM ! INFO B, TLV
-! ----------------------------------------------
-INFO_ORG=\$1800!
-INFO_LEN=\$0200!
-INFOD_ORG=\$1800!
-INFOD_LEN=\$0080!
-INFOC_ORG=\$1880!
-INFOC_LEN=\$0080!
-INFOB_ORG=\$1900!
-INFOB_LEN=\$0080!
-INFOA_ORG=\$1980!
-INFOA_LEN=\$0080!
-TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0100! ;
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$1C00!
-RAM_LEN=\$0800!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$4400! Code space start
-xdodoes=\$4400! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$440E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$4420! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$442A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR5948
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFCC! FFCC-FFFF
-VECT_LEN=\$34!
-
-
-AES_Vec=\$FFCC!
-RTC_Vec=\$FFCE!
-P4_Vec=\$FFD0!
-P3_Vec=\$FFD2!
-TB2_x_Vec=\$FFD4!
-TB2_0_Vec=\$FFD6!
-P2_Vec=\$FFD8!
-TB1_x_Vec=\$FFDA!
-TB1_0_Vec=\$FFDC!
-P1_Vec=\$FFDE!
-TA1_x_Vec=\$FFE0!
-TA1_0_Vec=\$FFE2!
-DMA_Vec=\$FFE4!
-eUSCI_A1_Vec=\$FFE6!
-TA0_x_Vec=\$FFE8!
-TA0_0_Vec=\$FFEA!
-ADC12_B_Vec=\$FFEC!
-eUSCI_B0_Vec=\$FFEE!
-eUSCI_A0_Vec=\$FFF0!
-WDT_Vec=\$FFF2!
-TB0_x_Vec=\$FFF4!
-TB0_0_Vec=\$FFF6!
-COMP_D_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
! ============================================
! PORTx, Reg bits :
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
+! ----------------------------------------------
+! MSP430fr5948 MEMORY MAP
+! ----------------------------------------------
+! 0000-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
+! 1800-19FF = INFO 512 B FRAM
+! 1A00-1A7F = TLV device descriptor info (FRAM 128 B)
+! 1C00-23FF = RAM 2 KB
+! 4400-FF7F = MAIN FRAM
+! FF80-FFFF = interrupt vectors (FRAM 128 B)
+! ----------------------------------------------
-! =================================================
-! MSP430FR5x6x DEVICES HAVE SPECIFIC RAM ADDRESSES!
-! =================================================
-
-
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0100! ;
+DEVICEID=\$1A04!
+
+! ============================================
+! RAM
! ============================================
+RAM_ORG=\$1C00!
+RAM_LEN=\$0800!
+
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
-! FastForth RAM memory map (>= 2k):
-! ============================================
-
-
+! ---------------------------------------
+! FastForth RAM memory map (>= 1k)
+! ---------------------------------------
LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
LSATCK=\$1C00! \ leave stack, grow up
PSTACK=\$1C80! \ parameter stack, grow down
LAST_CFA=\$1DBA!
LAST_PSP=\$1DBC!
-STATEADR=\$1DBE! Interpreter state
+STATEADR=\$1DBE! Interpreter state
SOURCE_LEN=\$1DC0! len of input stream
SOURCE_ADR=\$1DC2! adr of input stream
CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
CURRENT=\$1DDA! CURRENT dictionnary ptr
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
+BASEADR=\$1DDC! numeric base, must be defined before first reset !
LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
+
! ---------------------------------------
!1DE0! 28 RAM bytes free
! ---------------------------------------
SD_END=\$2170!
SD_LEN=\$16E!
+! ============================================
+! FRAM MAIN
+! ============================================
+MAIN_ORG=\$4400! Code space start
+
+SLEEP=\$4400!
+BODYSLEEP=\$4404!
+VECT_RESET=\$440E!
+LIT=\$4424!
+NEXT_ADR=\$442C!
+XSQUOTE=\$442E!
+QTBRAN=\$4442!
+BRAN=\$4448!
+QFBRAN=\$444C!
+SKIPBRAN=\$4452!
+XDO=\$4456!
+XPLOOP=\$4466!
+XLOOP=\$4478!
+MUSMOD=\$447E! unsigned 32/16 division
+SETIB=\$44C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$44D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$44E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$44EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$4506! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$4506!
+XDOCOL=\$4510! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR5948
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFCC! FFCC-FFFF
+VECT_LEN=\$34!
+
+
+AES_Vec=\$FFCC!
+RTC_Vec=\$FFCE!
+P4_Vec=\$FFD0!
+P3_Vec=\$FFD2!
+TB2_x_Vec=\$FFD4!
+TB2_0_Vec=\$FFD6!
+P2_Vec=\$FFD8!
+TB1_x_Vec=\$FFDA!
+TB1_0_Vec=\$FFDC!
+P1_Vec=\$FFDE!
+TA1_x_Vec=\$FFE0!
+TA1_0_Vec=\$FFE2!
+DMA_Vec=\$FFE4!
+eUSCI_A1_Vec=\$FFE6!
+TA0_x_Vec=\$FFE8!
+TA0_0_Vec=\$FFEA!
+ADC12_B_Vec=\$FFEC!
+eUSCI_B0_Vec=\$FFEE!
+eUSCI_A0_Vec=\$FFF0!
+WDT_Vec=\$FFF2!
+TB0_x_Vec=\$FFF4!
+TB0_0_Vec=\$FFF6!
+COMP_D_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
! ============================================
! Special Fonction Registers (SFR)
! ============================================
-
SFRIE1=\$100! \ SFR enable register
SFRIFG1=\$102! \ SFR flag register
SFRRPCR=\$104! \ SFR reset pin control
!MSP430fr5969.pat
-! ----------------------------------------------
-! MSP430FR5969 MEMORY MAP
-! ----------------------------------------------
-! 0000-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
-! 1800-187F = FRAM info D (128 B)
-! 1880-18FF = FRAM info C (128 B)
-! 1900-197F = FRAM info B (128 B)
-! 1980-19FF = FRAM info A (128 B)
-! 1A00-1AFF = TLV device descriptor info (FRAM 256 B)
-! 1B00-1BFF = unused (256 B)
-! 1C00-23FF = RAM (2 KB)
-! 4400-FF7F = code memory (FRAM 47 kB)
-! FF80-FFFF = interrupt vectors (FRAM 127 B)
-! ----------------------------------------------
-! ----------------------------------------------
-! FRAM ! INFO B, TLV
-! ----------------------------------------------
-INFO_ORG=\$1800!
-INFO_LEN=\$0200!
-INFOD_ORG=\$1800!
-INFOD_LEN=\$0080!
-INFOC_ORG=\$1880!
-INFOC_LEN=\$0080!
-INFOB_ORG=\$1900!
-INFOB_LEN=\$0080!
-INFOA_ORG=\$1980!
-INFOA_LEN=\$0080!
-TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0100! ;
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$1C00!
-RAM_LEN=\$0800!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$4400! Code space start
-xdodoes=\$4400! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$440E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$4420! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$442A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR5969
-! ----------------------------------------------
-MAIN_LEN=\$FC00! 63k FRAM
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFCC! FFCC-FFFF
-VECT_LEN=\$34!
-
-AES_Vec=\$FFCC!
-RTC_Vec=\$FFCE!
-P4_Vec=\$FFD0!
-P3_Vec=\$FFD2!
-TA3_x_Vec=\$FFD4!
-TA3_0_Vec=\$FFD6!
-P2_Vec=\$FFD8!
-TA2_x_Vec=\$FFDA!
-TA2_0_Vec=\$FFDC!
-P1_Vec=\$FFDE!
-TA1_x_Vec=\$FFE0!
-TA1_0_Vec=\$FFE2!
-DMA_Vec=\$FFE4!
-eUSCI_A1_Vec=\$FFE6!
-TA0_x_Vec=\$FFE8!
-TA0_0_Vec=\$FFEA!
-ADC12_B_Vec=\$FFEC!
-eUSCI_B0_Vec=\$FFEE!
-eUSCI_A0_Vec=\$FFF0!
-WDT_Vec=\$FFF2!
-TB0_x_Vec=\$FFF4!
-TB0_0_Vec=\$FFF6!
-COMP_D_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
! ============================================
! PORTx, Reg bits :
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
-
-! =================================================
-! MSP430FR5x6x DEVICES HAVE SPECIFIC RAM ADDRESSES!
-! =================================================
-
-
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! MSP430FR5969 MEMORY MAP
+! ----------------------------------------------
+! 0000-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
+! 1800-19FF = FRAM INFO 512 B
+! 1A00-1AFF = TLV device descriptor info (FRAM 256 B)
+! 1C00-23FF = RAM (2 KB)
+! 4400-FF7F = MAIN (FRAM 47 kB)
+! FF80-FFFF = interrupt vectors (FRAM 127 B)
+! ----------------------------------------------
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0100! ;
+DEVICEID=\$1A04!
+
! ============================================
+! RAM
+! ============================================
+RAM_ORG=\$1C00!
+RAM_LEN=\$0800!
+
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
-! FastForth RAM memory map (>= 2k):
-! ============================================
-
-
+! ---------------------------------------
+! FastForth RAM memory map (>= 1k)
+! ---------------------------------------
LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
LSATCK=\$1C00! \ leave stack, grow up
PSTACK=\$1C80! \ parameter stack, grow down
LAST_CFA=\$1DBA!
LAST_PSP=\$1DBC!
-STATEADR=\$1DBE! Interpreter state
+STATEADR=\$1DBE! Interpreter state
SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ORG=\$1DC2! adr of input stream
+SOURCE_ADR=\$1DC2! adr of input stream
TOIN=\$1DC4! >IN
DP=\$1DC6! dictionary ptr
CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
CURRENT=\$1DDA! CURRENT dictionnary ptr
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
+BASEADR=\$1DDC! numeric base, must be defined before first reset !
LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
+
! ---------------------------------------
!1DE0! 28 RAM bytes free
! ---------------------------------------
SDIB_I2CADR=\$2118!
SDIB_I2CCNT=\$211A!
SDIB_ORG=\$251C!
+SDIB_LEN=\$54!
SD_END=\$2170!
SD_LEN=\$16E!
+! ============================================
+! FRAM MAIN
+! ============================================
+MAIN_ORG=\$4400! Code space start
+
+SLEEP=\$4400!
+BODYSLEEP=\$4404!
+VECT_RESET=\$440E!
+LIT=\$4424!
+NEXT_ADR=\$442C!
+XSQUOTE=\$442E!
+QTBRAN=\$4442!
+BRAN=\$4448!
+QFBRAN=\$444C!
+SKIPBRAN=\$4452!
+XDO=\$4456!
+XPLOOP=\$4466!
+XLOOP=\$4478!
+MUSMOD=\$447E! unsigned 32/16 division
+SETIB=\$44C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$44D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$44E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$44EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$4506! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$4506!
+XDOCOL=\$4510! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR5969
+! ----------------------------------------------
+MAIN_LEN=\$FC00! 63k FRAM
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFCC! FFCC-FFFF
+VECT_LEN=\$34!
+
+AES_Vec=\$FFCC!
+RTC_Vec=\$FFCE!
+P4_Vec=\$FFD0!
+P3_Vec=\$FFD2!
+TA3_x_Vec=\$FFD4!
+TA3_0_Vec=\$FFD6!
+P2_Vec=\$FFD8!
+TA2_x_Vec=\$FFDA!
+TA2_0_Vec=\$FFDC!
+P1_Vec=\$FFDE!
+TA1_x_Vec=\$FFE0!
+TA1_0_Vec=\$FFE2!
+DMA_Vec=\$FFE4!
+eUSCI_A1_Vec=\$FFE6!
+TA0_x_Vec=\$FFE8!
+TA0_0_Vec=\$FFEA!
+ADC12_B_Vec=\$FFEC!
+eUSCI_B0_Vec=\$FFEE!
+eUSCI_A0_Vec=\$FFF0!
+WDT_Vec=\$FFF2!
+TB0_x_Vec=\$FFF4!
+TB0_0_Vec=\$FFF6!
+COMP_D_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
! ============================================
! Special Fonction Registers (SFR)
SD_IFG .equ eUSCI_B0_SFR + 2Ch ; eUSCI_B0 Interrupt Flags Register
.ENDIF ;UCB0_SD
+ .IFDEF UCB0_TERM
+I2CTERM_CTLW0 .equ eUSCI_B0_SFR + 00h ; USCI_B0 Control Word Register 0
+I2CTERM_CTLW1 .equ eUSCI_B0_SFR + 02h ; USCI_B0 Control Word Register 1
+I2CTERM_BRW .equ eUSCI_B0_SFR + 06h ; USCI_B0 Baud Word Rate 0
+I2CTERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
+I2CTERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
+I2CTERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
+I2CTERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+I2CTERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
+I2CTERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
+I2CTERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
+I2CTERMVEC .equ 0FFE0h ; interrupt vector for eUSCI_B0
+ .ENDIF ;UCB0_TERM
!MSP430fr5994.pat
-! ----------------------------------------------
-! MSP430FR5994 MEMORY MAP
-! ----------------------------------------------
-! 000A-001F = tiny RAM
-! 0020-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
-! 1800-187F = FRAM info D (128 B)
-! 1880-18FF = FRAM info C (128 B)
-! 1900-197F = FRAM info B (128 B)
-! 1980-19FF = FRAM info A (128 B)
-! 1A00-1AFF = FRAM TLV device descriptor info (256 B)
-! 1B00-1BFF = unused (256 B)
-! 1C00-2BFF = RAM (4KB)
-! 2C00-3BFF = sharedRAM (4kB)
-! 4400-FF7F = FRAM code memory (FRAM) (MSP430FR59x8/9)
-! 8000-FF7F = FRAM code memory (FRAM) (MSP430FR59x7/8/9)
-! FF80-FFFF = FRAM interrupt vectors and signatures (FRAM)
-
-! ----------------------------------------------
-! PAGESIZE .equ 512 ; MPU unit
-! ----------------------------------------------
-! BSL
-! ----------------------------------------------
-BSL=\$1000!
-! ----------------------------------------------
-! FRAM ; INFO B, A, TLV
-! ----------------------------------------------
-INFO_ORG=\$1800!
-INFO_LEN=\$0200!
-INFOD_ORG=\$1800!
-INFOD_LEN=\$0080!
-INFOC_ORG=\$1880!
-INFOC_LEN=\$0080!
-INFOB_ORG=\$1900!
-INFOB_LEN=\$0080!
-INFOA_ORG=\$1980!
-INFOA_LEN=\$0080!
-TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0100! ;
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-TinyRAM_ORG=\$0A!
-TinyRAM_LEN=\$16!
-RAM_ORG=\$1C00!
-RAM_LEN=\$1000!
-SharedRAM_ORG=\$2C00!
-SharedRAM_LEN=\$1000!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$4000! Code space start
-MAIN_LEN=\$40000! 256 k FRAM
-! ----------------------------------------------
-xdodoes=\$4000! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$400E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$4020! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$402A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR5994
-! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line, and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0, enable JTAG/SBW
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits max
-IPE_SIG_VALID=\$FF88! one word
-IPE_STR_PTR_SRC=\$FF8A! one word
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\0FFB4! FFB4-FFFF
-VECT_LEN=\$4C!
-
-
-LEA_Vec=\$FFB4!
-P8_Vec=\$FFB6!
-P7_Vec=\$FFB8!
-eUSCI_B3_Vec=\$FFBA!
-eUSCI_B2_Vec=\$FFBC!
-eUSCI_B1_Vec=\$FFBE!
-eUSCI_A3_Vec=\$FFC0!
-eUSCI_A2_Vec=\$FFC2!
-P6_Vec=\$FFC4!
-P5_Vec=\$FFC6!
-TA4_x_Vec=\$FFC8!
-TA4_0_Vec=\$FFCA!
-AES_Vec=\$FFCC!
-RTC_C_Vec=\$FFCE!
-P4_Vec=\$FFD0!
-P3_Vec=\$FFD2!
-TA3_x_Vec=\$FFD4!
-TA3_0_Vec=\$FFD6!
-P2_Vec=\$FFD8!
-TA2_x_Vec=\$FFDA!
-TA2_0_Vec=\$FFDC!
-P1_Vec=\$FFDE!
-TA1_x_Vec=\$FFE0!
-TA1_0_Vec=\$FFE2!
-DMA_Vec=\$FFE4!
-eUSCI_A1_Vec=\$FFE6!
-TA0_x_Vec=\$FFE8!
-TA0_0_Vec=\$FFEA!
-ADC12_B_Vec=\$FFEC!
-eUSCI_B0_Vec=\$FFEE!
-eUSCI_A0_Vec=\$FFF0!
-WDT_Vec=\$FFF2!
-TB0_x_Vec=\$FFF4!
-TB0_0_Vec=\$FFF6!
-COMP_E_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-
-
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
! ============================================
! PORTx, Reg bits :
NOP3=MOV R0,R0! \ MOV PC,PC one word three cycles
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
+! ----------------------------------------------
+! MSP430FR5994 MEMORY MAP
+! ----------------------------------------------
+! 000A-001F = tiny RAM
+! 0020-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
+! 1800-19FF = FRAM INFO 512 B
+! 1A00-1AFF = FRAM TLV device descriptor info (256 B)
+! 1C00-2BFF = RAM (4KB)
+! 2C00-3BFF = sharedRAM (4kB)
+! 4000-FF7F = FRAM MAIN
+! FF80-FFFF = FRAM interrupt vectors and signatures (FRAM)
+! 10000-
+! ----------------------------------------------
+! PAGESIZE .equ 512 ; MPU unit
+
-! =================================================
-! MSP430FR5x6x DEVICES HAVE SPECIFIC RAM ADDRESSES!
-! =================================================
+! ============================================
+! TINY RAM
+! ============================================
+TinyRAM_ORG=\$0A!
+TinyRAM_LEN=\$16!
+! ============================================
+! BSL
+! ============================================
+BSL1=\$1000!
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! FRAM INFO
! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0200!
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
! ============================================
+TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0100! ;
+DEVICEID=\$1A04!
+
+! ============================================
+! RAM
+! ============================================
+RAM_ORG=\$1C00!
+RAM_LEN=\$1000!
+SharedRAM_ORG=\$2C00!
+SharedRAM_LEN=\$1000!
+
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
-! FastForth RAM memory map (>= 2k):
-! ============================================
-
-
+! ----------------------------------------------
+! FastForth RAM memory map (>= 1k):
+! ----------------------------------------------
LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
LSATCK=\$1C00! \ leave stack, grow up
PSTACK=\$1C80! \ parameter stack, grow down
SD_END=\$2170!
SD_LEN=\$16E!
+! ============================================
+! FRAM MAIN
+! ============================================
+MAIN_ORG=\$4000! Code space start
+MAIN_LEN=\$40000! 256 k FRAM
+! ----------------------------------------------
+
+SLEEP=\$4000!
+BODYSLEEP=\$4004!
+INIT_VECT=\$400E!
+LIT=\$4024!
+NEXT_ADR=\$402C!
+XSQUOTE=\$402E!
+QTBRAN=\$4042!
+BRAN=\$4048!
+QFBRAN=\$404C!
+SKIPBRAN=\$4052!
+XDO=\$4056!
+XPLOOP=\$4066!
+XLOOP=\$4078!
+MUSMOD=\$407E! unsigned 32/16 division
+SETIB=\$40C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$40D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$40E2! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$40EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$40FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOCOL=\$4106! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR5994
+! ----------------------------------------------
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line, and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0, enable JTAG/SBW
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits max
+IPE_SIG_VALID=\$FF88! one word
+IPE_STR_PTR_SRC=\$FF8A! one word
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\0FFB4! FFB4-FFFF
+VECT_LEN=\$4C!
+
+
+LEA_Vec=\$FFB4!
+P8_Vec=\$FFB6!
+P7_Vec=\$FFB8!
+eUSCI_B3_Vec=\$FFBA!
+eUSCI_B2_Vec=\$FFBC!
+eUSCI_B1_Vec=\$FFBE!
+eUSCI_A3_Vec=\$FFC0!
+eUSCI_A2_Vec=\$FFC2!
+P6_Vec=\$FFC4!
+P5_Vec=\$FFC6!
+TA4_x_Vec=\$FFC8!
+TA4_0_Vec=\$FFCA!
+AES_Vec=\$FFCC!
+RTC_C_Vec=\$FFCE!
+P4_Vec=\$FFD0!
+P3_Vec=\$FFD2!
+TA3_x_Vec=\$FFD4!
+TA3_0_Vec=\$FFD6!
+P2_Vec=\$FFD8!
+TA2_x_Vec=\$FFDA!
+TA2_0_Vec=\$FFDC!
+P1_Vec=\$FFDE!
+TA1_x_Vec=\$FFE0!
+TA1_0_Vec=\$FFE2!
+DMA_Vec=\$FFE4!
+eUSCI_A1_Vec=\$FFE6!
+TA0_x_Vec=\$FFE8!
+TA0_0_Vec=\$FFEA!
+ADC12_B_Vec=\$FFEC!
+eUSCI_B0_Vec=\$FFEE!
+eUSCI_A0_Vec=\$FFF0!
+WDT_Vec=\$FFF2!
+TB0_x_Vec=\$FFF4!
+TB0_0_Vec=\$FFF6!
+COMP_E_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
! ============================================
! Special Fonction Registers (SFR)
!MSP430fr6989.pat
-! ----------------------------------------------
-! MSP430FR6989 MEMORY MAP
-! ----------------------------------------------
-! 0000-0005 = reserved ROM
-! 0006-001F = tiny RAM 26 bytes
-! 0020-0FFF = peripherals (4 KB)
-! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
-! 1800-187F = FRAM info D (128 B)
-! 1880-18FF = FRAM info C (128 B)
-! 1900-197F = FRAM info B (128 B)
-! 1980-19FF = FRAM info A (128 B)
-! 1A00-1AFF = TLV device descriptor info (FRAM 256 B)
-! 1B00-1BFF = ROM boot memory
-! 1C00-23FF = RAM (2 KB)
-! 2000-C1FF = unused (41472 B)
-! C200-FF7F = code memory (FRAM 15743 B)
-! FF80-FFFF = interrupt vectors (FRAM 127 B)
-! ----------------------------------------------
-! ----------------------------------------------
-! FRAM ; INFO B, A, TLV
-! ----------------------------------------------
-INFO_ORG=\$1800!
-INFO_LEN=\$0200!
-INFOD_ORG=\$1800!
-INFOD_LEN=\$0080!
-INFOC_ORG=\$1880!
-INFOC_LEN=\$0080!
-INFOB_ORG=\$1900!
-INFOB_LEN=\$0080!
-INFOA_ORG=\$1980!
-INFOA_LEN=\$0080!
-TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0100! ;
-DEVICEID=\$1A04!
-! ----------------------------------------------
-! RAM
-! ----------------------------------------------
-RAM_ORG=\$1C00!
-RAM_LEN=\$0800!
-! ----------------------------------------------
-! FRAM
-! ----------------------------------------------
-MAIN_ORG=\$4400! Code space start
-xdodoes=\$4400! restore rDODOES: MOV #xdodoes,rDODOES
-xdocon=\$440E! restore rDOCON: MOV #xdocon,rDOCON
-xdovar=\$4420! restore rDOVAR: MOV #xdocon,rDOVAR
-xdocol=\$442A! restore rDOCOL: MOV #xdocol,rDOCOL only for DTC model = 1
-DODOES=\$1284! CALL rDODOES
-DOCON=\$1285! CALL rDOCON
-DOVAR=\$1286! CALL rDOVAR
-
-! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
-! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
-! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-! ----------------------------------------------
-! Interrupt Vectors and signatures - MSP430FR5969
-! ----------------------------------------------
-MAIN_LEN=\$1FC00! 127 k FRAM
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
-SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
-JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-JTAG_PASSWORD=\$FF88! 256 bits
-BSL_PASSWORD=\$FFE0! 256 bits
-VECT_ORG=\$FFC6! FFC6-FFFF
-VECT_LEN=\$3A!
-
-
-AES_Vec=\$FFC6!
-RTC_Vec=\$FFC8!
-LCD_Vec=\$FFCA!
-P4_Vec=\$FFCC!
-P3_Vec=\$FFCE!
-TA3_x_Vec=\$FFD0!
-TA3_0_Vec=\$FFD2!
-P2_Vec=\$FFD4!
-TA2_x_Vec=\$FFD6!
-TA2_0_Vec=\$FFD8!
-P1_Vec=\$FFDA!
-TA1_x_Vec=\$FFDC!
-TA1_0_Vec=\$FFDE!
-DMA_Vec=\$FFE0!
-eUSCI_B1_Vec=\$FFE2!
-eUSCI_A1_Vec=\$FFE4!
-TA0_x_Vec=\$FFE6!
-TA0_0_Vec=\$FFE8!
-ADC12_B_Vec=\$FFEA!
-eUSCI_B0_Vec=\$FFEC!
-eUSCI_A0_Vec=\$FFEE!
-ESI_Vec=\$FFF0!
-WDT_Vec=\$FFF2!
-TB0_x_Vec=\$FFF4!
-TB0_0_Vec=\$FFF6!
-COMP_E_Vec=\$FFF8!
-U_NMI_Vec=\$FFFA!
-S_NMI_Vec=\$FFFC!
-RST_Vec=\$FFFE!
-
-
-!MSP430fr5x6x.pat
-
-LPM4=\$F8! SR(LPM4+GIE)
-LPM3=\$D8! SR(LPM3+GIE)
-LPM2=\$98! SR(LPM2+GIE)
-LPM1=\$58! SR(LPM1+GIE)
-LPM0=\$18! SR(LPM0+GIE)
-
-
-
! ============================================
! SR bits :
! ============================================
\#UF10=\#\$400! = SR(10) User Flag 2
\#UF11=\#\$800! = SR(11) User Flag 3
+LPM4=\$F8! SR(LPM4+GIE)
+LPM3=\$D8! SR(LPM3+GIE)
+LPM2=\$98! SR(LPM2+GIE)
+LPM1=\$58! SR(LPM1+GIE)
+LPM0=\$18! SR(LPM0+GIE)
! ============================================
! PORTx, Reg bits :
NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
-! =================================================
-! MSP430FR5x6x DEVICES HAVE SPECIFIC RAM ADDRESSES!
-! =================================================
+! ----------------------------------------------
+! MSP430FR6989 MEMORY MAP
+! ----------------------------------------------
+! 0000-0005 = reserved ROM
+! 0006-001F = tiny RAM 26 bytes
+! 0020-0FFF = peripherals (4 KB)
+! 1000-17FF = ROM bootstrap loader BSL0..3 (4x512 B)
+! 1800-19FF = FRAM INFO 512 B
+! 1A00-1AFF = TLV device descriptor info (FRAM 256 B)
+! 1B00-1BFF = ROM boot memory
+! 1C00-23FF = RAM (2 KB)
+! 4400-FF7F = code memory (FRAM 48 kB)
+! FF80-FFFF = interrupt vectors (FRAM 127 B)
+! ----------------------------------------------
-! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
-! those addresses are usable with the symbolic assembler
+! ============================================
+! TINY RAM
+! ============================================
+TinyRAM_ORG=\$06!
+TinyRAM_LEN=\$20!
! ============================================
-! FastForth INFO(DCBA) memory map (256 bytes):
+! BSL
! ============================================
+BSL1=\$1000!
+! ============================================
+! FRAM INFO
+! ============================================
+INFO_ORG=\$1800!
+INFO_LEN=\$0200!
+
+! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
+! those addresses are usable with the symbolic assembler
+! ----------------------------------------------
+! FastForth INFO
+! ----------------------------------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
WriteSectorWX=\$181A! call with W = SectorLO X = SectorHI
! ============================================
-! FORTH RAM areas :
+! FRAM TLV
+! ============================================
+TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0100! ;
+DEVICEID=\$1A04!
+
+
+! ============================================
+! RAM
! ============================================
+RAM_ORG=\$1C00!
+RAM_LEN=\$0800!
+
+! ---------------------------------------
+! FORTH RAM areas :
+! ---------------------------------------
LSTACK_SIZE=\#16! words
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
TIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-! ============================================
-! FastForth RAM memory map (>= 2k):
-! ============================================
-
-
+! ----------------------------------------------
+! FastForth RAM memory map (>= 1k):
+! ----------------------------------------------
LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
LSATCK=\$1C00! \ leave stack, grow up
PSTACK=\$1C80! \ parameter stack, grow down
SD_END=\$2170!
SD_LEN=\$16E!
+! ----------------------------------------------
+! FRAM
+! ----------------------------------------------
+MAIN_ORG=\$4400! Code space start
+
+SLEEP=\$4400!
+BODYSLEEP=\$4404!
+VECT_RESET=\$440E!
+LIT=\$4424!
+NEXT_ADR=\$442C!
+XSQUOTE=\$442E!
+QTBRAN=\$4442!
+BRAN=\$4448!
+QFBRAN=\$444C!
+SKIPBRAN=\$4452!
+XDO=\$4456!
+XPLOOP=\$4466!
+XLOOP=\$4478!
+MUSMOD=\$447E! unsigned 32/16 division
+SETIB=\$44C4! Set Input Buffer with org len values, reset >IN
+REFILL=\$44D4! accept one line from input and leave org len of input buffer
+CIB_ADR=\$44E4! contents currently TIB_ORG; may be redirected to SDIB_ORG
+XDODOES=\$44EC! restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44FA! restore rDOCON: MOV #XDOCON,rDOCON
+XDOVAR=\$4506! restore rDOVAR: MOV #XDOCON,rDOVAR
+RFROM=\$4506!
+XDOCOL=\$4510! restore rDOCOL: MOV #XDOCOL,rDOCOL only for DTC model = 1
+
+DODOES=\$1284! CALL rDODOES
+DOCON=\$1285! CALL rDOCON
+DOVAR=\$1286! CALL rDOVAR
+DOCOL=\$1287!
+
+! to find DTC value, download \MSP430-FORTH\FastForthSpecs.4th
+! if DTC = 1, restore rDOCOL as this : MOV #xdocol,rDOCOL
+! if DTC = 2, restore rDOCOL as this : MOV #EXIT,rDOCOL
+! if DTC = 3, nothing to do, R7 is free for use.
+! ----------------------------------------------
+! Interrupt Vectors and signatures - MSP430FR6989
+! ----------------------------------------------
+MAIN_LEN=\$1FC00! 127 k FRAM
+FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+SIGNATURES=\$FF80! JTAG/BSL signatures
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
+JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+JTAG_PASSWORD=\$FF88! 256 bits
+BSL_PASSWORD=\$FFE0! 256 bits
+VECT_ORG=\$FFC6! FFC6-FFFF
+VECT_LEN=\$3A!
+
+
+AES_Vec=\$FFC6!
+RTC_Vec=\$FFC8!
+LCD_Vec=\$FFCA!
+P4_Vec=\$FFCC!
+P3_Vec=\$FFCE!
+TA3_x_Vec=\$FFD0!
+TA3_0_Vec=\$FFD2!
+P2_Vec=\$FFD4!
+TA2_x_Vec=\$FFD6!
+TA2_0_Vec=\$FFD8!
+P1_Vec=\$FFDA!
+TA1_x_Vec=\$FFDC!
+TA1_0_Vec=\$FFDE!
+DMA_Vec=\$FFE0!
+eUSCI_B1_Vec=\$FFE2!
+eUSCI_A1_Vec=\$FFE4!
+TA0_x_Vec=\$FFE6!
+TA0_0_Vec=\$FFE8!
+ADC12_B_Vec=\$FFEA!
+eUSCI_B0_Vec=\$FFEC!
+eUSCI_A0_Vec=\$FFEE!
+ESI_Vec=\$FFF0!
+WDT_Vec=\$FFF2!
+TB0_x_Vec=\$FFF4!
+TB0_0_Vec=\$FFF6!
+COMP_E_Vec=\$FFF8!
+U_NMI_Vec=\$FFFA!
+S_NMI_Vec=\$FFFC!
+RST_Vec=\$FFFE!
! ============================================
! Special Fonction Registers (SFR)
! ============================================
-
SFRIE1=\$100! \ SFR enable register
SFRIFG1=\$102! \ SFR flag register
SFRRPCR=\$104! \ SFR reset pin control
; INIT order : WDT, GPIOs, FRAM, Clock, UARTs...
; ----------------------------------------------------------------------
-; ----------------------------------------------------------------------
-; POWER ON RESET AND INITIALIZATION : LOCK PMM_LOCKLPM5
-; ----------------------------------------------------------------------
-
-; BIS #LOCKLPM5,&PM5CTL0 ; unlocked by WARM
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : WATCHDOG TIMER A
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
CTS .equ 2 ; P2.1
- BIC.B #CTS,&P2OUT ; CTS input pulled down
+ BIC.B #CTS,&P2OUT ; CTS input resistor is pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
.IFDEF LF_XTAL
; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
+; BIC.B #1,&CSCTL6 ; disable XT1AUTOOFF
+
+ BIS.B #0C0h,&P2SEL1 ; P2.6 as XOUT, P2.7 as XIN
+
.ELSE
BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
.ENDIF
+
.IF FREQUENCY = 0.5
-; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
-; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
+ MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
- MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
+; MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
; =====================================
MOV #8,X
.ELSEIF FREQUENCY = 1
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
.ELSEIF FREQUENCY = 2
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
- ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
+ ; fCOCLKDIV = 32768 x (59+1) = 1.966 MHz ; measured : MHz
MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
.ELSEIF FREQUENCY = 4
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
.ELSEIF FREQUENCY = 8
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
+ MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
- MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
+; MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
.ELSEIF FREQUENCY = 12
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
+ MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
- MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
+; MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
.ELSEIF FREQUENCY = 16
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
.ELSEIF FREQUENCY = 20
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00BDh,&CSCTL1 ; Set 20MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00BCh,&CSCTL1 ; Set 20MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
.ELSEIF FREQUENCY = 24
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00BFh,&CSCTL1 ; Set 24MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
MOV #00BEh,&CSCTL1 ; Set 24MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
TERM_IN=\$221! P4
TERM_REN=\$227!
TERM_SEL=\$22B! \ SEL0
-TERM_IE=\$23B!
-TERM_IFG=\$23D!
TERM_Vec=\$FFE2! UCA1
TERM_CTLW0=\$580! \ eUSCI_A1 control word 0
I2CMM_OUT=\$202!
I2CMM_DIR=\$204!
I2CMM_REN=\$206!
-I2CMM_SEL1=\$20A! SEL0
+I2CMM_SEL=\$20A! SEL0
I2CMM_Vec=\$FFE0! UCB0
MMSDA=4! P1.2
MMSCL=8! P1.3
I2CM_OUT=\$202!
I2CM_DIR=\$204!
I2CM_REN=\$206!
-I2CM_SEL1=\$20A! SEL0
+I2CM_SEL=\$20A! SEL0
I2CM_Vec=\$FFE0! UCB0
MSDA=4! P1.2
MSCL=8! P1.3
I2CS_OUT=\$202!
I2CS_DIR=\$204!
I2CS_REN=\$206!
-I2CS_SEL1=\$20A! SEL0
+I2CS_SEL=\$20A! SEL0
I2CS_Vec=\$FFE0! UCB0
SSDA=4! P1.2
SSCL=8! P1.3
S_BUS=\$0C!
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$540! USCI_B0 Control Word Register 0
+I2CM_CTLW1=\$542! USCI_B0 Control Word Register 1
+I2CM_BRW=\$546! USCI_B0 Baud Word Rate 0
+I2CM_STATW=\$548! USCI_B0 status word
+I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CM_RXBUF=\$54C! USCI_B0 Receive Buffer 8
+I2CM_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
+I2CM_I2COA0=\$554! USCI_B0 I2C Own Address 0
+I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CM_I2CSA=\$560! USCI_B0 I2C Slave Address
+I2CM_IE=\$56A! USCI_B0 Interrupt Enable
+I2CM_IFG=\$56C! USCI_B0 Interrupt Flags Register
+
+I2CS_CTLW0=\$540! USCI_B0 Control Word Register 0
+I2CS_CTLW1=\$542! USCI_B0 Control Word Register 1
+I2CS_BRW=\$546! USCI_B0 Baud Word Rate 0
+I2CS_STATW=\$548! USCI_B0 status word
+I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CS_RXBUF=\$54C! USCI_B0 Receive Buffer 8
+I2CS_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
+I2CS_I2COA0=\$554! USCI_B0 I2C Own Address 0
+I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CS_I2CSA=\$560! USCI_B0 I2C Slave Address
+I2CS_IE=\$56A! USCI_B0 Interrupt Enable
+I2CS_IFG=\$56C! USCI_B0 Interrupt Flags Register
+
SD_CD=\$10! P4.4 as SD_CD
SD_CDIN=\$221!
SD_CS=\$20! P2.5 as SD_CS
; P1.0 - RTS TERMINAL
; P1.1 - CTS TERMINAL
+LED1_OUT .equ 202h
+LED1_DIR .equ 204h
+LED1 .equ 1 ; P1.0
+
+RTS .equ 1 ; P1.0
+CTS .equ 2 ; P1.1
+HANDSHAKOUT .equ P1OUT
+HANDSHAKIN .equ P1IN
.IFDEF UCA0_TERM
-TXD .equ 10h ; P1.4 = TXD + FORTH Deep_RST pin
-RXD .equ 20h ; P1.5
-TERM_BUS .equ 30h
-TERM_IN .equ P1IN
-TERM_SEL .equ P1SEL0
-TERM_REN .equ P1REN
+TXD .equ 10h ; P1.4 = TXD + FORTH Deep_RST pin
+RXD .equ 20h ; P1.5
+TERM_BUS .equ 30h
+TERM_IN .equ P1IN
+TERM_SEL .equ P1SEL0
+TERM_REN .equ P1REN
.ENDIF
+; P2.1 <--- SD_CD (Card Detect)
+SD_CD .equ 2
+SD_CDIN .equ P2IN
+; P2.0 ---> SD_CS (Card Select)
+SD_CS .equ 1
+SD_CSOUT .equ P2OUT
+SD_CSDIR .equ P2DIR
+
.IFDEF UCA1_SD
-SD_SEL .equ PASEL0 ; to configure UCA1
-SD_REN .equ PAREN ; to configure pullup resistors
-SD_BUS .equ 07000h ; pins P2.4 as UCA1CLK, P2.5 as UCA1SOMI & P2.6 as UCA1SIMO
+SD_SEL .equ PASEL0 ; to configure UCA1
+SD_REN .equ PAREN ; to configure pullup resistors
+SD_BUS .equ 07000h ; pins P2.4 as UCA1CLK, P2.5 as UCA1SOMI & P2.6 as UCA1SIMO
+ .ENDIF
+
+ .IFDEF UCA1_TERM
+TXD .equ 40h ; P2.6 = TXD + FORTH Deep_RST pin
+RXD .equ 20h ; P2.5
+TERM_BUS .equ 60h
+TERM_IN .equ P2IN ; TERMINAL TX pin as FORTH Deep_RST
+TERM_SEL .equ P2SEL0
+TERM_REN .equ P2REN
.ENDIF
-; P2.1 <--- SD_CD (Card Detect)
-SD_CD .equ 2
-SD_CDIN .equ P2IN
-; P2.0 ---> SD_CS (Card Select)
-SD_CS .equ 1
-SD_CSOUT .equ P2OUT
-SD_CSDIR .equ P2DIR
+ .IFDEF UCB0_TERM ; for MSP_EXP430FR2433_I2C
+S_BUS .equ 0Ch ; P1.2=SDA P1.3=SCL
+I2CS_SEL .equ P1SEL0
+I2CS_REN .equ P1REN
+I2CS_OUT .equ P1OUT
+I2CS_VEC .equ 0FFE0h ; UCB0_Vec
+
+I2CS_CTLW0 .equ 540h ; USCI_B0 Control Word Register 0
+I2CS_CTLW1 .equ 542h ; USCI_B0 Control Word Register 1
+I2CS_BRW .equ 546h ; USCI_B0 Baud Word Rate 0
+I2CS_STATW .equ 548h ; USCI_B0 status word
+I2CS_TBCNT .equ 54Ah ; USCI_B0 byte counter threshold
+I2CS_RXBUF .equ 54Ch ; USCI_B0 Receive Buffer 8
+I2CS_TXBUF .equ 54Eh ; USCI_B0 Transmit Buffer 8
+I2CS_I2COA0 .equ 554h ; USCI_B0 I2C Own Address 0
+I2CS_ADDRX .equ 55Ch ; USCI_B0 Received Address Register
+I2CS_ADDMASK .equ 55Eh ; USCI_B0 Address Mask
+I2CS_I2CSA .equ 560h ; USCI_B0 I2C Slave Address
+I2CS_IE .equ 56Ah ; USCI_B0 Interrupt Enable
+I2CS_IFG .equ 56Ch ; USCI_B0 Interrupt Flags Register
+ .ENDIF
- .IFDEF UCA1_TERM
-TXD .equ 40h ; P2.6 = TXD + FORTH Deep_RST pin
-RXD .equ 20h ; P2.5
-TERM_BUS .equ 60h
-TERM_IN .equ P2IN ; TERMINAL TX pin as FORTH Deep_RST
-TERM_SEL .equ P2SEL0
-TERM_REN .equ P2REN
+ .IFDEF UCB0_I2CM ; for TERM2IIC add-on
+I2CT_BUS .equ 0Ch ; P1.2=SDA P1.3=SCL
+I2CT_SEL .equ P1SEL0
+I2CT_REN .equ P1REN
+I2CT_OUT .equ P1OUT
.ENDIF
+I2CT_SLA_BUS .equ 07h ; P2.0 P2.1 P2.1
+I2CT_SLA_IN .equ P2IN
+I2CT_SLA_OUT .equ P2OUT
+I2CT_SLA_DIR .equ P2DIR
+I2CT_SLA_REN .equ P2REN
+
MOV #-1,&PAREN ; all inputs with pull up/down resistors
MOV #0FFFCh,&PAOUT ; all pins with pullup resistors else LED1/LED2
.IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P1OUT
-HANDSHAKIN .equ P1IN
-RTS .equ 1 ; P1.0
-; BIS.B #RTS,&P1DIR ; RTS as output high
- BIS.B #RTS,&P1OUT ; RTS as output high
+ BIS.B #RTS,&P1DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 2 ; P1.1
- BIC.B #CTS,&P1DIR ; CTS input pulled down
-; BIC.B #CTS,&P1OUT ; CTS input pulled down
+ BIC.B #CTS,&P1OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
- .IFDEF UCB0_TERM ; for MSP_EXP430FR2433_I2C
-I2CM_BUS .equ 0Ch ; P1.2=SDA P1.3=SCL
-I2CM_SEL .equ P1SEL0
-I2CM_REN .equ P1REN
-I2CM_OUT .equ P1OUT
- .ENDIF
-
- .IFDEF UCB0_I2CM ; for TERM2IIC add-on
-I2CT_BUS .equ 0Ch ; P1.2=SDA P1.3=SCL
-I2CT_SEL .equ P1SEL0
-I2CT_REN .equ P1REN
-I2CT_OUT .equ P1OUT
- .ENDIF
-
-I2CT_SLA_BUS .equ 07h ; P2.0 P2.1 P2.1
-I2CT_SLA_IN .equ P2IN
-I2CT_SLA_OUT .equ P2OUT
-I2CT_SLA_DIR .equ P2DIR
-I2CT_SLA_REN .equ P2REN
-
-
-
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3
; ----------------------------------------------------------------------
! P2.1 - J2.12 - <---- SD_CD (Card Detect)
! P2.0 - J2.11 - ----> SD_CS (Card Select)
!
-! P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Slave
! P1.3 - UCB0 SCL J1.9 - ----> SCL I2C Slave
+! P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Slave
!
! P3.1 - J2.13 - ----> SCL I2C SoftMaster
! P3.2 - J2.17 - <---> SDA I2C SoftMaster
! APPLICATION I/O :
! ============================================
LED1_OUT=\$202!
+LED1_DIR=\$204!
LED1=1! P1.0
LED2_OUT=\$202!
I2CMM_DIR=\$204!
I2CMM_REN=\$206!
I2CMM_SEL=\$20A! SEL0
-I2CMM_Vec=\$FFE0!
+I2CMM_Vec=\$FFE0! UCB0_Vec
MMSDA=\$04! P1.2
MMSCL=\$08! P1.3
MM_BUS=\$0C!
I2CM_DIR=\$204!
I2CM_REN=\$206!
I2CM_SEL=\$20A! SEL0
-I2CM_Vec=\$FFE0!
+I2CM_Vec=\$FFE0! UCB0_Vec
MSDA=\$04! P1.2
MSCL=\$08! P1.3
M_BUS=\$0C!
I2CS_DIR=\$204!
I2CS_REN=\$206!
I2CS_SEL=\$20A! SEL0
-I2CS_Vec=\$FFE0!
-SSDA=\$40! P1.2
-SSCL=\$80! P1.3
-S_BUS=\$C0!
+I2CS_Vec=\$FFE0! UCB0_Vec
+SSDA=\$04! P1.2
+SSCL=\$08! P1.3
+S_BUS=\$0C!
+
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$540! USCI_B0 Control Word Register 0
+I2CM_CTLW1=\$542! USCI_B0 Control Word Register 1
+I2CM_BRW=\$546! USCI_B0 Baud Word Rate 0
+I2CM_STATW=\$548! USCI_B0 status word
+I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CM_RXBUF=\$54C! USCI_B0 Receive Buffer 8
+I2CM_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
+I2CM_I2COA0=\$554! USCI_B0 I2C Own Address 0
+I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CM_I2CSA=\$560! USCI_B0 I2C Slave Address
+I2CM_IE=\$56A! USCI_B0 Interrupt Enable
+I2CM_IFG=\$56C! USCI_B0 Interrupt Flags Register
+
+I2CS_CTLW0=\$540! USCI_B0 Control Word Register 0
+I2CS_CTLW1=\$542! USCI_B0 Control Word Register 1
+I2CS_BRW=\$546! USCI_B0 Baud Word Rate 0
+I2CS_STATW=\$548! USCI_B0 status word
+I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CS_RXBUF=\$54C! USCI_B0 Receive Buffer 8
+I2CS_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
+I2CS_I2COA0=\$554! USCI_B0 I2C Own Address 0
+I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CS_I2CSA=\$560! USCI_B0 I2C Slave Address
+I2CS_IE=\$56A! USCI_B0 Interrupt Enable
+I2CS_IFG=\$56C! USCI_B0 Interrupt Flags Register
SD_CD=2! ; P2.1 as SD_CD
SD_CS=1! ; P2.0 as SD_CS
; P1.1 - RX0
.IFDEF UCA0_TERM
-TXD .equ 1 ; P1.0 = TXD + FORTH Deep_RST pin
-RXD .equ 2 ; P1.1
-TERM_BUS .equ 003h ; TX RX
-TERM_IN .equ P1IN
-TERM_REN .equ P1REN
-TERM_SEL .equ P1SEL0
+TXD .equ 1 ; P1.0 = TXD + FORTH Deep_RST pin
+RXD .equ 2 ; P1.1
+TERM_BUS .equ 003h ; TX RX
+TERM_IN .equ P1IN
+TERM_REN .equ P1REN
+TERM_SEL .equ P1SEL0
.ENDIF
-
- .IFDEF TERMINAL4WIRES
-
-; RTS output is wired to the CTS input of UART2USB bridge
-; configure RTS as output high to disable RX TERM during start FORTH
-
+RTS .set 8 ; P2.3 bit position
+CTS .set 10h ; P2.4 bit position
HANDSHAKOUT .set P2OUT
HANDSHAKIN .set P2IN
-RTS .set 8 ; P2.3 bit position
-
- BIS #00800h,&PADIR ; all pins as input else RTS P2.3 as output
BIS #-1,&PAREN ; all input pins with resistor
+ BIS #-1,&PAOUT ; all pins with PULLUP resistor
+ .IFDEF TERMINAL4WIRES
+; RTS output is wired to the CTS input of UART2USB bridge
+; configure RTS as output high to disable RX TERM during start FORTH
+ BIS.B #RTS,&P2DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-
-CTS .set 10h ; P2.4 bit position
-
- MOV #0EFFFh,&PAOUT ; P2.3 (RTS) as output HIGH, P2.4 (CTS) I pull down, others I pull up,
-
- .ELSEIF
-
- MOV #-1,&PAOUT ; that acts as pull up resistor, and P2.3 (RTS) as output HIGH
-
+ BIC.B #CTS,&P2OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
-
- .ELSEIF
-
-; PORTx default wanted state : pins as input with pullup resistor
-
- MOV #-1,&PAOUT ; OUT1 for all pins
- BIS #-1,&PAREN ; all pins with pullup resistors
-
.ENDIF ; TERMINAL4WIRES
; ----------------------------------------------------------------------
I2CMM_DIR=\$244!
I2CMM_REN=\$246!
I2CMM_SEL=\$24A! SEL0
-I2CMM_Vec=\$FFEA!
+I2CMM_Vec=\$FFEA! UCB0_Vec
MMSDA=\$04! P5.2 SDA hadware MULTI_MASTER
MMSCL=\$08! P5.3 SCL hadware MULTI_MASTER
MM_BUS=\$0C!
I2CM_DIR=\$244!
I2CM_REN=\$246!
I2CM_SEL=\$24A! SEL0
-I2CM_Vec=\$FFEA!
+I2CM_Vec=\$FFEA! UCB0_Vec
MSDA=\$04! P5.2 SDA hadware MASTER
MSCL=\$08! P5.3 SCL hadware MASTER
M_BUS=\$0C!
I2CS_DIR=\$244!
I2CS_REN=\$246!
I2CS_SEL=\$24A! SEL0
-I2CS_Vec=\$FFEA!
+I2CS_Vec=\$FFEA! UCB0_Vec
SSDA=\$04! P5.2 SDA hadware SLAVE
SSCL=\$08! P5.3 SCL hadware SLAVE
S_BUS=\$0C!
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$540! USCI_B0 Control Word Register 0
+I2CM_CTLW1=\$542! USCI_B0 Control Word Register 1
+I2CM_BRW=\$546! USCI_B0 Baud Word Rate 0
+I2CM_STATW=\$548! USCI_B0 status word
+I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CM_RXBUF=\$54C! USCI_B0 Receive Buffer 8
+I2CM_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
+I2CM_I2COA0=\$554! USCI_B0 I2C Own Address 0
+I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CM_I2CSA=\$560! USCI_B0 I2C Slave Address
+I2CM_IE=\$56A! USCI_B0 Interrupt Enable
+I2CM_IFG=\$56C! USCI_B0 Interrupt Flags Register
+
+I2CS_CTLW0=\$540! USCI_B0 Control Word Register 0
+I2CS_CTLW1=\$542! USCI_B0 Control Word Register 1
+I2CS_BRW=\$546! USCI_B0 Baud Word Rate 0
+I2CS_STATW=\$548! USCI_B0 status word
+I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CS_RXBUF=\$54C! USCI_B0 Receive Buffer 8
+I2CS_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
+I2CS_I2COA0=\$554! USCI_B0 I2C Own Address 0
+I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CS_I2CSA=\$560! USCI_B0 I2C Slave Address
+I2CS_IE=\$56A! USCI_B0 Interrupt Enable
+I2CS_IFG=\$56C! USCI_B0 Interrupt Flags Register
+
SD_CS=2! ; P8.1 as SD_CS
SD_CD=1! ; P8.0 as SD_CD
; PORT 1 usage
; P1.4 is used as analog input from NTC voltage divider
-
-
.IFDEF UCA0_TERM
-TERM_IN .equ P2IN
-TXD .equ 1 ; P2.0 = TXD + FORTH Deep_RST pin
-RXD .equ 2 ; P2.1 = RXD
-TERM_BUS .equ 3
-TERM_SEL .equ P2SEL1
-TERM_REN .equ P2REN
+TERM_IN .equ P2IN
+TXD .equ 1 ; P2.0 = TXD + FORTH Deep_RST pin
+RXD .equ 2 ; P2.1 = RXD
+TERM_BUS .equ 3
+TERM_SEL .equ P2SEL1
+TERM_REN .equ P2REN
.ENDIF
.IFDEF UCB0_SD
-SD_SEL .equ PASEL1 ; to configure UCB0
-SD_REN .equ PAREN ; to configure pullup resistors
-SD_BUS .equ 7000h ; pins P2.4 as UCB0CLK, P2.5 as UCB0SIMO & P2.6 as UCB0SOMI
-SD_CD .equ 4 ; P2.2 as SD_CD
-SD_CS .equ 8 ; P2.3 as SD_CS
-SD_CDIN .equ P2IN
-SD_CSOUT .equ P2OUT
-SD_CSDIR .equ P2DIR
+SD_SEL .equ PASEL1 ; to configure UCB0
+SD_REN .equ PAREN ; to configure pullup resistors
+SD_BUS .equ 7000h ; pins P2.4 as UCB0CLK, P2.5 as UCB0SIMO & P2.6 as UCB0SOMI
+SD_CD .equ 4 ; P2.2 as SD_CD
+SD_CS .equ 8 ; P2.3 as SD_CS
+SD_CDIN .equ P2IN
+SD_CSOUT .equ P2OUT
+SD_CSDIR .equ P2DIR
.ENDIF
+RTS .equ 4 ; P2.2
+CTS .equ 8 ; P2.3
+HANDSHAKOUT .equ P2OUT
+HANDSHAKIN .equ P2IN
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
.IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P2OUT
-HANDSHAKIN .equ P2IN
-RTS .equ 4 ; P2.2
BIS.B #RTS,&P2DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 8 ; P2.3
BIC.B #CTS,&P2OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
-
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
; ----------------------------------------------------------------------
SMMSCL=\$80! P1.7
SMM_BUS=\$C0!
-I2CMM_IN=\$200!
-I2CMM_OUT=\$202!
-I2CMM_DIR=\$204!
-I2CMM_REN=\$206!
+I2CMM_IN=\$200
+I2CMM_OUT=\$202
+I2CMM_DIR=\$204
+I2CMM_REN=\$206
I2CMM_SEL=\$20C! SEL1
-I2CMM_Vec=\$FFEE! UCB0
+I2CMM_Vec=\$FFEE! eUSCIB0_INT
MMSDA=\$40! P1.6
MMSCL=\$80! P1.7
-MM_BUS=\$C0!
+MM_BUS=\$C0
-I2CM_IN=\$200!
-I2CM_OUT=\$202!
-I2CM_DIR=\$204!
-I2CM_REN=\$206!
+I2CM_IN=\$200
+I2CM_OUT=\$202
+I2CM_DIR=\$204
+I2CM_REN=\$206
I2CM_SEL=\$20C! SEL1
-I2CM_Vec=\$FFEE! UCB0
+I2CM_Vec=\$FFEE! eUSCIB0_INT
MSDA=\$40! P1.6
MSCL=\$80! P1.7
-M_BUS=\$C0!
+M_BUS=\$C0
-I2CS_IN=\$200!
-I2CS_OUT=\$202!
-I2CS_DIR=\$204!
-I2CS_REN=\$206!
+I2CS_IN=\$200
+I2CS_OUT=\$202
+I2CS_DIR=\$204
+I2CS_REN=\$206
I2CS_SEL=\$20C! SEL1
-I2CS_Vec=\$FFEE! UCB0
+I2CS_Vec=\$FFEE! eUSCIB0_INT
SSDA=\$40! P1.6
SSCL=\$80! P1.7
-S_BUS=\$C0!
+S_BUS=\$C0
+
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
+I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
+I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
+I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
+I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
+I2CM_IE=\$66A! USCI_B0 Interrupt Enable
+I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
+
+I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
+I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
+I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
+I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
+I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
+I2CS_IE=\$66A! USCI_B0 Interrupt Enable
+I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
+
SD_CD=4! P2.2 as SD_CD
SD_CS=8! P2.3 as SD_CS
; ----------------------------------------------------------------------
; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
- BIS #-1,&PBREN ; all pins as input with resistor
- MOV #0BFFFh,&PBOUT ; all pins as input with pull up resistor else P4.6
-
; PORT3 usage
; PORT4 usage
+; P4.5 - switch S1
+; P4.6 - LED1 red
+
+CTS .equ 1 ; P4.0
+RTS .equ 2 ; P4.1
+HANDSHAKOUT .equ P4OUT
+HANDSHAKIN .equ P4IN
+
+SD_CD .equ 4 ; P4.2 as SD_CD
+SD_CS .equ 8 ; P4.3 as SD_CS
+SD_CDIN .equ P4IN
+SD_CSOUT .equ P4OUT
+SD_CSDIR .equ P4DIR
+
+ BIS #-1,&PBREN ; all pins as input with resistor
+ MOV #0BFFFh,&PBOUT ; all pins as input with pull up resistor else P4.6
.IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P4OUT
-HANDSHAKIN .equ P4IN
-RTS .equ 2 ; P4.1
BIS.B #RTS,&P4DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 1 ; P4.0
BIC.B #CTS,&P4OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
-SD_CD .equ 4 ; P4.2 as SD_CD
-SD_CS .equ 8 ; P4.3 as SD_CS
-SD_CDIN .equ P4IN
-SD_CSOUT .equ P4OUT
-SD_CSDIR .equ P4DIR
-
-; P4.5 - switch S1
-; P4.6 - LED1 red
-
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORTJ
; ----------------------------------------------------------------------
I2CM_OUT=\$202
I2CM_DIR=\$204
I2CM_REN=\$206
-I2CM_SEL=\$20C
+I2CM_SEL=\$20C! SEL1
I2CM_Vec=\$FFEE! eUSCIB0_INT
MSDA=\$40! P1.6
MSCL=\$80! P1.7
I2CS_OUT=\$202
I2CS_DIR=\$204
I2CS_REN=\$206
-I2CS_SEL=\$20C
+I2CS_SEL=\$20C! SEL1
I2CS_Vec=\$FFEE! eUSCIB0_INT
SSDA=\$40! P1.6
SSCL=\$80! P1.7
S_BUS=\$C0
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
+I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
+I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
+I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
+I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
+I2CM_IE=\$66A! USCI_B0 Interrupt Enable
+I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
+
+I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
+I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
+I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
+I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
+I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
+I2CS_IE=\$66A! USCI_B0 Interrupt Enable
+I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
+
; PORT3 FastForth usage
; PORT4 FastForth usage
-SD_CS .equ 1 ; P4.0 as SD_CS
-SD_CSOUT .equ P4OUT
-SD_CSDIR .equ P4DIR
+SD_CS .equ 1 ; P4.0 as SD_CS
+SD_CSOUT .equ P4OUT
+SD_CSDIR .equ P4DIR
+RTS .equ 4 ; P4.2
+CTS .equ 2 ; P4.1
+HANDSHAKIN .equ P4IN
+HANDSHAKOUT .equ P4OUT
MOV #-1,&PBREN ; REN1 all pullup resistors
BIS #-1,&PBOUT
.IFDEF TERMINAL4WIRES
+; RTS output is wired to the CTS input of UART2USB bridge
+; configure RTS as output high to disable RX TERM during start FORTH
+ BIS.B #RTS,&P4DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 2 ; P4.1
BIC.B #CTS,&P4OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
-; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P4OUT
-HANDSHAKIN .equ P4IN
-RTS .equ 4 ; P4.2
- BIS.B #RTS,&P4DIR ; RTS as output high
.ENDIF ; TERMINAL4WIRES
; ----------------------------------------------------------------------
I2CMM_OUT=\$262!
I2CMM_DIR=\$264!
I2CMM_REN=\$266!
-I2CMM_SEL1=\$26C!
+I2CMM_SEL=\$26A! SEL0
I2CMM_Vec=\$FFBC! UCB2_Vec
MMSDA=1! P7.0
MMSCL=2! P7.1
I2CM_OUT=\$262!
I2CM_DIR=\$264!
I2CM_REN=\$266!
-I2CM_SEL1=\$26C!
-I2CM_Vec=\$FFBC!
+I2CM_SEL=\$26A! SEL0
+I2CM_Vec=\$FFBC! UCB2_Vec
MSDA=1! P7.0
MSCL=2! P7.1
M_BUS=3!
I2CS_OUT=\$262!
I2CS_DIR=\$264!
I2CS_REN=\$266!
-I2CS_SEL1=\$26C!
-I2CS_Vec=\$FFBC!
+I2CS_SEL=\$26A! SEL0
+I2CS_Vec=\$FFBC! UCB2_Vec
SSDA=1! P7.0
SSCL=2! P7.1
S_BUS=3!
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$6C0! USCI_B2 Control Word Register 0
+I2CM_CTLW1=\$6C2! USCI_B2 Control Word Register 1
+I2CM_BRW=\$6C6! USCI_B2 Baud Word Rate 0
+I2CM_STATW=\$6C8! USCI_B2 status word
+I2CM_TBCNT=\$6CA! USCI_B2 byte counter threshold
+I2CM_RXBUF=\$6CC! USCI_B2 Receive Buffer 8
+I2CM_TXBUF=\$6CE! USCI_B2 Transmit Buffer 8
+I2CM_I2COA0=\$6D4! USCI_B2 I2C Own Address 0
+I2CM_ADDRX=\$6DC! USCI_B2 Received Address Register
+I2CM_I2CSA=\$6E0! USCI_B2 I2C Slave Address
+I2CM_IE=\$6EA! USCI_B2 Interrupt Enable
+I2CM_IFG=\$6EC! USCI_B2 Interrupt Flags Register
+
+I2CS_CTLW0=\$6C0! USCI_B2 Control Word Register 0
+I2CS_CTLW1=\$6C2! USCI_B2 Control Word Register 1
+I2CS_BRW=\$6C6! USCI_B2 Baud Word Rate 0
+I2CS_STATW=\$6C8! USCI_B2 status word
+I2CS_TBCNT=\$6CA! USCI_B2 byte counter threshold
+I2CS_RXBUF=\$6CC! USCI_B2 Receive Buffer 8
+I2CS_TXBUF=\$6CE! USCI_B2 Transmit Buffer 8
+I2CS_I2COA0=\$6D4! USCI_B2 I2C Own Address 0
+I2CS_ADDRX=\$6DC! USCI_B2 Received Address Register
+I2CS_I2CSA=\$6E0! USCI_B2 I2C Slave Address
+I2CS_IE=\$6EA! USCI_B2 Interrupt Enable
+I2CS_IFG=\$6EC! USCI_B2 Interrupt Flags Register
; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
; PORTx default wanted state : pins as input with pullup resistor
- MOV #-1,&PBREN ; all pins as input with resistor
- MOV #-1,&PBOUT ; all pins as input with resistor
-
; PORT3 usage
; P3.0 = RTS
; P3.1 = CTS
; P3.4 = TX1
; P3.5 = RX1
+RTS .equ 1 ; P3.0
+CTS .equ 2 ; P3.1
+HANDSHAKOUT .equ P3OUT
+HANDSHAKIN .equ P3IN
+
.IFDEF UCA1_TERM
-TXD .equ 10h ; P3.4 = TXD + FORTH Deep_RST pin
-RXD .equ 20h ; P3.4 = RXD
-TERM_BUS .equ 30h ; P3.5 = RX
-TERM_IN .equ P3IN ; TERMINAL TX pin as FORTH Deep_RST
-TERM_REN .equ P3REN
-TERM_SEL .equ P3SEL0
+TXD .equ 10h ; P3.4 = TXD + FORTH Deep_RST pin
+RXD .equ 20h ; P3.4 = RXD
+TERM_BUS .equ 30h ; P3.5 = RX
+TERM_IN .equ P3IN ; TERMINAL TX pin as FORTH Deep_RST
+TERM_REN .equ P3REN
+TERM_SEL .equ P3SEL0
.ENDIF ;UCA1_TERM
; PORT4 usage
+ MOV #-1,&PBREN ; all pins as input with resistor
+ MOV #-1,&PBOUT ; all pins as input with resistor
.IFDEF TERMINAL4WIRES
; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
-HANDSHAKOUT .equ P3OUT
-HANDSHAKIN .equ P3IN
-RTS .equ 1 ; P3.0
BIS.B #RTS,&P3DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
-CTS .equ 2 ; P3.1
BIC.B #CTS,&P3OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
.ENDIF ; TERMINAL4WIRES
TERM_IFG=\$5FC! \ eUSCI_A interrupt flags
TERM_IV=\$5FE! \ eUSCI_A interrupt vector word
-RTS=2! ; P3.1
-CTS=1! ; P3.0
+RTS=1! ; P3.0
+CTS=2! ; P3.1
HANDSHAKIN=\$220!
HANDSHAKOUT=\$222!
I2CMM_OUT=\$202!
I2CMM_DIR=\$204!
I2CMM_REN=\$206!
-I2CMM_SEL=\$20C! SEL1
-I2CMM_Vec=\$FFEC!
-MMSDA=\$40! P1.6
-MMSCL=\$80! P1.7
+I2CMM_SEL=\$20A! SEL0
+I2CMM_Vec=\$FFEC! UCBO_Vec
+MMSDA=\$40! P1.6
+MMSCL=\$80! P1.7
MM_BUS=\$C0!
I2CM_IN=\$200!
I2CM_OUT=\$202!
I2CM_DIR=\$204!
I2CM_REN=\$206!
-I2CM_SEL=\$20C!
-I2CM_Vec=\$FFEC!
-MSDA=\$40! P1.6
-MSCL=\$80! P1.7
+I2CM_SEL=\$20A! SEL0
+I2CM_Vec=\$FFEC! UCBO_Vec
+MSDA=\$40! P1.6
+MSCL=\$80! P1.7
M_BUS=\$C0!
I2CS_IN=\$200!
I2CS_OUT=\$202!
I2CS_DIR=\$204!
I2CS_REN=\$206!
-I2CS_SEL=\$20C!
-I2CS_Vec=\$FFEC!
-SSDA=\$40! P1.6
-SSCL=\$80! P1.7
+I2CS_SEL=\$20A! SEL0
+I2CS_Vec=\$FFEC! UCBO_Vec
+SSDA=\$40! P1.6
+SSCL=\$80! P1.7
S_BUS=\$C0!
+UCSWRST=1! eUSCI Software Reset
+UCTXIE=2! eUSCI Transmit Interrupt Enable
+UCRXIE=1! eUSCI Receive Interrupt Enable
+UCTXIFG=2! eUSCI Transmit Interrupt Flag
+UCRXIFG=1! eUSCI Receive Interrupt Flag
+UCTXIE0=2! eUSCI_B Transmit Interrupt Enable
+UCRXIE0=1! eUSCI_B Receive Interrupt Enable
+UCTXIFG0=2! eUSCI_B Transmit Interrupt Flag
+UCRXIFG0=1! eUSCI_B Receive Interrupt Flag
+
+I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
+I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
+I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
+I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
+I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
+I2CM_IE=\$66A! USCI_B0 Interrupt Enable
+I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
+
+I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
+I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
+I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
+I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
+I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
+I2CS_IE=\$66A! USCI_B0 Interrupt Enable
+I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
TERMBRW_INI .equ 17
TERMMCTLW_INI .equ 04A00h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 1MHz
+TERMBRW_INI .equ 10
+
.CASE 100800 ; PL2303TA baudrate
; Configure UART_TERM @ 100800 bauds / 1MHz
; N=1000000/100800=9,920634 ==> UCOS16=0, UCBR0=int(N)=9, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.920634)=0xFD
TERMBRW_INI .equ 2
TERMMCTLW_INI .equ 0BB21h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 2MHz
+TERMBRW_INI .equ 20
+
.CASE 115200
; Configure UART_TERM @ 57600 bauds / 1MHz
; N=1000000/57600=17.301... ==> UCOS16=0, UCBR0=int(N)=17, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.301)=0x4A
TERMBRW_INI .equ 7
TERMMCTLW_INI .equ 05500h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 2MHz
+TERMBRW_INI .equ 5
+
.CASE 403200 ; PL2303TA baudrate
; Configure UART_TERM @ 201600 bauds / 1MHz
; N=1000000/201600=4.955401 ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.200396)=0xFE
TERMBRW_INI .equ 4
TERMMCTLW_INI .equ 5551h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 4MHz
+TERMBRW_INI .equ 40
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 4MHz
; N=8000000/230400=34.7222... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.72222)=0xBB
TERMBRW_INI .equ 1
TERMMCTLW_INI .equ 0001h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 4MHz
+TERMBRW_INI .equ 10
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 4MHz
; N = 8000000/921600 = 8.680555... ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.68055)=0xD6
TERMBRW_INI .equ 8
TERMMCTLW_INI .equ 0F7A1h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 8MHz
+TERMBRW_INI .equ 80
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 8MHz
; N=8000000/115200=69.444... ==> UCOS16=1, UCBR0=int(N/16)=4, UCBRF0=int(frac(N/16)*16)=5, UCBRS0= fn(frac(N))=fn(0.44444)=0x55
TERMBRW_INI .equ 2
TERMMCTLW_INI .equ 0001h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 8MHz
+TERMBRW_INI .equ 20
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 8MHz
; see table "Recommended Settings for Typical Crystals and Baudrates"
TERMBRW_INI .equ 10
TERMMCTLW_INI .equ 0AD01h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 10MHz
+TERMBRW_INI .equ 100
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 10MHz
; Configure UART_TERM @ 230400 bauds / 20MHz
TERMBRW_INI .equ 2
TERMMCTLW_INI .equ 0081h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 10MHz
+TERMBRW_INI .equ 25
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 10MHz
; Configure UART_TERM @ 921600 bauds / 20MHz
TERMBRW_INI .equ 13
TERMMCTLW_INI .equ 04901h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 12MHz
+TERMBRW_INI .equ 120
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 12MHz
; Configure UART_TERM @ 230400 bauds / 24MHz
;TERMBRW_INI .equ 3
;TERMMCTLW_INI .equ 0001h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 12MHz
+TERMBRW_INI .equ 30
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 12MHz
; Configure UART_TERM @ 921600 bauds / 24MHz
TERMBRW_INI .equ 17
TERMMCTLW_INI .equ 0DD51h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 16MHz
+TERMBRW_INI .equ 160
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 16MHz
; N=16000000/115200=138.888... ==> UCOS16=1, UCBR0=int(N/16)=8, UCBRF0=int(frac(N/16)*16)=10, UCBRS0= fn(frac(N))=fn(0.88888)=0xF7
TERMBRW_INI .equ 4
TERMMCTLW_INI .equ 0001h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 16MHz
+TERMBRW_INI .equ 40
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 16MHz
; N=16000000/460800=34.7222... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.72222)=0xBB
TERMBRW_INI .equ 21
TERMMCTLW_INI .equ 000A1h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 20MHz
+TERMBRW_INI .equ 200
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 20MHz
; N=20000000/115200=173.61111... ==> UCOS16=1, UCBR0=int(N/16)=10, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.6111)=0xAD
TERMBRW_INI .equ 5
TERMMCTLW_INI .equ 0001h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 20MHz
+TERMBRW_INI .equ 50
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 20MHz
; N=20000000/460800=43.402777... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=0Bh, UCBRS0= fn(frac(N))=fn(0.4027)=0x92
; Configure UART_TERM @ 9600 bauds / 24MHz
; N=24000000/9600=2500 ==> UCOS16=1, UCBR0=int(N/16)=156, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=(fn(0))=0x00
; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-TERMBRW_INI .equ 156
+TERMBRW_INI .equ 9Ch
TERMMCTLW_INI .equ 0041h
.CASE 19200
; Configure UART_TERM @ 19200 bauds / 24MHz
; N=24000000/19200=1250 ==> UCOS16=1, UCBR0=int(N/16)=78, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0)=0x00
; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-TERMBRW_INI .equ 78
+TERMBRW_INI .equ 4Eh
TERMMCTLW_INI .equ 0021h
.CASE 31250 ; MIDI interface
TERMBRW_INI .equ 26
TERMMCTLW_INI .equ 0D601h
+ .CASE 100000
+; Configure UCBx_TERM for I2C @ 100kHZ / 24MHz
+TERMBRW_INI .equ 240
+
.CASE 115200
; Configure UART_TERM @ 115200 bauds / 24MHz
; N=24000000/115200=208.333... ==> UCOS16=1, UCBR0=int(N/16)=13, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.333)=0x49
TERMBRW_INI .equ 6
TERMMCTLW_INI .equ 0001h
+ .CASE 400000
+; Configure UCBx_TERM for I2C @ 400kHZ / 24MHz
+TERMBRW_INI .equ 60
+
.CASE 460800
; Configure UART_TERM @ 460800 bauds / 24MHz
; N=24000000/460800=52.08333... ==> UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(0.0833)=0x02
; ThingsInFirst.inc
-; .listing OFF
.cpu MSP430X
+; macexp off ; uncomment to hide macros development in forthMSP430FR.lst
+
+; .listing OFF
+
; ----------------------------------------------
; MACROS FOR assembly instructions
; ----------------------------------------------
-;****************************************************************************
-;* *
-;* AS 1.41 - Datei REGMSP.INC von Alfred Arnold *
-;* *
-;* Sinn : enthält Makro- und Registerdefinitionen fu den MSP430 *
-;* *
-;* letzte underungen : 2002-01-11 *
-;* 2010/2011/2012 erweitert von Matthias Koch *
-;* *
-;****************************************************************************
-
- ifndef regmspinc ; verhindert Mehrfacheinbindung
-
-regmspinc equ 1
-
- if (MOMCPUNAME<>"MSP430")&&(MOMCPUNAME<>"MSP430X")
- fatal "Falscher Prozessortyp eingestellt: nur MSP430 erlaubt!"
- endif
-
- if MOMPASS=1
- message "MSP430-Register+Befehlsdefinitionen (C) 1996 Alfred Arnold"
- endif
-
-; Definitions for Instructions, Macros and Ports.
-
-;----------------------------------------------------------------------------
-; Arithmetik
-
-adc macro op
- addc.attribute #0,op
- endm
-
-dadc macro op
- dadd.attribute #0,op
- endm
-
-dec macro op
- sub.attribute #1,op
- endm
-
-decd macro op
- sub.attribute #2,op
- endm
-
-inc macro op
- add.attribute #1,op
- endm
-
-incd macro op
- add.attribute #2,op
- endm
-
-sbc macro op
- subc.attribute #0,op
- endm
-
-;----------------------------------------------------------------------------
-; Logik
-
-inv macro op
- xor.attribute #-1,op
- endm
-
-rla macro op
- add.attribute op,op
- endm
-
-rlc macro op
- addc.attribute op,op
- endm
+NOP .macro ; 1 word, 1 cycle
+ .word 4303h ; mov #0, r3
+ .endm
+
+NOP2 .macro ; 1 Word, 2 cycles
+ .word 3C00h ; jmp $+2
+ .endm
+
+NOP3 .macro ; 1 Word, 3 cycles
+ .word 4000h ; MOV PC,PC
+ .endm
+
+; SR bits : only SR(11:0) are PUSHed by calls and interrupts
+C .equ 0001h
+Z .equ 0002h
+N .equ 0004h
+V .equ 0100h
+GIE .equ 0008h
+CPUOFF .equ 0010h ; CPU Off. 1=turn_off_CPU
+OSCOFF .equ 0020h ; Oscillator Off. 1=turn_off_LFXT1CLK
+SCG0 .equ 0040h ; System Clock Generator 0. 1=turn_off_DCO
+SCG1 .equ 0080h ; System Clock Generator 1. 1=turn_off_SMCLK
+UF9 .equ 0200h ; = SR(9) User Flag 1
+UF10 .equ 0400h ; = SR(10) User Flag 2
+UF11 .equ 0800h ; = SR(11) User Flag 3
;----------------------------------------------------------------------------
-; Daten bewegen ;-)
-
-clr macro op
- mov.attribute #0,op
- endm
-
-clrc macro
- bic #1,sr
- endm
-
-clrn macro
- bic #4,sr
- endm
-
-clrz macro
- bic #2,sr
- endm
-
-pop macro op ; Muss hier noch ein Atribut anbringen ! Kann auch Bytes zurückladen...
- mov.attribute @sp+,op
- endm
-
-setc macro
- bis #1,sr
- endm
-
-setn macro
- bis #4,sr
- endm
-
-setz macro
- bis #2,sr
- endm
-
-tst macro op
- cmp.attribute #0,op
- endm
-
-;----------------------------------------------------------------------------
-; Sprungbefehle
-
-br macro op
- mov op,pc
- endm
-
-dint macro
- bic #8,sr
- endm
-
-eint macro
- bis #8,sr
- endm
-
-nop macro
- .word 04303h ; mov #0, r3
- endm
-
-nop2 macro ; 1 Word, 2 Takte
- jmp $+2
- endm
-
-nop3 macro ; 1 Word, 3 Takte
- MOV PC,PC
- endm
-
-ret macro
- mov @sp+,pc
- endm
-
-jlo macro label ; unsigned
- jnc label
- endm
-
-jhs macro label ; unsigned
- jc label
- endm
-
-jeq macro label
- jz label
- endm
-
-; Flags im Statusregister
-; SR bits : only SR(11:0) are PUSHed by interrupts
-C equ 0001h
-Z equ 0002h
-N equ 0004h
-V equ 0100h
-GIE equ 0008h
-CPUOFF equ 0010h ; CPU Off. 1=turn_off_CPU
-OSCOFF equ 0020h ; Oscillator Off. 1=turn_off_LFXT1CLK
-SCG0 equ 0040h ; System Clock Generator 0. 1=turn_off_DCO
-SCG1 equ 0080h ; System Clock Generator 1. 1=turn_off_SMCLK
-UF9 equ 0200h ; = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
-UF10 equ 0400h ; = SR(10) User Flag 2
-UF11 equ 0800h ; = SR(11) User Flag 3
-
-;----------------------------------------------------------------------------
-; Low-Power-Mode Bitmuster
-
-LPM0 equ CPUOFF
-LPM1 equ SCG0 + CPUOFF
-LPM2 equ SCG1 + CPUOFF
-LPM3 equ SCG1 + SCG0 + CPUOFF
-LPM4 equ SCG1 + SCG0 + OSCOFF + CPUOFF
-
-;----------------------------------------------------------------------------
-
- endif ; von IFDEF...
+LPM0 .equ CPUOFF
+; LPM0 .equ SCG0 + CPUOFF ; for devices with FLL, to disable FLL
+LPM1 .equ SCG0 + CPUOFF
+LPM2 .equ SCG1 + CPUOFF
+LPM3 .equ SCG1 + SCG0 + CPUOFF
+LPM4 .equ SCG1 + SCG0 + OSCOFF + CPUOFF
; ----------------------------------------------
; INIT VOCABULARY POINTERS and MACROS FOR HEADER
; ----------------------------------------------
-voclink .set 0 ; init vocabulary links
+voclink .set 0 ; init vocabulary links
forthlink .set 0
asmlink .set 0
; --------------------------
.include "TERMINALBAUDRATE.inc"
-; -----------------------------
-; compute value of FORTHVERSION
-; -----------------------------
-VERSIO .equ VAL(SUBSTR(VER,1,0))
-
-; -------------------------------------
-; define FREQ used in WARM message (6)
-; -------------------------------------
- .IF FREQUENCY = 0.25
-FREQ .set " .2MHz"
- .ELSEIF FREQUENCY = 0.5
-FREQ .set " .5MHz"
- .ELSEIF FREQUENCY = 1
-FREQ .set " 1MHz"
- .ELSEIF FREQUENCY = 2
-FREQ .set " 2MHz"
- .ELSEIF FREQUENCY = 4
-FREQ .set " 4MHz"
- .ELSEIF FREQUENCY = 8
-FREQ .set " 8MHz"
- .ELSEIF FREQUENCY = 12
-FREQ .set " 12MHz"
- .ELSEIF FREQUENCY = 16
-FREQ .set " 16MHz"
- .ELSEIF FREQUENCY = 20
-FREQ .set " 20MHz"
- .ELSEIF FREQUENCY = 24
-FREQ .set " 24MHz"
- .ENDIF
-
; -------------------------------------
; define MAIN max bound
; -------------------------------------
-FRAM_FULL .equ SIGNATURES-50h ; set to protect JTAG and BSL signatures against overwrite.
+FRAM_FULL .equ SIGNATURES-40h ; set to protect JTAG and BSL signatures against overwrite.
; 80 bytes are sufficient considering what can be compiled in one line + WORD use.
; take care with ALLOT : don't ALLOT more than 32 words by line!
; COMPUTE SWITCHES
; --------------------------
- .IFDEF EXTENDED_MEM
+ .IFDEF CORE_COMPLEMENT
+ .IFNDEF USE_MOVE
+USE_MOVE
+ .ENDIF
+ .ENDIF
+
+ .IFDEF UTILITY
+ .IFNDEF USE_MOVE
+USE_MOVE
+ .ENDIF
+ .ENDIF
+
+ .IFDEF FIXPOINT_INPUT
.IFNDEF DOUBLE_INPUT
DOUBLE_INPUT
.ENDIF
.IFNDEF DEFER_ACCEPT
DEFER_ACCEPT
.ENDIF
+
.IFDEF BOOTLOADER
.IFNDEF CONDCOMP
CONDCOMP ; mandatory for Bootstrap
.ENDIF
.IFDEF EXTENDED_ASM
-; .IFNDEF MSP430ASSEMBLER
-;MSP430ASSEMBLER
-; .ENDIF
.IFNDEF DOUBLE_INPUT
DOUBLE_INPUT
.ENDIF
MSP430ASSEMBLER
.ENDIF
.IFNDEF DOUBLE_INPUT
-DOUBLE_INPUT ; for indirect extended indexed modes of MOVA ADDA CMPA SUBA instructions
+DOUBLE_INPUT
.ENDIF
.ENDIF
.ENDIF
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