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astoria-d [Wed, 25 Sep 2013 01:02:20 +0000 (10:02 +0900)]
module structure re-organized
astoria-d [Tue, 24 Sep 2013 10:33:32 +0000 (19:33 +0900)]
update
astoria-d [Tue, 24 Sep 2013 10:27:26 +0000 (19:27 +0900)]
update
astoria-d [Tue, 24 Sep 2013 09:39:48 +0000 (18:39 +0900)]
gate simulation debugging.
astoria-d [Tue, 24 Sep 2013 07:17:31 +0000 (16:17 +0900)]
update
astoria-d [Tue, 24 Sep 2013 06:44:17 +0000 (15:44 +0900)]
merge updates
astoria-d [Tue, 24 Sep 2013 06:33:11 +0000 (15:33 +0900)]
clean up. gate level simulation working!!!
astoria-d [Tue, 24 Sep 2013 05:57:21 +0000 (14:57 +0900)]
env clean up
astoria-d [Tue, 24 Sep 2013 05:47:00 +0000 (14:47 +0900)]
sync with ghdl env
astoria-d [Tue, 24 Sep 2013 05:10:31 +0000 (14:10 +0900)]
modelsim project added
astoria-d [Tue, 24 Sep 2013 03:07:00 +0000 (12:07 +0900)]
- base clock aligned with the DE1 board clock 50 MHz
- cpu/ppu/mem/vga clock adjusted due to above change
astoria-d [Tue, 24 Sep 2013 02:11:31 +0000 (11:11 +0900)]
- rom/ram instance moved to root module.
- address decoder shrinked and focused on chip select only.
astoria-d [Tue, 24 Sep 2013 01:34:24 +0000 (10:34 +0900)]
rom to be clk syncronized
astoria-d [Tue, 24 Sep 2013 00:36:43 +0000 (09:36 +0900)]
Merge branch 'master' of git.sourceforge.jp:/gitroot/motonesfpga/motonesfpga
astoria-d [Mon, 23 Sep 2013 10:44:28 +0000 (19:44 +0900)]
update
astoria-d [Mon, 23 Sep 2013 10:43:47 +0000 (19:43 +0900)]
4k rom working
astoria-d [Mon, 23 Sep 2013 10:15:56 +0000 (19:15 +0900)]
test 4k rom ok
astoria-d [Mon, 23 Sep 2013 09:48:49 +0000 (18:48 +0900)]
update
astoria-d [Mon, 23 Sep 2013 09:45:34 +0000 (18:45 +0900)]
tool update
astoria-d [Mon, 23 Sep 2013 05:50:42 +0000 (14:50 +0900)]
quartus ii test env
astoria-d [Mon, 23 Sep 2013 05:02:31 +0000 (14:02 +0900)]
clean up
astoria-d [Mon, 23 Sep 2013 04:50:14 +0000 (13:50 +0900)]
rom/ram working
astoria-d [Sun, 22 Sep 2013 08:47:35 +0000 (17:47 +0900)]
quartus 13.0sp1 updated
astoria-d [Sun, 22 Sep 2013 03:15:19 +0000 (12:15 +0900)]
gate level simulator working...
astoria-d [Sat, 21 Sep 2013 11:05:16 +0000 (20:05 +0900)]
clean up
astoria-d [Sat, 21 Sep 2013 11:04:47 +0000 (20:04 +0900)]
gate level simulation evn set up ok
astoria-d [Sat, 21 Sep 2013 03:52:22 +0000 (12:52 +0900)]
modelsim env set up files clean up.
astoria-d [Sat, 21 Sep 2013 03:41:50 +0000 (12:41 +0900)]
update
astoria-d [Sat, 21 Sep 2013 03:40:36 +0000 (12:40 +0900)]
update
astoria-d [Sat, 21 Sep 2013 03:39:13 +0000 (12:39 +0900)]
gate level simulation update
astoria-d [Sat, 21 Sep 2013 03:28:50 +0000 (12:28 +0900)]
modelsim env setup ok!!
now rtl level simulation goes ok.
astoria-d [Fri, 20 Sep 2013 11:30:55 +0000 (20:30 +0900)]
still test environment set up
astoria-d [Fri, 20 Sep 2013 08:36:12 +0000 (17:36 +0900)]
- env update.
- model sim setting update.
astoria-d [Fri, 20 Sep 2013 06:22:26 +0000 (15:22 +0900)]
Merge branch 'master' of git.sourceforge.jp:/gitroot/motonesfpga/motonesfpga
astoria-d [Thu, 19 Sep 2013 11:19:12 +0000 (20:19 +0900)]
- main testbench updated to simulate the real de1 environment
astoria-d [Thu, 19 Sep 2013 09:39:16 +0000 (18:39 +0900)]
component latch renamed due to quartus component name conflict.
astoria-d [Thu, 19 Sep 2013 09:17:15 +0000 (18:17 +0900)]
clock driver fixed
astoria-d [Thu, 19 Sep 2013 08:51:59 +0000 (17:51 +0900)]
- clock driver updated
- Makefile build order changed.
astoria-d [Thu, 19 Sep 2013 08:06:16 +0000 (17:06 +0900)]
clock divider modified to align with de1 board.
astoria-d [Thu, 19 Sep 2013 02:35:54 +0000 (11:35 +0900)]
unified common routines, code clean up etc.
astoria-d [Wed, 18 Sep 2013 09:25:25 +0000 (18:25 +0900)]
scroll attribute bug fix
astoria-d [Wed, 18 Sep 2013 09:01:16 +0000 (18:01 +0900)]
comment/todo added.
astoria-d [Wed, 18 Sep 2013 08:57:28 +0000 (17:57 +0900)]
scroll and attribute bug fix
astoria-d [Wed, 18 Sep 2013 08:04:36 +0000 (17:04 +0900)]
ppu scroll x display bug fix
astoria-d [Wed, 18 Sep 2013 06:25:07 +0000 (15:25 +0900)]
- scroll working...
- test case updated.
astoria-d [Tue, 17 Sep 2013 10:30:04 +0000 (19:30 +0900)]
sprite pattern fetch bug fix
astoria-d [Tue, 17 Sep 2013 05:09:39 +0000 (14:09 +0900)]
sprite display side effect fixed.
astoria-d [Sun, 15 Sep 2013 03:26:35 +0000 (12:26 +0900)]
prefetch boundary address bug fixed
astoria-d [Sun, 15 Sep 2013 02:15:17 +0000 (11:15 +0900)]
code clean up and modify sprite side effect due to
the scroll x support
astoria-d [Sun, 15 Sep 2013 01:18:48 +0000 (10:18 +0900)]
- scroll x and bg color test updated
- scroll x rendering ok
astoria-d [Sat, 14 Sep 2013 12:49:12 +0000 (21:49 +0900)]
- scroll x working...
astoria-d [Sat, 14 Sep 2013 02:01:08 +0000 (11:01 +0900)]
scrolling working...
astoria-d [Sat, 14 Sep 2013 01:59:58 +0000 (10:59 +0900)]
bg scroll test
astoria-d [Fri, 13 Sep 2013 08:35:50 +0000 (17:35 +0900)]
next page name table test added.
astoria-d [Fri, 13 Sep 2013 06:29:25 +0000 (15:29 +0900)]
scroll reg working..
astoria-d [Fri, 13 Sep 2013 04:43:52 +0000 (13:43 +0900)]
scroll register test added.
astoria-d [Thu, 12 Sep 2013 04:46:36 +0000 (13:46 +0900)]
attribute for bg image bug fixed.
astoria-d [Thu, 12 Sep 2013 03:05:48 +0000 (12:05 +0900)]
bg color bug fix
astoria-d [Thu, 12 Sep 2013 02:11:12 +0000 (11:11 +0900)]
attribute incorrect test case added.
astoria-d [Wed, 11 Sep 2013 08:27:50 +0000 (17:27 +0900)]
bg display defect fixed.
astoria-d [Wed, 11 Sep 2013 08:18:08 +0000 (17:18 +0900)]
- test case for incorrect bg display due to status
read while ppu processing
astoria-d [Tue, 10 Sep 2013 09:35:28 +0000 (18:35 +0900)]
ppu addr reset latch timing changed.
astoria-d [Tue, 10 Sep 2013 09:13:26 +0000 (18:13 +0900)]
- ppu address register setting defect fix
- test case update.
astoria-d [Tue, 10 Sep 2013 07:37:38 +0000 (16:37 +0900)]
invalid vram addr working...
astoria-d [Mon, 9 Sep 2013 07:44:58 +0000 (16:44 +0900)]
ppu status read defect fix
astoria-d [Mon, 9 Sep 2013 07:21:00 +0000 (16:21 +0900)]
- test for ppu status read defect
astoria-d [Mon, 9 Sep 2013 03:06:35 +0000 (12:06 +0900)]
- ppudata read buffer supported.
- ppudata read test case added.
astoria-d [Sat, 7 Sep 2013 07:35:37 +0000 (16:35 +0900)]
minor change
astoria-d [Sat, 7 Sep 2013 05:29:56 +0000 (14:29 +0900)]
- bug fix for vram write timing incorrect.
astoria-d [Sat, 7 Sep 2013 04:00:03 +0000 (13:00 +0900)]
- bug fixed for code page crossing & relative
branch page corssing mixed case
- test case for the above bug added.
astoria-d [Fri, 6 Sep 2013 10:07:08 +0000 (19:07 +0900)]
- apu reg write bug fixed
astoria-d [Fri, 6 Sep 2013 09:25:09 +0000 (18:25 +0900)]
- dummy joypad read value added.
- fixed wrong dma start address
astoria-d [Fri, 6 Sep 2013 05:42:01 +0000 (14:42 +0900)]
- universal bg color output supported.
- palette specific ram added.
astoria-d [Fri, 6 Sep 2013 04:29:41 +0000 (13:29 +0900)]
- vram address increment size 32 is supported.
- test case for vertical text message added.
astoria-d [Thu, 5 Sep 2013 10:24:15 +0000 (19:24 +0900)]
- test case updated.
- bug fix for sprite not displaying when x pos > 64
astoria-d [Thu, 5 Sep 2013 09:01:18 +0000 (18:01 +0900)]
- pch increment degrade fixed.
- wrong alu sensitivity list fixed.
astoria-d [Thu, 5 Sep 2013 08:33:13 +0000 (17:33 +0900)]
test program bug fixed.
astoria-d [Thu, 5 Sep 2013 06:44:04 +0000 (15:44 +0900)]
test senario updated.
astoria-d [Thu, 5 Sep 2013 05:43:39 +0000 (14:43 +0900)]
dma copy ok, no display yet.
astoria-d [Thu, 5 Sep 2013 05:43:10 +0000 (14:43 +0900)]
Merge branch 'master' of git.sourceforge.jp:/gitroot/motonesfpga/motonesfpga
astoria-d [Thu, 5 Sep 2013 05:41:16 +0000 (14:41 +0900)]
dma data copy ok, but still sprite image not displayed...
astoria-d [Wed, 4 Sep 2013 15:33:19 +0000 (00:33 +0900)]
quartus + modelsim integration
astoria-d [Wed, 4 Sep 2013 14:23:39 +0000 (23:23 +0900)]
cpu, decoder and rom/ram integrated.
astoria-d [Wed, 4 Sep 2013 02:57:01 +0000 (11:57 +0900)]
nes image data extracter updated.
astoria-d [Wed, 4 Sep 2013 02:10:16 +0000 (11:10 +0900)]
Merge branch 'master' of git.sourceforge.jp:/gitroot/motonesfpga/motonesfpga
astoria-d [Wed, 4 Sep 2013 02:09:55 +0000 (11:09 +0900)]
memory module integration
astoria-d [Tue, 3 Sep 2013 05:57:03 +0000 (14:57 +0900)]
dma data copy cpu side ok.
astoria-d [Tue, 3 Sep 2013 03:20:53 +0000 (12:20 +0900)]
decoder updated to reflect dma ready pin modification.
astoria-d [Tue, 3 Sep 2013 02:41:51 +0000 (11:41 +0900)]
dma process ok.
astoria-d [Mon, 2 Sep 2013 03:12:18 +0000 (12:12 +0900)]
Merge branch 'master' of git.sourceforge.jp:/gitroot/motonesfpga/motonesfpga
astoria-d [Mon, 2 Sep 2013 03:11:42 +0000 (12:11 +0900)]
added rom image extract dd script
astoria-d [Sun, 1 Sep 2013 02:04:19 +0000 (11:04 +0900)]
- added cpu/ppu files
- removed debug output
astoria-d [Sun, 1 Sep 2013 01:50:39 +0000 (10:50 +0900)]
- test
astoria-d [Sun, 1 Sep 2013 01:45:07 +0000 (10:45 +0900)]
- DE1 board initial commit
- vga and cpu/ppu clock unified. vga = ppu x 2 multipled. clock driver updted.
astoria-d [Sun, 1 Sep 2013 01:42:34 +0000 (10:42 +0900)]
test 1
astoria-d [Fri, 30 Aug 2013 03:13:19 +0000 (12:13 +0900)]
apu device integrated on the cpu port.
astoria-d [Fri, 30 Aug 2013 02:43:51 +0000 (11:43 +0900)]
removed unneccesary target in Makefile to speed up make time.
renamed dev directory to apu
astoria-d [Fri, 30 Aug 2013 01:44:06 +0000 (10:44 +0900)]
added dev directory in root Makefile
astoria-d [Tue, 27 Aug 2013 06:25:12 +0000 (15:25 +0900)]
Merge branch 'master' of git.sourceforge.jp:/gitroot/motonesfpga/motonesfpga
astoria-d [Tue, 27 Aug 2013 06:24:20 +0000 (15:24 +0900)]
DMA controler (apu i/f) added.