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astoria-d [Sun, 18 Sep 2016 04:50:14 +0000 (13:50 +0900)]
indir bug fix.
astoria-d [Sun, 18 Sep 2016 04:38:27 +0000 (13:38 +0900)]
a4 inst ok.
astoria-d [Sun, 18 Sep 2016 02:33:08 +0000 (11:33 +0900)]
a2 inst all addressing supported.
astoria-d [Sun, 18 Sep 2016 00:33:02 +0000 (09:33 +0900)]
store inst ok.
astoria-d [Sat, 17 Sep 2016 23:16:16 +0000 (08:16 +0900)]
cleaned up
astoria-d [Sat, 17 Sep 2016 14:58:09 +0000 (23:58 +0900)]
jmp inst ok.
astoria-d [Sat, 17 Sep 2016 14:32:19 +0000 (23:32 +0900)]
conditional branch added
astoria-d [Sat, 17 Sep 2016 11:01:12 +0000 (20:01 +0900)]
update
astoria-d [Sat, 17 Sep 2016 10:27:10 +0000 (19:27 +0900)]
pull sp update
astoria-d [Sat, 17 Sep 2016 10:03:14 +0000 (19:03 +0900)]
acc, x, y, status reg updated.
astoria-d [Sat, 17 Sep 2016 07:15:38 +0000 (16:15 +0900)]
rts added
astoria-d [Sat, 17 Sep 2016 04:37:10 +0000 (13:37 +0900)]
sp added.
astoria-d [Sat, 17 Sep 2016 03:43:50 +0000 (12:43 +0900)]
idl reg added
astoria-d [Sat, 17 Sep 2016 02:58:40 +0000 (11:58 +0900)]
state decode rom ok.
astoria-d [Sat, 17 Sep 2016 02:28:05 +0000 (11:28 +0900)]
rom index added
astoria-d [Sat, 17 Sep 2016 02:19:04 +0000 (11:19 +0900)]
inst decode until a2 created.
astoria-d@fc [Fri, 16 Sep 2016 10:50:39 +0000 (19:50 +0900)]
update work...
astoria-d@fc [Fri, 16 Sep 2016 05:47:40 +0000 (14:47 +0900)]
update
astoria-d@fc [Fri, 16 Sep 2016 05:34:07 +0000 (14:34 +0900)]
io bus, r/w, inst reg set ok.
astoria-d@fc [Thu, 15 Sep 2016 10:42:24 +0000 (19:42 +0900)]
main/sub state transition added. currently fake inst fetch is used.
astoria-d@fc [Thu, 15 Sep 2016 01:42:27 +0000 (10:42 +0900)]
new cpu work started.
astoria-d@fc [Thu, 15 Sep 2016 01:23:30 +0000 (10:23 +0900)]
cpu source and ppu stub added.
astoria-d@fc [Thu, 15 Sep 2016 01:17:29 +0000 (10:17 +0900)]
cpu work started.
astoria-d [Wed, 14 Sep 2016 14:27:16 +0000 (23:27 +0900)]
sprite pix processing ok!!!
astoria-d@fc [Wed, 14 Sep 2016 10:08:37 +0000 (19:08 +0900)]
update status reg.
astoria-d@fc [Wed, 14 Sep 2016 09:10:26 +0000 (18:10 +0900)]
sprite display implemented.
astoria-d@fc [Wed, 14 Sep 2016 02:59:16 +0000 (11:59 +0900)]
sprite pattern shift ok.
astoria-d@fc [Tue, 13 Sep 2016 12:11:18 +0000 (21:11 +0900)]
cleaned up meaningless timing
astoria-d@fc [Tue, 13 Sep 2016 11:17:02 +0000 (20:17 +0900)]
sprite pattern fetch ok
astoria-d@fc [Tue, 13 Sep 2016 11:07:31 +0000 (20:07 +0900)]
sprite vram integration
astoria-d@fc [Tue, 13 Sep 2016 09:00:06 +0000 (18:00 +0900)]
sprite copy ok.
astoria-d [Mon, 12 Sep 2016 12:52:22 +0000 (21:52 +0900)]
simplified sprite status.
astoria-d@fc [Mon, 12 Sep 2016 11:19:32 +0000 (20:19 +0900)]
spr evaluation ok.
astoria-d@fc [Mon, 12 Sep 2016 10:20:41 +0000 (19:20 +0900)]
oam clear ok
astoria-d@fc [Mon, 12 Sep 2016 07:53:59 +0000 (16:53 +0900)]
sprite state machine added
astoria-d [Sun, 11 Sep 2016 08:36:22 +0000 (17:36 +0900)]
doc clean up
astoria-d [Sun, 11 Sep 2016 08:35:01 +0000 (17:35 +0900)]
doc clean up
astoria-d [Sun, 11 Sep 2016 08:15:32 +0000 (17:15 +0900)]
bg display ok!!!
astoria-d [Sun, 11 Sep 2016 08:02:08 +0000 (17:02 +0900)]
shift register timing changed.
astoria-d [Sun, 11 Sep 2016 06:16:36 +0000 (15:16 +0900)]
wrong pattern shift timing.
astoria-d [Sun, 11 Sep 2016 05:45:45 +0000 (14:45 +0900)]
pattern test
astoria-d [Sun, 11 Sep 2016 03:57:51 +0000 (12:57 +0900)]
st ii work. signal captured.
astoria-d [Sun, 11 Sep 2016 03:46:24 +0000 (12:46 +0900)]
update
astoria-d [Sun, 11 Sep 2016 03:07:57 +0000 (12:07 +0900)]
vram timing update.
astoria-d [Sun, 11 Sep 2016 02:41:25 +0000 (11:41 +0900)]
dummy testbench updated to emulate ram/rom access.
astoria-d [Sun, 11 Sep 2016 01:27:57 +0000 (10:27 +0900)]
bg display not work. dbg counter added.
astoria-d [Sat, 10 Sep 2016 16:57:07 +0000 (01:57 +0900)]
vga work.
astoria-d [Sat, 10 Sep 2016 16:52:13 +0000 (01:52 +0900)]
vga ok.
astoria-d [Sat, 10 Sep 2016 16:30:39 +0000 (01:30 +0900)]
stii debug start. vga display failed!!
astoria-d [Sat, 10 Sep 2016 15:10:05 +0000 (00:10 +0900)]
wront param name fixed.
astoria-d [Sat, 10 Sep 2016 15:06:18 +0000 (00:06 +0900)]
dma testbench setup timing violation. why??
astoria-d [Sat, 10 Sep 2016 14:51:56 +0000 (23:51 +0900)]
bg display done with rtl...
astoria-d [Sat, 10 Sep 2016 14:26:10 +0000 (23:26 +0900)]
palette bus separated.
astoria-d [Sat, 10 Sep 2016 13:24:44 +0000 (22:24 +0900)]
bg pattern ok on rtl.
astoria-d [Sat, 10 Sep 2016 12:04:39 +0000 (21:04 +0900)]
render working...
astoria-d [Sat, 10 Sep 2016 10:24:45 +0000 (19:24 +0900)]
vram access cs set ok.
astoria-d [Sat, 10 Sep 2016 04:41:00 +0000 (13:41 +0900)]
pos work...
astoria-d [Sat, 10 Sep 2016 04:35:00 +0000 (13:35 +0900)]
render x, y reg set.
astoria-d [Sat, 10 Sep 2016 03:53:01 +0000 (12:53 +0900)]
vga rendering start.
astoria-d [Sat, 10 Sep 2016 03:31:32 +0000 (12:31 +0900)]
sprite ram added.
astoria-d [Sat, 10 Sep 2016 02:36:31 +0000 (11:36 +0900)]
ppu source dir created
astoria-d [Sat, 10 Sep 2016 02:33:35 +0000 (11:33 +0900)]
vram set integration ok.
astoria-d [Sat, 10 Sep 2016 00:56:54 +0000 (09:56 +0900)]
vram instance integrated.
astoria-d [Fri, 9 Sep 2016 14:48:10 +0000 (23:48 +0900)]
ppu register set working...
astoria-d@fc [Fri, 9 Sep 2016 09:45:47 +0000 (18:45 +0900)]
ppu integration start...
astoria-d@fc [Fri, 9 Sep 2016 06:50:45 +0000 (15:50 +0900)]
addr decoder added
astoria-d@fc [Fri, 9 Sep 2016 06:23:15 +0000 (15:23 +0900)]
dummy cpu stub ok.
astoria-d@fc [Thu, 8 Sep 2016 12:43:33 +0000 (21:43 +0900)]
update
astoria-d@fc [Thu, 8 Sep 2016 12:42:15 +0000 (21:42 +0900)]
clock enabler update
astoria-d@fc [Thu, 8 Sep 2016 12:24:32 +0000 (21:24 +0900)]
rtl sim started...
astoria-d@fc [Thu, 8 Sep 2016 11:21:48 +0000 (20:21 +0900)]
new design work...
astoria-d@fc [Thu, 8 Sep 2016 11:05:29 +0000 (20:05 +0900)]
new design work started.
astoria-d@fc [Thu, 8 Sep 2016 10:55:11 +0000 (19:55 +0900)]
clean up
astoria-d@fc [Thu, 8 Sep 2016 10:53:28 +0000 (19:53 +0900)]
clea up
astoria-d@fc [Thu, 8 Sep 2016 10:52:46 +0000 (19:52 +0900)]
renewed de0-cv all files!
astoria-d@fc [Thu, 8 Sep 2016 10:47:17 +0000 (19:47 +0900)]
new block design added
astoria-d@fc [Thu, 8 Sep 2016 09:49:51 +0000 (18:49 +0900)]
exec cycle doc update
astoria-d@fc [Wed, 7 Sep 2016 13:01:22 +0000 (22:01 +0900)]
new state machine design added
astoria-d [Mon, 5 Sep 2016 13:16:45 +0000 (22:16 +0900)]
more work. all codes must be written in synchronized circuit!! thanks 2ch mate!
astoria-d [Mon, 5 Sep 2016 12:39:28 +0000 (21:39 +0900)]
de1 integration. failed to display..
astoria-d [Mon, 5 Sep 2016 12:00:22 +0000 (21:00 +0900)]
update
astoria-d [Sun, 4 Sep 2016 11:57:15 +0000 (20:57 +0900)]
ppu reg read added
astoria-d [Sun, 4 Sep 2016 05:51:37 +0000 (14:51 +0900)]
ppu read test patern added
astoria-d [Sun, 4 Sep 2016 05:13:25 +0000 (14:13 +0900)]
de0-cv integration ok.
astoria-d [Sun, 4 Sep 2016 05:12:49 +0000 (14:12 +0900)]
added de0-cv manual
astoria-d [Sun, 4 Sep 2016 04:43:53 +0000 (13:43 +0900)]
dma test update ok
astoria-d [Sat, 3 Sep 2016 12:26:01 +0000 (21:26 +0900)]
bg, sprite all ok on de1 board!!
astoria-d [Sat, 3 Sep 2016 12:25:21 +0000 (21:25 +0900)]
spr attr reg added.
astoria-d [Sat, 3 Sep 2016 11:27:40 +0000 (20:27 +0900)]
sprite bug fix
astoria-d [Sat, 3 Sep 2016 09:58:20 +0000 (18:58 +0900)]
sprite reg update enabler timing changed..
astoria-d [Sat, 3 Sep 2016 05:47:15 +0000 (14:47 +0900)]
sprite display more work..
astoria-d [Sat, 3 Sep 2016 05:24:57 +0000 (14:24 +0900)]
more spr test
astoria-d [Sat, 3 Sep 2016 03:28:14 +0000 (12:28 +0900)]
doc update
astoria-d [Sat, 3 Sep 2016 03:22:42 +0000 (12:22 +0900)]
sprite work more
astoria-d [Sat, 3 Sep 2016 02:48:17 +0000 (11:48 +0900)]
sprite working..
astoria-d [Sat, 3 Sep 2016 02:16:15 +0000 (11:16 +0900)]
debug sprite on gate leve
astoria-d [Fri, 2 Sep 2016 15:14:53 +0000 (00:14 +0900)]
rtl sim ok for sprite. testbench update
astoria-d [Fri, 2 Sep 2016 12:53:59 +0000 (21:53 +0900)]
diferred reg timing changed.
astoria-d [Fri, 2 Sep 2016 12:38:56 +0000 (21:38 +0900)]
palette color and data register added. color more vivd, stronger contrast. looks good.
bg color is wrong though, lol
astoria-d [Sun, 28 Aug 2016 13:25:55 +0000 (22:25 +0900)]
bg scrolling ok.
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