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motonesfpga/motonesfpga.git
2015-01-15
astoria-d@office
BG image displayed on the real VGA monitor!!!
motonesfpga-gate-0.1.5
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2015-01-14
unknown
vga edge reset adjustment
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2015-01-14
unknown
address latch integration ok
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2015-01-12
astoria-d
vram r/w working
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2015-01-12
astoria-d
rtl simulation env set up.
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2015-01-11
astoria-d
more debug... vga is displayed but still image is broken
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2015-01-09
astoria-d
ppu vga working
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2015-01-09
astoria-d
added vram init sequence
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2015-01-09
astoria-d
debug env update, chr rom added
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2015-01-09
astoria-d
vram components added.
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2015-01-09
astoria-d
debug pins added
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2015-01-09
astoria-d
integration working
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2015-01-09
astoria-d
start ppu impl integration
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2015-01-06
astoria-d
minor update
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2015-01-06
astoria-d
Merge branch 'ppu_test' of git.sourceforge.jp:/gitroot...
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2015-01-06
astoria-d
emulated ppu clock added
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2015-01-06
unknown
doc update
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2015-01-06
astoria-d
prepared vga rendering template
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2015-01-06
astoria-d
vga render integration
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2015-01-06
astoria-d
old render module integrated. now we can start working...
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2015-01-06
astoria-d
new ppm test env set up
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2015-01-06
astoria-d
new ppu/vga integration set up
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2015-01-06
astoria-d
env adjustment
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2015-01-05
unknown
sdram controller eliminated
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2015-01-05
unknown
simulation env updated
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2015-01-05
unknown
merge files from master
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2015-01-05
unknown
merge master files
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2013-12-16
astoria-d
update
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2013-12-03
astoria-d
test clean up
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2013-12-03
astoria-d
ppu test env set up ok...
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2013-12-03
astoria-d
ppu test env setup
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2013-12-03
astoria-d
update
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2013-11-28
astoria-d
simulation minimum interval changed due to pll simulation
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2013-11-28
astoria-d
- merged latest render module
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2013-11-22
astoria-d
sdram & vga integrated, not displayed though....
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2013-11-22
astoria-d
pll lock signal added
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2013-11-22
astoria-d
sdram clk singal change
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2013-11-09
astoria-d
page crossing branch instruction supported!!
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2013-11-09
astoria-d
mem clock updated to 160 MHz
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2013-11-03
astoria-d
vga working
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2013-10-27
astoria-d
test image added
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2013-10-27
astoria-d
ppu address reg set timing updated
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2013-10-20
astoria-d
clean up
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2013-10-20
astoria-d
clean up
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2013-10-20
astoria-d
sdram control clean up
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2013-10-19
astoria-d
sdram integration ok
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2013-10-19
astoria-d
sdram controller integration
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2013-10-14
astoria-d
vga work...
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2013-10-12
astoria-d
vga output working...
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2013-10-12
astoria-d
test vga output working...
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2013-10-12
astoria-d
Merge branch 'master' of git.sourceforge.jp:/gitroot...
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2013-10-12
astoria-d
vga output ok!!
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2013-10-08
astoria-d
test update
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2013-10-08
astoria-d
jmp (ind) test added.
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2013-10-08
astoria-d
a5 instruction test added.
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2013-10-07
astoria-d
a4 instructions regression test added.
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2013-10-07
astoria-d
a2, a3 instruction test added.
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2013-10-07
astoria-d
tsx instruction supported.
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2013-10-06
astoria-d
vga woring...
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2013-10-05
astoria-d
vga test proj added. still working...
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2013-10-05
astoria-d
ppu render debug pin added but cyclone ii runs short...
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2013-10-05
astoria-d
oam data read was ok???
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2013-10-05
astoria-d
ppu integration and bug fix
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2013-10-04
astoria-d
regression test single byte inst test ok
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2013-10-04
astoria-d
- ppu render ram write timing updated.
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2013-10-04
astoria-d
regression test update
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2013-10-04
astoria-d
regression test update
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2013-10-04
astoria-d
regression test updated.
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2013-10-02
astoria-d
regression test update
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2013-10-01
astoria-d
regression test updated (print func ok.)
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2013-10-01
astoria-d
regression test working...
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2013-10-01
astoria-d
regression test created
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2013-09-30
astoria-d
ppu integrated. still working...
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2013-09-30
astoria-d
- input data latch invalid data latch bug fixed.
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2013-09-30
astoria-d
modified input data latch to stop using latch, but...
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2013-09-30
astoria-d
segment size fixed
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2013-09-30
astoria-d
Merge branch 'master' of git.sourceforge.jp:/gitroot...
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2013-09-30
astoria-d
de1 env test case added.
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2013-09-30
astoria-d
segment size modified
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2013-09-30
astoria-d
merge updates
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2013-09-30
astoria-d
- name tbl 0/1 write clock synchronized
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2013-09-30
astoria-d
added .gitignore file
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2013-09-29
astoria-d
async param test
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2013-09-27
astoria-d
ram timing ctrl modified.
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2013-09-27
astoria-d
- merge decoder updates
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2013-09-26
astoria-d
test timing aligned.
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2013-09-26
astoria-d
- decoder clean up
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2013-09-26
astoria-d
merge updates
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2013-09-26
astoria-d
ram write timing changed
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2013-09-26
astoria-d
- module structure reorganizezd
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2013-09-25
astoria-d
clean up
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2013-09-25
astoria-d
status register bug fixed!!
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2013-09-25
astoria-d
status reg test ok
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2013-09-25
astoria-d
- ghdl env merge
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2013-09-25
astoria-d
code merge
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2013-09-25
astoria-d
wrong segment number fixed
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2013-09-25
astoria-d
4k segment remapping added to test app.
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2013-09-25
astoria-d
clean up
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2013-09-25
astoria-d
code clean up
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2013-09-25
astoria-d
module structure re-organized
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