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motonesfpga/motonesfpga.git
2016-09-17
astoria-d
jmp inst ok.
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2016-09-17
astoria-d
conditional branch added
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2016-09-17
astoria-d
update
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2016-09-17
astoria-d
pull sp update
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2016-09-17
astoria-d
acc, x, y, status reg updated.
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2016-09-17
astoria-d
rts added
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2016-09-17
astoria-d
sp added.
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2016-09-17
astoria-d
idl reg added
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2016-09-17
astoria-d
state decode rom ok.
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2016-09-17
astoria-d
rom index added
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2016-09-17
astoria-d
inst decode until a2 created.
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2016-09-16
astoria-d@fc
update work...
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2016-09-16
astoria-d@fc
update
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2016-09-16
astoria-d@fc
io bus, r/w, inst reg set ok.
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2016-09-15
astoria-d@fc
main/sub state transition added. currently fake inst...
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2016-09-15
astoria-d@fc
new cpu work started.
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2016-09-15
astoria-d@fc
cpu source and ppu stub added.
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2016-09-15
astoria-d@fc
cpu work started.
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2016-09-14
astoria-d
sprite pix processing ok!!!
ppu-work-160915
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2016-09-14
astoria-d@fc
update status reg.
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2016-09-14
astoria-d@fc
sprite display implemented.
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2016-09-14
astoria-d@fc
sprite pattern shift ok.
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2016-09-13
astoria-d@fc
cleaned up meaningless timing
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2016-09-13
astoria-d@fc
sprite pattern fetch ok
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2016-09-13
astoria-d@fc
sprite vram integration
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2016-09-13
astoria-d@fc
sprite copy ok.
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2016-09-12
astoria-d
simplified sprite status.
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2016-09-12
astoria-d@fc
spr evaluation ok.
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2016-09-12
astoria-d@fc
oam clear ok
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2016-09-12
astoria-d@fc
sprite state machine added
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2016-09-11
astoria-d
doc clean up
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2016-09-11
astoria-d
doc clean up
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2016-09-11
astoria-d
bg display ok!!!
ppu-work-160911
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2016-09-11
astoria-d
shift register timing changed.
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2016-09-11
astoria-d
wrong pattern shift timing.
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2016-09-11
astoria-d
pattern test
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2016-09-11
astoria-d
st ii work. signal captured.
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2016-09-11
astoria-d
update
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2016-09-11
astoria-d
vram timing update.
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2016-09-11
astoria-d
dummy testbench updated to emulate ram/rom access.
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2016-09-11
astoria-d
bg display not work. dbg counter added.
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2016-09-10
astoria-d
vga work.
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2016-09-10
astoria-d
vga ok.
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2016-09-10
astoria-d
stii debug start. vga display failed!!
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2016-09-10
astoria-d
wront param name fixed.
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2016-09-10
astoria-d
dma testbench setup timing violation. why??
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2016-09-10
astoria-d
bg display done with rtl...
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2016-09-10
astoria-d
palette bus separated.
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2016-09-10
astoria-d
bg pattern ok on rtl.
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2016-09-10
astoria-d
render working...
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2016-09-10
astoria-d
vram access cs set ok.
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2016-09-10
astoria-d
pos work...
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2016-09-10
astoria-d
render x, y reg set.
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2016-09-10
astoria-d
vga rendering start.
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2016-09-10
astoria-d
sprite ram added.
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2016-09-10
astoria-d
ppu source dir created
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2016-09-10
astoria-d
vram set integration ok.
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2016-09-10
astoria-d
vram instance integrated.
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2016-09-09
astoria-d
ppu register set working...
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2016-09-09
astoria-d@fc
ppu integration start...
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2016-09-09
astoria-d@fc
addr decoder added
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2016-09-09
astoria-d@fc
dummy cpu stub ok.
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2016-09-08
astoria-d@fc
update
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2016-09-08
astoria-d@fc
clock enabler update
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2016-09-08
astoria-d@fc
rtl sim started...
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2016-09-08
astoria-d@fc
new design work...
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2016-09-08
astoria-d@fc
new design work started.
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2016-09-08
astoria-d@fc
clean up
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2016-09-08
astoria-d@fc
clea up
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2016-09-08
astoria-d@fc
renewed de0-cv all files!
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2016-09-08
astoria-d@fc
new block design added
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2016-09-08
astoria-d@fc
exec cycle doc update
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2016-09-07
astoria-d@fc
new state machine design added
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2016-09-05
astoria-d
more work. all codes must be written in synchronized...
ppu-work-160905
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2016-09-05
astoria-d
de1 integration. failed to display..
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2016-09-05
astoria-d
update
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2016-09-04
astoria-d
ppu reg read added
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2016-09-04
astoria-d
ppu read test patern added
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2016-09-04
astoria-d
de0-cv integration ok.
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2016-09-04
astoria-d
added de0-cv manual
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2016-09-04
astoria-d
dma test update ok
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2016-09-03
astoria-d
bg, sprite all ok on de1 board!!
ppu-work-160903
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2016-09-03
astoria-d
spr attr reg added.
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2016-09-03
astoria-d
sprite bug fix
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2016-09-03
astoria-d
sprite reg update enabler timing changed..
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2016-09-03
astoria-d
sprite display more work..
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2016-09-03
astoria-d
more spr test
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2016-09-03
astoria-d
doc update
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2016-09-03
astoria-d
sprite work more
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2016-09-03
astoria-d
sprite working..
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2016-09-03
astoria-d
debug sprite on gate leve
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2016-09-02
astoria-d
rtl sim ok for sprite. testbench update
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2016-09-02
astoria-d
diferred reg timing changed.
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2016-09-02
astoria-d
palette color and data register added. color more vivd...
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2016-08-28
astoria-d
bg scrolling ok.
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2016-08-28
astoria-d
enabled scroll test ok...
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2016-08-28
astoria-d
vram timing changed.
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2016-08-28
astoria-d
vram timing changed (restored).
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2016-08-28
astoria-d
ppu deferred clock added, ram timing changed.
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2016-08-28
astoria-d
added vram access register. currently bg displayed...
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